mirror of
https://git.missingno.dev/kolibrios-nvme-driver/
synced 2024-12-22 22:08:47 +01:00
add num
field to each detected NVMe device
This commit is contained in:
parent
f612befee6
commit
43f29c791a
@ -465,6 +465,7 @@ proc detect_nvme
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mov byte [ebx + pcidev.bus], dl
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mov byte [ebx + pcidev.bus], dl
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movzx edx, byte [eax + PCIDEV.devfn]
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movzx edx, byte [eax + PCIDEV.devfn]
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mov byte [ebx + pcidev.devfn], dl
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mov byte [ebx + pcidev.devfn], dl
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mov dword [ebx + pcidev.num], ecx
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pop edx
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pop edx
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jmp .next_dev
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jmp .next_dev
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@ -516,7 +517,7 @@ proc device_is_compat stdcall, pci:dword
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invoke MapIoMem, edx, ecx, PG_SW+PG_NOCACHE
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invoke MapIoMem, edx, ecx, PG_SW+PG_NOCACHE
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mov dword [esi + pcidev.io_addr], eax
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mov dword [esi + pcidev.io_addr], eax
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mov eax, dword [eax + NVME_MMIO.VS]
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mov eax, dword [eax + NVME_MMIO.VS]
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DEBUGF DBG_INFO, "(NVMe) Controller version: 0x%x\n", eax
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DEBUGF DBG_INFO, "nvme%u: Controller version: 0x%x\n", [esi + pcidev.num], eax
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mov dword [esi + pcidev.version], eax
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mov dword [esi + pcidev.version], eax
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pop ecx edx esi
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pop ecx edx esi
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xor eax, eax
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xor eax, eax
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@ -556,7 +557,7 @@ proc nvme_init stdcall, pci:dword
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jz .exit_fail
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jz .exit_fail
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; Reset controller before we configure it
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; Reset controller before we configure it
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stdcall nvme_controller_reset, edi
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stdcall nvme_controller_reset, esi
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if __DEBUG__
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if __DEBUG__
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stdcall nvme_wait, edi
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stdcall nvme_wait, edi
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end if
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end if
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@ -629,14 +630,14 @@ proc nvme_init stdcall, pci:dword
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; Attach interrupt handler
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; Attach interrupt handler
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movzx eax, byte [esi + pcidev.iline]
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movzx eax, byte [esi + pcidev.iline]
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DEBUGF DBG_INFO, "(NVMe) Attaching interrupt handler to IRQ %u\n", eax
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DEBUGF DBG_INFO, "nvme%u: Attaching interrupt handler to IRQ %u\n", [esi + pcidev.num], eax
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invoke AttachIntHandler, eax, irq_handler, 0
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invoke AttachIntHandler, eax, irq_handler, 0
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test eax, eax
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test eax, eax
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jz .exit_fail
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jz .exit_fail
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DEBUGF DBG_INFO, "(NVMe) Successfully attached interrupt handler\n"
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DEBUGF DBG_INFO, "nvme%u: Successfully attached interrupt handler\n", [esi + pcidev.num]
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; Restart the controller
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; Restart the controller
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stdcall nvme_controller_start, edi
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stdcall nvme_controller_start, esi
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;mov dword [edi + NVME_MMIO.INTMC], 0xffffffff ; re-enable interrupts
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;mov dword [edi + NVME_MMIO.INTMC], 0xffffffff ; re-enable interrupts
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invoke KernelAlloc, 0x1000
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invoke KernelAlloc, 0x1000
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@ -649,15 +650,15 @@ proc nvme_init stdcall, pci:dword
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mov edi, ebx
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mov edi, ebx
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mov eax, dword [edi + IDENTC.nn]
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mov eax, dword [edi + IDENTC.nn]
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mov dword [esi + pcidev.nn], eax
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mov dword [esi + pcidev.nn], eax
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DEBUGF DBG_INFO, "(NVMe) Namespace Count: %u\n", eax
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DEBUGF DBG_INFO, "nvme%u: Namespace Count: %u\n", [esi + pcidev.num], eax
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lea ebx, byte [edi + IDENTC.sn]
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lea ebx, byte [edi + IDENTC.sn]
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lea eax, byte [esi + pcidev.serial]
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lea eax, byte [esi + pcidev.serial]
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stdcall memcpy, eax, ebx, 20
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stdcall memcpy, eax, ebx, 20
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DEBUGF DBG_INFO, "(NVMe) Serial Number: %s\n", eax
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DEBUGF DBG_INFO, "nvme%u: Serial Number: %s\n", [esi + pcidev.num], eax
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add ebx, 20
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add ebx, 20
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lea eax, byte [esi + pcidev.model]
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lea eax, byte [esi + pcidev.model]
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stdcall memcpy, eax, ebx, 40
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stdcall memcpy, eax, ebx, 40
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DEBUGF DBG_INFO, "(NVMe) Model: %s\n", eax
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DEBUGF DBG_INFO, "nvme%u: Model: %s\n", [esi + pcidev.num], eax
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mov edx, dword [esi + pcidev.version]
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mov edx, dword [esi + pcidev.version]
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cmp edx, VS140
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cmp edx, VS140
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@ -666,7 +667,7 @@ proc nvme_init stdcall, pci:dword
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mov al, byte [edi + IDENTC.cntrltype]
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mov al, byte [edi + IDENTC.cntrltype]
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cmp al, CNTRLTYPE_IO_CONTROLLER
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cmp al, CNTRLTYPE_IO_CONTROLLER
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jne .exit_fail
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jne .exit_fail
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DEBUGF DBG_INFO, "(NVMe) I/O controller detected...\n"
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DEBUGF DBG_INFO, "nvme%u: I/O controller detected...\n", [esi + pcidev.num]
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@@:
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@@:
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mov al, byte [edi + IDENTC.sqes]
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mov al, byte [edi + IDENTC.sqes]
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@ -685,7 +686,10 @@ proc nvme_init stdcall, pci:dword
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mov esi, dword [esi + pcidev.queue_entries]
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mov esi, dword [esi + pcidev.queue_entries]
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mov esi, dword [esi + NVM_QUEUE_ENTRY.cq_ptr]
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mov esi, dword [esi + NVM_QUEUE_ENTRY.cq_ptr]
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mov eax, dword [esi + sizeof.CQ_ENTRY + CQ_ENTRY.cdw0]
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mov eax, dword [esi + sizeof.CQ_ENTRY + CQ_ENTRY.cdw0]
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DEBUGF DBG_INFO, "(NVMe) Set Features CDW0: 0x%x\n", eax
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if __DEBUG__
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mov esi, [pci]
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DEBUGF DBG_INFO, "nvme%u: Set Features CDW0: 0x%x\n", [esi + pcidev.num], eax
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end if
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test ax, ax ; Number of I/O Submission Queues allocated
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test ax, ax ; Number of I/O Submission Queues allocated
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jz .exit_fail
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jz .exit_fail
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shl eax, 16
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shl eax, 16
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@ -716,7 +720,7 @@ proc nvme_init stdcall, pci:dword
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jz .exit_fail ; No active NSIDS
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jz .exit_fail ; No active NSIDS
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mov esi, [pci]
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mov esi, [pci]
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mov dword [esi + pcidev.nsid], eax
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mov dword [esi + pcidev.nsid], eax
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DEBUGF DBG_INFO, "(NVMe) Found active NSID: %u\n", eax
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DEBUGF DBG_INFO, "nvme%u: Found active NSID: %u\n", [esi + pcidev.num], eax
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else
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else
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mov esi, [pci]
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mov esi, [pci]
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xor eax, eax
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xor eax, eax
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@ -730,24 +734,27 @@ proc nvme_init stdcall, pci:dword
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invoke GetPhysAddr
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invoke GetPhysAddr
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stdcall nvme_identify, [pci], [esi + pcidev.nsid], eax, CNS_IDNS
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stdcall nvme_identify, [pci], [esi + pcidev.nsid], eax, CNS_IDNS
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mov al, byte [edi + IDENTN.nsfeat]
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mov al, byte [edi + IDENTN.nsfeat]
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DEBUGF DBG_INFO, "(nvme%un%u): Namespace Features: 0x%x\n", 0, [esi + pcidev.nsid], al
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DEBUGF DBG_INFO, "nvme%un%u: Namespace Features: 0x%x\n", [esi + pcidev.num], [esi + pcidev.nsid], al
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DEBUGF DBG_INFO, "(nvme%un%u): Namespace Size: %u + %u logical blocks\n", 0, [esi + pcidev.nsid], [edi + IDENTN.nsze], [edi + IDENTN.nsze + 4]
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DEBUGF DBG_INFO, "nvme%un%u: Namespace Size: %u + %u logical blocks\n", [esi + pcidev.num], [esi + pcidev.nsid], [edi + IDENTN.nsze], [edi + IDENTN.nsze + 4]
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DEBUGF DBG_INFO, "(nvme%un%u): Namespace Capacity: %u + %u logical blocks\n", 0, [esi + pcidev.nsid], [edi + IDENTN.ncap], [edi + IDENTN.ncap + 4]
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DEBUGF DBG_INFO, "nvme%un%u: Namespace Capacity: %u + %u logical blocks\n", [esi + pcidev.num], [esi + pcidev.nsid], [edi + IDENTN.ncap], [edi + IDENTN.ncap + 4]
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mov eax, dword [edi + IDENTN.lbaf0]
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mov eax, dword [edi + IDENTN.lbaf0]
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shr eax, 16 ; Get LBADS
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shr eax, 16 ; Get LBADS
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and eax, 0xff
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and eax, 0xff
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stdcall pow2, eax
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stdcall pow2, eax
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DEBUGF DBG_INFO, "(nvme%un%u): Namespace LBA Data Size: %u\n", 0, [esi + pcidev.nsid], eax
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DEBUGF DBG_INFO, "nvme%un%u: Namespace LBA Data Size: %u\n", [esi + pcidev.num], [esi + pcidev.nsid], eax
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invoke KernelFree, edi
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invoke KernelFree, edi
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DEBUGF DBG_INFO, "(NVMe) Successfully initialized driver!\n"
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DEBUGF DBG_INFO, "nvme%u: Successfully initialized driver\n", [esi + pcidev.num]
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xor eax, eax
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xor eax, eax
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inc eax
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inc eax
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pop edi esi ebx
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pop edi esi ebx
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ret
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ret
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.exit_fail:
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.exit_fail:
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DEBUGF DBG_INFO, "(NVMe) failed to initialize controller\n"
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if __DEBUG__
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mov esi, [pci]
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DEBUGF DBG_INFO, "nvme%u: failed to initialize controller\n", [esi + pcidev.num]
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end if
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xor eax, eax
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xor eax, eax
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pop edi esi ebx
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pop edi esi ebx
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ret
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ret
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@ -767,36 +774,38 @@ proc get_new_cid stdcall, pci:dword, y:dword
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endp
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endp
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proc nvme_controller_reset stdcall, mmio:dword
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proc nvme_controller_reset stdcall, pci:dword
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DEBUGF DBG_INFO, "(NVMe) Resetting Controller...\n"
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push esi edi
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push edi
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mov esi, [pci]
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mov edi, dword [mmio]
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DEBUGF DBG_INFO, "nvme%u: Resetting Controller...\n", [esi + pcidev.num]
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mov edi, dword [esi + pcidev.io_addr]
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and dword [edi + NVME_MMIO.CC], 0xfffffffe ; CC.EN = 0
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and dword [edi + NVME_MMIO.CC], 0xfffffffe ; CC.EN = 0
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; Wait for controller to be brought to idle state, CSTS.RDY should be cleared to 0 when this happens
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; Wait for controller to be brought to idle state, CSTS.RDY should be cleared to 0 when this happens
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.wait:
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.wait:
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test dword [edi + NVME_MMIO.CSTS], CSTS_RDY
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test dword [edi + NVME_MMIO.CSTS], CSTS_RDY
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jnz .wait
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jnz .wait
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DEBUGF DBG_INFO, "(NVMe) Successfully reset controller...\n"
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DEBUGF DBG_INFO, "nvme%u: Successfully reset controller...\n", [esi + pcidev.num]
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pop edi
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pop edi esi
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ret
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ret
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endp
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endp
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proc nvme_controller_start stdcall, mmio:dword
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proc nvme_controller_start stdcall, pci:dword
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DEBUGF DBG_INFO, "(NVMe) Starting Controller...\n"
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push esi edi
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push edi
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mov esi, [pci]
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mov edi, dword [mmio]
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DEBUGF DBG_INFO, "nvme%u: Starting Controller...\n", [esi + pcidev.num]
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mov edi, dword [esi + pcidev.io_addr]
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or dword [edi + NVME_MMIO.CC], 1 ; CC.EN = 1
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or dword [edi + NVME_MMIO.CC], 1 ; CC.EN = 1
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; Wait for controller to be brought into active state, CSTS.RDY should be set to 1 when this happens
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; Wait for controller to be brought into active state, CSTS.RDY should be set to 1 when this happens
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.wait:
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.wait:
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test dword [edi + NVME_MMIO.CSTS], CSTS_RDY
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test dword [edi + NVME_MMIO.CSTS], CSTS_RDY
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jz .wait
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jz .wait
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DEBUGF DBG_INFO, "(NVMe) Successfully started controller...\n"
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DEBUGF DBG_INFO, "nvme%u: Successfully started controller...\n", [esi + pcidev.num]
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pop edi
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pop edi esi
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ret
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ret
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endp
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endp
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@ -1009,7 +1018,6 @@ proc irq_handler
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; a fatal error or if a completion is not received for a deletion
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; a fatal error or if a completion is not received for a deletion
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; of a submission or completion queue (section 10.1 - page 400 of NVMe 1.4 spec)
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; of a submission or completion queue (section 10.1 - page 400 of NVMe 1.4 spec)
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;mov esi, dword [p_nvme_devices]
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;mov esi, dword [p_nvme_devices]
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;mov esi, dword [esi + pcidev.io_addr]
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;stdcall nvme_controller_reset, esi
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;stdcall nvme_controller_reset, esi
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;stdcall nvme_controller_start, esi
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;stdcall nvme_controller_start, esi
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;jmp .end
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;jmp .end
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@ -308,6 +308,7 @@ struct pcidev
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devfn db ?
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devfn db ?
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ipin db ?
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ipin db ?
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iline db ?
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iline db ?
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num dd ?
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io_addr dd ?
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io_addr dd ?
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queue_entries dd ?
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queue_entries dd ?
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version dd ?
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version dd ?
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