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https://git.missingno.dev/kolibrios-nvme-driver/
synced 2025-01-08 22:16:13 +01:00
more refactoring and fixes
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@ -540,21 +540,31 @@ proc nvme_init stdcall, pci:dword
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test eax, eax
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test eax, eax
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jz .exit_fail
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jz .exit_fail
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mov dword [esi + pcidev.sq_ptr], eax
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mov dword [esi + pcidev.sq_ptr], eax
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DEBUGF DBG_INFO, "(NVMe) ASQ: Virtual Address: 0x%x\n", eax
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invoke GetPhysAddr
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invoke GetPhysAddr
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DEBUGF DBG_INFO, "(NVMe) ASQ: Physical Address: 0x%x\n", eax
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mov dword [edi + NVME_MMIO.ASQ], eax
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mov dword [edi + NVME_MMIO.ASQ], eax
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and dword [edi + NVME_MMIO.ASQ + 4], 0
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and dword [edi + NVME_MMIO.ASQ + 4], 0
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invoke KernelAlloc, 0x1000
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invoke KernelAlloc, 0x1000
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test eax, eax
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test eax, eax
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jz .exit_fail
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jz .exit_fail
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mov dword [esi + pcidev.cq_ptr], eax
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mov dword [esi + pcidev.cq_ptr], eax
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DEBUGF DBG_INFO, "(NVMe) ACQ: Virtual Address: 0x%x\n", eax
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invoke GetPhysAddr
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invoke GetPhysAddr
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DEBUGF DBG_INFO, "(NVMe) ACQ: Physical Address: 0x%x\n", eax
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mov dword [edi + NVME_MMIO.ACQ], eax
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mov dword [edi + NVME_MMIO.ACQ], eax
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and dword [edi + NVME_MMIO.ACQ + 4], 0
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and dword [edi + NVME_MMIO.ACQ + 4], 0
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stdcall memset, dword [esi + pcidev.sq_ptr], 0, sizeof.SQ_ENTRY * NVM_ASQS
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stdcall memset, dword [esi + pcidev.cq_ptr], 0, sizeof.CQ_ENTRY * NVM_ACQS
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; Allocate list of queues
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invoke KernelAlloc, sizeof.NVM_QUEUE * NVM_ASQS
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test eax, eax
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jz .exit_fail
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mov dword [esi + pcidev.queue_ptr], eax
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stdcall memset, eax, 0, sizeof.NVM_QUEUE * NVM_ASQS
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; we want to disable all interrupts for now, since the controller randomly
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; generates interrupts while starting up
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mov dword [edi + NVME_MMIO.INTMS], 0xffffffff
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; Attach interrupt handler
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; Attach interrupt handler
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movzx eax, byte [esi + pcidev.iline]
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movzx eax, byte [esi + pcidev.iline]
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DEBUGF DBG_INFO, "(NVMe) Attaching interrupt handler to IRQ %u\n", eax
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DEBUGF DBG_INFO, "(NVMe) Attaching interrupt handler to IRQ %u\n", eax
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@ -565,6 +575,7 @@ proc nvme_init stdcall, pci:dword
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; Restart the controller
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; Restart the controller
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stdcall nvme_controller_start, edi
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stdcall nvme_controller_start, edi
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mov dword [edi + NVME_MMIO.INTMC], 0xffffffff ; re-enable interrupts
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invoke KernelAlloc, 0x1000
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invoke KernelAlloc, 0x1000
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test eax, eax
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test eax, eax
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@ -631,7 +642,7 @@ proc nvme_wait stdcall, mmio:dword
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mov esi, dword [esi + NVME_MMIO.CAP]
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mov esi, dword [esi + NVME_MMIO.CAP]
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and esi, CAP_TO
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and esi, CAP_TO
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shr esi, 24
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shr esi, 24
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imul esi, 50
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imul esi, 100 ; TODO: bad time delay, set to appropriate value later
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invoke Sleep
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invoke Sleep
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pop esi
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pop esi
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ret
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ret
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@ -656,7 +667,6 @@ proc sqytdbl_write stdcall, pci:dword, y:byte, sqt:word
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DEBUGF DBG_INFO, "(NVMe) Writing to submission queue 0x%x doorbell register\n", ebx
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DEBUGF DBG_INFO, "(NVMe) Writing to submission queue 0x%x doorbell register\n", ebx
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mov esi, [esi + pcidev.io_addr]
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mov esi, [esi + pcidev.io_addr]
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DEBUGF DBG_INFO, "(NVMe) MMIO: %x\n", esi
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mov ax, [sqt]
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mov ax, [sqt]
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mov word [esi + ebx], ax ; Write to register
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mov word [esi + ebx], ax ; Write to register
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pop esi ebx
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pop esi ebx
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@ -665,23 +675,24 @@ proc sqytdbl_write stdcall, pci:dword, y:byte, sqt:word
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endp
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endp
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; Writes to completion queue 'y' head doorbell
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; Writes to completion queue 'y' head doorbell
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proc cqyhdbl_write stdcall, pci:dword, y:byte, cqh:word
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proc cqyhdbl_write stdcall, pci:dword, y:byte
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push esi
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push esi edi
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mov esi, [pci]
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mov esi, [pci]
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; 1000h + ((2y + 1) * (4 << CAP.DSTRD))
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; 1000h + ((2y + 1) * (4 << CAP.DSTRD))
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xor eax, eax
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movzx eax, [y]
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mov cl, [y]
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shl al, 1
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shl eax, cl
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inc al
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inc eax
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mov dx, 4
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mov edx, 4
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mov cl, byte [esi + pcidev.dstrd]
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mov cl, byte [esi + pcidev.dstrd]
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shl edx, cl
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shl dx, cl
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imul edx, eax
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imul dx, ax
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add edx, 0x1000
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add dx, 0x1000
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movzx eax, [cqh]
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movzx ecx, [y]
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mov edi, dword [esi + pcidev.queue_ptr]
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mov ax, word [edi + ecx * sizeof.NVM_QUEUE + NVM_QUEUE.head] ; get head for completion queue Y
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cmp ax, NVM_ACQS
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cmp ax, NVM_ACQS
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jl @f
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jl @f
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xor ax, ax
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xor ax, ax
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@ -689,9 +700,10 @@ proc cqyhdbl_write stdcall, pci:dword, y:byte, cqh:word
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@@:
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@@:
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inc ax
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inc ax
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mov esi, dword [esi + pcidev.io_addr]
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mov esi, dword [esi + pcidev.io_addr]
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;DEBUGF DBG_INFO, "(NVMe) Writing to CQ%uHDBL\n", edx
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DEBUGF DBG_INFO, "(NVMe) Writing to completion queue doorbell register 0x%x: %u\n", dx, ax
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mov word [esi + edx], ax ; Write to CQyHDBL
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mov word [esi + edx], ax ; Write to CQyHDBL
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pop esi
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mov word [edi + ecx * sizeof.NVM_QUEUE + NVM_QUEUE.head], ax
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pop edi esi
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ret
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ret
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endp
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endp
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@ -700,16 +712,18 @@ proc write_admin_cmd stdcall, pci:dword
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push esi
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push esi
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mov esi, [pci]
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mov esi, [pci]
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mov ax, word [esi + pcidev.sq_adm_tail]
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mov esi, dword [esi + pcidev.queue_ptr]
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mov ax, word [esi + NVM_QUEUE.tail]
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cmp ax, NVM_ASQS
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cmp ax, NVM_ASQS
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jl @f
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jl @f
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xor ax, ax
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xor ax, ax
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@@:
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@@:
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mov word [esi + pcidev.sq_adm_tail], ax
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mov esi, [pci]
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mov esi, dword [esi + pcidev.io_addr]
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mov esi, dword [esi + pcidev.io_addr]
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inc ax
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inc ax
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mov word [esi + 0x1000], ax
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mov word [esi + 0x1000], ax
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mov word [esi + NVM_QUEUE.tail], ax
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pop esi
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pop esi
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ret
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ret
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@ -758,8 +772,8 @@ proc irq_handler
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jmp .exit
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jmp .exit
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@@:
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@@:
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stdcall cqyhdbl_write, [p_nvme_devices], 0, 0x0
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mov dword [esi + NVME_MMIO.INTMC], 0x1
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mov dword [esi + NVME_MMIO.INTMC], 0x1
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stdcall cqyhdbl_write, [p_nvme_devices], 0
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.exit:
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.exit:
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; Interrupt handled by driver, return 1
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; Interrupt handled by driver, return 1
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