mirror of
https://git.missingno.dev/kolibrios-nvme-driver/
synced 2024-12-22 22:08:47 +01:00
lots of refactoring and fixes
This commit is contained in:
parent
7a2af2dca9
commit
74c5edd315
@ -45,10 +45,10 @@ proc START c, reason:dword
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mov ebx, eax
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mov ebx, eax
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.loop:
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.loop:
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stdcall device_is_compat, dword [ebx + ecx * sizeof.pcidev + pcidev.bus], dword [ebx + ecx * sizeof.pcidev + pcidev.devfn]
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stdcall device_is_compat, dword [ebx + ecx * sizeof.pcidev]
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test eax, eax
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test eax, eax
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jz @f
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jz @f
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stdcall nvme_init, dword [ebx + ecx * sizeof.pcidev + pcidev.bus], dword [ebx + ecx * sizeof.pcidev + pcidev.devfn]
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stdcall nvme_init, dword [ebx + ecx * sizeof.pcidev]
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@@:
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@@:
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inc ecx
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inc ecx
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@ -85,14 +85,16 @@ endp
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proc memset stdcall, p_data:dword, val:byte, sz:dword
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proc memset stdcall, p_data:dword, val:byte, sz:dword
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push ebx ecx edx
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mov edx, [sz]
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mov edx, [sz]
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mov bh, [val]
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mov bl, [val]
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xor ecx, ecx
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xor ecx, ecx
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@@:
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@@:
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mov byte [p_data + ecx], bh
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mov byte [p_data + ecx], bl
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inc ecx
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inc ecx
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cmp ecx, edx
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cmp ecx, edx
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jne @b
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jne @b
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pop edx ecx ebx
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ret
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ret
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endp
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endp
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@ -115,8 +117,8 @@ proc nvme_identify stdcall, nsid:dword, dptr:dword, cns:byte
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mov eax, dword [dptr]
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mov eax, dword [dptr]
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mov dword [esp + SQ_ENTRY.dptr], eax
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mov dword [esp + SQ_ENTRY.dptr], eax
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mov dword [esp + SQ_ENTRY.cdw0], ADM_CMD_IDENTIFY ; TODO: setting CID to 0 for now but later on keep a unique list of identifiers
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mov dword [esp + SQ_ENTRY.cdw0], ADM_CMD_IDENTIFY ; TODO: setting CID to 0 for now but later on keep a unique list of identifiers
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mov ah, byte [cns]
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mov al, byte [cns]
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mov byte [esp + SQ_ENTRY.cdw10], ah
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mov byte [esp + SQ_ENTRY.cdw10], al
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stdcall submit_asq, esp
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stdcall submit_asq, esp
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add esp, sizeof.SQ_ENTRY
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add esp, sizeof.SQ_ENTRY
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@ -144,7 +146,7 @@ proc detect_nvme
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.found_dev:
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.found_dev:
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push edx eax
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push edx eax
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PDEBUGF DBG_INFO, "PCI(%u.%u.%u): Detected NVMe device...\n", byte [eax + PCIDEV.bus], [eax + PCIDEV.devfn]
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PDEBUGF DBG_INFO, "PCI(%u.%u.%u): Detected NVMe device...\n", byte [eax + PCIDEV.bus], byte [eax + PCIDEV.devfn]
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cmp dword [pcidevs_len], TOTAL_PCIDEVS
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cmp dword [pcidevs_len], TOTAL_PCIDEVS
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jne @f
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jne @f
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pop eax edx
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pop eax edx
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@ -184,39 +186,55 @@ proc detect_nvme
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endp
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endp
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proc device_is_compat, bus:byte, devfn:byte
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proc device_is_compat stdcall, pci:dword
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invoke PciRead32, dword [bus], dword [devfn], PCI_header00.base_addr_0
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push ebx
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invoke PciRead32, dword [pci + pcidev.bus], dword [pci + pcidev.devfn], PCI_header00.base_addr_0
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and eax, 0xfffffff0
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and eax, 0xfffffff0
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test eax, eax
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test eax, eax
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jz .exit_fail
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jz .failure
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invoke MapIoMem, eax, sizeof.NVME_REG_MAP, PG_SW+PG_NOCACHE
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invoke MapIoMem, eax, sizeof.NVME_REG_MAP, PG_SW+PG_NOCACHE
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test eax, eax
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test eax, eax
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jz .exit_fail
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jz .failure
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mov dword [p_mmap], eax
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mov dword [pci + pcidev.mmio_ptr], eax
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mov ebx, dword [eax + NVME_REG_MAP.VS]
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if __DEBUG__
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push ecx
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mov ecx, ebx
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shr ecx, 16
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PDEBUGF DBG_INFO, "PCI(%u.%u.%u): NVMe controller version: %u.%u.%u\n", byte [pci + pcidev.bus], byte [pci + pcidev.devfn], ecx, bh, bl
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pop ecx
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end if
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cmp ebx, NVM_SUPPORTED_CONTROLLER_VERSION
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jne .unsupported
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PDEBUGF DBG_INFO, "PCI(%u.%u.%u): NVMe controller version is supported\n", byte [pci + pcidev.bus], byte [pci + pcidev.devfn]
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xor eax, eax
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xor eax, eax
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inc eax
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inc eax
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pop ebx
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ret
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ret
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.exit_fail:
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.unsupported:
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PDEBUGF DBG_INFO, "PCI(%u.%u.%u): incompatible NVMe device\n", [bus], [devfn]
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PDEBUGF DBG_INFO, "PCI(%u.%u.%u): unsupported controller version\n", byte [pci + pcidev.bus], byte [pci + pcidev.devfn]
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.failure:
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PDEBUGF DBG_INFO, "PCI(%u.%u.%u): something went wrong checking NVMe device compatibility\n", byte [pci + pcidev.bus], byte [pci + pcidev.devfn]
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xor eax, eax
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xor eax, eax
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pop ebx
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ret
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ret
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endp
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endp
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; nvme_init: Initializes the NVMe controller
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; nvme_init: Initializes the NVMe controller
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proc nvme_init, bus:byte, devfn:byte
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proc nvme_init stdcall, pci:dword
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test eax, eax
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push ebx ecx
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jz .exit_fail
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mov eax, dword [pci + pcidev.mmio_ptr]
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mov eax, dword [p_mmap]
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mov bx, word [eax + NVME_REG_MAP.CAP]
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mov ebx, dword [eax + NVME_REG_MAP.CAP]
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PDEBUGF DBG_INFO, "PCI(%u.%u.%u): NVMe maximum queue entries supported: %u\n", byte [pci + pcidev.bus], byte [pci + pcidev.devfn], bx
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PDEBUGF DBG_INFO, "PCI(%u.%u.%u): NVMe maximum queue entries supported: %u\n", byte [bus], byte [devfn], bx
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test ebx, CAP_CQR
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test ebx, CAP_CQR
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jz .cqr_not_req
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jz .cqr_not_req
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PDEBUGF DBG_INFO, "PCI(%u.%u.%u): NVMe contiguous queues required\n", byte [bus], byte [devfn]
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PDEBUGF DBG_INFO, "PCI(%u.%u.%u): NVMe contiguous queues required\n", byte [pci + pcidev.bus], byte [pci + pcidev.devfn]
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.cqr_not_req:
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.cqr_not_req:
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mov ebx, dword [eax + NVME_REG_MAP.CAP + 4]
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mov ebx, dword [eax + NVME_REG_MAP.CAP + 4]
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@ -224,13 +242,13 @@ proc nvme_init, bus:byte, devfn:byte
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test ebx, CAP_CSS_NVM_CMDSET
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test ebx, CAP_CSS_NVM_CMDSET
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jz .exit_fail
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jz .exit_fail
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if __DEBUG__ eq 1
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if __DEBUG__
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and ebx, CAP_MPSMIN
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and ebx, CAP_MPSMIN
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and ecx, CAP_MPSMAX
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and ecx, CAP_MPSMAX
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shr ebx, 16
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shr ebx, 16
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shr ecx, 16
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shr ecx, 16
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PDEBUGF DBG_INFO, "PCI(%u.%u.%u): NVMe memory page size minimum: %u\n", byte [bus], byte [devfn], ebx
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PDEBUGF DBG_INFO, "PCI(%u.%u.%u): NVMe memory page size minimum: %u\n", byte [pci + pcidev.bus], byte [pci + pcidev.devfn], ebx
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PDEBUGF DBG_INFO, "PCI(%u.%u.%u): NVMe memory page size maximum: %u\n", byte [bus], byte [devfn], ecx
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PDEBUGF DBG_INFO, "PCI(%u.%u.%u): NVMe memory page size maximum: %u\n", byte [pci + pcidev.bus], byte [pci + pcidev.devfn], ecx
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mov ebx, dword [eax + NVME_REG_MAP.CC]
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mov ebx, dword [eax + NVME_REG_MAP.CC]
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mov ecx, ebx
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mov ecx, ebx
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@ -240,17 +258,19 @@ proc nvme_init, bus:byte, devfn:byte
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shl ecx, 16
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shl ecx, 16
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; TODO: Change entry sizes to their appropriate values
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; TODO: Change entry sizes to their appropriate values
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PDEBUGF DBG_INFO, "PCI(%u.%u.%u): NVMe I/O submission queue entry size: %u\n", byte [bus], byte [devfn], ebx
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PDEBUGF DBG_INFO, "PCI(%u.%u.%u): NVMe I/O submission queue entry size: %u\n", byte [pci + pcidev.bus], byte [pci + pcidev.devfn], ebx
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PDEBUGF DBG_INFO, "PCI(%u.%u.%u): NVMe I/O completion queue entry size: %u\n", byte [bus], byte [devfn], ecx
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PDEBUGF DBG_INFO, "PCI(%u.%u.%u): NVMe I/O completion queue entry size: %u\n", byte [pci + pcidev.bus], byte [pci + pcidev.devfn], ecx
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end if
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end if
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xor eax, eax
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xor eax, eax
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inc eax
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inc eax
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pop ecx ebx
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ret
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ret
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.exit_fail:
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.exit_fail:
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PDEBUGF DBG_INFO, "PCI(%u.%u.%u): failed to initialize NVMe controller\n", byte [bus], byte [devfn]
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PDEBUGF DBG_INFO, "PCI(%u.%u.%u): failed to initialize NVMe controller\n", byte [pci + pcidev.bus], byte [pci + pcidev.devfn]
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xor eax, eax
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xor eax, eax
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pop ecx ebx
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ret
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ret
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endp
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endp
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@ -258,17 +278,24 @@ endp
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proc nvme_cleanup
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proc nvme_cleanup
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DEBUGF DBG_INFO, "(NVMe): Cleaning up...\n"
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DEBUGF DBG_INFO, "(NVMe): Cleaning up...\n"
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invoke KernelFree, [p_nvme_devices]
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push ecx
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invoke KernelFree, [p_ident]
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xor ecx, ecx
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mov eax, dword [p_nvme_devices]
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test eax, eax
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jnz .loop
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ret
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.loop:
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;invoke KernelFree, dword [p_nvme_devices + ecx * sizeof.pcidev + pcidev.ident_ptr]
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inc ecx
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cmp ecx, dword [pcidevs_len]
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jne .loop
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invoke KernelFree, dword [p_nvme_devices]
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pop ecx
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ret
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ret
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endp
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endp
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; uninitialized data
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align 4
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p_mmap dd ?
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p_ident dd ?
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;all initialized data place here
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;all initialized data place here
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align 4
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align 4
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p_nvme_devices dd 0
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p_nvme_devices dd 0
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