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mirror of https://git.missingno.dev/kolibrios-nvme-driver/ synced 2024-12-22 22:08:47 +01:00

lots of refactoring and fixes

This commit is contained in:
ramenu 2024-04-28 21:06:13 -04:00
parent 7a2af2dca9
commit 74c5edd315

View File

@ -45,10 +45,10 @@ proc START c, reason:dword
mov ebx, eax mov ebx, eax
.loop: .loop:
stdcall device_is_compat, dword [ebx + ecx * sizeof.pcidev + pcidev.bus], dword [ebx + ecx * sizeof.pcidev + pcidev.devfn] stdcall device_is_compat, dword [ebx + ecx * sizeof.pcidev]
test eax, eax test eax, eax
jz @f jz @f
stdcall nvme_init, dword [ebx + ecx * sizeof.pcidev + pcidev.bus], dword [ebx + ecx * sizeof.pcidev + pcidev.devfn] stdcall nvme_init, dword [ebx + ecx * sizeof.pcidev]
@@: @@:
inc ecx inc ecx
@ -85,14 +85,16 @@ endp
proc memset stdcall, p_data:dword, val:byte, sz:dword proc memset stdcall, p_data:dword, val:byte, sz:dword
push ebx ecx edx
mov edx, [sz] mov edx, [sz]
mov bh, [val] mov bl, [val]
xor ecx, ecx xor ecx, ecx
@@: @@:
mov byte [p_data + ecx], bh mov byte [p_data + ecx], bl
inc ecx inc ecx
cmp ecx, edx cmp ecx, edx
jne @b jne @b
pop edx ecx ebx
ret ret
endp endp
@ -115,8 +117,8 @@ proc nvme_identify stdcall, nsid:dword, dptr:dword, cns:byte
mov eax, dword [dptr] mov eax, dword [dptr]
mov dword [esp + SQ_ENTRY.dptr], eax mov dword [esp + SQ_ENTRY.dptr], eax
mov dword [esp + SQ_ENTRY.cdw0], ADM_CMD_IDENTIFY ; TODO: setting CID to 0 for now but later on keep a unique list of identifiers mov dword [esp + SQ_ENTRY.cdw0], ADM_CMD_IDENTIFY ; TODO: setting CID to 0 for now but later on keep a unique list of identifiers
mov ah, byte [cns] mov al, byte [cns]
mov byte [esp + SQ_ENTRY.cdw10], ah mov byte [esp + SQ_ENTRY.cdw10], al
stdcall submit_asq, esp stdcall submit_asq, esp
add esp, sizeof.SQ_ENTRY add esp, sizeof.SQ_ENTRY
@ -144,7 +146,7 @@ proc detect_nvme
.found_dev: .found_dev:
push edx eax push edx eax
PDEBUGF DBG_INFO, "PCI(%u.%u.%u): Detected NVMe device...\n", byte [eax + PCIDEV.bus], [eax + PCIDEV.devfn] PDEBUGF DBG_INFO, "PCI(%u.%u.%u): Detected NVMe device...\n", byte [eax + PCIDEV.bus], byte [eax + PCIDEV.devfn]
cmp dword [pcidevs_len], TOTAL_PCIDEVS cmp dword [pcidevs_len], TOTAL_PCIDEVS
jne @f jne @f
pop eax edx pop eax edx
@ -184,39 +186,55 @@ proc detect_nvme
endp endp
proc device_is_compat, bus:byte, devfn:byte proc device_is_compat stdcall, pci:dword
invoke PciRead32, dword [bus], dword [devfn], PCI_header00.base_addr_0 push ebx
invoke PciRead32, dword [pci + pcidev.bus], dword [pci + pcidev.devfn], PCI_header00.base_addr_0
and eax, 0xfffffff0 and eax, 0xfffffff0
test eax, eax test eax, eax
jz .exit_fail jz .failure
invoke MapIoMem, eax, sizeof.NVME_REG_MAP, PG_SW+PG_NOCACHE invoke MapIoMem, eax, sizeof.NVME_REG_MAP, PG_SW+PG_NOCACHE
test eax, eax test eax, eax
jz .exit_fail jz .failure
mov dword [p_mmap], eax mov dword [pci + pcidev.mmio_ptr], eax
mov ebx, dword [eax + NVME_REG_MAP.VS]
if __DEBUG__
push ecx
mov ecx, ebx
shr ecx, 16
PDEBUGF DBG_INFO, "PCI(%u.%u.%u): NVMe controller version: %u.%u.%u\n", byte [pci + pcidev.bus], byte [pci + pcidev.devfn], ecx, bh, bl
pop ecx
end if
cmp ebx, NVM_SUPPORTED_CONTROLLER_VERSION
jne .unsupported
PDEBUGF DBG_INFO, "PCI(%u.%u.%u): NVMe controller version is supported\n", byte [pci + pcidev.bus], byte [pci + pcidev.devfn]
xor eax, eax xor eax, eax
inc eax inc eax
pop ebx
ret ret
.exit_fail: .unsupported:
PDEBUGF DBG_INFO, "PCI(%u.%u.%u): incompatible NVMe device\n", [bus], [devfn] PDEBUGF DBG_INFO, "PCI(%u.%u.%u): unsupported controller version\n", byte [pci + pcidev.bus], byte [pci + pcidev.devfn]
.failure:
PDEBUGF DBG_INFO, "PCI(%u.%u.%u): something went wrong checking NVMe device compatibility\n", byte [pci + pcidev.bus], byte [pci + pcidev.devfn]
xor eax, eax xor eax, eax
pop ebx
ret ret
endp endp
; nvme_init: Initializes the NVMe controller ; nvme_init: Initializes the NVMe controller
proc nvme_init, bus:byte, devfn:byte proc nvme_init stdcall, pci:dword
test eax, eax push ebx ecx
jz .exit_fail mov eax, dword [pci + pcidev.mmio_ptr]
mov eax, dword [p_mmap] mov bx, word [eax + NVME_REG_MAP.CAP]
mov ebx, dword [eax + NVME_REG_MAP.CAP] PDEBUGF DBG_INFO, "PCI(%u.%u.%u): NVMe maximum queue entries supported: %u\n", byte [pci + pcidev.bus], byte [pci + pcidev.devfn], bx
PDEBUGF DBG_INFO, "PCI(%u.%u.%u): NVMe maximum queue entries supported: %u\n", byte [bus], byte [devfn], bx
test ebx, CAP_CQR test ebx, CAP_CQR
jz .cqr_not_req jz .cqr_not_req
PDEBUGF DBG_INFO, "PCI(%u.%u.%u): NVMe contiguous queues required\n", byte [bus], byte [devfn] PDEBUGF DBG_INFO, "PCI(%u.%u.%u): NVMe contiguous queues required\n", byte [pci + pcidev.bus], byte [pci + pcidev.devfn]
.cqr_not_req: .cqr_not_req:
mov ebx, dword [eax + NVME_REG_MAP.CAP + 4] mov ebx, dword [eax + NVME_REG_MAP.CAP + 4]
@ -224,13 +242,13 @@ proc nvme_init, bus:byte, devfn:byte
test ebx, CAP_CSS_NVM_CMDSET test ebx, CAP_CSS_NVM_CMDSET
jz .exit_fail jz .exit_fail
if __DEBUG__ eq 1 if __DEBUG__
and ebx, CAP_MPSMIN and ebx, CAP_MPSMIN
and ecx, CAP_MPSMAX and ecx, CAP_MPSMAX
shr ebx, 16 shr ebx, 16
shr ecx, 16 shr ecx, 16
PDEBUGF DBG_INFO, "PCI(%u.%u.%u): NVMe memory page size minimum: %u\n", byte [bus], byte [devfn], ebx PDEBUGF DBG_INFO, "PCI(%u.%u.%u): NVMe memory page size minimum: %u\n", byte [pci + pcidev.bus], byte [pci + pcidev.devfn], ebx
PDEBUGF DBG_INFO, "PCI(%u.%u.%u): NVMe memory page size maximum: %u\n", byte [bus], byte [devfn], ecx PDEBUGF DBG_INFO, "PCI(%u.%u.%u): NVMe memory page size maximum: %u\n", byte [pci + pcidev.bus], byte [pci + pcidev.devfn], ecx
mov ebx, dword [eax + NVME_REG_MAP.CC] mov ebx, dword [eax + NVME_REG_MAP.CC]
mov ecx, ebx mov ecx, ebx
@ -240,17 +258,19 @@ proc nvme_init, bus:byte, devfn:byte
shl ecx, 16 shl ecx, 16
; TODO: Change entry sizes to their appropriate values ; TODO: Change entry sizes to their appropriate values
PDEBUGF DBG_INFO, "PCI(%u.%u.%u): NVMe I/O submission queue entry size: %u\n", byte [bus], byte [devfn], ebx PDEBUGF DBG_INFO, "PCI(%u.%u.%u): NVMe I/O submission queue entry size: %u\n", byte [pci + pcidev.bus], byte [pci + pcidev.devfn], ebx
PDEBUGF DBG_INFO, "PCI(%u.%u.%u): NVMe I/O completion queue entry size: %u\n", byte [bus], byte [devfn], ecx PDEBUGF DBG_INFO, "PCI(%u.%u.%u): NVMe I/O completion queue entry size: %u\n", byte [pci + pcidev.bus], byte [pci + pcidev.devfn], ecx
end if end if
xor eax, eax xor eax, eax
inc eax inc eax
pop ecx ebx
ret ret
.exit_fail: .exit_fail:
PDEBUGF DBG_INFO, "PCI(%u.%u.%u): failed to initialize NVMe controller\n", byte [bus], byte [devfn] PDEBUGF DBG_INFO, "PCI(%u.%u.%u): failed to initialize NVMe controller\n", byte [pci + pcidev.bus], byte [pci + pcidev.devfn]
xor eax, eax xor eax, eax
pop ecx ebx
ret ret
endp endp
@ -258,17 +278,24 @@ endp
proc nvme_cleanup proc nvme_cleanup
DEBUGF DBG_INFO, "(NVMe): Cleaning up...\n" DEBUGF DBG_INFO, "(NVMe): Cleaning up...\n"
invoke KernelFree, [p_nvme_devices] push ecx
invoke KernelFree, [p_ident] xor ecx, ecx
mov eax, dword [p_nvme_devices]
test eax, eax
jnz .loop
ret
.loop:
;invoke KernelFree, dword [p_nvme_devices + ecx * sizeof.pcidev + pcidev.ident_ptr]
inc ecx
cmp ecx, dword [pcidevs_len]
jne .loop
invoke KernelFree, dword [p_nvme_devices]
pop ecx
ret ret
endp endp
; uninitialized data
align 4
p_mmap dd ?
p_ident dd ?
;all initialized data place here ;all initialized data place here
align 4 align 4
p_nvme_devices dd 0 p_nvme_devices dd 0