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mirror of https://git.missingno.dev/kolibrios-nvme-driver/ synced 2024-12-22 22:08:47 +01:00

wip: setup controller configuration

This commit is contained in:
Abdur-Rahman Mansoor 2024-05-25 20:37:42 -04:00
parent a940d7e963
commit d172666be2
2 changed files with 26 additions and 6 deletions

View File

@ -231,6 +231,10 @@ proc nvme_init stdcall, pci:dword
DEBUGF DBG_INFO, "(NVMe) CAP (0-31): 0x%x\n", ebx
mov ebx, dword [eax + NVME_MMIO.CAP + 4]
DEBUGF DBG_INFO, "(NVMe) CAP (32-63): 0x%x\n", ebx
mov ebx, dword [eax + NVME_MMIO.CC]
DEBUGF DBG_INFO, "(NVMe) CC: 0x%x\n", ebx
mov ebx, dword [eax + NVME_MMIO.CSTS]
DEBUGF DBG_INFO, "(NVMe) CSTS: 0x%x\n", ebx
end if
mov ebx, dword [eax + NVME_MMIO.CAP]
@ -244,8 +248,25 @@ proc nvme_init stdcall, pci:dword
test ebx, CAP_CSS_NVM_CMDSET
jz .exit_fail
; Reset controller
; Reset controller before we configure it
stdcall nvme_controller_reset, [pci]
mov eax, [pci]
mov eax, [eax + pcidev.mmio_ptr]
mov ebx, dword [eax + NVME_MMIO.CC]
and ebx, CAP_MPSMAX
shr ebx, 20
cmp ebx, NVM_MPS
jl .exit_fail
; Configure IOSQES, IOCQES, MPS, CSS
mov ebx, dword [eax + NVME_MMIO.CC]
or ebx, (4 shl 16) or (6 shl 20)
and ebx, not (CC_MPS or CC_CSS)
mov dword [eax + NVME_MMIO.CC], ebx
; Configure Admin Queue Attributes
; Configure Admin Submission/Completion Queue Base Address
xor eax, eax
inc eax
@ -266,15 +287,12 @@ proc nvme_controller_reset stdcall, pci:dword
push ebx
mov ebx, dword [pci]
mov ebx, dword [ebx + pcidev.mmio_ptr]
mov eax, dword [ebx + NVME_MMIO.CC]
and eax, 0xfffffffe ; CC.EN = 0
mov dword [ebx + NVME_MMIO.CC], eax
and dword [ebx + NVME_MMIO.CC], 0xfffffffe
stdcall nvme_wait, [pci]
; Wait for controller to be brought to idle state, CSTS.RDY should be cleared to 0 when this happens
.wait:
mov eax, dword [ebx + NVME_MMIO.CSTS]
test eax, CSTS_RDY
test dword [ebx + NVME_MMIO.CSTS], CSTS_RDY
jnz .wait
DEBUGF DBG_INFO, "(NVMe) Successfully reset controller...\n"
pop ebx

View File

@ -11,6 +11,8 @@
; Supported NVMe Controller Version
NVM_SUPPORTED_CONTROLLER_VERSION = 0x00010400 ; (v1.4)
NVM_MPS = 0
; Opcodes for NVM commands
NVM_CMD_FLUSH = 0x00
NVM_CMD_WRITE = 0x01