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https://git.missingno.dev/kolibrios-nvme-driver/
synced 2024-12-22 22:08:47 +01:00
wip: remap entire MMIO
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commit
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@ -196,9 +196,9 @@ endp
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proc device_is_compat stdcall, pci:dword
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proc device_is_compat stdcall, pci:dword
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push ebx
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push esi
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mov ebx, [pci]
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mov esi, [pci]
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invoke PciRead32, dword [ebx + pcidev.bus], dword [ebx + pcidev.devfn], PCI_header00.base_addr_0
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invoke PciRead32, dword [esi + pcidev.bus], dword [esi + pcidev.devfn], PCI_header00.base_addr_0
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and eax, 0xfffffff0
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and eax, 0xfffffff0
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test eax, eax
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test eax, eax
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jz .failure
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jz .failure
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@ -206,19 +206,29 @@ proc device_is_compat stdcall, pci:dword
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invoke MapIoMem, eax, sizeof.NVME_MMIO, PG_SW+PG_NOCACHE
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invoke MapIoMem, eax, sizeof.NVME_MMIO, PG_SW+PG_NOCACHE
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test eax, eax
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test eax, eax
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jz .failure
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jz .failure
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DEBUGF DBG_INFO, "(NVMe) MMIO allocated at: 0x%x\n", eax
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;DEBUGF DBG_INFO, "(NVMe) MMIO allocated at: 0x%x\n", eax
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mov ebx, [pci]
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mov dword [esi + pcidev.mmio_ptr], eax
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mov dword [ebx + pcidev.mmio_ptr], eax
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mov eax, dword [eax + NVME_MMIO.CAP + 4]
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mov eax, dword [eax + NVME_MMIO.VS]
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and eax, CAP_DSTRD
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; Stride is (2 ^ (2 + DSTRD)) bytes
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add eax, 2
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stdcall pow2, eax
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mov dword [esi + pcidev.dstrd], eax
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; TODO: Remap I/O with new size
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mov esi, dword [esi + pcidev.mmio_ptr]
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mov eax, dword [esi + NVME_MMIO.VS]
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DEBUGF DBG_INFO, "(NVMe) Controller version: 0x%x\n", eax
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DEBUGF DBG_INFO, "(NVMe) Controller version: 0x%x\n", eax
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pop ebx
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pop esi
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xor eax, eax
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xor eax, eax
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inc eax
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inc eax
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ret
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ret
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.failure:
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.failure:
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PDEBUGF DBG_INFO, "PCI(%u.%u.%u): something went wrong checking NVMe device compatibility\n", byte [ebx + pcidev.bus], byte [ebx + pcidev.devfn]
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PDEBUGF DBG_INFO, "PCI(%u.%u.%u): something went wrong checking NVMe device compatibility\n", byte [esi + pcidev.bus], byte [esi + pcidev.devfn]
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pop ebx
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pop esi
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xor eax, eax
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xor eax, eax
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ret
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ret
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@ -231,7 +241,7 @@ proc nvme_init stdcall, pci:dword
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mov edi, dword [pci]
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mov edi, dword [pci]
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mov edi, dword [edi + pcidev.mmio_ptr]
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mov edi, dword [edi + pcidev.mmio_ptr]
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if __DEBUG__
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if 0
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mov eax, dword [edi + NVME_MMIO.CAP]
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mov eax, dword [edi + NVME_MMIO.CAP]
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DEBUGF DBG_INFO, "(NVMe) CAP (0-31): 0x%x\n", eax
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DEBUGF DBG_INFO, "(NVMe) CAP (0-31): 0x%x\n", eax
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mov eax, dword [edi + NVME_MMIO.CAP + 4]
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mov eax, dword [edi + NVME_MMIO.CAP + 4]
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@ -285,14 +295,14 @@ proc nvme_init stdcall, pci:dword
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;or eax, PG_SW or PG_NOCACHE
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;or eax, PG_SW or PG_NOCACHE
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mov dword [edi + NVME_MMIO.ASQ], eax
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mov dword [edi + NVME_MMIO.ASQ], eax
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and dword [edi + NVME_MMIO.ASQ + 4], 0
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and dword [edi + NVME_MMIO.ASQ + 4], 0
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DEBUGF DBG_INFO, "(NVMe) ASQ = 0x%x\n", eax
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;DEBUGF DBG_INFO, "(NVMe) ASQ = 0x%x\n", eax
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invoke AllocPage
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invoke AllocPage
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test eax, eax
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test eax, eax
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jz .exit_fail
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jz .exit_fail
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;or eax, PG_SW or PG_NOCACHE
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;or eax, PG_SW or PG_NOCACHE
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mov dword [edi + NVME_MMIO.ACQ], eax
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mov dword [edi + NVME_MMIO.ACQ], eax
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and dword [edi + NVME_MMIO.ACQ + 4], 0
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and dword [edi + NVME_MMIO.ACQ + 4], 0
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DEBUGF DBG_INFO, "(NVMe) ACQ = 0x%x\n", eax
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;DEBUGF DBG_INFO, "(NVMe) ACQ = 0x%x\n", eax
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; Restart the controller
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; Restart the controller
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stdcall nvme_controller_start, edi
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stdcall nvme_controller_start, edi
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@ -391,7 +401,11 @@ proc pow2 stdcall, x:dword
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push ecx
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push ecx
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mov ecx, [x]
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mov ecx, [x]
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mov eax, 2
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xor eax, eax
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inc eax
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test ecx, ecx
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jnz @f
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ret
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@@:
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@@:
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shl eax, 1
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shl eax, 1
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