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mirror of https://git.missingno.dev/kolibrios-nvme-driver/ synced 2024-12-22 22:08:47 +01:00

wip: remap entire MMIO

This commit is contained in:
Abdur-Rahman Mansoor 2024-05-29 15:43:14 -04:00
parent dd16f8428a
commit e25a3cd92a

View File

@ -196,9 +196,9 @@ endp
proc device_is_compat stdcall, pci:dword proc device_is_compat stdcall, pci:dword
push ebx push esi
mov ebx, [pci] mov esi, [pci]
invoke PciRead32, dword [ebx + pcidev.bus], dword [ebx + pcidev.devfn], PCI_header00.base_addr_0 invoke PciRead32, dword [esi + pcidev.bus], dword [esi + pcidev.devfn], PCI_header00.base_addr_0
and eax, 0xfffffff0 and eax, 0xfffffff0
test eax, eax test eax, eax
jz .failure jz .failure
@ -206,19 +206,29 @@ proc device_is_compat stdcall, pci:dword
invoke MapIoMem, eax, sizeof.NVME_MMIO, PG_SW+PG_NOCACHE invoke MapIoMem, eax, sizeof.NVME_MMIO, PG_SW+PG_NOCACHE
test eax, eax test eax, eax
jz .failure jz .failure
DEBUGF DBG_INFO, "(NVMe) MMIO allocated at: 0x%x\n", eax ;DEBUGF DBG_INFO, "(NVMe) MMIO allocated at: 0x%x\n", eax
mov ebx, [pci] mov dword [esi + pcidev.mmio_ptr], eax
mov dword [ebx + pcidev.mmio_ptr], eax mov eax, dword [eax + NVME_MMIO.CAP + 4]
mov eax, dword [eax + NVME_MMIO.VS] and eax, CAP_DSTRD
; Stride is (2 ^ (2 + DSTRD)) bytes
add eax, 2
stdcall pow2, eax
mov dword [esi + pcidev.dstrd], eax
; TODO: Remap I/O with new size
mov esi, dword [esi + pcidev.mmio_ptr]
mov eax, dword [esi + NVME_MMIO.VS]
DEBUGF DBG_INFO, "(NVMe) Controller version: 0x%x\n", eax DEBUGF DBG_INFO, "(NVMe) Controller version: 0x%x\n", eax
pop ebx pop esi
xor eax, eax xor eax, eax
inc eax inc eax
ret ret
.failure: .failure:
PDEBUGF DBG_INFO, "PCI(%u.%u.%u): something went wrong checking NVMe device compatibility\n", byte [ebx + pcidev.bus], byte [ebx + pcidev.devfn] PDEBUGF DBG_INFO, "PCI(%u.%u.%u): something went wrong checking NVMe device compatibility\n", byte [esi + pcidev.bus], byte [esi + pcidev.devfn]
pop ebx pop esi
xor eax, eax xor eax, eax
ret ret
@ -231,7 +241,7 @@ proc nvme_init stdcall, pci:dword
mov edi, dword [pci] mov edi, dword [pci]
mov edi, dword [edi + pcidev.mmio_ptr] mov edi, dword [edi + pcidev.mmio_ptr]
if __DEBUG__ if 0
mov eax, dword [edi + NVME_MMIO.CAP] mov eax, dword [edi + NVME_MMIO.CAP]
DEBUGF DBG_INFO, "(NVMe) CAP (0-31): 0x%x\n", eax DEBUGF DBG_INFO, "(NVMe) CAP (0-31): 0x%x\n", eax
mov eax, dword [edi + NVME_MMIO.CAP + 4] mov eax, dword [edi + NVME_MMIO.CAP + 4]
@ -285,14 +295,14 @@ proc nvme_init stdcall, pci:dword
;or eax, PG_SW or PG_NOCACHE ;or eax, PG_SW or PG_NOCACHE
mov dword [edi + NVME_MMIO.ASQ], eax mov dword [edi + NVME_MMIO.ASQ], eax
and dword [edi + NVME_MMIO.ASQ + 4], 0 and dword [edi + NVME_MMIO.ASQ + 4], 0
DEBUGF DBG_INFO, "(NVMe) ASQ = 0x%x\n", eax ;DEBUGF DBG_INFO, "(NVMe) ASQ = 0x%x\n", eax
invoke AllocPage invoke AllocPage
test eax, eax test eax, eax
jz .exit_fail jz .exit_fail
;or eax, PG_SW or PG_NOCACHE ;or eax, PG_SW or PG_NOCACHE
mov dword [edi + NVME_MMIO.ACQ], eax mov dword [edi + NVME_MMIO.ACQ], eax
and dword [edi + NVME_MMIO.ACQ + 4], 0 and dword [edi + NVME_MMIO.ACQ + 4], 0
DEBUGF DBG_INFO, "(NVMe) ACQ = 0x%x\n", eax ;DEBUGF DBG_INFO, "(NVMe) ACQ = 0x%x\n", eax
; Restart the controller ; Restart the controller
stdcall nvme_controller_start, edi stdcall nvme_controller_start, edi
@ -391,7 +401,11 @@ proc pow2 stdcall, x:dword
push ecx push ecx
mov ecx, [x] mov ecx, [x]
mov eax, 2 xor eax, eax
inc eax
test ecx, ecx
jnz @f
ret
@@: @@:
shl eax, 1 shl eax, 1