mirror of
https://git.missingno.dev/kolibrios-nvme-driver/
synced 2024-12-23 06:18:47 +01:00
400 lines
9.1 KiB
NASM
400 lines
9.1 KiB
NASM
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; ;;
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;; Copyright (C) KolibriOS team 2004-2024. All rights reserved. ;;
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;; Distributed under terms of the GNU General Public License ;;
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;; ;;
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;; GNU GENERAL PUBLIC LICENSE ;;
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;; Version 2, June 1991 ;;
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;; ;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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format PE DLL native
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entry START
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API_VERSION equ 0 ;debug
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SRV_GETVERSION equ 0
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__DEBUG__ = 1
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__DEBUG_LEVEL__ = 1
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DRIVER_VERSION = 1
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DBG_INFO = 1
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section ".flat" code readable writable executable
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include "../proc32.inc"
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include "../struct.inc"
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include "../macros.inc"
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include "../fdo.inc"
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include "../pci.inc"
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include "../peimport.inc"
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include "nvme.inc"
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include "macros.inc"
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proc START c, reason:dword
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cmp [reason], DRV_ENTRY
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jne .err
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.entry:
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DEBUGF DBG_INFO, "Detecting NVMe hardware...\n"
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call detect_nvme
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test eax, eax
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jz .err
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mov eax, dword [p_nvme_devices]
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test eax, eax
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jz .err
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xor ecx, ecx
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.loop:
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mov ebx, dword [p_nvme_devices]
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stdcall device_is_compat, ebx
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test eax, eax
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jz @f
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stdcall nvme_init, ebx
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;@@:
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;inc ecx
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;cmp ecx, dword [pcidevs_len]
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;jne .loop
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invoke RegService, my_service, service_proc
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ret
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.err:
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call nvme_cleanup
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xor eax, eax
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ret
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endp
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proc service_proc stdcall, ioctl:dword
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mov ebx, [ioctl]
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mov eax, [ebx+IOCTL.io_code]
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cmp eax, SRV_GETVERSION
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jne @F
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mov eax, [ebx+IOCTL.output]
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cmp [ebx+IOCTL.out_size], 4
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jne @F
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mov dword [eax], API_VERSION
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xor eax, eax
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ret
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@@:
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or eax, -1
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ret
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endp
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proc memset stdcall, p_data:dword, val:byte, sz:dword
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push ebx ecx
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mov eax, [p_data]
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mov ecx, [sz]
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mov bl, [val]
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@@:
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mov byte [eax + ecx], bl
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dec ecx
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test ecx, ecx
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jnz @b
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pop ecx ebx
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ret
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endp
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; Submit a Command in the Admin Submission Queue
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proc submit_asq stdcall, sq_ptr:dword
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mov esi, [sq_ptr]
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xor eax, eax
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ret
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endp
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proc nvme_identify stdcall, nsid:dword, dptr:dword, cid:word, cns:byte
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sub esp, sizeof.SQ_ENTRY
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stdcall memset, esp, 0, sizeof.SQ_ENTRY
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mov eax, [nsid]
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mov dword [esp + SQ_ENTRY.nsid], eax
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mov eax, [dptr]
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mov dword [esp + SQ_ENTRY.dptr], eax
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mov ax, [cid]
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or dword [esp + SQ_ENTRY.cdw0], ADM_CMD_IDENTIFY
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or dword [esp + SQ_ENTRY.cdw0], ax
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mov al, [cns]
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mov byte [esp + SQ_ENTRY.cdw10], al
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stdcall submit_asq, esp
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add esp, sizeof.SQ_ENTRY
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xor eax, eax
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ret
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endp
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proc detect_nvme
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invoke GetPCIList
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mov edx, eax
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.check_dev:
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mov ebx, dword [eax + PCIDEV.class]
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and ebx, 0x00ffff00 ; retrieve class/subclass code only
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cmp ebx, 0x00010800 ; Mass Storage Controller - Non-Volatile Memory Controller
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je .found_dev
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.next_dev:
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mov eax, dword [eax + PCIDEV.fd]
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cmp eax, edx
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jne .check_dev
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jmp .exit_success
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.found_dev:
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push edx eax
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PDEBUGF DBG_INFO, "PCI(%u.%u.%u): Detected NVMe device...\n", byte [eax + PCIDEV.bus], byte [eax + PCIDEV.devfn]
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cmp dword [pcidevs_len], TOTAL_PCIDEVS
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jne @f
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pop eax edx
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jmp .exit_success
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@@:
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inc dword [pcidevs_len]
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mov ebx, dword [p_nvme_devices]
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test ebx, ebx
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jnz @f
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invoke KernelAlloc, sizeof.pcidev
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test eax, eax
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jz .err_no_mem
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mov dword [p_nvme_devices], eax
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DEBUGF DBG_INFO, "(NVMe) Allocated pcidev struct at 0x%x\n", [p_nvme_devices]
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@@:
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mov ecx, dword [pcidevs_len]
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dec ecx
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pop eax
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mov ebx, dword [p_nvme_devices]
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movzx edx, byte [eax + PCIDEV.bus]
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mov byte [ebx + pcidev.bus], dl
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movzx edx, byte [eax + PCIDEV.devfn]
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mov byte [ebx + pcidev.devfn], dl
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pop edx
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jmp .next_dev
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.err_no_mem:
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pop eax edx
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xor eax, eax
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ret
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.exit_success:
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xor eax, eax
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inc eax
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ret
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endp
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proc device_is_compat stdcall, pci:dword
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push ebx
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mov ebx, [pci]
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invoke PciRead32, dword [ebx + pcidev.bus], dword [ebx + pcidev.devfn], PCI_header00.base_addr_0
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and eax, 0xfffffff0
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test eax, eax
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jz .failure
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invoke MapIoMem, eax, sizeof.NVME_MMIO, PG_SW+PG_NOCACHE
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test eax, eax
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jz .failure
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DEBUGF DBG_INFO, "(NVMe) MMIO allocated at: 0x%x\n", eax
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mov ebx, [pci]
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mov dword [ebx + pcidev.mmio_ptr], eax
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mov eax, dword [eax + NVME_MMIO.VS]
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DEBUGF DBG_INFO, "(NVMe) Controller version: 0x%x\n", eax
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pop ebx
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xor eax, eax
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inc eax
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ret
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.failure:
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PDEBUGF DBG_INFO, "PCI(%u.%u.%u): something went wrong checking NVMe device compatibility\n", byte [ebx + pcidev.bus], byte [ebx + pcidev.devfn]
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pop ebx
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xor eax, eax
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ret
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endp
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; nvme_init: Initializes the NVMe controller
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proc nvme_init stdcall, pci:dword
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push eax
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mov edi, dword [pci]
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mov edi, dword [edi + pcidev.mmio_ptr]
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if __DEBUG__
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mov eax, dword [edi + NVME_MMIO.CAP]
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DEBUGF DBG_INFO, "(NVMe) CAP (0-31): 0x%x\n", eax
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mov eax, dword [edi + NVME_MMIO.CAP + 4]
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DEBUGF DBG_INFO, "(NVMe) CAP (32-63): 0x%x\n", eax
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mov eax, dword [edi + NVME_MMIO.CC]
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DEBUGF DBG_INFO, "(NVMe) CC: 0x%x\n", eax
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mov eax, dword [edi + NVME_MMIO.CSTS]
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DEBUGF DBG_INFO, "(NVMe) CSTS: 0x%x\n", eax
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end if
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mov eax, dword [edi + NVME_MMIO.CAP]
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test eax, CAP_CQR
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jz .cqr_not_req
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.cqr_not_req:
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; For some reason, bit 7 (No I/O command set supported) is also set to 1 despite bit 0 (NVM command set)
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; being set to 1.. so I am not sure if bit 7 should be checked at all.. investigate later.
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mov eax, dword [edi + NVME_MMIO.CAP + 4]
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test eax, CAP_CSS_NVM_CMDSET
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jz .exit_fail
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; Reset controller before we configure it
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stdcall nvme_controller_reset, edi
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mov eax, dword [edi + NVME_MMIO.CAP + 4]
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and eax, CAP_MPSMIN
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shr eax, 16
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cmp eax, NVM_MPS
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jg .exit_fail
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mov eax, dword [edi + NVME_MMIO.CAP + 4]
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and eax, CAP_MPSMAX
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shr eax, 20
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cmp eax, NVM_MPS
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jl .exit_fail
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; Configure AMS, MPS, CSS
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mov eax, dword [edi + NVME_MMIO.CC]
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and eax, not (CC_AMS or CC_MPS or CC_CSS)
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or eax, 111b shl 4 ; Admin Command Set Only (temporary)
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and dword [edi + NVME_MMIO.CC], eax
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; Configure Admin Queue Attributes
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mov eax, dword [edi + NVME_MMIO.AQA]
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and eax, not (AQA_ASQS or AQA_ACQS)
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or eax, NVM_ASQS or (NVM_ACQS shl 16)
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mov dword [edi + NVME_MMIO.AQA], eax
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; Configure Admin Submission/Completion Queue Base Address
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invoke AllocPages, NVM_ASQS
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test eax, eax
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jz .exit_fail
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;or eax, PG_SW or PG_NOCACHE
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mov dword [edi + NVME_MMIO.ASQ], eax
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and dword [edi + NVME_MMIO.ASQ + 4], 0
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DEBUGF DBG_INFO, "(NVMe) ASQ = 0x%x\n", eax
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invoke AllocPages, NVM_ACQS
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test eax, eax
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jz .exit_fail
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;or eax, PG_SW or PG_NOCACHE
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mov dword [edi + NVME_MMIO.ACQ], eax
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and dword [edi + NVME_MMIO.ACQ + 4], 0
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DEBUGF DBG_INFO, "(NVMe) ACQ = 0x%x\n", eax
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; Restart the controller
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stdcall nvme_controller_start, edi
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invoke AllocPage
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test eax, eax
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jz .exit_fail
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; nsid:dword, dptr:dword, cid:word, cns:byte
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stdcall nvme_identify, 0, eax, 0, CNS_IDCS
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xor eax, eax
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inc eax
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ret
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.exit_fail:
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DEBUGF DBG_INFO, "(NVMe) failed to initialize NVMe controller\n"
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xor eax, eax
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ret
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endp
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proc nvme_controller_reset stdcall, mmio:dword
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DEBUGF DBG_INFO, "(NVMe) Resetting Controller...\n"
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push edi
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mov edi, dword [mmio]
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and dword [edi + NVME_MMIO.CC], 0xfffffffe ; CC.EN = 0
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stdcall nvme_wait, [mmio]
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; Wait for controller to be brought to idle state, CSTS.RDY should be cleared to 0 when this happens
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.wait:
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test dword [edi + NVME_MMIO.CSTS], CSTS_RDY
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jnz .wait
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DEBUGF DBG_INFO, "(NVMe) Successfully reset controller...\n"
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pop edi
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ret
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endp
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proc nvme_controller_start stdcall, mmio:dword
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DEBUGF DBG_INFO, "(NVMe) Starting Controller...\n"
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push edi
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mov edi, dword [mmio]
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or dword [edi + NVME_MMIO.CC], 1 ;; CC.EN = 1
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stdcall nvme_wait, [mmio]
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.wait:
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test dword [edi + NVME_MMIO.CSTS], CSTS_RDY
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jz .wait
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DEBUGF DBG_INFO, "(NVMe) Successfully started controller...\n"
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pop edi
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ret
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endp
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; Should be called only after the value of CC.EN has changed
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proc nvme_wait stdcall, mmio:dword
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mov esi, [mmio]
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mov esi, dword [esi + NVME_MMIO.CAP]
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and esi, CAP_TO
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shr esi, 24
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imul esi, 50
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invoke Sleep
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ret
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endp
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proc nvme_cleanup
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DEBUGF DBG_INFO, "(NVMe): Cleaning up...\n"
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push ecx
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mov ecx, dword [pcidevs_len]
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mov eax, dword [p_nvme_devices]
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test eax, eax
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jnz .loop
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ret
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.loop:
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;invoke KernelFree, dword [p_nvme_devices + ecx * sizeof.pcidev + pcidev.ident_ptr]
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dec ecx
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test ecx, ecx
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jnz .loop
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invoke KernelFree, dword [p_nvme_devices]
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@@:
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pop ecx
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ret
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endp
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;all initialized data place here
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align 4
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p_nvme_devices dd 0
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pcidevs_len dd 0
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my_service db "NVMe",0 ;max 16 chars include zero
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if __DEBUG__
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include_debug_strings
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end if
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align 4
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data fixups
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end data
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