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further AMD-kernel tuning:

Browse Source 
1)faster syscall bridge for future APIs; 
2)HyperTransport module added (quite raw yet);
4)unrestricted i/o port access;
3)some MeOS rudiments removed. 

git-svn-id: svn://kolibrios.org@1551 a494cfbc-eb01-0410-851d-a64ba20cac60
This commit is contained in:
Artem Jerdev (art_zh) 2010-08-03 13:07:43 +00:00
parent 0f036b69ff
commit 24fbc88418
6 changed files with 1024 additions and 1308 deletions
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144
kernel/branches/Kolibri-A/trunk/bus/HT.INC Normal file
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@ -0,0 +1,144 @@
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; ;;
;; Copyright (C) 2010 KolibriOS team. All rights reserved. ;;
;; Distributed under terms of the GNU General Public License ;;
;; ;;
;; HT.inc ;; ;;
;; ;;
;; AMD HyperTransport bus control ;;
;; ;;
;; art_zh <artem@jerdev.co.uk> ;;
;; ;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
align 4
;=============================================================================
;
; This code is a part of Kolibri-A and will only work with AMD RS760+ chipsets
;
;=============================================================================
;------------------------------------------
; params: al = nbconfig register#
; returns: eax = register content
;
rs7xx_nbconfig_read_pci:
and eax, 0x0FC ; leave register# only
or eax, 0x80000000 ; bdf = 0:0.0
mov dx, 0x0CF8 ; write to index reg
out dx, eax
add dl, 4
in eax, dx
ret
rs7xx_nbconfig_flush_pci:
mov eax, 0x0B0 ; a scratch reg
mov dx, 0xCF8
out dx, eax
ret
rs7xx_nbconfig_write_pci:
and eax, 0x0FC ; leave register# only
or eax, 0x80000000 ; bdf = 0:0.0
mov dx, 0x0CF8 ; write to index reg
out dx, eax
add dl, 4
mov eax, ebx
out dx, eax
ret
;***************************************************************************
; Function
; rs7xx_pcie_init:
;
; Description
; PCIe extended (memory-mapped) config space detection
;
;***************************************************************************
rs7xx_pcie_init:
; mov al, 0x7C ; NB_IOC_CFG_CNTL
; mov ebx, 0x20000000
; call rs7xx_nbconfig_write_pci
mov al, 0x7C ; NB_IOC_CFG_CNTL
call rs7xx_nbconfig_read_pci
mov ebx, eax
call rs7xx_nbconfig_flush_pci
test ebx, 0x20000000 ; BAR3 locked?
jz .rs7xx_pcie_blocked
mov al, 0x84 ; NB_PCI_ARB
call rs7xx_nbconfig_read_pci
shr eax,16
and ax, 7 ; the Bus range lays here:
jnz @f
mov ax, 8 ; 1=2Mb, 2=4MB, 3=8MB, 4=16MB
@@:
mov [PCIe_bus_range], ax ; 5=32Mb, 6=64MB, 7=128Mb, 8=256Mb
mov cl, al
call rs7xx_nbconfig_flush_pci
dec cl ; <4M ?
jnz @f
inc cl ; one PDE needed anyway
@@:
dec cl
mov ebx, 1
shl ebx, cl
mov [mmio_pcie_cfg_pdes], bx ; 1..64 PDE(s) needed,
shl ebx, 22
mov [mmio_pcie_cfg_lim], ebx ; or 4..256Mb space to map
dec [mmio_pcie_cfg_lim]
mov al, 0x1C ; NB_BAR3_PCIEXP_MMCFG
call rs7xx_nbconfig_read_pci
mov ebx, eax
call rs7xx_nbconfig_flush_pci
mov eax, ebx
and eax, 0xFFE00000 ; valid bits [31..21]
jnz @f ; NB BAR3 may be invisible!
call pci_ext_config ; try to get pcie ecfg address indirectly
@@:
or eax, eax
jz .rs7xx_pcie_fail
mov [mmio_pcie_cfg_addr], eax ; physical address (lower 32 bits)
add [mmio_pcie_cfg_lim], eax
; -- map the whole PCIe config space;
or eax, (PG_SHARED + PG_LARGE + PG_UW) ; by the way, UW is unsafe!
mov ecx, PCIe_CONFIG_SPACE ; linear address
mov ebx, ecx
shr ebx, 20
add ebx, sys_pgdir ; PgDir entry @
xor dx, dx ; PDEs counter
@@:
mov dword[ebx], eax ; map 4 buses
invlpg [ecx] ; next PgDir entry
add bx, 4 ; new PDE
add eax, 0x400000 ; +4M phys.
add ecx, 0x400000 ; +4M lin.
inc dx
cmp dx, [mmio_pcie_cfg_pdes] ; all mapped yet?
jnz @b
.pcie_cfg_mapped:
mov esi, boot_pcie_ok
call boot_log
ret ; <<<<<<<<<<< OK >>>>>>>>>>>
.rs7xx_pcie_fail:
mov esi, boot_rs7xx_fail
call boot_log
ret
.rs7xx_pcie_blocked:
mov esi, boot_rs7xx_blkd
call boot_log
ret

28
kernel/branches/Kolibri-A/trunk/bus/pci/PCIe.inc
View File

@ -28,12 +28,14 @@ $Revision: 1463 $
;
;***************************************************************************
align 4
mmio_pcie_cfg_addr dd 0x00000000 ; pcie space may be defined here
mmio_pcie_cfg_lim dd 0x000FFFFF ; upper pcie space address
mmio_pcie_cfg_pdes dw 0 ; number of PDEs to map the space
PCIe_bus_range dw 0 ; the Bus range: power-of-2 Megabytes
align 4
pci_ext_config:
mov ebx, [mmio_pcie_cfg_addr]
or ebx,ebx
@ -60,7 +62,7 @@ pci_ext_config:
jz .no_pcie_cfg
shl eax, 8 ; bus:[27..20], dev:[19:15]
or eax, 0x00007FFC ; fun:[14..12], reg:[11:2]
mov [mmio_pcie_cfg_lim], eax
; mov [mmio_pcie_cfg_lim], eax
mov cl, bl
mov ax, 0x0002 ; bus = 0, 1dword to read
call pci_read_reg
@ -74,30 +76,14 @@ pci_ext_config:
test eax, 0x000F0000 ; MMIO Base must be bus0-aligned
jnz .no_pcie_cfg
mov [mmio_pcie_cfg_addr], eax
add eax, 0x000FFFFC
sub eax,[mmio_pcie_cfg_lim] ; MMIO must cover at least one bus
ja .no_pcie_cfg
; add eax, 0x000FFFFC
; sub eax,[mmio_pcie_cfg_lim] ; MMIO must cover at least one bus
; ja .no_pcie_cfg
; -- it looks like a true PCIe config space;
mov eax,[mmio_pcie_cfg_addr] ; physical address
or eax, (PG_SHARED + PG_LARGE + PG_USER)
mov ebx, PCIe_CONFIG_SPACE ; linear address
mov ecx, ebx
shr ebx, 20
add ebx, sys_pgdir ; PgDir entry @
@@:
mov dword[ebx], eax ; map 4 buses
invlpg [ecx]
cmp bl, 4
jz .pcie_cfg_mapped ; fix it later
add bl, 4 ; next PgDir entry
add eax, 0x400000 ; eax += 4M
add ecx, 0x400000
jmp @b
.pcie_cfg_mapped:
; -- glad to have the extended PCIe config field found
mov esi, boot_pcie_ok
call boot_log
ret ; <<<<<<<<<<< OK >>>>>>>>>>>

137
kernel/branches/Kolibri-A/trunk/core/syscall.inc
View File

@ -17,39 +17,40 @@ cross_order:
mov edx, esi
mov esi, edi
movzx edi, byte[esp+28 + 4]
sub edi, 53 ; all zeroes before
call dword [servetable+edi*4]
ret
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; ;;
;; SYSENTER ENTRY ;;
;; ;;
;; (not used on AMD systems) ;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
align 32
sysenter_entry:
; Íàñòðàèâàåì ñòåê
mov esp, [ss:tss._esp0]
sti
push ebp ; save app esp + 4
mov ebp, [ebp] ; ebp - original ebp
;------------------
pushad
cld
;align 32
;sysenter_entry:
; ; Íàñòðàèâàåì ñòåê
; mov esp, [ss:tss._esp0]
; sti
; push ebp ; save app esp + 4
; mov ebp, [ebp] ; ebp - original ebp
; ;------------------
; pushad
; cld
;
; movzx eax, al
; call dword [servetable2 + eax * 4]
movzx eax, al
call dword [servetable2 + eax * 4]
popad
;------------------
xchg ecx, [ss:esp] ; â âåðøèí ñòåêà - app ecx, ecx - app esp + 4
sub ecx, 4
xchg edx, [ecx] ; edx - return point, & save original edx
push edx
mov edx, [ss:esp + 4]
mov [ecx + 4], edx ; save original ecx
pop edx
sysexit
; popad
; ;------------------
; xchg ecx, [ss:esp] ; â âåðøèí ñòåêà - app ecx, ecx - app esp + 4
; sub ecx, 4
; xchg edx, [ecx] ; edx - return point, & save original edx
; push edx
; mov edx, [ss:esp + 4]
; mov [ecx + 4], edx ; save original ecx
; pop edx
; sysexit
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; ;;
@ -61,7 +62,7 @@ align 16
i40:
pushad
cld
movzx eax, al
and eax, 0x07F
call dword [servetable2 + eax * 4]
popad
iretd
@ -73,25 +74,12 @@ i40:
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
align 32
syscall_entry:
; cli syscall clear IF
xchg esp, [ss:tss._esp0]
push ecx
lea ecx, [esp+4]
xchg ecx, [ss:tss._esp0]
sti
push ecx
mov ecx, [ecx]
;------------------
pushad
cld
; push ecx
sti
xor eax, 3
call dword [servetable3 + eax * 4]
movzx eax, al
call dword [servetable2 + eax * 4]
popad
;------------------
mov ecx, [ss:esp+4]
pop esp
; pop ecx
sysret
iglobal
@ -102,59 +90,6 @@ iglobal
align 4
servetable:
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd 0
dd socket ; 53-Socket interface
dd 0
dd 0
@ -246,7 +181,15 @@ iglobal
dd file_system_lfn ; 70-Common file system interface, version 2
dd syscall_window_settings ; 71-Window settings
dd sys_sendwindowmsg ; 72-Send window message
times 255 - ( ($-servetable2) /4 ) dd undefined_syscall
times 127 - ( ($-servetable2) /4 ) dd undefined_syscall
dd sys_end ; -1-end application
align 4
servetable3:
dd paleholder ; 0
dd paleholder ; 1
dd paleholder ; 2
dd sys_end ; last
endg

8
kernel/branches/Kolibri-A/trunk/data32.inc
View File

@ -58,17 +58,19 @@ keymap_alt:
boot_windefs db 'Setting window defaults',0
boot_bgr db 'Calculating background',0
boot_resirqports db 'Reserving IRQs & ports',0
boot_setrports db 'Setting addresses for IRQs',0
; boot_setrports db 'Setting addresses for IRQs',0
boot_setostask db 'Setting OS task',0
boot_allirqs db 'Unmasking all IRQs',0
boot_tsc db 'Reading TSC',0
boot_cpufreq db 'CPU frequency is ',' ',' MHz',0
boot_pal_ega db 'Setting EGA/CGA 320x200 palette',0
boot_pal_vga db 'Setting VGA 640x480 palette',0
; boot_pal_ega db 'Setting EGA/CGA 320x200 palette',0
; boot_pal_vga db 'Setting VGA 640x480 palette',0
boot_failed db 'Failed to start first app',0
boot_mtrr db 'Setting MTRR',0
boot_pcie_ok db 'PCIe config set OK',0
boot_pcie_fail db 'PCIe config XXX failed XXX',0
boot_rs7xx_fail db 'RS7xx config XXX failed XXX',0
boot_rs7xx_blkd db 'RS7xx config ---------- FAILED -----------',0
if preboot_blogesc
boot_tasking db 'All set - press ESC to start',0
end if

460
kernel/branches/Kolibri-A/trunk/kernel.asm
View File

@ -313,11 +313,11 @@ high_code:
; init selectors
mov ebx,[BOOT_VAR+0x9040] ; offset of APM entry point
movzx eax,word [BOOT_VAR+0x9050] ; real-mode segment base address of
; protected-mode 32-bit code segment
; protected-mode 32-bit code segment
movzx ecx,word [BOOT_VAR+0x9052] ; real-mode segment base address of
; protected-mode 16-bit code segment
; protected-mode 16-bit code segment
movzx edx,word [BOOT_VAR+0x9054] ; real-mode segment base address of
; protected-mode 16-bit data segment
; protected-mode 16-bit data segment
shl eax, 4
mov [dword apm_code_32 + 2], ax
@ -390,70 +390,56 @@ high_code:
mov eax,[BOOT_VAR+0x9018]
mov [LFBAddress],eax
;== cmp [SCR_MODE],word 0100000000000000b
; jge setvesa20
; cmp [SCR_MODE],word 0x13
; je v20ga32
; mov [PUTPIXEL],dword Vesa12_putpixel24 ; Vesa 1.2
; mov [GETPIXEL],dword Vesa12_getpixel24
; cmp [ScreenBPP],byte 24
; jz ga24
; mov [PUTPIXEL],dword Vesa12_putpixel32
; mov [GETPIXEL],dword Vesa12_getpixel32
; ga24:
; jmp v20ga24
;==
cmp [SCR_MODE],word 0100000000000000b
jge setvesa20
mov eax, 0xDEADBEEF
hlt
; === EGA, VGA & Vesa 1.2 modes not supported ===
setvesa20:
; mov [PUTPIXEL],dword Vesa20_putpixel24 ; Vesa 2.0
; mov [PUTPIXEL],dword Vesa20_putpixel24 ; Vesa 2.0 24bpp modes
; mov [GETPIXEL],dword Vesa20_getpixel24
; cmp [ScreenBPP],byte 24
; jz v20ga24
v20ga32:
mov [PUTPIXEL],dword Vesa20_putpixel32
mov [GETPIXEL],dword Vesa20_getpixel32
; v20ga24:
; cmp [SCR_MODE],word 0x12 ; 16 C VGA 640x480
; jne no_mode_0x12
; mov [PUTPIXEL],dword VGA_putpixel
; mov [GETPIXEL],dword Vesa20_getpixel32
no_mode_0x12:
; -------- Fast System Call init ----------
; Intel SYSENTER/SYSEXIT (AMD CPU support it too)
bt [cpu_caps], CAPS_SEP
jnc .SEnP ; SysEnter not Present
xor edx, edx
mov ecx, MSR_SYSENTER_CS
mov eax, os_code
wrmsr
mov ecx, MSR_SYSENTER_ESP
; mov eax, sysenter_stack ; Check it
xor eax, eax
wrmsr
mov ecx, MSR_SYSENTER_EIP
mov eax, sysenter_entry
wrmsr
; bt [cpu_caps], CAPS_SEP
; jnc .SEnP ; SysEnter not Present
; xor edx, edx
; mov ecx, MSR_SYSENTER_CS
; mov eax, os_code
; wrmsr
; mov ecx, MSR_SYSENTER_ESP
;; mov eax, sysenter_stack ; Check it
; xor eax, eax
; wrmsr
; mov ecx, MSR_SYSENTER_EIP
; mov eax, sysenter_entry
; wrmsr
.SEnP:
; AMD SYSCALL/SYSRET
cmp byte[cpu_vendor], 'A'
jne .noSYSCALL
mov eax, 0x80000001
cpuid
test edx, 0x800 ; bit_11 - SYSCALL/SYSRET support
jz .noSYSCALL
; cmp byte[cpu_vendor], 'A'
; jne .noSYSCALL
; mov eax, 0x80000001
; cpuid
; test edx, 0x800 ; bit_11 - SYSCALL/SYSRET support
; jz .noSYSCALL
mov ecx, MSR_AMD_EFER
rdmsr
or eax, 1 ; bit_0 - System Call Extension (SCE)
wrmsr
; !!!! It`s dirty hack, fix it !!!
; Bits of EDX :
; Bit 31–16 During the SYSRET instruction, this field is copied into the CS register
; and the contents of this field, plus 8, are copied into the SS register.
; Bit 15–0 During the SYSCALL instruction, this field is copied into the CS register
; and the contents of this field, plus 8, are copied into the SS register.
; mov edx, (os_code + 16) * 65536 + os_code
mov edx, 0x1B0008
mov edx, 0x1B000B ; RING3 task stack will be used for fast syscalls!
mov eax, syscall_entry
mov ecx, MSR_AMD_STAR
@ -461,7 +447,7 @@ high_code:
.noSYSCALL:
; -----------------------------------------
stdcall alloc_page
stdcall map_page, tss-0xF80, eax, PG_SW
stdcall map_page, tss-0xF80, eax, PG_SW ; lower 0xF80 bytes might be used for something
stdcall alloc_page
inc eax
mov [SLOT_BASE+256+APPDATA.io_map], eax
@ -495,9 +481,10 @@ high_code:
;Add IO access table - bit array of permitted ports
mov edi, tss._io_map_0
xor eax, eax
not eax
mov ecx, 8192/4
rep stosd ; access to 4096*8=65536 ports
mov ecx, 2047
rep stosd ; access to 65504 ports granted
not eax ; the last 32 ports blocked
stosd
mov ax,tss0
ltr ax
@ -694,11 +681,6 @@ end if
call boot_log
call reserve_irqs_ports
; SET PORTS FOR IRQ HANDLERS
;mov esi,boot_setrports
;call boot_log
;call setirqreadports
; SET UP OS TASK
@ -845,8 +827,10 @@ end if
call set_network_conf
no_st_network:
call init_userDMA ; <<<<<<<<< ================ core/memory.inc ========================================
call pci_ext_config ; <<<<<<<<< bus/pci/pcie.inc
call init_userDMA ; <<<<<<<<< ============== core/memory.inc =================
; call pci_ext_config ; <<<<<<<<< bus/pci/pcie.inc
;-------------------------------------------------------------------------------
call rs7xx_pcie_init ; <<<<<<<<< bus/ht.inc
; LOAD FIRST APPLICATION
cli
@ -1097,59 +1081,12 @@ include "kernel32.inc"
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
reserve_irqs_ports:
push eax
xor eax,eax
inc eax
mov byte [irq_owner+4*0],al ;1 ; timer
;mov [irq_owner+4*1], 1 ; keyboard
mov byte [irq_owner+4*6],al ;1 ; floppy diskette
mov byte [irq_owner+4*13],al ;1 ; math co-pros
mov byte [irq_owner+4*14],al ;1 ; ide I
mov byte [irq_owner+4*15],al ;1 ; ide II
pop eax
; RESERVE PORTS
push 4
pop dword [RESERVED_PORTS] ;,edi
push 1
pop dword [RESERVED_PORTS+16+0] ;,dword 1
and dword [RESERVED_PORTS+16+4],0 ;,dword 0x0
mov dword [RESERVED_PORTS+16+8],0x2d ;,dword 0x2d
push 1
pop dword [RESERVED_PORTS+32+0] ;,dword 1
push 0x30
pop dword [RESERVED_PORTS+32+4] ;,dword 0x30
push 0x4d
pop dword [RESERVED_PORTS+32+8] ;,dword 0x4d
push 1
pop dword [RESERVED_PORTS+48+0] ;,dword 1
push 0x50
pop dword [RESERVED_PORTS+48+4] ;,dword 0x50
mov dword [RESERVED_PORTS+48+8],0xdf ;,dword 0xdf
push 1
pop dword [RESERVED_PORTS+64+0] ;,dword 1
mov dword [RESERVED_PORTS+64+4],0xe5 ;,dword 0xe5
mov dword [RESERVED_PORTS+64+8],0xff ;,dword 0xff
; removed
ret
setirqreadports:
mov [irq12read+0],dword 0x60 + 0x01000000 ; read port 0x60 , byte
and dword [irq12read+4],0 ; end of port list
; mov [irq12read+4],dword 0 ; end of port list
;mov [irq04read+0],dword 0x3f8 + 0x01000000 ; read port 0x3f8 , byte
;mov [irq04read+4],dword 0 ; end of port list
;mov [irq03read+0],dword 0x2f8 + 0x01000000 ; read port 0x2f8 , byte
;mov [irq03read+4],dword 0 ; end of port list
ret
; removed
ret
iglobal
process_number dd 0x1
@ -1185,60 +1122,7 @@ set_variables:
align 4
;input eax=43,bl-byte of output, ecx - number of port
sys_outport:
mov edi,ecx ; separate flag for read / write
and ecx,65535
mov eax,[RESERVED_PORTS]
test eax,eax
jnz .sopl8
inc eax
mov [esp+32],eax
ret
.sopl8:
mov edx,[TASK_BASE]
mov edx,[edx+0x4]
;and ecx,65535
;cld - set on interrupt 0x40
.sopl1:
mov esi,eax
shl esi,4
add esi,RESERVED_PORTS
cmp edx,[esi+0]
jne .sopl2
cmp ecx,[esi+4]
jb .sopl2
cmp ecx,[esi+8]
jg .sopl2
.sopl3:
test edi,0x80000000 ; read ?
jnz .sopl4
mov eax,ebx
mov dx,cx ; write
out dx,al
and [esp+32],dword 0
ret
.sopl2:
dec eax
jnz .sopl1
inc eax
mov [esp+32],eax
ret
.sopl4:
mov dx,cx ; read
in al,dx
and eax,0xff
and [esp+32],dword 0
mov [esp+20],eax
and [esp+32],dword 1 ; for backward compatibility: operation failed
ret
display_number:
@ -3462,269 +3346,25 @@ memmove: ; memory move in bytes
align 4
sys_programirq:
mov eax, [TASK_BASE]
add ebx, [eax + TASKDATA.mem_start]
cmp ecx, 16
jae .not_owner
mov edi, [eax + TASKDATA.pid]
cmp edi, [irq_owner + 4 * ecx]
je .spril1
.not_owner:
xor ecx, ecx
inc ecx
jmp .end
.spril1:
shl ecx, 6
mov esi, ebx
lea edi, [irq00read + ecx]
push 16
pop ecx
cld
rep movsd
.end:
mov [esp+32], ecx
; removed
mov dword [esp+32], 1 ; operation failed
ret
align 4
get_irq_data:
movzx esi, bh ; save number of subfunction, if bh = 1, return data size, otherwise, read data
xor bh, bh
cmp ebx, 16
jae .not_owner
mov edx, [4 * ebx + irq_owner] ; check for irq owner
mov eax,[TASK_BASE]
cmp edx,[eax+TASKDATA.pid]
je gidril1
.not_owner:
xor edx, edx
dec edx
jmp gid1
gidril1:
shl ebx, 12
lea eax, [ebx + IRQ_SAVE] ; calculate address of the beginning of buffer + 0x0 - data size
mov edx, [eax] ; + 0x4 - data offset
dec esi
jz gid1
test edx, edx ; check if buffer is empty
jz gid1
mov ebx, [eax + 0x4]
mov edi, ecx
mov ecx, 4000 ; buffer size, used frequently
cmp ebx, ecx ; check for the end of buffer, if end of buffer, begin cycle again
jb @f
xor ebx, ebx
@@:
lea esi, [ebx + edx] ; calculate data size and offset
cld
cmp esi, ecx ; if greater than the buffer size, begin cycle again
jbe @f
sub ecx, ebx
sub edx, ecx
lea esi, [eax + ebx + 0x10]
rep movsb
xor ebx, ebx
@@:
lea esi, [eax + ebx + 0x10]
mov ecx, edx
add ebx, edx
rep movsb
mov edx, [eax]
mov [eax], ecx ; set data size to zero
mov [eax + 0x4], ebx ; set data offset
gid1:
mov [esp+32], edx ; eax
; removed
mov dword [esp+32], -1
ret
set_io_access_rights:
push edi eax
mov edi, tss._io_map_0
; mov ecx,eax
; and ecx,7 ; offset in byte
; shr eax,3 ; number of byte
; add edi,eax
; mov ebx,1
; shl ebx,cl
test ebp,ebp
; cmp ebp,0 ; enable access - ebp = 0
jnz siar1
; not ebx
; and [edi],byte bl
btr [edi], eax
pop eax edi
;removed
ret
siar1:
bts [edi], eax
; or [edi],byte bl ; disable access - ebp = 1
pop eax edi
ret
;reserve/free group of ports
; * eax = 46 - number function
; * ebx = 0 - reserve, 1 - free
; * ecx = number start arrea of ports
; * edx = number end arrea of ports (include last number of port)
;Return value:
; * eax = 0 - succesful
; * eax = 1 - error
; * The system has reserve this ports:
; 0..0x2d, 0x30..0x4d, 0x50..0xdf, 0xe5..0xff (include last number of port).
;destroys eax,ebx, ebp
r_f_port_area:
test ebx, ebx
jnz free_port_area
; je r_port_area
; jmp free_port_area
; r_port_area:
; pushad
cmp ecx,edx ; beginning > end ?
ja rpal1
cmp edx,65536
jae rpal1
mov eax,[RESERVED_PORTS]
test eax,eax ; no reserved areas ?
je rpal2
cmp eax,255 ; max reserved
jae rpal1
rpal3:
mov ebx,eax
shl ebx,4
add ebx,RESERVED_PORTS
cmp ecx,[ebx+8]
ja rpal4
cmp edx,[ebx+4]
jae rpal1
; jb rpal4
; jmp rpal1
rpal4:
dec eax
jnz rpal3
jmp rpal2
rpal1:
; popad
; mov eax,1
xor eax,eax
inc eax
ret
rpal2:
; popad
; enable port access at port IO map
cli
pushad ; start enable io map
cmp edx,65536 ;16384
jae no_unmask_io ; jge
mov eax,ecx
; push ebp
xor ebp,ebp ; enable - eax = port
new_port_access:
; pushad
call set_io_access_rights
; popad
inc eax
cmp eax,edx
jbe new_port_access
; pop ebp
no_unmask_io:
popad ; end enable io map
sti
mov eax,[RESERVED_PORTS]
add eax,1
mov [RESERVED_PORTS],eax
shl eax,4
add eax,RESERVED_PORTS
mov ebx,[TASK_BASE]
mov ebx,[ebx+TASKDATA.pid]
mov [eax],ebx
mov [eax+4],ecx
mov [eax+8],edx
xor eax, eax
ret
free_port_area:
; pushad
mov eax,[RESERVED_PORTS] ; no reserved areas ?
test eax,eax
jz frpal2
mov ebx,[TASK_BASE]
mov ebx,[ebx+TASKDATA.pid]
frpal3:
mov edi,eax
shl edi,4
add edi,RESERVED_PORTS
cmp ebx,[edi]
jne frpal4
cmp ecx,[edi+4]
jne frpal4
cmp edx,[edi+8]
jne frpal4
jmp frpal1
frpal4:
dec eax
jnz frpal3
frpal2:
; popad
inc eax
ret
frpal1:
push ecx
mov ecx,256
sub ecx,eax
shl ecx,4
mov esi,edi
add esi,16
cld
rep movsb
dec dword [RESERVED_PORTS]
;popad
;disable port access at port IO map
; pushad ; start disable io map
pop eax ;start port
cmp edx,65536 ;16384
jge no_mask_io
; mov eax,ecx
xor ebp,ebp
inc ebp
new_port_access_disable:
; pushad
; mov ebp,1 ; disable - eax = port
call set_io_access_rights
; popad
inc eax
cmp eax,edx
jbe new_port_access_disable
no_mask_io:
; popad ; end disable io map
; removed; always returns 0
xor eax, eax
ret

1
kernel/branches/Kolibri-A/trunk/kernel32.inc
View File

@ -270,6 +270,7 @@ include "gui/skincode.inc"
; Pci functions
include "bus/pci/pci32.inc"
include "bus/pci/pcie.inc"
include "bus/ht.inc" ; AMD HyperTransport bus control
; Floppy drive controller