forked from KolibriOS/kolibrios
ati-4.5.7
git-svn-id: svn://kolibrios.org@6938 a494cfbc-eb01-0410-851d-a64ba20cac60
This commit is contained in:
parent
d2905e7c3f
commit
683dfff8d5
@ -267,7 +267,6 @@ void *kmemdup(const void *src, size_t len, gfp_t gfp)
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}
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}
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void msleep(unsigned int msecs)
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void msleep(unsigned int msecs)
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{
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{
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msecs /= 10;
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msecs /= 10;
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@ -1,42 +1,45 @@
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CC = gcc
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CC = kos32-gcc
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LD = ld
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LD = ld
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AS = as
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AS = as
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FASM = fasm.exe
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FASM = fasm.exe
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DEFINES = -D__KERNEL__ -DCONFIG_X86_32 -DCONFIG_X86_CMPXCHG64 -DCONFIG_TINY_RCU
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DEFINES = -DDRM_DEBUG_CODE=0 -D__KERNEL__ -DCONFIG_X86 -DCONFIG_X86_32 -DCONFIG_PCI
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DEFINES += -DCONFIG_X86_L1_CACHE_SHIFT=6
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DEFINES += -DCONFIG_X86_CMPXCHG64 -DCONFIG_TINY_RCU -DCONFIG_X86_L1_CACHE_SHIFT=6
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DEFINES += -DCONFIG_DRM_FBDEV_EMULATION -DCONFIG_DMI -DCONFIG_ARCH_HAS_CACHE_LINE_SIZE
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DEFINES += -DCONFIG_DRM_FBDEV_EMULATION -DCONFIG_DMI
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DEFINES += -DKBUILD_MODNAME=\"ati.dll\"
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DRV_TOPDIR = $(CURDIR)/../../..
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DDK_TOPDIR = $(CURDIR)/../../..
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DDK_INCLUDES = $(DRV_TOPDIR)/include
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DRM_TOPDIR = $(CURDIR)/..
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DRM_TOPDIR = $(CURDIR)/..
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DRV_INCLUDES = $(DRV_TOPDIR)/include
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INCLUDES = -I$(DDK_INCLUDES) \
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-I$(DDK_INCLUDES)/asm \
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INCLUDES = -I$(DRV_INCLUDES) \
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-I$(DDK_INCLUDES)/uapi \
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-I$(DRV_INCLUDES)/asm \
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-I$(DDK_INCLUDES)/drm -I./
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-I$(DRV_INCLUDES)/uapi \
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-I$(DRV_INCLUDES)/drm -I./ -I$(DRV_INCLUDES)
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CFLAGS= -c -O2 $(INCLUDES) $(DEFINES) -march=i686 -fno-ident -fomit-frame-pointer -fno-builtin-printf
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CFLAGS= -c -O2 $(INCLUDES) $(DEFINES) -march=i686 -fno-ident -fomit-frame-pointer -fno-builtin-printf
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CFLAGS+= -mno-stack-arg-probe -mpreferred-stack-boundary=2 -mincoming-stack-boundary=2 -mno-ms-bitfields
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CFLAGS+= -mno-stack-arg-probe -mpreferred-stack-boundary=2 -mincoming-stack-boundary=2 -mno-ms-bitfields
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LIBPATH:= $(DRV_TOPDIR)/ddk
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LIBPATH:= $(DDK_TOPDIR)
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LIBS:= -lddk -lcore -lgcc
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LIBS:= -lddk -lcore -lgcc
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LDFLAGS = -nostdlib -shared -s -Map atikms.map --image-base 0\
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PE_FLAGS = --major-os-version 0 --minor-os-version 7 --major-subsystem-version 0 \
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--minor-subsystem-version 5 --subsystem native
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LDFLAGS = -nostdlib -shared -s $(PE_FLAGS) --image-base 0\
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--file-alignment 512 --section-alignment 4096
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--file-alignment 512 --section-alignment 4096
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NAME:= atikms
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NAME:= atikms
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HFILES:= $(DRV_INCLUDES)/linux/types.h \
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HFILES:= $(DDK_INCLUDES)/linux/types.h \
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$(DRV_INCLUDES)/linux/list.h \
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$(DDK_INCLUDES)/linux/list.h \
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$(DRV_INCLUDES)/linux/pci.h \
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$(DDK_INCLUDES)/linux/pci.h \
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$(DRV_INCLUDES)/drm/drmP.h \
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$(DDK_INCLUDES)/drm/drmP.h \
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$(DRV_INCLUDES)/drm/drm_edid.h \
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$(DDK_INCLUDES)/drm/drm_edid.h \
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$(DRV_INCLUDES)/drm/drm_crtc.h \
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$(DDK_INCLUDES)/drm/drm_crtc.h \
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$(DRV_INCLUDES)/drm/drm_mm.h \
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$(DDK_INCLUDES)/drm/drm_mm.h \
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atom.h \
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atom.h \
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radeon.h \
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radeon.h \
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radeon_asic.h
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radeon_asic.h
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@ -233,7 +236,7 @@ $(NAME).dll: $(NAME_OBJS) $(FW_BINS) $(SRC_DEP) $(HFILES) $(LIBPATH)/libcore.a $
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%.o : %.c $(HFILES) Makefile
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%.o : %.c $(HFILES) Makefile
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$(CC) $(CFLAGS) $(DEFINES) -o $@ $<
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$(CC) $(CFLAGS) -o $@ $<
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%.o : %.S $(HFILES) Makefile
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%.o : %.S $(HFILES) Makefile
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$(AS) -o $@ $<
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$(AS) -o $@ $<
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@ -5,8 +5,10 @@ LD = ld
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AS = as
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AS = as
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FASM = fasm
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FASM = fasm
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DEFINES = -D__KERNEL__ -DCONFIG_X86_32 -DCONFIG_TINY_RCU -DCONFIG_X86_L1_CACHE_SHIFT=6
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DEFINES = -DDRM_DEBUG_CODE=0 -D__KERNEL__ -DCONFIG_X86 -DCONFIG_X86_32 -DCONFIG_PCI
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DEFINES += -DCONFIG_ARCH_HAS_CACHE_LINE_SIZE
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DEFINES += -DCONFIG_X86_CMPXCHG64 -DCONFIG_TINY_RCU -DCONFIG_X86_L1_CACHE_SHIFT=6
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DEFINES += -DCONFIG_DRM_FBDEV_EMULATION -DCONFIG_DMI
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DEFINES += -DKBUILD_MODNAME=\"ati.dll\"
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DDK_TOPDIR = d:\kos\kolibri\drivers\ddk
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DDK_TOPDIR = d:\kos\kolibri\drivers\ddk
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DRV_INCLUDES = /d/kos/kolibri/drivers/include
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DRV_INCLUDES = /d/kos/kolibri/drivers/include
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@ -36,7 +38,6 @@ NAME:= atikms
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HFILES:= $(DRV_INCLUDES)/linux/types.h \
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HFILES:= $(DRV_INCLUDES)/linux/types.h \
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$(DRV_INCLUDES)/linux/list.h \
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$(DRV_INCLUDES)/linux/list.h \
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$(DRV_INCLUDES)/linux/pci.h \
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$(DRV_INCLUDES)/linux/pci.h \
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$(DRV_INCLUDES)/drm/drm.h \
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$(DRV_INCLUDES)/drm/drmP.h \
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$(DRV_INCLUDES)/drm/drmP.h \
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$(DRV_INCLUDES)/drm/drm_edid.h \
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$(DRV_INCLUDES)/drm/drm_edid.h \
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$(DRV_INCLUDES)/drm/drm_crtc.h \
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$(DRV_INCLUDES)/drm/drm_crtc.h \
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@ -55,10 +56,14 @@ NAME_SRC= \
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../ttm/ttm_memory.c \
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../ttm/ttm_memory.c \
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../ttm/ttm_page_alloc.c \
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../ttm/ttm_page_alloc.c \
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../ttm/ttm_tt.c \
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../ttm/ttm_tt.c \
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$(DRM_TOPDIR)/drm_atomic.c \
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$(DRM_TOPDIR)/drm_atomic_helper.c \
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$(DRM_TOPDIR)/drm_bridge.c \
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$(DRM_TOPDIR)/drm_cache.c \
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$(DRM_TOPDIR)/drm_cache.c \
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$(DRM_TOPDIR)/drm_crtc.c \
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$(DRM_TOPDIR)/drm_crtc.c \
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$(DRM_TOPDIR)/drm_crtc_helper.c \
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$(DRM_TOPDIR)/drm_crtc_helper.c \
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$(DRM_TOPDIR)/drm_dp_helper.c \
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$(DRM_TOPDIR)/drm_dp_helper.c \
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$(DRM_TOPDIR)/drm_dp_mst_topology.c \
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$(DRM_TOPDIR)/drm_drv.c \
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$(DRM_TOPDIR)/drm_drv.c \
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$(DRM_TOPDIR)/drm_edid.c \
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$(DRM_TOPDIR)/drm_edid.c \
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$(DRM_TOPDIR)/drm_fb_helper.c \
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$(DRM_TOPDIR)/drm_fb_helper.c \
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@ -106,6 +111,7 @@ NAME_SRC= \
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radeon_agp.c \
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radeon_agp.c \
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radeon_asic.c \
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radeon_asic.c \
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radeon_atombios.c \
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radeon_atombios.c \
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radeon_audio.c \
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radeon_benchmark.c \
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radeon_benchmark.c \
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radeon_bios.c \
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radeon_bios.c \
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radeon_combios.c \
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radeon_combios.c \
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@ -113,6 +119,8 @@ NAME_SRC= \
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radeon_cs.c \
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radeon_cs.c \
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radeon_clocks.c \
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radeon_clocks.c \
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radeon_display.c \
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radeon_display.c \
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radeon_dp_auxch.c \
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radeon_dp_mst.c \
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radeon_encoders.c \
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radeon_encoders.c \
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radeon_fence.c \
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radeon_fence.c \
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radeon_fb.c \
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radeon_fb.c \
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@ -121,6 +129,7 @@ NAME_SRC= \
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radeon_i2c.c \
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radeon_i2c.c \
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radeon_ib.c \
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radeon_ib.c \
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radeon_irq_kms.c \
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radeon_irq_kms.c \
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radeon_kms.c \
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radeon_legacy_crtc.c \
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radeon_legacy_crtc.c \
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radeon_legacy_encoders.c \
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radeon_legacy_encoders.c \
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radeon_legacy_tv.c \
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radeon_legacy_tv.c \
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@ -129,6 +138,7 @@ NAME_SRC= \
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radeon_ring.c \
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radeon_ring.c \
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radeon_sa.c \
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radeon_sa.c \
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radeon_semaphore.c \
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radeon_semaphore.c \
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radeon_sync.c \
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radeon_test.c \
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radeon_test.c \
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radeon_ttm.c \
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radeon_ttm.c \
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radeon_ucode.c \
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radeon_ucode.c \
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@ -145,7 +155,6 @@ NAME_SRC= \
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rv740_dpm.c \
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rv740_dpm.c \
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r520.c \
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r520.c \
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r600.c \
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r600.c \
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r600_audio.c \
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r600_blit_shaders.c \
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r600_blit_shaders.c \
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r600_cs.c \
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r600_cs.c \
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r600_dma.c \
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r600_dma.c \
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@ -93,7 +93,7 @@ static void debug_print_spaces(int n)
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}
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}
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#define DEBUG(...) do if (atom_debug) { printk(KERN_DEBUG __VA_ARGS__); } while (0)
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#define DEBUG(...) do if (atom_debug) { printk(KERN_DEBUG __VA_ARGS__); } while (0)
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#define SDEBUG(...) do if (atom_debug) { printk(KERN_DEBUG); debug_print_spaces(debug_depth); printk(__VA_ARGS__);} while (0)
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#define SDEBUG(...) do if (atom_debug) { printk(KERN_DEBUG); debug_print_spaces(debug_depth); printk(__VA_ARGS__); } while (0)
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#else
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#else
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#define DEBUG(...) do { } while (0)
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#define DEBUG(...) do { } while (0)
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#define SDEBUG(...) do { } while (0)
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#define SDEBUG(...) do { } while (0)
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@ -25,6 +25,7 @@
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*/
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*/
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#include <drm/drmP.h>
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#include <drm/drmP.h>
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#include <drm/drm_crtc_helper.h>
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#include <drm/drm_crtc_helper.h>
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#include <drm/drm_fb_helper.h>
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#include <drm/radeon_drm.h>
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#include <drm/radeon_drm.h>
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#include <drm/drm_fixed.h>
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#include <drm/drm_fixed.h>
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#include "radeon.h"
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#include "radeon.h"
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@ -315,8 +315,19 @@ int radeon_dp_get_dp_link_config(struct drm_connector *connector,
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unsigned max_lane_num = drm_dp_max_lane_count(dpcd);
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unsigned max_lane_num = drm_dp_max_lane_count(dpcd);
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unsigned lane_num, i, max_pix_clock;
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unsigned lane_num, i, max_pix_clock;
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if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) ==
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ENCODER_OBJECT_ID_NUTMEG) {
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for (lane_num = 1; lane_num <= max_lane_num; lane_num <<= 1) {
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for (lane_num = 1; lane_num <= max_lane_num; lane_num <<= 1) {
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max_pix_clock = (lane_num * 270000 * 8) / bpp;
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if (max_pix_clock >= pix_clock) {
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*dp_lanes = lane_num;
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*dp_rate = 270000;
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return 0;
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}
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}
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} else {
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for (i = 0; i < ARRAY_SIZE(link_rates) && link_rates[i] <= max_link_rate; i++) {
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for (i = 0; i < ARRAY_SIZE(link_rates) && link_rates[i] <= max_link_rate; i++) {
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for (lane_num = 1; lane_num <= max_lane_num; lane_num <<= 1) {
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max_pix_clock = (lane_num * link_rates[i] * 8) / bpp;
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max_pix_clock = (lane_num * link_rates[i] * 8) / bpp;
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if (max_pix_clock >= pix_clock) {
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if (max_pix_clock >= pix_clock) {
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*dp_lanes = lane_num;
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*dp_lanes = lane_num;
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@ -325,6 +336,7 @@ int radeon_dp_get_dp_link_config(struct drm_connector *connector,
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}
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}
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}
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}
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}
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}
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}
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return -EINVAL;
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return -EINVAL;
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}
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}
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@ -120,7 +120,6 @@ atombios_set_backlight_level(struct radeon_encoder *radeon_encoder, u8 level)
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case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
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case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
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case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
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case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
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case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
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case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
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case ENCODER_OBJECT_ID_INTERNAL_UNIPHY3:
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if (dig->backlight_level == 0)
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if (dig->backlight_level == 0)
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atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_LCD_BLOFF, 0, 0);
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atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_LCD_BLOFF, 0, 0);
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else {
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else {
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@ -2774,23 +2773,27 @@ radeon_add_atom_encoder(struct drm_device *dev,
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case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
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case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
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if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
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if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
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radeon_encoder->rmx_type = RMX_FULL;
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radeon_encoder->rmx_type = RMX_FULL;
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drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_LVDS);
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drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs,
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DRM_MODE_ENCODER_LVDS, NULL);
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radeon_encoder->enc_priv = radeon_atombios_get_lvds_info(radeon_encoder);
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radeon_encoder->enc_priv = radeon_atombios_get_lvds_info(radeon_encoder);
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} else {
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} else {
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drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_TMDS);
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drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs,
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DRM_MODE_ENCODER_TMDS, NULL);
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radeon_encoder->enc_priv = radeon_atombios_set_dig_info(radeon_encoder);
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radeon_encoder->enc_priv = radeon_atombios_set_dig_info(radeon_encoder);
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}
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}
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drm_encoder_helper_add(encoder, &radeon_atom_dig_helper_funcs);
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drm_encoder_helper_add(encoder, &radeon_atom_dig_helper_funcs);
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break;
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break;
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case ENCODER_OBJECT_ID_INTERNAL_DAC1:
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case ENCODER_OBJECT_ID_INTERNAL_DAC1:
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drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_DAC);
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drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs,
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DRM_MODE_ENCODER_DAC, NULL);
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radeon_encoder->enc_priv = radeon_atombios_set_dac_info(radeon_encoder);
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radeon_encoder->enc_priv = radeon_atombios_set_dac_info(radeon_encoder);
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drm_encoder_helper_add(encoder, &radeon_atom_dac_helper_funcs);
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drm_encoder_helper_add(encoder, &radeon_atom_dac_helper_funcs);
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break;
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break;
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case ENCODER_OBJECT_ID_INTERNAL_DAC2:
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case ENCODER_OBJECT_ID_INTERNAL_DAC2:
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case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1:
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case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1:
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case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2:
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case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2:
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drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_TVDAC);
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drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs,
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DRM_MODE_ENCODER_TVDAC, NULL);
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radeon_encoder->enc_priv = radeon_atombios_set_dac_info(radeon_encoder);
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radeon_encoder->enc_priv = radeon_atombios_set_dac_info(radeon_encoder);
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drm_encoder_helper_add(encoder, &radeon_atom_dac_helper_funcs);
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drm_encoder_helper_add(encoder, &radeon_atom_dac_helper_funcs);
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break;
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break;
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@ -2804,13 +2807,16 @@ radeon_add_atom_encoder(struct drm_device *dev,
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case ENCODER_OBJECT_ID_INTERNAL_UNIPHY3:
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case ENCODER_OBJECT_ID_INTERNAL_UNIPHY3:
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if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
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if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
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radeon_encoder->rmx_type = RMX_FULL;
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radeon_encoder->rmx_type = RMX_FULL;
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drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_LVDS);
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drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs,
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DRM_MODE_ENCODER_LVDS, NULL);
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radeon_encoder->enc_priv = radeon_atombios_get_lvds_info(radeon_encoder);
|
radeon_encoder->enc_priv = radeon_atombios_get_lvds_info(radeon_encoder);
|
||||||
} else if (radeon_encoder->devices & (ATOM_DEVICE_CRT_SUPPORT)) {
|
} else if (radeon_encoder->devices & (ATOM_DEVICE_CRT_SUPPORT)) {
|
||||||
drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_DAC);
|
drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs,
|
||||||
|
DRM_MODE_ENCODER_DAC, NULL);
|
||||||
radeon_encoder->enc_priv = radeon_atombios_set_dig_info(radeon_encoder);
|
radeon_encoder->enc_priv = radeon_atombios_set_dig_info(radeon_encoder);
|
||||||
} else {
|
} else {
|
||||||
drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_TMDS);
|
drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs,
|
||||||
|
DRM_MODE_ENCODER_TMDS, NULL);
|
||||||
radeon_encoder->enc_priv = radeon_atombios_set_dig_info(radeon_encoder);
|
radeon_encoder->enc_priv = radeon_atombios_set_dig_info(radeon_encoder);
|
||||||
}
|
}
|
||||||
drm_encoder_helper_add(encoder, &radeon_atom_dig_helper_funcs);
|
drm_encoder_helper_add(encoder, &radeon_atom_dig_helper_funcs);
|
||||||
@ -2827,11 +2833,14 @@ radeon_add_atom_encoder(struct drm_device *dev,
|
|||||||
/* these are handled by the primary encoders */
|
/* these are handled by the primary encoders */
|
||||||
radeon_encoder->is_ext_encoder = true;
|
radeon_encoder->is_ext_encoder = true;
|
||||||
if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT))
|
if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT))
|
||||||
drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_LVDS);
|
drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs,
|
||||||
|
DRM_MODE_ENCODER_LVDS, NULL);
|
||||||
else if (radeon_encoder->devices & (ATOM_DEVICE_CRT_SUPPORT))
|
else if (radeon_encoder->devices & (ATOM_DEVICE_CRT_SUPPORT))
|
||||||
drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_DAC);
|
drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs,
|
||||||
|
DRM_MODE_ENCODER_DAC, NULL);
|
||||||
else
|
else
|
||||||
drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_TMDS);
|
drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs,
|
||||||
|
DRM_MODE_ENCODER_TMDS, NULL);
|
||||||
drm_encoder_helper_add(encoder, &radeon_atom_ext_helper_funcs);
|
drm_encoder_helper_add(encoder, &radeon_atom_ext_helper_funcs);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
@ -4132,10 +4132,10 @@ struct radeon_fence *cik_copy_cpdma(struct radeon_device *rdev,
|
|||||||
* @rdev: radeon_device pointer
|
* @rdev: radeon_device pointer
|
||||||
* @ib: radeon indirect buffer object
|
* @ib: radeon indirect buffer object
|
||||||
*
|
*
|
||||||
* Emits an DE (drawing engine) or CE (constant engine) IB
|
* Emits a DE (drawing engine) or CE (constant engine) IB
|
||||||
* on the gfx ring. IBs are usually generated by userspace
|
* on the gfx ring. IBs are usually generated by userspace
|
||||||
* acceleration drivers and submitted to the kernel for
|
* acceleration drivers and submitted to the kernel for
|
||||||
* sheduling on the ring. This function schedules the IB
|
* scheduling on the ring. This function schedules the IB
|
||||||
* on the gfx ring for execution by the GPU.
|
* on the gfx ring for execution by the GPU.
|
||||||
*/
|
*/
|
||||||
void cik_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib)
|
void cik_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib)
|
||||||
|
@ -1,53 +0,0 @@
|
|||||||
|
|
||||||
typedef struct tag_display display_t;
|
|
||||||
|
|
||||||
typedef struct
|
|
||||||
{
|
|
||||||
kobj_t header;
|
|
||||||
|
|
||||||
uint32_t *data;
|
|
||||||
uint32_t hot_x;
|
|
||||||
uint32_t hot_y;
|
|
||||||
|
|
||||||
struct list_head list;
|
|
||||||
struct radeon_bo *robj;
|
|
||||||
}cursor_t;
|
|
||||||
|
|
||||||
#define CURSOR_WIDTH 64
|
|
||||||
#define CURSOR_HEIGHT 64
|
|
||||||
|
|
||||||
struct tag_display
|
|
||||||
{
|
|
||||||
int x;
|
|
||||||
int y;
|
|
||||||
int width;
|
|
||||||
int height;
|
|
||||||
int bpp;
|
|
||||||
int vrefresh;
|
|
||||||
int pitch;
|
|
||||||
int lfb;
|
|
||||||
|
|
||||||
int supported_modes;
|
|
||||||
struct drm_device *ddev;
|
|
||||||
struct drm_connector *connector;
|
|
||||||
struct drm_crtc *crtc;
|
|
||||||
|
|
||||||
struct list_head cursors;
|
|
||||||
|
|
||||||
cursor_t *cursor;
|
|
||||||
int (*init_cursor)(cursor_t*);
|
|
||||||
cursor_t* (__stdcall *select_cursor)(cursor_t*);
|
|
||||||
void (*show_cursor)(int show);
|
|
||||||
void (__stdcall *move_cursor)(cursor_t *cursor, int x, int y);
|
|
||||||
void (__stdcall *restore_cursor)(int x, int y);
|
|
||||||
void (*disable_mouse)(void);
|
|
||||||
u32 mask_seqno;
|
|
||||||
u32 check_mouse;
|
|
||||||
u32 check_m_pixel;
|
|
||||||
|
|
||||||
};
|
|
||||||
|
|
||||||
extern display_t *os_display;
|
|
||||||
|
|
||||||
int init_cursor(cursor_t *cursor);
|
|
||||||
void __stdcall restore_cursor(int x, int y);
|
|
@ -5,9 +5,12 @@
|
|||||||
#include "radeon.h"
|
#include "radeon.h"
|
||||||
#include "bitmap.h"
|
#include "bitmap.h"
|
||||||
|
|
||||||
#define DRV_NAME "atikms v4.4.30"
|
#define DRV_NAME "atikms v4.5.7"
|
||||||
|
|
||||||
void __init dmi_scan_machine(void);
|
void __init dmi_scan_machine(void);
|
||||||
|
int printf ( const char * format, ... );
|
||||||
|
void parse_cmdline(char *cmdline, videomode_t *mode, char *log, int *kms);
|
||||||
|
int kmap_init();
|
||||||
|
|
||||||
#define KMS_DEV_CLOSE 0
|
#define KMS_DEV_CLOSE 0
|
||||||
#define KMS_DEV_INIT 1
|
#define KMS_DEV_INIT 1
|
||||||
@ -311,14 +314,3 @@ int seq_printf(struct seq_file *m, const char *f, ...)
|
|||||||
// return ret;
|
// return ret;
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
s64 div64_s64(s64 dividend, s64 divisor)
|
|
||||||
{
|
|
||||||
s64 quot, t;
|
|
||||||
|
|
||||||
quot = div64_u64(abs(dividend), abs(divisor));
|
|
||||||
t = (dividend ^ divisor) >> 63;
|
|
||||||
|
|
||||||
return (quot ^ t) - t;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
@ -3146,7 +3146,8 @@ void r100_bandwidth_update(struct radeon_device *rdev)
|
|||||||
{
|
{
|
||||||
fixed20_12 trcd_ff, trp_ff, tras_ff, trbs_ff, tcas_ff;
|
fixed20_12 trcd_ff, trp_ff, tras_ff, trbs_ff, tcas_ff;
|
||||||
fixed20_12 sclk_ff, mclk_ff, sclk_eff_ff, sclk_delay_ff;
|
fixed20_12 sclk_ff, mclk_ff, sclk_eff_ff, sclk_delay_ff;
|
||||||
fixed20_12 peak_disp_bw, mem_bw, pix_clk, pix_clk2, temp_ff, crit_point_ff;
|
fixed20_12 peak_disp_bw, mem_bw, pix_clk, pix_clk2, temp_ff;
|
||||||
|
fixed20_12 crit_point_ff = {0};
|
||||||
uint32_t temp, data, mem_trcd, mem_trp, mem_tras;
|
uint32_t temp, data, mem_trcd, mem_trp, mem_tras;
|
||||||
fixed20_12 memtcas_ff[8] = {
|
fixed20_12 memtcas_ff[8] = {
|
||||||
dfixed_init(1),
|
dfixed_init(1),
|
||||||
@ -3200,7 +3201,7 @@ void r100_bandwidth_update(struct radeon_device *rdev)
|
|||||||
fixed20_12 min_mem_eff;
|
fixed20_12 min_mem_eff;
|
||||||
fixed20_12 mc_latency_sclk, mc_latency_mclk, k1;
|
fixed20_12 mc_latency_sclk, mc_latency_mclk, k1;
|
||||||
fixed20_12 cur_latency_mclk, cur_latency_sclk;
|
fixed20_12 cur_latency_mclk, cur_latency_sclk;
|
||||||
fixed20_12 disp_latency, disp_latency_overhead, disp_drain_rate,
|
fixed20_12 disp_latency, disp_latency_overhead, disp_drain_rate = {0},
|
||||||
disp_drain_rate2, read_return_rate;
|
disp_drain_rate2, read_return_rate;
|
||||||
fixed20_12 time_disp1_drop_priority;
|
fixed20_12 time_disp1_drop_priority;
|
||||||
int c;
|
int c;
|
||||||
|
@ -2328,101 +2328,6 @@ int r600_cs_parse(struct radeon_cs_parser *p)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef CONFIG_DRM_RADEON_UMS
|
|
||||||
|
|
||||||
/**
|
|
||||||
* cs_parser_fini() - clean parser states
|
|
||||||
* @parser: parser structure holding parsing context.
|
|
||||||
* @error: error number
|
|
||||||
*
|
|
||||||
* If error is set than unvalidate buffer, otherwise just free memory
|
|
||||||
* used by parsing context.
|
|
||||||
**/
|
|
||||||
static void r600_cs_parser_fini(struct radeon_cs_parser *parser, int error)
|
|
||||||
{
|
|
||||||
unsigned i;
|
|
||||||
|
|
||||||
kfree(parser->relocs);
|
|
||||||
for (i = 0; i < parser->nchunks; i++)
|
|
||||||
drm_free_large(parser->chunks[i].kdata);
|
|
||||||
kfree(parser->chunks);
|
|
||||||
kfree(parser->chunks_array);
|
|
||||||
}
|
|
||||||
|
|
||||||
static int r600_cs_parser_relocs_legacy(struct radeon_cs_parser *p)
|
|
||||||
{
|
|
||||||
if (p->chunk_relocs == NULL) {
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
p->relocs = kzalloc(sizeof(struct radeon_bo_list), GFP_KERNEL);
|
|
||||||
if (p->relocs == NULL) {
|
|
||||||
return -ENOMEM;
|
|
||||||
}
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
int r600_cs_legacy(struct drm_device *dev, void *data, struct drm_file *filp,
|
|
||||||
unsigned family, u32 *ib, int *l)
|
|
||||||
{
|
|
||||||
struct radeon_cs_parser parser;
|
|
||||||
struct radeon_cs_chunk *ib_chunk;
|
|
||||||
struct r600_cs_track *track;
|
|
||||||
int r;
|
|
||||||
|
|
||||||
/* initialize tracker */
|
|
||||||
track = kzalloc(sizeof(*track), GFP_KERNEL);
|
|
||||||
if (track == NULL)
|
|
||||||
return -ENOMEM;
|
|
||||||
r600_cs_track_init(track);
|
|
||||||
r600_cs_legacy_get_tiling_conf(dev, &track->npipes, &track->nbanks, &track->group_size);
|
|
||||||
/* initialize parser */
|
|
||||||
memset(&parser, 0, sizeof(struct radeon_cs_parser));
|
|
||||||
parser.filp = filp;
|
|
||||||
parser.dev = &dev->pdev->dev;
|
|
||||||
parser.rdev = NULL;
|
|
||||||
parser.family = family;
|
|
||||||
parser.track = track;
|
|
||||||
parser.ib.ptr = ib;
|
|
||||||
r = radeon_cs_parser_init(&parser, data);
|
|
||||||
if (r) {
|
|
||||||
DRM_ERROR("Failed to initialize parser !\n");
|
|
||||||
r600_cs_parser_fini(&parser, r);
|
|
||||||
return r;
|
|
||||||
}
|
|
||||||
r = r600_cs_parser_relocs_legacy(&parser);
|
|
||||||
if (r) {
|
|
||||||
DRM_ERROR("Failed to parse relocation !\n");
|
|
||||||
r600_cs_parser_fini(&parser, r);
|
|
||||||
return r;
|
|
||||||
}
|
|
||||||
/* Copy the packet into the IB, the parser will read from the
|
|
||||||
* input memory (cached) and write to the IB (which can be
|
|
||||||
* uncached). */
|
|
||||||
ib_chunk = parser.chunk_ib;
|
|
||||||
parser.ib.length_dw = ib_chunk->length_dw;
|
|
||||||
*l = parser.ib.length_dw;
|
|
||||||
if (copy_from_user(ib, ib_chunk->user_ptr, ib_chunk->length_dw * 4)) {
|
|
||||||
r = -EFAULT;
|
|
||||||
r600_cs_parser_fini(&parser, r);
|
|
||||||
return r;
|
|
||||||
}
|
|
||||||
r = r600_cs_parse(&parser);
|
|
||||||
if (r) {
|
|
||||||
DRM_ERROR("Invalid command stream !\n");
|
|
||||||
r600_cs_parser_fini(&parser, r);
|
|
||||||
return r;
|
|
||||||
}
|
|
||||||
r600_cs_parser_fini(&parser, r);
|
|
||||||
return r;
|
|
||||||
}
|
|
||||||
|
|
||||||
void r600_cs_legacy_init(void)
|
|
||||||
{
|
|
||||||
r600_nomm = 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* DMA
|
* DMA
|
||||||
*/
|
*/
|
||||||
|
@ -156,20 +156,19 @@ u32 r600_dpm_get_vblank_time(struct radeon_device *rdev)
|
|||||||
struct drm_device *dev = rdev->ddev;
|
struct drm_device *dev = rdev->ddev;
|
||||||
struct drm_crtc *crtc;
|
struct drm_crtc *crtc;
|
||||||
struct radeon_crtc *radeon_crtc;
|
struct radeon_crtc *radeon_crtc;
|
||||||
u32 vblank_in_pixels;
|
u32 line_time_us, vblank_lines;
|
||||||
u32 vblank_time_us = 0xffffffff; /* if the displays are off, vblank time is max */
|
u32 vblank_time_us = 0xffffffff; /* if the displays are off, vblank time is max */
|
||||||
|
|
||||||
if (rdev->num_crtc && rdev->mode_info.mode_config_initialized) {
|
if (rdev->num_crtc && rdev->mode_info.mode_config_initialized) {
|
||||||
list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
|
list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
|
||||||
radeon_crtc = to_radeon_crtc(crtc);
|
radeon_crtc = to_radeon_crtc(crtc);
|
||||||
if (crtc->enabled && radeon_crtc->enabled && radeon_crtc->hw_mode.clock) {
|
if (crtc->enabled && radeon_crtc->enabled && radeon_crtc->hw_mode.clock) {
|
||||||
vblank_in_pixels =
|
line_time_us = (radeon_crtc->hw_mode.crtc_htotal * 1000) /
|
||||||
radeon_crtc->hw_mode.crtc_htotal *
|
radeon_crtc->hw_mode.clock;
|
||||||
(radeon_crtc->hw_mode.crtc_vblank_end -
|
vblank_lines = radeon_crtc->hw_mode.crtc_vblank_end -
|
||||||
radeon_crtc->hw_mode.crtc_vdisplay +
|
radeon_crtc->hw_mode.crtc_vdisplay +
|
||||||
(radeon_crtc->v_border * 2));
|
(radeon_crtc->v_border * 2);
|
||||||
|
vblank_time_us = vblank_lines * line_time_us;
|
||||||
vblank_time_us = vblank_in_pixels * 1000 / radeon_crtc->hw_mode.clock;
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -1884,7 +1884,7 @@ struct radeon_asic {
|
|||||||
void (*pad_ib)(struct radeon_ib *ib);
|
void (*pad_ib)(struct radeon_ib *ib);
|
||||||
} vm;
|
} vm;
|
||||||
/* ring specific callbacks */
|
/* ring specific callbacks */
|
||||||
struct radeon_asic_ring *ring[RADEON_NUM_RINGS];
|
const struct radeon_asic_ring *ring[RADEON_NUM_RINGS];
|
||||||
/* irqs */
|
/* irqs */
|
||||||
struct {
|
struct {
|
||||||
int (*set)(struct radeon_device *rdev);
|
int (*set)(struct radeon_device *rdev);
|
||||||
@ -2382,6 +2382,7 @@ struct radeon_device {
|
|||||||
struct mutex dc_hw_i2c_mutex; /* display controller hw i2c mutex */
|
struct mutex dc_hw_i2c_mutex; /* display controller hw i2c mutex */
|
||||||
bool has_uvd;
|
bool has_uvd;
|
||||||
struct r600_audio audio; /* audio stuff */
|
struct r600_audio audio; /* audio stuff */
|
||||||
|
struct notifier_block acpi_nb;
|
||||||
/* only one userspace can use Hyperz features or CMASK at a time */
|
/* only one userspace can use Hyperz features or CMASK at a time */
|
||||||
struct drm_file *hyperz_filp;
|
struct drm_file *hyperz_filp;
|
||||||
struct drm_file *cmask_filp;
|
struct drm_file *cmask_filp;
|
||||||
@ -2927,6 +2928,4 @@ drm_get_resource_start(struct drm_device *dev, unsigned int resource);
|
|||||||
resource_size_t
|
resource_size_t
|
||||||
drm_get_resource_len(struct drm_device *dev, unsigned int resource);
|
drm_get_resource_len(struct drm_device *dev, unsigned int resource);
|
||||||
|
|
||||||
#define ioread32(addr) readl(addr)
|
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
@ -179,7 +179,7 @@ void radeon_agp_disable(struct radeon_device *rdev)
|
|||||||
* ASIC
|
* ASIC
|
||||||
*/
|
*/
|
||||||
|
|
||||||
static struct radeon_asic_ring r100_gfx_ring = {
|
static const struct radeon_asic_ring r100_gfx_ring = {
|
||||||
.ib_execute = &r100_ring_ib_execute,
|
.ib_execute = &r100_ring_ib_execute,
|
||||||
.emit_fence = &r100_fence_ring_emit,
|
.emit_fence = &r100_fence_ring_emit,
|
||||||
.emit_semaphore = &r100_semaphore_ring_emit,
|
.emit_semaphore = &r100_semaphore_ring_emit,
|
||||||
@ -328,7 +328,7 @@ static struct radeon_asic r200_asic = {
|
|||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct radeon_asic_ring r300_gfx_ring = {
|
static const struct radeon_asic_ring r300_gfx_ring = {
|
||||||
.ib_execute = &r100_ring_ib_execute,
|
.ib_execute = &r100_ring_ib_execute,
|
||||||
.emit_fence = &r300_fence_ring_emit,
|
.emit_fence = &r300_fence_ring_emit,
|
||||||
.emit_semaphore = &r100_semaphore_ring_emit,
|
.emit_semaphore = &r100_semaphore_ring_emit,
|
||||||
@ -342,7 +342,7 @@ static struct radeon_asic_ring r300_gfx_ring = {
|
|||||||
.set_wptr = &r100_gfx_set_wptr,
|
.set_wptr = &r100_gfx_set_wptr,
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct radeon_asic_ring rv515_gfx_ring = {
|
static const struct radeon_asic_ring rv515_gfx_ring = {
|
||||||
.ib_execute = &r100_ring_ib_execute,
|
.ib_execute = &r100_ring_ib_execute,
|
||||||
.emit_fence = &r300_fence_ring_emit,
|
.emit_fence = &r300_fence_ring_emit,
|
||||||
.emit_semaphore = &r100_semaphore_ring_emit,
|
.emit_semaphore = &r100_semaphore_ring_emit,
|
||||||
@ -900,7 +900,7 @@ static struct radeon_asic r520_asic = {
|
|||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct radeon_asic_ring r600_gfx_ring = {
|
static const struct radeon_asic_ring r600_gfx_ring = {
|
||||||
.ib_execute = &r600_ring_ib_execute,
|
.ib_execute = &r600_ring_ib_execute,
|
||||||
.emit_fence = &r600_fence_ring_emit,
|
.emit_fence = &r600_fence_ring_emit,
|
||||||
.emit_semaphore = &r600_semaphore_ring_emit,
|
.emit_semaphore = &r600_semaphore_ring_emit,
|
||||||
@ -913,7 +913,7 @@ static struct radeon_asic_ring r600_gfx_ring = {
|
|||||||
.set_wptr = &r600_gfx_set_wptr,
|
.set_wptr = &r600_gfx_set_wptr,
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct radeon_asic_ring r600_dma_ring = {
|
static const struct radeon_asic_ring r600_dma_ring = {
|
||||||
.ib_execute = &r600_dma_ring_ib_execute,
|
.ib_execute = &r600_dma_ring_ib_execute,
|
||||||
.emit_fence = &r600_dma_fence_ring_emit,
|
.emit_fence = &r600_dma_fence_ring_emit,
|
||||||
.emit_semaphore = &r600_dma_semaphore_ring_emit,
|
.emit_semaphore = &r600_dma_semaphore_ring_emit,
|
||||||
@ -998,7 +998,7 @@ static struct radeon_asic r600_asic = {
|
|||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct radeon_asic_ring rv6xx_uvd_ring = {
|
static const struct radeon_asic_ring rv6xx_uvd_ring = {
|
||||||
.ib_execute = &uvd_v1_0_ib_execute,
|
.ib_execute = &uvd_v1_0_ib_execute,
|
||||||
.emit_fence = &uvd_v1_0_fence_emit,
|
.emit_fence = &uvd_v1_0_fence_emit,
|
||||||
.emit_semaphore = &uvd_v1_0_semaphore_emit,
|
.emit_semaphore = &uvd_v1_0_semaphore_emit,
|
||||||
@ -1197,7 +1197,7 @@ static struct radeon_asic rs780_asic = {
|
|||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct radeon_asic_ring rv770_uvd_ring = {
|
static const struct radeon_asic_ring rv770_uvd_ring = {
|
||||||
.ib_execute = &uvd_v1_0_ib_execute,
|
.ib_execute = &uvd_v1_0_ib_execute,
|
||||||
.emit_fence = &uvd_v2_2_fence_emit,
|
.emit_fence = &uvd_v2_2_fence_emit,
|
||||||
.emit_semaphore = &uvd_v2_2_semaphore_emit,
|
.emit_semaphore = &uvd_v2_2_semaphore_emit,
|
||||||
@ -1304,7 +1304,7 @@ static struct radeon_asic rv770_asic = {
|
|||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct radeon_asic_ring evergreen_gfx_ring = {
|
static const struct radeon_asic_ring evergreen_gfx_ring = {
|
||||||
.ib_execute = &evergreen_ring_ib_execute,
|
.ib_execute = &evergreen_ring_ib_execute,
|
||||||
.emit_fence = &r600_fence_ring_emit,
|
.emit_fence = &r600_fence_ring_emit,
|
||||||
.emit_semaphore = &r600_semaphore_ring_emit,
|
.emit_semaphore = &r600_semaphore_ring_emit,
|
||||||
@ -1317,7 +1317,7 @@ static struct radeon_asic_ring evergreen_gfx_ring = {
|
|||||||
.set_wptr = &r600_gfx_set_wptr,
|
.set_wptr = &r600_gfx_set_wptr,
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct radeon_asic_ring evergreen_dma_ring = {
|
static const struct radeon_asic_ring evergreen_dma_ring = {
|
||||||
.ib_execute = &evergreen_dma_ring_ib_execute,
|
.ib_execute = &evergreen_dma_ring_ib_execute,
|
||||||
.emit_fence = &evergreen_dma_fence_ring_emit,
|
.emit_fence = &evergreen_dma_fence_ring_emit,
|
||||||
.emit_semaphore = &r600_dma_semaphore_ring_emit,
|
.emit_semaphore = &r600_dma_semaphore_ring_emit,
|
||||||
@ -1609,7 +1609,7 @@ static struct radeon_asic btc_asic = {
|
|||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct radeon_asic_ring cayman_gfx_ring = {
|
static const struct radeon_asic_ring cayman_gfx_ring = {
|
||||||
.ib_execute = &cayman_ring_ib_execute,
|
.ib_execute = &cayman_ring_ib_execute,
|
||||||
.ib_parse = &evergreen_ib_parse,
|
.ib_parse = &evergreen_ib_parse,
|
||||||
.emit_fence = &cayman_fence_ring_emit,
|
.emit_fence = &cayman_fence_ring_emit,
|
||||||
@ -1624,7 +1624,7 @@ static struct radeon_asic_ring cayman_gfx_ring = {
|
|||||||
.set_wptr = &cayman_gfx_set_wptr,
|
.set_wptr = &cayman_gfx_set_wptr,
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct radeon_asic_ring cayman_dma_ring = {
|
static const struct radeon_asic_ring cayman_dma_ring = {
|
||||||
.ib_execute = &cayman_dma_ring_ib_execute,
|
.ib_execute = &cayman_dma_ring_ib_execute,
|
||||||
.ib_parse = &evergreen_dma_ib_parse,
|
.ib_parse = &evergreen_dma_ib_parse,
|
||||||
.emit_fence = &evergreen_dma_fence_ring_emit,
|
.emit_fence = &evergreen_dma_fence_ring_emit,
|
||||||
@ -1639,7 +1639,7 @@ static struct radeon_asic_ring cayman_dma_ring = {
|
|||||||
.set_wptr = &cayman_dma_set_wptr
|
.set_wptr = &cayman_dma_set_wptr
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct radeon_asic_ring cayman_uvd_ring = {
|
static const struct radeon_asic_ring cayman_uvd_ring = {
|
||||||
.ib_execute = &uvd_v1_0_ib_execute,
|
.ib_execute = &uvd_v1_0_ib_execute,
|
||||||
.emit_fence = &uvd_v2_2_fence_emit,
|
.emit_fence = &uvd_v2_2_fence_emit,
|
||||||
.emit_semaphore = &uvd_v3_1_semaphore_emit,
|
.emit_semaphore = &uvd_v3_1_semaphore_emit,
|
||||||
@ -1757,7 +1757,7 @@ static struct radeon_asic cayman_asic = {
|
|||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct radeon_asic_ring trinity_vce_ring = {
|
static const struct radeon_asic_ring trinity_vce_ring = {
|
||||||
.ib_execute = &radeon_vce_ib_execute,
|
.ib_execute = &radeon_vce_ib_execute,
|
||||||
.emit_fence = &radeon_vce_fence_emit,
|
.emit_fence = &radeon_vce_fence_emit,
|
||||||
.emit_semaphore = &radeon_vce_semaphore_emit,
|
.emit_semaphore = &radeon_vce_semaphore_emit,
|
||||||
@ -1878,7 +1878,7 @@ static struct radeon_asic trinity_asic = {
|
|||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct radeon_asic_ring si_gfx_ring = {
|
static const struct radeon_asic_ring si_gfx_ring = {
|
||||||
.ib_execute = &si_ring_ib_execute,
|
.ib_execute = &si_ring_ib_execute,
|
||||||
.ib_parse = &si_ib_parse,
|
.ib_parse = &si_ib_parse,
|
||||||
.emit_fence = &si_fence_ring_emit,
|
.emit_fence = &si_fence_ring_emit,
|
||||||
@ -1893,7 +1893,7 @@ static struct radeon_asic_ring si_gfx_ring = {
|
|||||||
.set_wptr = &cayman_gfx_set_wptr,
|
.set_wptr = &cayman_gfx_set_wptr,
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct radeon_asic_ring si_dma_ring = {
|
static const struct radeon_asic_ring si_dma_ring = {
|
||||||
.ib_execute = &cayman_dma_ring_ib_execute,
|
.ib_execute = &cayman_dma_ring_ib_execute,
|
||||||
.ib_parse = &evergreen_dma_ib_parse,
|
.ib_parse = &evergreen_dma_ib_parse,
|
||||||
.emit_fence = &evergreen_dma_fence_ring_emit,
|
.emit_fence = &evergreen_dma_fence_ring_emit,
|
||||||
@ -2020,7 +2020,7 @@ static struct radeon_asic si_asic = {
|
|||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct radeon_asic_ring ci_gfx_ring = {
|
static const struct radeon_asic_ring ci_gfx_ring = {
|
||||||
.ib_execute = &cik_ring_ib_execute,
|
.ib_execute = &cik_ring_ib_execute,
|
||||||
.ib_parse = &cik_ib_parse,
|
.ib_parse = &cik_ib_parse,
|
||||||
.emit_fence = &cik_fence_gfx_ring_emit,
|
.emit_fence = &cik_fence_gfx_ring_emit,
|
||||||
@ -2035,7 +2035,7 @@ static struct radeon_asic_ring ci_gfx_ring = {
|
|||||||
.set_wptr = &cik_gfx_set_wptr,
|
.set_wptr = &cik_gfx_set_wptr,
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct radeon_asic_ring ci_cp_ring = {
|
static const struct radeon_asic_ring ci_cp_ring = {
|
||||||
.ib_execute = &cik_ring_ib_execute,
|
.ib_execute = &cik_ring_ib_execute,
|
||||||
.ib_parse = &cik_ib_parse,
|
.ib_parse = &cik_ib_parse,
|
||||||
.emit_fence = &cik_fence_compute_ring_emit,
|
.emit_fence = &cik_fence_compute_ring_emit,
|
||||||
@ -2050,7 +2050,7 @@ static struct radeon_asic_ring ci_cp_ring = {
|
|||||||
.set_wptr = &cik_compute_set_wptr,
|
.set_wptr = &cik_compute_set_wptr,
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct radeon_asic_ring ci_dma_ring = {
|
static const struct radeon_asic_ring ci_dma_ring = {
|
||||||
.ib_execute = &cik_sdma_ring_ib_execute,
|
.ib_execute = &cik_sdma_ring_ib_execute,
|
||||||
.ib_parse = &cik_ib_parse,
|
.ib_parse = &cik_ib_parse,
|
||||||
.emit_fence = &cik_sdma_fence_ring_emit,
|
.emit_fence = &cik_sdma_fence_ring_emit,
|
||||||
@ -2065,7 +2065,7 @@ static struct radeon_asic_ring ci_dma_ring = {
|
|||||||
.set_wptr = &cik_sdma_set_wptr,
|
.set_wptr = &cik_sdma_set_wptr,
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct radeon_asic_ring ci_vce_ring = {
|
static const struct radeon_asic_ring ci_vce_ring = {
|
||||||
.ib_execute = &radeon_vce_ib_execute,
|
.ib_execute = &radeon_vce_ib_execute,
|
||||||
.emit_fence = &radeon_vce_fence_emit,
|
.emit_fence = &radeon_vce_fence_emit,
|
||||||
.emit_semaphore = &radeon_vce_semaphore_emit,
|
.emit_semaphore = &radeon_vce_semaphore_emit,
|
||||||
|
@ -1155,7 +1155,7 @@ bool radeon_atom_get_clock_info(struct drm_device *dev)
|
|||||||
le16_to_cpu(firmware_info->info.usReferenceClock);
|
le16_to_cpu(firmware_info->info.usReferenceClock);
|
||||||
p1pll->reference_div = 0;
|
p1pll->reference_div = 0;
|
||||||
|
|
||||||
if ((frev < 2) && (crev < 2))
|
if (crev < 2)
|
||||||
p1pll->pll_out_min =
|
p1pll->pll_out_min =
|
||||||
le16_to_cpu(firmware_info->info.usMinPixelClockPLL_Output);
|
le16_to_cpu(firmware_info->info.usMinPixelClockPLL_Output);
|
||||||
else
|
else
|
||||||
@ -1164,7 +1164,7 @@ bool radeon_atom_get_clock_info(struct drm_device *dev)
|
|||||||
p1pll->pll_out_max =
|
p1pll->pll_out_max =
|
||||||
le32_to_cpu(firmware_info->info.ulMaxPixelClockPLL_Output);
|
le32_to_cpu(firmware_info->info.ulMaxPixelClockPLL_Output);
|
||||||
|
|
||||||
if (((frev < 2) && (crev >= 4)) || (frev >= 2)) {
|
if (crev >= 4) {
|
||||||
p1pll->lcd_pll_out_min =
|
p1pll->lcd_pll_out_min =
|
||||||
le16_to_cpu(firmware_info->info_14.usLcdMinPixelClockPLL_Output) * 100;
|
le16_to_cpu(firmware_info->info_14.usLcdMinPixelClockPLL_Output) * 100;
|
||||||
if (p1pll->lcd_pll_out_min == 0)
|
if (p1pll->lcd_pll_out_min == 0)
|
||||||
|
@ -2030,6 +2030,7 @@ radeon_add_atom_connector(struct drm_device *dev,
|
|||||||
RADEON_OUTPUT_CSC_BYPASS);
|
RADEON_OUTPUT_CSC_BYPASS);
|
||||||
/* no HPD on analog connectors */
|
/* no HPD on analog connectors */
|
||||||
radeon_connector->hpd.hpd = RADEON_HPD_NONE;
|
radeon_connector->hpd.hpd = RADEON_HPD_NONE;
|
||||||
|
connector->polled = DRM_CONNECTOR_POLL_CONNECT;
|
||||||
connector->interlace_allowed = true;
|
connector->interlace_allowed = true;
|
||||||
connector->doublescan_allowed = true;
|
connector->doublescan_allowed = true;
|
||||||
break;
|
break;
|
||||||
@ -2279,10 +2280,8 @@ radeon_add_atom_connector(struct drm_device *dev,
|
|||||||
}
|
}
|
||||||
|
|
||||||
if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
|
if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
|
||||||
if (i2c_bus->valid) {
|
if (i2c_bus->valid)
|
||||||
connector->polled = DRM_CONNECTOR_POLL_CONNECT |
|
connector->polled = DRM_CONNECTOR_POLL_CONNECT;
|
||||||
DRM_CONNECTOR_POLL_DISCONNECT;
|
|
||||||
}
|
|
||||||
} else
|
} else
|
||||||
connector->polled = DRM_CONNECTOR_POLL_HPD;
|
connector->polled = DRM_CONNECTOR_POLL_HPD;
|
||||||
|
|
||||||
@ -2358,6 +2357,7 @@ radeon_add_legacy_connector(struct drm_device *dev,
|
|||||||
1);
|
1);
|
||||||
/* no HPD on analog connectors */
|
/* no HPD on analog connectors */
|
||||||
radeon_connector->hpd.hpd = RADEON_HPD_NONE;
|
radeon_connector->hpd.hpd = RADEON_HPD_NONE;
|
||||||
|
connector->polled = DRM_CONNECTOR_POLL_CONNECT;
|
||||||
connector->interlace_allowed = true;
|
connector->interlace_allowed = true;
|
||||||
connector->doublescan_allowed = true;
|
connector->doublescan_allowed = true;
|
||||||
break;
|
break;
|
||||||
@ -2442,13 +2442,10 @@ radeon_add_legacy_connector(struct drm_device *dev,
|
|||||||
}
|
}
|
||||||
|
|
||||||
if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
|
if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
|
||||||
if (i2c_bus->valid) {
|
if (i2c_bus->valid)
|
||||||
connector->polled = DRM_CONNECTOR_POLL_CONNECT |
|
connector->polled = DRM_CONNECTOR_POLL_CONNECT;
|
||||||
DRM_CONNECTOR_POLL_DISCONNECT;
|
|
||||||
}
|
|
||||||
} else
|
} else
|
||||||
connector->polled = DRM_CONNECTOR_POLL_HPD;
|
connector->polled = DRM_CONNECTOR_POLL_HPD;
|
||||||
|
|
||||||
connector->display_info.subpixel_order = subpixel_order;
|
connector->display_info.subpixel_order = subpixel_order;
|
||||||
drm_connector_register(connector);
|
drm_connector_register(connector);
|
||||||
}
|
}
|
||||||
|
@ -1198,7 +1198,7 @@ static void radeon_check_arguments(struct radeon_device *rdev)
|
|||||||
}
|
}
|
||||||
|
|
||||||
if (radeon_vm_size < 1) {
|
if (radeon_vm_size < 1) {
|
||||||
dev_warn(rdev->dev, "VM size (%d) to small, min is 1GB\n",
|
dev_warn(rdev->dev, "VM size (%d) too small, min is 1GB\n",
|
||||||
radeon_vm_size);
|
radeon_vm_size);
|
||||||
radeon_vm_size = 4;
|
radeon_vm_size = 4;
|
||||||
}
|
}
|
||||||
|
@ -998,7 +998,7 @@ static int radeon_user_framebuffer_create_handle(struct drm_framebuffer *fb,
|
|||||||
{
|
{
|
||||||
struct radeon_framebuffer *radeon_fb = to_radeon_framebuffer(fb);
|
struct radeon_framebuffer *radeon_fb = to_radeon_framebuffer(fb);
|
||||||
|
|
||||||
return NULL;
|
return 0;
|
||||||
// return drm_gem_handle_create(file_priv, radeon_fb->obj, handle);
|
// return drm_gem_handle_create(file_priv, radeon_fb->obj, handle);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1010,7 +1010,7 @@ static const struct drm_framebuffer_funcs radeon_fb_funcs = {
|
|||||||
int
|
int
|
||||||
radeon_framebuffer_init(struct drm_device *dev,
|
radeon_framebuffer_init(struct drm_device *dev,
|
||||||
struct radeon_framebuffer *rfb,
|
struct radeon_framebuffer *rfb,
|
||||||
struct drm_mode_fb_cmd2 *mode_cmd,
|
const struct drm_mode_fb_cmd2 *mode_cmd,
|
||||||
struct drm_gem_object *obj)
|
struct drm_gem_object *obj)
|
||||||
{
|
{
|
||||||
int ret;
|
int ret;
|
||||||
|
@ -329,7 +329,7 @@ static void radeon_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr)
|
|||||||
drm_kms_helper_hotplug_event(dev);
|
drm_kms_helper_hotplug_event(dev);
|
||||||
}
|
}
|
||||||
|
|
||||||
struct drm_dp_mst_topology_cbs mst_cbs = {
|
const struct drm_dp_mst_topology_cbs mst_cbs = {
|
||||||
.add_connector = radeon_dp_add_mst_connector,
|
.add_connector = radeon_dp_add_mst_connector,
|
||||||
.register_connector = radeon_dp_register_mst_connector,
|
.register_connector = radeon_dp_register_mst_connector,
|
||||||
.destroy_connector = radeon_dp_destroy_mst_connector,
|
.destroy_connector = radeon_dp_destroy_mst_connector,
|
||||||
@ -639,7 +639,7 @@ radeon_dp_create_fake_mst_encoder(struct radeon_connector *connector)
|
|||||||
}
|
}
|
||||||
|
|
||||||
drm_encoder_init(dev, &radeon_encoder->base, &radeon_dp_mst_enc_funcs,
|
drm_encoder_init(dev, &radeon_encoder->base, &radeon_dp_mst_enc_funcs,
|
||||||
DRM_MODE_ENCODER_DPMST);
|
DRM_MODE_ENCODER_DPMST, NULL);
|
||||||
drm_encoder_helper_add(encoder, &radeon_mst_helper_funcs);
|
drm_encoder_helper_add(encoder, &radeon_mst_helper_funcs);
|
||||||
|
|
||||||
mst_enc = radeon_encoder->enc_priv;
|
mst_enc = radeon_encoder->enc_priv;
|
||||||
|
@ -45,7 +45,6 @@ struct drm_gem_object *main_fb_obj;
|
|||||||
struct radeon_fbdev {
|
struct radeon_fbdev {
|
||||||
struct drm_fb_helper helper;
|
struct drm_fb_helper helper;
|
||||||
struct radeon_framebuffer rfb;
|
struct radeon_framebuffer rfb;
|
||||||
struct list_head fbdev_list;
|
|
||||||
struct radeon_device *rdev;
|
struct radeon_device *rdev;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -111,7 +111,7 @@ int radeon_fence_emit(struct radeon_device *rdev,
|
|||||||
struct radeon_fence **fence,
|
struct radeon_fence **fence,
|
||||||
int ring)
|
int ring)
|
||||||
{
|
{
|
||||||
u64 seq = ++rdev->fence_drv[ring].sync_seq[ring];
|
u64 seq;
|
||||||
|
|
||||||
/* we are protected by the ring emission mutex */
|
/* we are protected by the ring emission mutex */
|
||||||
*fence = kmalloc(sizeof(struct radeon_fence), GFP_KERNEL);
|
*fence = kmalloc(sizeof(struct radeon_fence), GFP_KERNEL);
|
||||||
@ -119,7 +119,7 @@ int radeon_fence_emit(struct radeon_device *rdev,
|
|||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
}
|
}
|
||||||
(*fence)->rdev = rdev;
|
(*fence)->rdev = rdev;
|
||||||
(*fence)->seq = seq;
|
(*fence)->seq = seq = ++rdev->fence_drv[ring].sync_seq[ring];
|
||||||
(*fence)->ring = ring;
|
(*fence)->ring = ring;
|
||||||
(*fence)->is_vm_update = false;
|
(*fence)->is_vm_update = false;
|
||||||
fence_init(&(*fence)->base, &radeon_fence_ops,
|
fence_init(&(*fence)->base, &radeon_fence_ops,
|
||||||
|
@ -49,19 +49,19 @@ static inline bool radeon_has_atpx(void) { return false; }
|
|||||||
* radeon_get_vblank_counter_kms - get frame count
|
* radeon_get_vblank_counter_kms - get frame count
|
||||||
*
|
*
|
||||||
* @dev: drm dev pointer
|
* @dev: drm dev pointer
|
||||||
* @crtc: crtc to get the frame count from
|
* @pipe: crtc to get the frame count from
|
||||||
*
|
*
|
||||||
* Gets the frame count on the requested crtc (all asics).
|
* Gets the frame count on the requested crtc (all asics).
|
||||||
* Returns frame count on success, -EINVAL on failure.
|
* Returns frame count on success, -EINVAL on failure.
|
||||||
*/
|
*/
|
||||||
u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc)
|
u32 radeon_get_vblank_counter_kms(struct drm_device *dev, unsigned int pipe)
|
||||||
{
|
{
|
||||||
int vpos, hpos, stat;
|
int vpos, hpos, stat;
|
||||||
u32 count;
|
u32 count;
|
||||||
struct radeon_device *rdev = dev->dev_private;
|
struct radeon_device *rdev = dev->dev_private;
|
||||||
|
|
||||||
if (crtc < 0 || crtc >= rdev->num_crtc) {
|
if (pipe >= rdev->num_crtc) {
|
||||||
DRM_ERROR("Invalid crtc %d\n", crtc);
|
DRM_ERROR("Invalid crtc %u\n", pipe);
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -73,29 +73,29 @@ u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc)
|
|||||||
* and start of vsync, so vpos >= 0 means to bump the hw frame counter
|
* and start of vsync, so vpos >= 0 means to bump the hw frame counter
|
||||||
* result by 1 to give the proper appearance to caller.
|
* result by 1 to give the proper appearance to caller.
|
||||||
*/
|
*/
|
||||||
if (rdev->mode_info.crtcs[crtc]) {
|
if (rdev->mode_info.crtcs[pipe]) {
|
||||||
/* Repeat readout if needed to provide stable result if
|
/* Repeat readout if needed to provide stable result if
|
||||||
* we cross start of vsync during the queries.
|
* we cross start of vsync during the queries.
|
||||||
*/
|
*/
|
||||||
do {
|
do {
|
||||||
count = radeon_get_vblank_counter(rdev, crtc);
|
count = radeon_get_vblank_counter(rdev, pipe);
|
||||||
/* Ask radeon_get_crtc_scanoutpos to return vpos as
|
/* Ask radeon_get_crtc_scanoutpos to return vpos as
|
||||||
* distance to start of vblank, instead of regular
|
* distance to start of vblank, instead of regular
|
||||||
* vertical scanout pos.
|
* vertical scanout pos.
|
||||||
*/
|
*/
|
||||||
stat = radeon_get_crtc_scanoutpos(
|
stat = radeon_get_crtc_scanoutpos(
|
||||||
dev, crtc, GET_DISTANCE_TO_VBLANKSTART,
|
dev, pipe, GET_DISTANCE_TO_VBLANKSTART,
|
||||||
&vpos, &hpos, NULL, NULL,
|
&vpos, &hpos, NULL, NULL,
|
||||||
&rdev->mode_info.crtcs[crtc]->base.hwmode);
|
&rdev->mode_info.crtcs[pipe]->base.hwmode);
|
||||||
} while (count != radeon_get_vblank_counter(rdev, crtc));
|
} while (count != radeon_get_vblank_counter(rdev, pipe));
|
||||||
|
|
||||||
if (((stat & (DRM_SCANOUTPOS_VALID | DRM_SCANOUTPOS_ACCURATE)) !=
|
if (((stat & (DRM_SCANOUTPOS_VALID | DRM_SCANOUTPOS_ACCURATE)) !=
|
||||||
(DRM_SCANOUTPOS_VALID | DRM_SCANOUTPOS_ACCURATE))) {
|
(DRM_SCANOUTPOS_VALID | DRM_SCANOUTPOS_ACCURATE))) {
|
||||||
DRM_DEBUG_VBL("Query failed! stat %d\n", stat);
|
DRM_DEBUG_VBL("Query failed! stat %d\n", stat);
|
||||||
}
|
}
|
||||||
else {
|
else {
|
||||||
DRM_DEBUG_VBL("crtc %d: dist from vblank start %d\n",
|
DRM_DEBUG_VBL("crtc %u: dist from vblank start %d\n",
|
||||||
crtc, vpos);
|
pipe, vpos);
|
||||||
|
|
||||||
/* Bump counter if we are at >= leading edge of vblank,
|
/* Bump counter if we are at >= leading edge of vblank,
|
||||||
* but before vsync where vpos would turn negative and
|
* but before vsync where vpos would turn negative and
|
||||||
@ -107,7 +107,7 @@ u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc)
|
|||||||
}
|
}
|
||||||
else {
|
else {
|
||||||
/* Fallback to use value as is. */
|
/* Fallback to use value as is. */
|
||||||
count = radeon_get_vblank_counter(rdev, crtc);
|
count = radeon_get_vblank_counter(rdev, pipe);
|
||||||
DRM_DEBUG_VBL("NULL mode info! Returned count may be wrong.\n");
|
DRM_DEBUG_VBL("NULL mode info! Returned count may be wrong.\n");
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -25,6 +25,7 @@
|
|||||||
*/
|
*/
|
||||||
#include <drm/drmP.h>
|
#include <drm/drmP.h>
|
||||||
#include <drm/drm_crtc_helper.h>
|
#include <drm/drm_crtc_helper.h>
|
||||||
|
#include <drm/drm_fb_helper.h>
|
||||||
#include <drm/radeon_drm.h>
|
#include <drm/radeon_drm.h>
|
||||||
#include <drm/drm_fixed.h>
|
#include <drm/drm_fixed.h>
|
||||||
#include "radeon.h"
|
#include "radeon.h"
|
||||||
|
@ -1772,7 +1772,8 @@ radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_enum, uint32_
|
|||||||
switch (radeon_encoder->encoder_id) {
|
switch (radeon_encoder->encoder_id) {
|
||||||
case ENCODER_OBJECT_ID_INTERNAL_LVDS:
|
case ENCODER_OBJECT_ID_INTERNAL_LVDS:
|
||||||
encoder->possible_crtcs = 0x1;
|
encoder->possible_crtcs = 0x1;
|
||||||
drm_encoder_init(dev, encoder, &radeon_legacy_lvds_enc_funcs, DRM_MODE_ENCODER_LVDS);
|
drm_encoder_init(dev, encoder, &radeon_legacy_lvds_enc_funcs,
|
||||||
|
DRM_MODE_ENCODER_LVDS, NULL);
|
||||||
drm_encoder_helper_add(encoder, &radeon_legacy_lvds_helper_funcs);
|
drm_encoder_helper_add(encoder, &radeon_legacy_lvds_helper_funcs);
|
||||||
if (rdev->is_atom_bios)
|
if (rdev->is_atom_bios)
|
||||||
radeon_encoder->enc_priv = radeon_atombios_get_lvds_info(radeon_encoder);
|
radeon_encoder->enc_priv = radeon_atombios_get_lvds_info(radeon_encoder);
|
||||||
@ -1781,12 +1782,14 @@ radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_enum, uint32_
|
|||||||
radeon_encoder->rmx_type = RMX_FULL;
|
radeon_encoder->rmx_type = RMX_FULL;
|
||||||
break;
|
break;
|
||||||
case ENCODER_OBJECT_ID_INTERNAL_TMDS1:
|
case ENCODER_OBJECT_ID_INTERNAL_TMDS1:
|
||||||
drm_encoder_init(dev, encoder, &radeon_legacy_tmds_int_enc_funcs, DRM_MODE_ENCODER_TMDS);
|
drm_encoder_init(dev, encoder, &radeon_legacy_tmds_int_enc_funcs,
|
||||||
|
DRM_MODE_ENCODER_TMDS, NULL);
|
||||||
drm_encoder_helper_add(encoder, &radeon_legacy_tmds_int_helper_funcs);
|
drm_encoder_helper_add(encoder, &radeon_legacy_tmds_int_helper_funcs);
|
||||||
radeon_encoder->enc_priv = radeon_legacy_get_tmds_info(radeon_encoder);
|
radeon_encoder->enc_priv = radeon_legacy_get_tmds_info(radeon_encoder);
|
||||||
break;
|
break;
|
||||||
case ENCODER_OBJECT_ID_INTERNAL_DAC1:
|
case ENCODER_OBJECT_ID_INTERNAL_DAC1:
|
||||||
drm_encoder_init(dev, encoder, &radeon_legacy_primary_dac_enc_funcs, DRM_MODE_ENCODER_DAC);
|
drm_encoder_init(dev, encoder, &radeon_legacy_primary_dac_enc_funcs,
|
||||||
|
DRM_MODE_ENCODER_DAC, NULL);
|
||||||
drm_encoder_helper_add(encoder, &radeon_legacy_primary_dac_helper_funcs);
|
drm_encoder_helper_add(encoder, &radeon_legacy_primary_dac_helper_funcs);
|
||||||
if (rdev->is_atom_bios)
|
if (rdev->is_atom_bios)
|
||||||
radeon_encoder->enc_priv = radeon_atombios_get_primary_dac_info(radeon_encoder);
|
radeon_encoder->enc_priv = radeon_atombios_get_primary_dac_info(radeon_encoder);
|
||||||
@ -1794,7 +1797,8 @@ radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_enum, uint32_
|
|||||||
radeon_encoder->enc_priv = radeon_combios_get_primary_dac_info(radeon_encoder);
|
radeon_encoder->enc_priv = radeon_combios_get_primary_dac_info(radeon_encoder);
|
||||||
break;
|
break;
|
||||||
case ENCODER_OBJECT_ID_INTERNAL_DAC2:
|
case ENCODER_OBJECT_ID_INTERNAL_DAC2:
|
||||||
drm_encoder_init(dev, encoder, &radeon_legacy_tv_dac_enc_funcs, DRM_MODE_ENCODER_TVDAC);
|
drm_encoder_init(dev, encoder, &radeon_legacy_tv_dac_enc_funcs,
|
||||||
|
DRM_MODE_ENCODER_TVDAC, NULL);
|
||||||
drm_encoder_helper_add(encoder, &radeon_legacy_tv_dac_helper_funcs);
|
drm_encoder_helper_add(encoder, &radeon_legacy_tv_dac_helper_funcs);
|
||||||
if (rdev->is_atom_bios)
|
if (rdev->is_atom_bios)
|
||||||
radeon_encoder->enc_priv = radeon_atombios_get_tv_dac_info(radeon_encoder);
|
radeon_encoder->enc_priv = radeon_atombios_get_tv_dac_info(radeon_encoder);
|
||||||
@ -1802,7 +1806,8 @@ radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_enum, uint32_
|
|||||||
radeon_encoder->enc_priv = radeon_combios_get_tv_dac_info(radeon_encoder);
|
radeon_encoder->enc_priv = radeon_combios_get_tv_dac_info(radeon_encoder);
|
||||||
break;
|
break;
|
||||||
case ENCODER_OBJECT_ID_INTERNAL_DVO1:
|
case ENCODER_OBJECT_ID_INTERNAL_DVO1:
|
||||||
drm_encoder_init(dev, encoder, &radeon_legacy_tmds_ext_enc_funcs, DRM_MODE_ENCODER_TMDS);
|
drm_encoder_init(dev, encoder, &radeon_legacy_tmds_ext_enc_funcs,
|
||||||
|
DRM_MODE_ENCODER_TMDS, NULL);
|
||||||
drm_encoder_helper_add(encoder, &radeon_legacy_tmds_ext_helper_funcs);
|
drm_encoder_helper_add(encoder, &radeon_legacy_tmds_ext_helper_funcs);
|
||||||
if (!rdev->is_atom_bios)
|
if (!rdev->is_atom_bios)
|
||||||
radeon_encoder->enc_priv = radeon_legacy_get_ext_tmds_info(radeon_encoder);
|
radeon_encoder->enc_priv = radeon_legacy_get_ext_tmds_info(radeon_encoder);
|
||||||
|
@ -936,7 +936,7 @@ extern void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green
|
|||||||
u16 *blue, int regno);
|
u16 *blue, int regno);
|
||||||
int radeon_framebuffer_init(struct drm_device *dev,
|
int radeon_framebuffer_init(struct drm_device *dev,
|
||||||
struct radeon_framebuffer *rfb,
|
struct radeon_framebuffer *rfb,
|
||||||
struct drm_mode_fb_cmd2 *mode_cmd,
|
const struct drm_mode_fb_cmd2 *mode_cmd,
|
||||||
struct drm_gem_object *obj);
|
struct drm_gem_object *obj);
|
||||||
|
|
||||||
int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb);
|
int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb);
|
||||||
|
@ -33,6 +33,7 @@
|
|||||||
#include <linux/slab.h>
|
#include <linux/slab.h>
|
||||||
#include <drm/drmP.h>
|
#include <drm/drmP.h>
|
||||||
#include <drm/radeon_drm.h>
|
#include <drm/radeon_drm.h>
|
||||||
|
#include <drm/drm_cache.h>
|
||||||
#include "radeon.h"
|
#include "radeon.h"
|
||||||
#include "radeon_trace.h"
|
#include "radeon_trace.h"
|
||||||
|
|
||||||
|
@ -273,8 +273,12 @@ static void radeon_pm_set_clocks(struct radeon_device *rdev)
|
|||||||
if (rdev->irq.installed) {
|
if (rdev->irq.installed) {
|
||||||
for (i = 0; i < rdev->num_crtc; i++) {
|
for (i = 0; i < rdev->num_crtc; i++) {
|
||||||
if (rdev->pm.active_crtcs & (1 << i)) {
|
if (rdev->pm.active_crtcs & (1 << i)) {
|
||||||
|
/* This can fail if a modeset is in progress */
|
||||||
|
if (drm_vblank_get(rdev->ddev, i) == 0)
|
||||||
rdev->pm.req_vblank |= (1 << i);
|
rdev->pm.req_vblank |= (1 << i);
|
||||||
drm_vblank_get(rdev->ddev, i);
|
else
|
||||||
|
DRM_DEBUG_DRIVER("crtc %d no vblank, can glitch\n",
|
||||||
|
i);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -247,8 +247,8 @@ static int radeon_move_blit(struct ttm_buffer_object *bo,
|
|||||||
|
|
||||||
rdev = radeon_get_rdev(bo->bdev);
|
rdev = radeon_get_rdev(bo->bdev);
|
||||||
ridx = radeon_copy_ring_index(rdev);
|
ridx = radeon_copy_ring_index(rdev);
|
||||||
old_start = (u64)old_mem->start << PAGE_SHIFT;
|
old_start = old_mem->start << PAGE_SHIFT;
|
||||||
new_start = (u64)new_mem->start << PAGE_SHIFT;
|
new_start = new_mem->start << PAGE_SHIFT;
|
||||||
|
|
||||||
switch (old_mem->mem_type) {
|
switch (old_mem->mem_type) {
|
||||||
case TTM_PL_VRAM:
|
case TTM_PL_VRAM:
|
||||||
|
@ -3015,12 +3015,6 @@ static void si_apply_state_adjust_rules(struct radeon_device *rdev,
|
|||||||
if (rdev->pdev->device == 0x6811 &&
|
if (rdev->pdev->device == 0x6811 &&
|
||||||
rdev->pdev->revision == 0x81)
|
rdev->pdev->revision == 0x81)
|
||||||
max_mclk = 120000;
|
max_mclk = 120000;
|
||||||
/* limit sclk/mclk on Jet parts for stability */
|
|
||||||
if (rdev->pdev->device == 0x6665 &&
|
|
||||||
rdev->pdev->revision == 0xc3) {
|
|
||||||
max_sclk = 75000;
|
|
||||||
max_mclk = 80000;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (rps->vce_active) {
|
if (rps->vce_active) {
|
||||||
rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk;
|
rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk;
|
||||||
@ -4112,7 +4106,7 @@ static int si_populate_smc_voltage_tables(struct radeon_device *rdev,
|
|||||||
&rdev->pm.dpm.dyn_state.phase_shedding_limits_table)) {
|
&rdev->pm.dpm.dyn_state.phase_shedding_limits_table)) {
|
||||||
si_populate_smc_voltage_table(rdev, &si_pi->vddc_phase_shed_table, table);
|
si_populate_smc_voltage_table(rdev, &si_pi->vddc_phase_shed_table, table);
|
||||||
|
|
||||||
table->phaseMaskTable.lowMask[SISLANDS_SMC_VOLTAGEMASK_VDDC_PHASE_SHEDDING] =
|
table->phaseMaskTable.lowMask[SISLANDS_SMC_VOLTAGEMASK_VDDC] =
|
||||||
cpu_to_be32(si_pi->vddc_phase_shed_table.mask_low);
|
cpu_to_be32(si_pi->vddc_phase_shed_table.mask_low);
|
||||||
|
|
||||||
si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_phase_shedding_delay,
|
si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_phase_shedding_delay,
|
||||||
|
@ -194,7 +194,6 @@ typedef struct SISLANDS_SMC_SWSTATE SISLANDS_SMC_SWSTATE;
|
|||||||
#define SISLANDS_SMC_VOLTAGEMASK_VDDC 0
|
#define SISLANDS_SMC_VOLTAGEMASK_VDDC 0
|
||||||
#define SISLANDS_SMC_VOLTAGEMASK_MVDD 1
|
#define SISLANDS_SMC_VOLTAGEMASK_MVDD 1
|
||||||
#define SISLANDS_SMC_VOLTAGEMASK_VDDCI 2
|
#define SISLANDS_SMC_VOLTAGEMASK_VDDCI 2
|
||||||
#define SISLANDS_SMC_VOLTAGEMASK_VDDC_PHASE_SHEDDING 3
|
|
||||||
#define SISLANDS_SMC_VOLTAGEMASK_MAX 4
|
#define SISLANDS_SMC_VOLTAGEMASK_MAX 4
|
||||||
|
|
||||||
struct SISLANDS_SMC_VOLTAGEMASKTABLE
|
struct SISLANDS_SMC_VOLTAGEMASKTABLE
|
||||||
|
@ -809,3 +809,15 @@ int set_memory_wb(unsigned long addr, int numpages)
|
|||||||
{
|
{
|
||||||
return 0;
|
return 0;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
char *strdup(const char *str)
|
||||||
|
{
|
||||||
|
size_t len = strlen(str) + 1;
|
||||||
|
char *copy = __builtin_malloc(len);
|
||||||
|
if (copy)
|
||||||
|
{
|
||||||
|
memcpy (copy, str, len);
|
||||||
|
}
|
||||||
|
return copy;
|
||||||
|
}
|
||||||
|
|
||||||
|
@ -116,7 +116,7 @@ void ttm_bo_add_to_lru(struct ttm_buffer_object *bo)
|
|||||||
list_add_tail(&bo->lru, &man->lru);
|
list_add_tail(&bo->lru, &man->lru);
|
||||||
kref_get(&bo->list_kref);
|
kref_get(&bo->list_kref);
|
||||||
|
|
||||||
if (bo->ttm != NULL) {
|
if (bo->ttm && !(bo->ttm->page_flags & TTM_PAGE_FLAG_SG)) {
|
||||||
list_add_tail(&bo->swap, &bo->glob->swap_lru);
|
list_add_tail(&bo->swap, &bo->glob->swap_lru);
|
||||||
kref_get(&bo->list_kref);
|
kref_get(&bo->list_kref);
|
||||||
}
|
}
|
||||||
@ -854,7 +854,6 @@ bool ttm_bo_mem_compat(struct ttm_placement *placement,
|
|||||||
|
|
||||||
return false;
|
return false;
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL(ttm_bo_mem_compat);
|
|
||||||
|
|
||||||
int ttm_bo_validate(struct ttm_buffer_object *bo,
|
int ttm_bo_validate(struct ttm_buffer_object *bo,
|
||||||
struct ttm_placement *placement,
|
struct ttm_placement *placement,
|
||||||
|
@ -27,8 +27,6 @@
|
|||||||
/*
|
/*
|
||||||
* Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com>
|
* Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com>
|
||||||
*/
|
*/
|
||||||
#define iowrite32(v, addr) writel((v), (addr))
|
|
||||||
#define ioread32(addr) readl(addr)
|
|
||||||
|
|
||||||
#include <drm/ttm/ttm_bo_driver.h>
|
#include <drm/ttm/ttm_bo_driver.h>
|
||||||
#include <drm/ttm/ttm_placement.h>
|
#include <drm/ttm/ttm_placement.h>
|
||||||
@ -461,6 +459,9 @@ static int ttm_buffer_object_transfer(struct ttm_buffer_object *bo,
|
|||||||
|
|
||||||
pgprot_t ttm_io_prot(uint32_t caching_flags, pgprot_t tmp)
|
pgprot_t ttm_io_prot(uint32_t caching_flags, pgprot_t tmp)
|
||||||
{
|
{
|
||||||
|
/* Cached mappings need no adjustment */
|
||||||
|
if (caching_flags & TTM_PL_FLAG_CACHED)
|
||||||
|
return tmp;
|
||||||
return tmp;
|
return tmp;
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL(ttm_io_prot);
|
EXPORT_SYMBOL(ttm_io_prot);
|
||||||
|
@ -344,7 +344,7 @@ int ttm_tt_swapout(struct ttm_tt *ttm, struct file *persistent_swap_storage)
|
|||||||
swap_storage = shmem_file_setup("ttm swap",
|
swap_storage = shmem_file_setup("ttm swap",
|
||||||
ttm->num_pages << PAGE_SHIFT,
|
ttm->num_pages << PAGE_SHIFT,
|
||||||
0);
|
0);
|
||||||
if (unlikely(IS_ERR(swap_storage))) {
|
if (IS_ERR(swap_storage)) {
|
||||||
pr_err("Failed allocating swap storage\n");
|
pr_err("Failed allocating swap storage\n");
|
||||||
return PTR_ERR(swap_storage);
|
return PTR_ERR(swap_storage);
|
||||||
}
|
}
|
||||||
@ -358,7 +358,7 @@ int ttm_tt_swapout(struct ttm_tt *ttm, struct file *persistent_swap_storage)
|
|||||||
if (unlikely(from_page == NULL))
|
if (unlikely(from_page == NULL))
|
||||||
continue;
|
continue;
|
||||||
to_page = shmem_read_mapping_page(swap_space, i);
|
to_page = shmem_read_mapping_page(swap_space, i);
|
||||||
if (unlikely(IS_ERR(to_page))) {
|
if (IS_ERR(to_page)) {
|
||||||
ret = PTR_ERR(to_page);
|
ret = PTR_ERR(to_page);
|
||||||
goto out_err;
|
goto out_err;
|
||||||
}
|
}
|
||||||
|
Loading…
Reference in New Issue
Block a user