forked from KolibriOS/kolibrios
kolibri-ahci:
- improve controller initialization - some refactoring git-svn-id: svn://kolibrios.org@9023 a494cfbc-eb01-0410-851d-a64ba20cac60
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@ -10,12 +10,19 @@ $Revision$
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PCI_REG_STATUS_COMMAND = 0x0004
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PCI_REG_STATUS_COMMAND = 0x0004
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PCI_REG_BAR5 = 0x0024
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PCI_REG_BAR5 = 0x0024
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AHCI_BOHCf_BOS = 0 ; BIOS-Owned Semaphore (BIOS owns controller)
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; bit_ prefix means that its index of bit
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AHCI_BOHCf_OOS = 1 ; OS-Owned Semaphore (OS owns controller)
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; format: bit_AHCI_STR_REG_BIT
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AHCI_BOHCf_BB = 4 ; BIOS Busy (polling bit while BIOS cleans up
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bit_AHCI_HBA_CAP2_BOH = 0 ; Supports BIOS/OS Handoff
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AHCI_CAP2_BOH = 0 ; number of bit in BOH which shows Supports BIOS/OS Handoff
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bit_AHCI_HBA_BOHC_BOS = 0 ; BIOS-Owned Semaphore (BIOS owns controller)
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bit_AHCI_HBA_BOHC_OOS = 1 ; OS-Owned Semaphore (OS owns controller)
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bit_AHCI_HBA_BOHC_BB = 4 ; BIOS Busy (polling bit while BIOS cleans up
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bit_AHCI_HBA_GHC_AHCI_ENABLE = 31 ; Enable AHCI mode
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bit_AHCI_HBA_GHC_RESET = 0 ; Reset HBA
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bit_AHCI_HBA_GHC_INTERRUPT_ENABLE = 1 ; Enable interrupts from the HBA
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AHCI_MAX_PORTS = 32 ;
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HBA_MEMORY_SIZE = 0x1100
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HBA_MEMORY_SIZE = 0x1100
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struct AHCI_DATA
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struct AHCI_DATA
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@ -39,7 +46,7 @@ struct HBA_MEM
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bohc dd ? ; 0x28, BIOS/OS handoff control and status
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bohc dd ? ; 0x28, BIOS/OS handoff control and status
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reserved rb (0xA0-0x2C) ; 0x2C - 0x9F, Reserved
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reserved rb (0xA0-0x2C) ; 0x2C - 0x9F, Reserved
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vendor rb (0x100-0xA0) ; 0xA0 - 0xFF, Vendor specific
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vendor rb (0x100-0xA0) ; 0xA0 - 0xFF, Vendor specific
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ports rb (sizeof.HBA_PORT*32) ; 0x100 - 0x10FF, Port control registers, max 32
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ports rb (sizeof.HBA_PORT*AHCI_MAX_PORTS) ; 0x100 - 0x10FF, Port control registers, max AHCI_MAX_PORTS
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ends
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ends
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; Port Control registers
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; Port Control registers
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@ -102,6 +109,7 @@ init_ahci:
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and edx, 00000111b ; get only 3 lowest bits (function code)
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and edx, 00000111b ; get only 3 lowest bits (function code)
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DEBUGF 1, "K: found AHCI controller, (class, subcl, progif) = %x, bus = %x, device = %x, function = %x\n", eax, ebx, ecx, edx
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DEBUGF 1, "K: found AHCI controller, (class, subcl, progif) = %x, bus = %x, device = %x, function = %x\n", eax, ebx, ecx, edx
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; get BAR5 value, it is physical address
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mov ah, [esi + PCIDEV.bus]
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mov ah, [esi + PCIDEV.bus]
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mov al, 2 ; read dword
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mov al, 2 ; read dword
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mov bh, [esi + PCIDEV.devfn]
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mov bh, [esi + PCIDEV.devfn]
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@ -109,10 +117,13 @@ init_ahci:
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call pci_read_reg
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call pci_read_reg
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DEBUGF 1, "K: AHCI controller BAR5 = %x\n", eax
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DEBUGF 1, "K: AHCI controller BAR5 = %x\n", eax
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; Map BAR5 to virtual memory
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stdcall map_io_mem, eax, HBA_MEMORY_SIZE, PG_SWR + PG_NOCACHE
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stdcall map_io_mem, eax, HBA_MEMORY_SIZE, PG_SWR + PG_NOCACHE
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mov [ahci_controller + AHCI_DATA.abar], eax
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mov [ahci_controller + AHCI_DATA.abar], eax
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DEBUGF 1, "K: AHCI controller BAR5 mapped to virtual addr %x\n", eax
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DEBUGF 1, "K: AHCI controller BAR5 mapped to virtual addr %x\n", eax
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; Enable dma bus mastering, memory space access, clear the "disable interrupts" bit
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; Usually, it is already done before us
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mov ah, [esi + PCIDEV.bus]
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mov ah, [esi + PCIDEV.bus]
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mov al, 2 ; read dword
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mov al, 2 ; read dword
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mov bh, [esi + PCIDEV.devfn]
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mov bh, [esi + PCIDEV.devfn]
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@ -129,57 +140,62 @@ init_ahci:
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mov bl, PCI_REG_STATUS_COMMAND
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mov bl, PCI_REG_STATUS_COMMAND
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call pci_write_reg
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call pci_write_reg
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mov eax, [ahci_controller + AHCI_DATA.abar]
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; ; Print some register values to debug board
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mov ebx, [eax + HBA_MEM.capability]
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; mov esi, [ahci_controller + AHCI_DATA.abar]
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mov ecx, [eax + HBA_MEM.global_host_control]
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; mov ebx, [esi + HBA_MEM.capability]
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mov edx, [eax + HBA_MEM.version]
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; mov ecx, [esi + HBA_MEM.global_host_control]
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DEBUGF 1, "K: AHCI: HBA.cap = %x, HBA.ghc = %x, HBA_MEM.version = %x\n", ebx, ecx, edx
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; mov edx, [esi + HBA_MEM.version]
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; DEBUGF 1, "K: AHCI: HBA.cap = %x, HBA.ghc = %x, HBA_MEM.version = %x\n", ebx, ecx, edx
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; //Transferring ownership from BIOS if supported.
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;-------------------------------------------------------
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; if (Bt(&hba->caps_ext, AHCI_CAPSEXTf_BOH))
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; Request BIOS/OS ownership handoff, if supported. (TODO check correctness)
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; {
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mov esi, [ahci_controller + AHCI_DATA.abar]
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; Bts(&hba->bohc, AHCI_BOHCf_OOS);
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;mov ebx, [esi + HBA_MEM.capability2]
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; "AHCI: Transferring ownership from BIOS\n";
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;DEBUGF 1, "K: AHCI: HBA_MEM.cap2 = %x\n", ebx
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bt dword [esi + HBA_MEM.capability2], bit_AHCI_HBA_CAP2_BOH
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; while (Bt(&hba->bohc, AHCI_BOHCf_BOS));
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; Sleep(25);
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; if (Bt(&hba->bohc, AHCI_BOHCf_BB)) //if Bios Busy is still set after 25 mS, wait 2 seconds.
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; Sleep(2000);
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; }
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; Transferring ownership from BIOS if supported. (TODO check)
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mov eax, [ahci_controller + AHCI_DATA.abar]
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mov ebx, [eax + HBA_MEM.capability2]
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DEBUGF 1, "K: AHCI: HBA_MEM.cap2 = %x\n", ebx
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bt dword [eax + HBA_MEM.capability2], AHCI_CAP2_BOH
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jnc .end_handoff
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jnc .end_handoff
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DEBUGF 1, "K: AHCI: Transferring ownership from BIOS...\n"
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DEBUGF 1, "K: AHCI: requesting AHCI ownership change...\n"
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bts dword [eax + HBA_MEM.bohc], AHCI_BOHCf_OOS
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bts dword [esi + HBA_MEM.bohc], bit_AHCI_HBA_BOHC_OOS
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.wait_not_bos:
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.wait_not_bos:
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bt dword [eax + HBA_MEM.bohc], AHCI_BOHCf_BOS
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bt dword [esi + HBA_MEM.bohc], bit_AHCI_HBA_BOHC_BOS
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jc .wait_not_bos
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jc .wait_not_bos
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mov ebx, 3
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mov ebx, 3
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call delay_hs
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call delay_hs
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; if Bios Busy is still set after 25 mS, wait 2 seconds.
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; if Bios Busy is still set after 30 mS, wait 2 seconds.
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bt dword [eax + HBA_MEM.bohc], AHCI_BOHCf_BB
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bt dword [esi + HBA_MEM.bohc], bit_AHCI_HBA_BOHC_BB
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jnc @f
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jnc @f
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mov ebx, 200
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mov ebx, 200
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call delay_hs
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call delay_hs
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@@:
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@@:
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DEBUGF 1, "K: AHCI: Done.\n"
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DEBUGF 1, "K: AHCI: ownership change completed.\n"
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.end_handoff:
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.end_handoff:
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;-------------------------------------------------------
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;; TODO: Reset controller ?
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; enable the AHCI and reset it
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bts dword [esi + HBA_MEM.global_host_control], bit_AHCI_HBA_GHC_AHCI_ENABLE
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bts dword [esi + HBA_MEM.global_host_control], bit_AHCI_HBA_GHC_RESET
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;; TODO enble AHCI ? (see https://github.com/ZenithOS/ZenithOS/blob/4ea8b133613ab95a8b53ed543d8e63525a21954e/src/Kernel/BlkDev/DiskAHCI.CC#L719)
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; wait for reset to complete
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.wait_reset:
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bt dword [esi + HBA_MEM.global_host_control], bit_AHCI_HBA_GHC_RESET
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jc .wait_reset
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;; TODO: find drives (see https://github.com/ZenithOS/ZenithOS/blob/4ea8b133613ab95a8b53ed543d8e63525a21954e/src/Kernel/BlkDev/DiskAHCI.CC#L742)
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; enable the AHCI and interrupts
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bts dword [esi + HBA_MEM.global_host_control], bit_AHCI_HBA_GHC_AHCI_ENABLE
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bts dword [esi + HBA_MEM.global_host_control], bit_AHCI_HBA_GHC_INTERRUPT_ENABLE
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mov ebx, 2
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call delay_hs
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mov ebx, [esi + HBA_MEM.capability]
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mov ecx, [esi + HBA_MEM.capability2]
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mov edx, [esi + HBA_MEM.version]
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mov edi, [esi + HBA_MEM.global_host_control]
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DEBUGF 1, "K: AHCI: caps: %x %x, ver: %x, ghc: %x\n", ebx, ecx, edx, edi
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ret
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ret
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