forked from KolibriOS/kolibrios
Fixed eeprom reading for certain chips, detect PHY ID, improved reset.
git-svn-id: svn://kolibrios.org@6717 a494cfbc-eb01-0410-851d-a64ba20cac60
This commit is contained in:
hidnplayr
parent
4fcfa2351b
commit
97e49e498f
@ -1,6 +1,6 @@
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; ;;
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;; Copyright (C) KolibriOS team 2004-2015. All rights reserved. ;;
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;; Copyright (C) KolibriOS team 2004-2016. All rights reserved. ;;
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;; Distributed under terms of the GNU General Public License ;;
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;; ;;
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;; i8255x (Intel eepro 100) driver for KolibriOS ;;
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@ -43,21 +43,34 @@ include '../macros.inc'
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include '../fdo.inc'
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include '../netdrv.inc'
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; Serial EEPROM
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; I/O registers
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REG_SCB_STATUS = 0
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REG_SCB_CMD = 2
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REG_SCB_PTR = 4
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REG_PORT = 8
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REG_EEPROM = 14
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REG_MDI_CTRL = 16
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; Port commands
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PORT_SOFT_RESET = 0x0
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PORT_SELF_TEST = 0x1
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PORT_SELECTIVE_RESET = 0x2
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PORT_DUMP = 0x3
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PORT_DUMP_WAKEUP = 0x7
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PORT_PTR_MASK = 0xfffffff0
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; Serial EEPROM
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EE_SK = 1 shl 0 ; serial clock
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EE_CS = 1 shl 1 ; chip select
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EE_DI = 1 shl 2 ; data in
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EE_DO = 1 shl 3 ; data out
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EE_MASK = EE_SK + EE_CS + EE_DI + EE_DO
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; opcodes, first bit is start bit and must be 1
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EE_READ = 110b
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EE_WRITE = 101b
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EE_ERASE = 111b
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; The SCB accepts the following controls for the Tx and Rx units:
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CU_START = 0x0010
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CU_RESUME = 0x0020
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CU_STATSADDR = 0x0040
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@ -73,13 +86,6 @@ RX_RESUMENR = 0x0007
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INT_MASK = 0x0100
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DRVR_INT = 0x0200 ; Driver generated interrupt
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REG_SCB_STATUS = 0
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REG_SCB_CMD = 2
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REG_SCB_PTR = 4
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REG_PORT = 8
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REG_EEPROM = 14
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REG_MDI_CTRL = 16
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PHY_100a = 0x000003E0
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PHY_100c = 0x035002A8
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PHY_82555_tx = 0x015002A8
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@ -318,7 +324,7 @@ proc service_proc stdcall, ioctl:dword
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mov [ebx + device.reset], reset
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mov [ebx + device.transmit], transmit
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mov [ebx + device.unload], unload
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mov [ebx + device.name], my_service
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mov [ebx + device.name], devicename
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; save the pci bus and device numbers
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@ -338,23 +344,18 @@ proc service_proc stdcall, ioctl:dword
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invoke PciRead8, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.interrupt_line
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mov [ebx + device.irq_line], al
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DEBUGF 1,"Hooking into device, dev:%x, bus:%x, irq:%x, addr:%x\n",\
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[ebx + device.pci_dev]:1,[ebx + device.pci_bus]:1,[ebx + device.irq_line]:1,[ebx + device.io_addr]:4
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DEBUGF 1,"Hooking into device, devfn:%x, bus:%x, irq:%x, addr:%x\n",\
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[ebx + device.pci_dev]:2,[ebx + device.pci_bus]:2,[ebx + device.irq_line]:2,[ebx + device.io_addr]:4
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; Ok, the eth_device structure is ready, let's probe the device
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pushf
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cli ; disable ints untilm initialisation is done
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call probe ; this function will output in eax
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test eax, eax
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jnz .err ; If an error occured, exit
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mov eax, [devices] ; Add the device structure to our device list
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mov [device_list+4*eax], ebx ; (IRQ handler uses this list to find device)
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inc [devices] ;
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popf
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call probe ; this function will output in eax
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test eax, eax
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jnz .err ; If an error occured, exit
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mov [ebx + device.type], NET_TYPE_ETH
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invoke NetRegDev
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@ -375,7 +376,6 @@ proc service_proc stdcall, ioctl:dword
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ret
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; If an error occured, remove all allocated data and exit (returning -1 in eax)
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.err:
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invoke KernelFree, ebx
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@ -423,7 +423,7 @@ probe:
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; Make the device a bus master
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invoke PciRead32, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.command
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or al, PCI_CMD_MASTER
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or al, PCI_CMD_MASTER or PCI_CMD_PIO
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invoke PciWrite32, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.command, eax
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;---------------------------
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@ -452,11 +452,6 @@ probe:
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.found:
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call ee_get_width
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call MAC_read_eeprom
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;;; TODO: detect phy
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;----------
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@ -480,16 +475,45 @@ reset:
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DEBUGF 1,"Resetting\n"
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;---------------
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; reset the card
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;----------------
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; Selective reset
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set_io [ebx + device.io_addr], 0
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set_io [ebx + device.io_addr], REG_EEPROM
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mov eax, PORT_SELECTIVE_RESET
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out dx, eax
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mov esi, 1
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invoke Sleep
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;-----------
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; Soft reset
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set_io [ebx + device.io_addr], REG_PORT
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xor eax, eax ; Software Reset
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mov eax, PORT_SOFT_RESET
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out dx, eax
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mov esi, 10
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invoke Sleep ; Give the card time to warm up.
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invoke Sleep
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;-------------
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; Read PHY IDs
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mov cx, 1
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mov dx, MII_PHYSID1
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call mdio_read
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DEBUGF 1, "PHY ID1: 0x%x\n", ax
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mov cx, 1
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mov dx, MII_PHYSID2
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call mdio_read
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DEBUGF 1, "PHY ID2: 0x%x\n", ax
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;---------------------
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; Read MAC from eeprom
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call ee_get_width
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call mac_read_eeprom
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;---------------------------------
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; Tell device where to store stats
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@ -991,15 +1015,15 @@ ee_read: ; esi = address to read
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movzx ecx, [ebx + device.ee_bus_width]
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add ecx, 3
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mov al, EE_CS
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out dx, al
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mov ax, 0x4800 + EE_CS
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out dx, ax
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call udelay
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;-----------------------
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; Write this to the chip
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.loop:
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mov al, EE_CS + EE_SK
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mov al, EE_CS
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shl esi, 1
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jnc @f
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or al, EE_DI
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@ -1007,7 +1031,7 @@ ee_read: ; esi = address to read
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out dx, al
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call udelay
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and al, not EE_SK
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or al, EE_SK
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out dx, al
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call udelay
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@ -1021,7 +1045,11 @@ ee_read: ; esi = address to read
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.loop2:
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shl esi, 1
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mov al, EE_CS + EE_SK
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mov al, EE_CS
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out dx, al
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call udelay
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or al, EE_SK
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out dx, al
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call udelay
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@ -1031,18 +1059,13 @@ ee_read: ; esi = address to read
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inc esi
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@@:
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mov al, EE_CS
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out dx, al
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call udelay
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loop .loop2
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;-----------------------
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; de-activate the eeprom
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xor ax, ax
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out dx, ax
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xor al, al
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out dx, al
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DEBUGF 1,"0x%x\n", esi:4
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ret
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@ -1069,14 +1092,14 @@ ee_write: ; esi = address to write to, di = data
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movzx ecx, [ebx + device.ee_bus_width]
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add ecx, 3
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mov al, EE_CS ; enable chip
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out dx, al
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mov ax, 0x4800 + EE_CS ; enable chip
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out dx, ax
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;-----------------------
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; Write this to the chip
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.loop:
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mov al, EE_CS + EE_SK
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mov al, EE_CS
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shl esi, 1
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jnc @f
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or al, EE_DI
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@ -1084,7 +1107,7 @@ ee_write: ; esi = address to write to, di = data
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out dx, al
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call udelay
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and al, not EE_SK
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or al, EE_SK
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out dx, al
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call udelay
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@ -1096,7 +1119,7 @@ ee_write: ; esi = address to write to, di = data
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mov ecx, 16
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.loop2:
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mov al, EE_CS + EE_SK
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mov al, EE_CS
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shl di, 1
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jnc @f
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or al, EE_DI
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@ -1104,7 +1127,7 @@ ee_write: ; esi = address to write to, di = data
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out dx, al
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call udelay
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and al, not EE_SK
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or al, EE_SK
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out dx, al
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call udelay
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@ -1127,23 +1150,23 @@ ee_get_width:
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set_io [ebx + device.io_addr], 0
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set_io [ebx + device.io_addr], REG_EEPROM
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mov al, EE_CS ; activate eeprom
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out dx, al
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mov ax, 0x4800 + EE_CS ; activate eeprom
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out dx, ax
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call udelay
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mov si, EE_READ shl 13
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xor ecx, ecx
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.loop:
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mov al, EE_CS + EE_SK
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mov al, EE_CS
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shl si, 1
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jnc @f
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or al, EE_DI
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@@:
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out dx, al
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out dx, ax
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call udelay
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and al, not EE_SK
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out dx, al
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or al, EE_SK
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out dx, ax
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call udelay
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inc ecx
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@ -1166,7 +1189,6 @@ ee_get_width:
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.give_up:
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DEBUGF 2, "Eeprom not found!\n"
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xor al, al
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out dx, al ; de-activate eeprom
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@ -1195,9 +1217,8 @@ mdio_read:
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DEBUGF 1,"MDIO read\n"
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shl ecx, 21 ; PHY addr
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shl edx, 16 ; PHY reg addr
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mov eax, ecx
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shl edx, 16 ; PHY reg addr
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or eax, edx
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or eax, 10b shl 26 ; read opcode
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@ -1213,6 +1234,8 @@ mdio_read:
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ret
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; ax = data
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; cx = phy addr
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; dx = phy reg addr
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@ -1245,14 +1268,9 @@ mdio_write:
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ret
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read_mac:
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ret
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align 4
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MAC_read_eeprom:
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mac_read_eeprom:
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mov esi, 0
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call ee_read
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@ -1270,16 +1288,6 @@ MAC_read_eeprom:
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ret
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align 4
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MAC_write:
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;;;;
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ret
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; End of code
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@ -1297,7 +1305,6 @@ confcmd_data db 22, 0x08, 0, 0, 0, 0x80, 0x32, 0x03, 1
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device_id_list:
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dw 0x1029
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dw 0x1030
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dw 0x1031
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