[DRIVERS] Fixed linux MSR functions in ddk

git-svn-id: svn://kolibrios.org@9951 a494cfbc-eb01-0410-851d-a64ba20cac60
This commit is contained in:
turbocat 2023-12-28 14:06:06 +00:00
parent bbee219bab
commit c6d4aab9c5
8 changed files with 110 additions and 99 deletions

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@ -54,6 +54,7 @@ NAME_SRCS:= \
linux/string.c \ linux/string.c \
linux/time.c \ linux/time.c \
linux/workqueue.c \ linux/workqueue.c \
linux/msr.c \
malloc/malloc.c \ malloc/malloc.c \
stdio/vsprintf.c \ stdio/vsprintf.c \
string/strstr.c \ string/strstr.c \

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@ -40,6 +40,7 @@ DDK_SRC = {
"linux/string.c", "linux/string.c",
"linux/time.c", "linux/time.c",
"linux/workqueue.c", "linux/workqueue.c",
"linux/msr.c",
"malloc/malloc.c", "malloc/malloc.c",
"stdio/vsprintf.c", "stdio/vsprintf.c",
"string/strstr.c", "string/strstr.c",

91
drivers/ddk/linux/msr.c Normal file
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@ -0,0 +1,91 @@
// SPDX-License-Identifier: GPL-2.0
#include <linux/preempt.h>
#include <asm/msr.h>
/**
* Read an MSR with error handling
*
* @msr: MSR to read
* @m: value to read into
*
* It returns read data only on success, otherwise it doesn't change the output
* argument @m.
*
*/
int msr_read(u32 msr, struct msr *m)
{
int err;
u64 val;
err = rdmsrl_safe(msr, &val);
if (!err)
m->q = val;
return err;
}
/**
* Write an MSR with error handling
*
* @msr: MSR to write
* @m: value to write
*/
int msr_write(u32 msr, struct msr *m)
{
return wrmsrl_safe(msr, m->q);
}
static inline int __flip_bit(u32 msr, u8 bit, bool set)
{
struct msr m, m1;
int err = -EINVAL;
if (bit > 63)
return err;
err = msr_read(msr, &m);
if (err)
return err;
m1 = m;
if (set)
m1.q |= BIT_64(bit);
else
m1.q &= ~BIT_64(bit);
if (m1.q == m.q)
return 0;
err = msr_write(msr, &m1);
if (err)
return err;
return 1;
}
/**
* Set @bit in a MSR @msr.
*
* Retval:
* < 0: An error was encountered.
* = 0: Bit was already set.
* > 0: Hardware accepted the MSR write.
*/
int msr_set_bit(u32 msr, u8 bit)
{
return __flip_bit(msr, bit, true);
}
/**
* Clear @bit in a MSR @msr.
*
* Retval:
* < 0: An error was encountered.
* = 0: Bit was already cleared.
* > 0: Hardware accepted the MSR write.
*/
int msr_clear_bit(u32 msr, u8 bit)
{
return __flip_bit(msr, bit, false);
}

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@ -93,19 +93,9 @@ static inline unsigned long long native_read_msr(unsigned int msr)
static inline unsigned long long native_read_msr_safe(unsigned int msr, static inline unsigned long long native_read_msr_safe(unsigned int msr,
int *err) int *err)
{ {
DECLARE_ARGS(val, low, high); #warning "FIXME: native_read_msr_safe always return err = 0!"
*err = 0;
asm volatile("2: rdmsr ; xor %[err],%[err]\n" return native_read_msr(msr);
"1:\n\t"
".section .fixup,\"ax\"\n\t"
"3: mov %[fault],%[err] ; jmp 1b\n\t"
".previous\n\t"
_ASM_EXTABLE(2b, 3b)
: [err] "=r" (*err), EAX_EDX_RET(val, low, high)
: "c" (msr), [fault] "i" (-EIO));
if (msr_tracepoint_active(__tracepoint_read_msr))
do_trace_read_msr(msr, EAX_EDX_VAL(val, low, high), *err);
return EAX_EDX_VAL(val, low, high);
} }
static inline void native_write_msr(unsigned int msr, static inline void native_write_msr(unsigned int msr,
@ -120,20 +110,9 @@ static inline void native_write_msr(unsigned int msr,
notrace static inline int native_write_msr_safe(unsigned int msr, notrace static inline int native_write_msr_safe(unsigned int msr,
unsigned low, unsigned high) unsigned low, unsigned high)
{ {
int err; #warning "FIXME: native_write_msr_safe always return 0!"
asm volatile("2: wrmsr ; xor %[err],%[err]\n" native_write_msr(msr, low, high);
"1:\n\t" return 0;
".section .fixup,\"ax\"\n\t"
"3: mov %[fault],%[err] ; jmp 1b\n\t"
".previous\n\t"
_ASM_EXTABLE(2b, 3b)
: [err] "=a" (err)
: "c" (msr), "0" (low), "d" (high),
[fault] "i" (-EIO)
: "memory");
if (msr_tracepoint_active(__tracepoint_write_msr))
do_trace_write_msr(msr, ((u64)high << 32 | low), err);
return err;
} }
extern int rdmsr_safe_regs(u32 regs[8]); extern int rdmsr_safe_regs(u32 regs[8]);

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@ -535,8 +535,8 @@ EXPORT_SYMBOL_GPL(amd_flush_garts);
static void __fix_erratum_688(void *info) static void __fix_erratum_688(void *info)
{ {
#define MSR_AMD64_IC_CFG 0xC0011021 #define MSR_AMD64_IC_CFG 0xC0011021
e_msr_set_bit(MSR_AMD64_IC_CFG, 3); msr_set_bit(MSR_AMD64_IC_CFG, 3);
e_msr_set_bit(MSR_AMD64_IC_CFG, 14); msr_set_bit(MSR_AMD64_IC_CFG, 14);
} }
/* Apply erratum 688 fix so machines without a BIOS fix work. */ /* Apply erratum 688 fix so machines without a BIOS fix work. */

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@ -1,61 +0,0 @@
#include <ddk.h>
#define U64_C(x) x ## ULL
#define BIT_64(n) (U64_C(1) << (n))
struct e_msr {
union {
struct {
u32 l;
u32 h;
};
u64 q;
};
};
static void _msr_read(u32 msr, struct e_msr *m)
{
__asm__ __volatile__(
"rdmsr"
:"=a"(m->l), "=d"(m->h)
:"c"(msr)
:"memory"
);
}
static void _msr_write(u32 msr, struct e_msr *m)
{
__asm__ __volatile__(
"wrmsr"
::"a"(m->l), "d"(m->h), "c"(msr)
:"memory"
);
}
static int __flip_bit(u32 msr, u8 bit, bool set)
{
struct e_msr m, m1;
if (bit > 63)
return EINVAL;
_msr_read(msr, &m);
m1 = m;
if (set)
m1.q |= BIT_64(bit);
else
m1.q &= ~BIT_64(bit);
if (m1.q == m.q)
return 0;
_msr_write(msr, &m1);
return 1;
}
int e_msr_set_bit(u32 msr, u8 bit)
{
return __flip_bit(msr, bit, true);
}

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@ -28,7 +28,7 @@ LDFLAGS = -nostdlib -shared -s --major-os-version 0 --minor-os-version 7 \
--major-subsystem-version 0 --minor-subsystem-version 5 --subsystem native \ --major-subsystem-version 0 --minor-subsystem-version 5 --subsystem native \
--image-base 0 --file-alignment 512 --section-alignment 4096 --image-base 0 --file-alignment 512 --section-alignment 4096
OBJS = k10temp.o ../pci.o ../amd_nb.o ../cpu_detect.o ../e_msr.o OBJS = k10temp.o ../pci.o ../amd_nb.o ../cpu_detect.o
all: $(OBJS) $(NAME).sys all: $(OBJS) $(NAME).sys

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@ -12,7 +12,7 @@ LDFLAGS = " -nostdlib -shared -s --major-os-version 0 --minor-os-version 7 --maj
LIBS = " -lddk -lcore -lgcc " LIBS = " -lddk -lcore -lgcc "
compile_gcc{ compile_gcc{
"k10temp.c", "../pci.c", "../amd_nb.c", "../cpu_detect.c", "../e_msr.c" "k10temp.c", "../pci.c", "../amd_nb.c", "../cpu_detect.c"
} }
OBJS.extra_inputs = {"../../ddk/<libcore>", "../../ddk/<libddk>"} OBJS.extra_inputs = {"../../ddk/<libcore>", "../../ddk/<libddk>"}