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Cardbus driver bugfixes

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git-svn-id: svn://kolibrios.org@8038 a494cfbc-eb01-0410-851d-a64ba20cac60
This commit is contained in:
hidnplayr 2020-06-11 16:29:02 +00:00
parent 8f21814292
commit e8a367619a
1 changed files with 18 additions and 19 deletions
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37
drivers/unfinished/cardbus.asm
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@ -1,6 +1,6 @@
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; ;; ;; ;;
;; Copyright (C) KolibriOS team 2004-2015. All rights reserved. ;; ;; Copyright (C) KolibriOS team 2004-2020. All rights reserved. ;;
;; Distributed under terms of the GNU General Public License ;; ;; Distributed under terms of the GNU General Public License ;;
;; ;; ;; ;;
;; PCMCIA aka cardbus driver for KolibriOS ;; ;; PCMCIA aka cardbus driver for KolibriOS ;;
@ -31,7 +31,9 @@ entry START
COMPATIBLE_API = 0x0100 COMPATIBLE_API = 0x0100
API_VERSION = (COMPATIBLE_API shl 16) + CURRENT_API API_VERSION = (COMPATIBLE_API shl 16) + CURRENT_API
CARDBUS_IO = 0xFC00 CARDBUS_IO_BASE = 0x1400
CARDBUS_IO_SIZE = 0x100
CARDBUS_IRQ = 0x0A
__DEBUG__ = 1 __DEBUG__ = 1
__DEBUG_LEVEL__ = 1 __DEBUG_LEVEL__ = 1
@ -176,7 +178,7 @@ proc detect
and eax, 0xff000000 ; Keep original latency setting, clear the rest and eax, 0xff000000 ; Keep original latency setting, clear the rest
mov al, byte[bus] mov al, byte[bus]
mov ah, byte[card_bus] mov ah, byte[card_bus]
mov ebx, [card_bus] mov ebx, [card_bus] ; sub bus nr???
shl ebx, 16 shl ebx, 16
or eax, ebx or eax, ebx
DEBUGF 1, "Latency, bus,.. 0x%x\n", eax DEBUGF 1, "Latency, bus,.. 0x%x\n", eax
@ -204,7 +206,7 @@ proc detect
push eax push eax
invoke PciWrite32, [bus], [devfn], PCI_header02.base_addr, eax ; base is 4 Kbyte aligned invoke PciWrite32, [bus], [devfn], PCI_header02.base_addr, eax ; base is 4 Kbyte aligned
pop ebx pop ebx
invoke MapIoMem, ebx, 4096, 0x1b invoke MapIoMem, ebx, 4096, PG_SW+PG_NOCACHE
mov ecx, eax mov ecx, eax
; Check if a card is present in the socket ; Check if a card is present in the socket
@ -226,7 +228,7 @@ proc detect
;mov word[ecx + 0x802], 0x00F9 ; Assert reset, output enable, vcc=vpp=3.3V ;mov word[ecx + 0x802], 0x00F9 ; Assert reset, output enable, vcc=vpp=3.3V
mov dword[ecx + 0x10], 0x33 ; Request 3.3V for Vcc and Vpp (Control register) mov dword[ecx + 0x10], 0x33 ; Request 3.3V for Vcc and Vpp (Control register)
;push ecx ;push ecx
;mov esi, 10 ;mov esi, 1
;invoke Sleep ;invoke Sleep
;pop ecx ;pop ecx
;mov byte[ecx + 0x803], 0x40 ; stop reset ;mov byte[ecx + 0x803], 0x40 ; stop reset
@ -245,19 +247,16 @@ proc detect
; set to 0 the second interval (mem1 and IO1) ; set to 0 the second interval (mem1 and IO1)
; IO0: size is 256 bytes ; IO0: size is 256 bytes
irp regvalue, 0x7efff000, 0x7effffff, 0x7effe000, 0x7effe000, CARDBUS_IO, CARDBUS_IO + 0xFF, 0, 0 invoke PciWrite32, [bus], [devfn], PCI_header02.mbar_0, 0x7EFFF000
{ invoke PciWrite32, [bus], [devfn], PCI_header02.mlimit_0, 0x7EFFF000
common invoke PciWrite32, [bus], [devfn], PCI_header02.mbar_1, 0
reg = 0x1C invoke PciWrite32, [bus], [devfn], PCI_header02.mlimit_1, 0
forward invoke PciWrite32, [bus], [devfn], PCI_header02.iobar_0, CARDBUS_IO
invoke PciWrite32, [bus], [devfn], reg, regvalue invoke PciWrite32, [bus], [devfn], PCI_header02.iolimit_0, CARDBUS_IO + 0xFC
DEBUGF 1, "Writing 0x%x to 0x%x\n", regvalue, reg invoke PciWrite32, [bus], [devfn], PCI_header02.iobar_1, 0
reg = reg + 4 invoke PciWrite32, [bus], [devfn], PCI_header02.iolimit_1, 0
} invoke PciWrite8, [bus], [devfn], PCI_header02.interrupt_line, CARDBUS_IRQ ; IRQ line
invoke PciRead16, [bus], [devfn], PCI_header02.bridge_ctrl ; Bridge control
invoke PciWrite8, [bus], [devfn], PCI_header02.interrupt_line, 0xc ; IRQ line
invoke PciRead16, [bus], [devfn], PCI_header02.bridge_ctrl ; Bridge control
or ax, 0x0700 ; Enable write posting, both memory windows prefetchable or ax, 0x0700 ; Enable write posting, both memory windows prefetchable
invoke PciWrite16, [bus], [devfn], PCI_header02.bridge_ctrl, eax invoke PciWrite16, [bus], [devfn], PCI_header02.bridge_ctrl, eax
DEBUGF 1, "Write posting enabled\n" DEBUGF 1, "Write posting enabled\n"
@ -276,7 +275,7 @@ rept 17 reg
mov ecx, 100 mov ecx, 100
.waitactive: .waitactive:
push ecx push ecx
invoke PciRead32, [card_bus], 0, PCI_header02.vendor_id ; Check if the card is awake yet invoke PciRead32, [card_bus], 0, PCI_header.vendor_id ; Check if the card is awake yet
inc eax inc eax
jnz .got_it jnz .got_it
mov esi, 2 mov esi, 2