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Added a function to get the number of sectors

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Added a function to get the number of sectors and other update file. Added test functions for reading sectors from an SD card using SDMA.
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Doczom
2023-02-11 02:22:07 +05:00
committed by GitHub
parent 12e83fe348
commit ac88e6dc63
6 changed files with 741 additions and 193 deletions
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164
SDHC_doc.txt Normal file
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@@ -0,0 +1,164 @@
; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
; Response Bit Definition and Each Response type
; R1,R1b (normal response) - Card Status - REP[0:31]
; R1b (Auto CMD12 response) - Card Status for Auto CMD12 - REP[96:127]
; R1 (Auto CMD23 response) - Card Status for Auto CMD23 - REP[96:127]
; R2 (CID, CSD register) - CID or CSD reg. incl. - REP[0:119]
; R3 (OCR register) - OCR register for memory - REP[0:31]
; R4 (OCR register) - OCR register for I/O etc - REP[0:31]
; R5, R5b - SDIO response - REP[0:31]
; R6 (Published RCA response) - New published RCA[16:31] etc - REP[0:31]
; R7 (return CMD8) - Voltage flags + mask protect - REP[0:31]
; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> SD/SDIO/MMC <20><><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
; OCR register
; bit | data
;---------|----------------------------;
; 0-6 | reserved ;
; 7 | Low Voltage Range (1.8V) ;
; 8-14 | reserved ;
; 15 | 2.7 - 2.8V ;
; 16 | 2.8 - 2.9V ;
; 17 | 2.9 - 3.0V ;
; 18 | 3.0 - 3.1V ;
; 19 | 3.1 - 3.2V ;
; 20 | 3.2 - 3.3V ;
; 21 | 3.3 - 3.4V ;
; 22 | 3.4 - 3.5V ;
; 23 | 3.5 - 3.6V ;
; 24 | reserved ; <- only to UHS-I "switching to 1.8 Accepted (S18A)"
; 25-26 | reserved ;
; 27 | reserved ; <- only to SDUC "Over to 2TB support Status (CO2T)"
; 28 | reserved ;
; 29 | reserved ; <- UHS-II Card Status
; 30 | Card Capacity Status(CCS) ;
; 31 | Card power up status bit ; (busy)
;--------------------------------------;
; I/O OCR register
; bit | data
;---------|----------------------------;
; 0-7 | reserved ;
; 8 | 2.0 - 2.1V ;
; 9 | 2.1 - 2.2V ;
; 10 | 2.2 - 2.3V ;
; 11 | 2.3 - 2.4V ;
; 12 | 2.4 - 2.5V ;
; 13 | 2.5 - 2.6V ;
; 11 | 2.6 - 2.7V ;
; 15 | 2.7 - 2.8V ;
; 16 | 2.8 - 2.9V ;
; 17 | 2.9 - 3.0V ;
; 18 | 3.0 - 3.1V ;
; 19 | 3.1 - 3.2V ;
; 20 | 3.2 - 3.3V ;
; 21 | 3.3 - 3.4V ;
; 22 | 3.4 - 3.5V ;
; 23 | 3.5 - 3.6V ;
; 24 | switching to 1.8 Accepted ; <- "switching to 1.8 Accepted (S18A)"
; 25-26 | reserved ;
; 27 | Memory Present ; <- 1 <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> SD <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, 0 <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> I/O
; 28-30 | Number of I/O Functions ; <- <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0 (<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> SDIO <20><><EFBFBD><EFBFBD><EFBFBD>)
; 31 | Card power up status bit ; (busy)
;--------------------------------------;
; CID register
; bit | width | data ;
;---------|-------|----------------------------;
; 0-11 | 12 | Manufacturing date(MDT) ; <- [0-3] month code(1=january) [4-11] year-2000
; 12-15 | 4 | reserved ;
; 16-47 | 32 | Product Serial Number(PSN) ;
; 48-55 | 8 | Product Revision(PRV) ; <- BCD number
; 56-95 | 40 | Product name(PRN) ;
; 96-111 | 16 | OEM/Aplication ID (OID) ;
; 112-119 | 8 | Manufacturer ID (MID) ;
;----------------------------------------------;
; CSD register ver 1.0
; bit | width | value | data ;
;---------|-------|--------------------|-----------------------------------------------------;
; 0-1 | 2 | 00b | reserved ;
; 2-3 | 2 | xxb | File Format(FILE_FORMAT) ;
; 4 | 1 | xb | temporary write protection TMP_WRITE_PROTECT ;
; 5 | 1 | xb | permanent write protection PERM_WRITE_PROTECT ;
; 6 | 1 | xb | copy flag COPY ;
; 7 | 1 | xb | file format group (FILE_FORMAT_GRP) ;
; 8-12 | 5 | 00000b | reserved ;
; 13 | 1 | xb | partial blocks for write allowed (WRITE_BL_PARTIAL) ;
; 14-17 | 4 | xxxxb | max. write data block length (WRITE_BL_LEN) ; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
; 18-20 | 3 | xxxb | write speed factor (R2W_FACTOR) ;
; 21-22 | 2 | 00b | reserved ;
; 23 | 1 | xb | write protect group enable (WP_GRP_ENABLE) ;
; 24-30 | 7 | xxxxxxxb | write protect group size (WP_GRP_SIZE) ;
; 31-37 | 7 | xxxxxxxb | erase sector size (SECTOR_SIZE) ;
; 38 | 1 | xb | erase single block enable (ERASW_BLK_EN) ;
; 39-41 | 3 | xxxb | device size multiplier C_SIZE_MULT ;
; 42-44 | 3 | xxxb | VDD_W_CURR_MAX ;
; 45-47 | 3 | xxxb | VDD_W_CURR_MIN ;
; 48-50 | 3 | xxxb | VDD_R_CURR_MAX ;
; 51-53 | 3 | xxxb | VDD_R_CURR_MIN ;
; 54-65 | 12 | xxxh | device size C_SIZE ;
; 66-67 | 2 | 00b | reserved ;
; 68 | 1 | xb | DSR implemented DSR_IMP ; <20><><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD> DSR <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
; 69 | 1 | xb | read block misalignment (READ_BLK_MISALIGN) ; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
; 70 | 1 | xb | write block misalignment (WRITE_BLK_MISALIGN) ; 0 - <20><><EFBFBD> 1 - <20><>
; 71 | 1 | 1b | partial blocks for read allowed (READ_BL_PARTIAL) ; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1. <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD>
; 72-75 | 4 | xh | max. read data block length (READ_BL_LEN) ; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
; 76-87 | 12 | 01x110110101b | card command classes CCC ;
; 88-95 | 8 | 32h,5Ah | max. data transfer rate (TRAN_SPEED) ;
; 96-103 | 8 | xxh | data read access-time in CLK cycles(MSAC*100) NSAC);
; 104-111 | 8 | xxh | data read access-time (TAAC) ;
; 112-117 | 6 | 00 0000b | reserved ;
; 118-119 | 2 | 00b | CSD structure CSD_STRUCTURE ;
;--------------------------------------------------------------------------------------------;
; CSD register ver 2.0
; bit | width | value | data ;
;---------|-------|--------------------|-----------------------------------------------------;
; 0-1 | 2 | 00b | reserved ;
; 2-3 | 2 | 00b | File Format(FILE_FORMAT) ;
; 4 | 1 | x | temporary write protection TMP_WRITE_PROTECT ;
; 5 | 1 | x | permanent write protection PERM_WRITE_PROTECT ;
; 6 | 1 | x | copy flag COPY ;
; 7 | 1 | 0 | file format group (FILE_FORMAT_GRP) ;
; 8-12 | 5 | 00000b | reserved ;
; 13 | 1 | 0 | partial blocks for write allowed (WRITE_BL_PARTIAL) ;
; 14-17 | 4 | 9 | max. write data block length (WRITE_BL_LEN) ; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
; 18-20 | 3 | 010b | write speed factor (R2W_FACTOR) ;
; 21-22 | 2 | 00b | reserved ;
; 23 | 1 | 0 | write protect group enable (WP_GRP_ENABLE) ;
; 24-30 | 7 | 0000000b | write protect group size (WP_GRP_SIZE) ;
; 31-37 | 7 | 7Fh | erase sector size (SECTOR_SIZE) ;
; 38 | 1 | 1 | erase single block enable (ERASW_BLK_EN) ;
; 39 | 1 | 0 | reserved ;
; 40-61 | 22 | xxxxxxh | device size C_SIZE ;
; 62-67 | 6 | 00 0000b | reserved ;
; 68 | 1 | x | DSR implemented DSR_IMP ; <20><><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD> DSR <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
; 69 | 1 | 0 | read block misalignment (READ_BLK_MISALIGN) ; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
; 70 | 1 | 0 | write block misalignment (WRITE_BLK_MISALIGN) ; 0 - <20><><EFBFBD> 1 - <20><>
; 71 | 1 | 0 | partial blocks for read allowed (READ_BL_PARTIAL) ; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1. <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD>
; 72-75 | 4 | 9 | max. read data block length (READ_BL_LEN) ; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
; 76-87 | 12 | 01x110110101b | card command classes CCC ;
; 88-95 | 8 | 32h,5Ah,0Bh or 2Bh | max. data transfer rate (TRAN_SPEED) ;
; 96-103 | 8 | 00h | data read access-time in CLK cycles(MSAC*100) NSAC);
; 104-111 | 8 | 0Eh | data read access-time (TAAC) ;
; 112-117 | 6 | 00 0000b | reserved ;
; 118-119 | 2 | 01b | CSD structure CSD_STRUCTURE ;
;--------------------------------------------------------------------------------------------;
;
; for version struct 1.0
; memory capacity = BLOCKNR * BLOCK_LEN
; BLOCKNR = (C_SIZE + 1) * MULT
; MULT = 2^(C_SIZE_MULT + 2)
; for version struct 2.0
; memory capacity = (C_SIZE + 1) * 512 KByte
; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
; <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> sd <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD>-<2D><>
; <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>
; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>

266
sdhc_cmd.inc
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@@ -1,16 +1,6 @@
;; Copyright (C) 2022, Michael Frolov(aka Doczom) ;; Copyright (C) 2022, Michael Frolov(aka Doczom)
;; SDHC commands ;; SDHC commands
; Response Bir Definition and Each Response type
; R1,R1b (normal response) - Card Status - REP[0:31]
; R1b (Auto CMD12 response) - Card Status for Auto CMD12 - REP[96:127]
; R1 (Auto CMD23 response) - Card Status for Auto CMD23 - REP[96:127]
; R2 (CID, CSD register) - CID or CSD reg. incl. - REP[0:119]
; R3 (OCR register) - OCR register for memory - REP[0:31]
; R4 (OCR register) - OCR register for I/O etc - REP[0:31]
; R5, R5b - SDIO response - REP[0:31]
; R6 (Published RCA response) - New published RCA[16:31] etc - REP[0:31]
; R7 (return CMD8) - Voltage flags + mask protect - REP[0:31]
RESP_TYPE: RESP_TYPE:
.not = 00000b + 00b .not = 00000b + 00b
.R1 = 11000b + 10b .R1 = 11000b + 10b
@@ -22,99 +12,131 @@ RESP_TYPE:
.R5b = .R1b .R5b = .R1b
.R6 = .R1 .R6 = .R1
.R7 = .R1 .R7 = .R1
; OCR register
; bit | data
;---------|----------------------------;
; 0-6 | reserved ;
; 7 | Low Voltage Range (1.8V) ;
; 8-14 | reserved ;
; 15 | 2.7 - 2.8V ;
; 16 | 2.8 - 2.9V ;
; 17 | 2.9 - 3.0V ;
; 18 | 3.0 - 3.1V ;
; 19 | 3.1 - 3.2V ;
; 20 | 3.2 - 3.3V ;
; 21 | 3.3 - 3.4V ;
; 22 | 3.4 - 3.5V ;
; 23 | 3.5 - 3.6V ;
; 24 | reserved ; <- only to UHS-I "switching to 1.8 Accepted (S18A)"
; 25-26 | reserved ;
; 27 | reserved ; <- only to SDUC "Over to 2TB support Status (CO2T)"
; 28 | reserved ;
; 29 | reserved ; <- UHS-II Card Status
; 30 | Card Capacity Status(CCS) ;
; 31 | Card power up status bit ; (busy)
;--------------------------------------;
; I/O OCR register CMD_TYPE: ; 6-7 bits
; bit | data .Normal = 00000000b ; other command
;---------|----------------------------; .Suspend = 10000000b ; CMD12, CMD52 for writing "Bus Suspend" in CCCR
; 0-7 | reserved ; .Resume = 01000000b ; CMD52 for writing "Function Select" in CCCR
; 8 | 2.0 - 2.1V ; .Abort = 11000000b ; CMD52 for writing "I/O Abort" in CCCR
; 9 | 2.1 - 2.2V ; ; for 0xc
; 10 | 2.2 - 2.3V ; .Single = 000000b
; 11 | 2.3 - 2.4V ; .Multiple = 100010b
; 12 | 2.4 - 2.5V ; .Infinite = 100000b
; 13 | 2.5 - 2.6V ;
; 11 | 2.6 - 2.7V ; DATA_PRSNT = 100000b ; set for using DAT line for transfer
; 15 | 2.7 - 2.8V ;
; 16 | 2.8 - 2.9V ; ;Transfer_type:
; 17 | 2.9 - 3.0V ; ; .Single = 000000b
; 18 | 3.0 - 3.1V ; ; .Multiple = 100010b
; 19 | 3.1 - 3.2V ; ; .Infinite = 100000b
; 20 | 3.2 - 3.3V ; DATA_DIR:
; 21 | 3.3 - 3.4V ; .Write = 00000b
; 22 | 3.4 - 3.5V ; .Read = 10000b
; 23 | 3.5 - 3.6V ;
; 24 | switching to 1.8 Accepted ; <- "switching to 1.8 Accepted (S18A)" DMA_EN = 1b ; reg 0x0C
; 25-26 | reserved ; ACMD12_EN = 100b ;send acmd12 for end transfer blocks
; 27 | Memory Present ; <- 1 <EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> SD <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, 0 <EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> I/O
; 28-30 | Number of I/O Functions ; <- <EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0 (<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD> SDIO <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>) DMA_SELECT: ; 3-4 bits SDHC_CTRL1 reg
; 31 | Card power up status bit ; (busy) .SDMA = 00000b
;--------------------------------------; .ADMA1 = 010000b
; CID register .ADMA2_32 = 100000b
; bit | width | data ; .ADMA2_64 = 110000b
;---------|-------|----------------------------;
; 0-11 | 12 | Manufacturing date(MDT) ; <- [0-3] month code(1=january) [4-11] year-2000 SD_BLOCK_SIZE = 0x200 ;standart sector = 512
; 12-15 | 4 | reserved ;
; 16-47 | 32 | Product Serial Number(PSN) ;
; 48-55 | 8 | Product Revision(PRV) ; <- BCD number
; 56-95 | 40 | Product name(PRN) ;
; 96-111 | 16 | OEM/Aplication ID (OID) ;
; 112-119 | 8 | Manufacturer ID (MID) ;
;----------------------------------------------;
;
R1_APP_CMD = 100000b ; <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ACMD <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> R1_APP_CMD = 100000b ; <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ACMD <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
R1_READY_FOR_DATA = 100000000b ; 0x100 <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD> R1_READY_FOR_DATA = 100000000b ; 0x100 <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
; in: eax - reg map, esi - struct controller ; in: eax - reg map, esi - struct controller
; ebx - arg 32 bit <EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD> ecx - 0x0C register edx - command reg with flags ; ebx - arg 32 bit <EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD> edx - 0x0C register ;command reg with flags
proc send_sdhc_command proc send_sdhc_command
@@: @@:
test dword[eax + SDHC_PRSNT_STATE], 0x07 ; check cmd_inhid_cmd + cmd_inhibit_dat + DAT Line Active test dword[eax + SDHC_PRSNT_STATE], 0x07 ; check cmd_inhid_cmd + cmd_inhibit_dat + DAT Line Active
jnz @b jnz @b
mov dword[eax + SDHC_CMD_ARG], ebx mov dword[eax + SDHC_CMD_ARG], ebx
;<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
shl edx, 16
add edx, ecx
mov dword[esi + SDHCI_CONTROLLER.int_status], 0 mov dword[esi + SDHCI_CONTROLLER.int_status], 0
DEBUGF 1,"SDHCI: Command send\n" DEBUGF 1,"SDHCI: Command send\n"
mov dword[eax + SDHC_CMD_TRN], edx ; <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> mov dword[eax + SDHC_CMD_TRN], edx ; <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
@@: @@:
cmp dword[esi + SDHCI_CONTROLLER.int_status], 0
hlt hlt
cmp dword[esi + SDHCI_CONTROLLER.int_status], 0
;hlt
jz @b jz @b
DEBUGF 1,"SDHCI: resp1=%x resp2=%x \n", [eax + SDHC_RESP1_0], [eax + SDHC_RESP3_2] DEBUGF 1,"SDHCI: resp1=%x resp2=%x \n", [eax + SDHC_RESP1_0], [eax + SDHC_RESP3_2]
ret ret
endp endp
; in: eax - reg map, esi - struct controller
; ebx - arg 32 bit <EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD> ecx - 0x0C register edx - command reg with flags
proc send_sdhc_transfer_command stdcall, arg:dword, _block_size:word, _block_count:word,\
reg0c:dword, virt_addr:dword, phys_addr:dword
@@:
test dword[eax + SDHC_PRSNT_STATE], 0x07
jnz @b ; check cmd_inhid_cmd + cmd_inhibit_dat + DAT Line Active
; (1) Set Block Size Reg
; (2) Set Block Count Reg
; (3) Set Argument Reg
; (4) Set Transfer Mode Reg
; (5) Set Command Reg
@@:
cmp dword[esi + SDHCI_CONTROLLER.int_status], 0
hlt
jz @b
DEBUGF 1,"SDHCI: resp1=%x resp2=%x \n", [eax + SDHC_RESP1_0], [eax + SDHC_RESP3_2]
cmp dword[esi + SDHCI_CONTROLLER.int_status], 0x01 ; comand complate
jnz .err
; wait interrupt
.wait_int:
mov dword[esi + SDHCI_CONTROLLER.int_status], 0
hlt
cmp dword[esi + SDHCI_CONTROLLER.int_status], 0
jz .wait_int
cmp dword[esi + SDHCI_CONTROLLER.int_status], 1000b ; DMA intr
jnz .no_sdma
; set new addr
jmp .wait_int
.no_sdma:
cmp dword[esi + SDHCI_CONTROLLER.int_status], 10000b ; port write
jnz .no_w_port
; get phys addr
jmp .wait_int
.no_w_port:
cmp dword[esi + SDHCI_CONTROLLER.int_status], 100000b ; port read
jnz .no_r_port
;
mov ecx, [eax + SDHC_BUFFER]
jmp .wait_int
.no_w_port:
cmp dword[esi + SDHCI_CONTROLLER.int_status], 10b ; Transfer complate
jz .good_transfer
cmp dword[esi + SDHCI_CONTROLLER.int_status], (10b shl 8) shl 16 ; ADMA Error
jz .adma_error
.good_transfer:
DEBUGF 1,"SDHCI: GOOD COMMAND\n"
ret
.undefined_err:
DEBUGF 1,"SDHCI: UNDEFINED ERROR\n"
.adma_error:
.err:
DEBUGF 1,"SDHCI: ERROR TRANSFER COMMAND\n"
ret
endp
;basic commands ;basic commands
;cmd0 - Resets all cards to idle state ;cmd0 - Resets all cards to idle state
macro GO_IDLE_SATTE { macro GO_IDLE_SATTE {
xor ebx, ebx xor ebx, ebx
mov ecx, 0x00;0x02 ; read mull mov edx, (RESP_TYPE.not) shl 16
mov edx, RESP_TYPE.not
call send_sdhc_command call send_sdhc_command
;ret ;ret
} }
@@ -123,8 +145,7 @@ macro GO_IDLE_SATTE {
;args = ;args =
macro ALL_SEND_CID { macro ALL_SEND_CID {
xor ebx, ebx ;arg xor ebx, ebx ;arg
mov ecx, 0x00;0x02 ; read mull mov edx, ((2 shl 8) + RESP_TYPE.R2 ) shl 16
mov edx, (2 shl 8) + RESP_TYPE.R2 ;01000b + 01b
call send_sdhc_command call send_sdhc_command
; save CID ; save CID
mov ecx, [eax + SDHC_RESP1_0] mov ecx, [eax + SDHC_RESP1_0]
@@ -143,8 +164,7 @@ macro ALL_SEND_CID {
;args = ;args =
proc SEND_RCA proc SEND_RCA
xor ebx, ebx ;arg xor ebx, ebx ;arg
mov ecx, 0x00;0x02 ; read mull mov edx, ((3 shl 8) + RESP_TYPE.R6 ) shl 16
mov edx, (3 shl 8) + RESP_TYPE.R6 ;01000b + 01b
call send_sdhc_command call send_sdhc_command
mov ecx, [eax + SDHC_RESP1_0] mov ecx, [eax + SDHC_RESP1_0]
@@ -159,8 +179,27 @@ proc SET_DSR
ret ret
endp endp
proc cmd7 ;cmd7 - select card for switch in transfer state
ret ;resp = R1b , ZF - good; not ZF - error
;args = RCA in ebx
proc SELECT_CARD
mov bx, word[esi + SDHCI_CONTROLLER.card_reg_rca]
shl ebx, 16
mov edx, ((7 shl 8) + RESP_TYPE.R1b ) shl 16
call send_sdhc_command
test dword[esi + SDHCI_CONTROLLER.int_status],0x8000
ret
endp
;cmd7 - switch card in stable state
;resp = R1b , ZF - good; not ZF - error
proc DESELECT_CARD
xor ebx, ebx
mov edx, ((7 shl 8) + RESP_TYPE.R1b ) shl 16
call send_sdhc_command
test dword[esi + SDHCI_CONTROLLER.int_status],0x8000
ret
endp endp
;cmd8 - <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2.0 <EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD>. <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>. ;cmd8 - <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2.0 <EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD>. <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>.
;resp = R7 ;resp = R7
@@ -168,6 +207,7 @@ endp
; <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ; <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
; <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(<EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(<EFBFBD><EFBFBD><EFBFBD>)) <EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD>, ; <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(<EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(<EFBFBD><EFBFBD><EFBFBD>)) <EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD>,
; <EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ; <EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
; <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD> ACMD41
proc SEND_IF_COUND proc SEND_IF_COUND
mov ebx, (0001b shl 8) + 10101010b mov ebx, (0001b shl 8) + 10101010b
@@ -175,10 +215,9 @@ proc SEND_IF_COUND
jnz @f jnz @f
mov ebx, (0010b shl 8) + 10101010b ;0001b - <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> mov ebx, (0010b shl 8) + 10101010b ;0001b - <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
@@: ;<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <EFBFBD><EFBFBD><EFBFBD> 51. 2.7V-3.6V=0001b 1.8V=0010b @@: ;<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <EFBFBD><EFBFBD><EFBFBD> 51. 2.7V-3.6V=0001b 1.8V=0010b
mov ecx, 0x00;0x02 ; read mull mov edx, ((8 shl 8) + RESP_TYPE.R7 ) shl 16
mov edx, (8 shl 8) + RESP_TYPE.R7 ;01000b + 11b
call send_sdhc_command call send_sdhc_command
cmp word[eax + SDHC_RESP1_0], bx;(0001b shl 8) + 10101010b ;cmp word[eax + SDHC_RESP1_0], bx;(0001b shl 8) + 10101010b
ret ret
endp endp
@@ -186,11 +225,10 @@ endp
;resp = R2 ;resp = R2
;args = [16:31]RCA card ;args = [16:31]RCA card
proc SEND_CSD proc SEND_CSD
DEBUGF 1,"SDHCI: get CSD reg\n" ;DEBUGF 1,"SDHCI: get CSD reg\n"
mov bx, word[esi + SDHCI_CONTROLLER.card_reg_rca] mov bx, word[esi + SDHCI_CONTROLLER.card_reg_rca]
shl ebx, 16 shl ebx, 16
mov ecx, 0x00;0x02 ; read mull mov edx, ((9 shl 8) + RESP_TYPE.R2 ) shl 16
mov edx, (9 shl 8) + RESP_TYPE.R2 ;01000b + 01b
call send_sdhc_command call send_sdhc_command
; save CID ; save CID
mov ecx, [eax + SDHC_RESP1_0] mov ecx, [eax + SDHC_RESP1_0]
@@ -204,22 +242,44 @@ proc SEND_CSD
DEBUGF 1,"SDHCI: resp3=%x resp4=%x \n", [eax + SDHC_RESP5_4], [eax + SDHC_RESP7_6] DEBUGF 1,"SDHCI: resp3=%x resp4=%x \n", [eax + SDHC_RESP5_4], [eax + SDHC_RESP7_6]
ret ret
endp endp
;cmd10 = get CID for this card
;resp = R2
;args = [16:31]RCA card
proc SEND_CID
;DEBUGF 1,"SDHCI: get CID reg\n"
mov bx, word[esi + SDHCI_CONTROLLER.card_reg_rca]
shl ebx, 16
mov edx, ((10 shl 8) + RESP_TYPE.R2 ) shl 16
call send_sdhc_command
; save CID
mov ecx, [eax + SDHC_RESP1_0]
mov ebx, [eax + SDHC_RESP3_2]
mov edx, [eax + SDHC_RESP5_4]
mov edi, [eax + SDHC_RESP7_6]
mov [esi + SDHCI_CONTROLLER.card_reg_cid], ecx
mov [esi + SDHCI_CONTROLLER.card_reg_cid + 4], ebx
mov [esi + SDHCI_CONTROLLER.card_reg_cid + 8], edx
mov [esi + SDHCI_CONTROLLER.card_reg_cid + 12], edi
DEBUGF 1,"SDHCI: resp3=%x resp4=%x \n", [eax + SDHC_RESP5_4], [eax + SDHC_RESP7_6]
ret
endp
;cmd55 = switch to ACMD mode command ;cmd55 = switch to ACMD mode command
;resp = R1 ;resp = R1
;args = [31:16]RCA [15:0]stuff bits ;args = [31:16]RCA [15:0]stuff bits
; <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> acmd ; <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> acmd
; WARNING!!! <EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
proc APP_CMD proc APP_CMD
push ecx edx ebx push ecx edx ebx
@@: @@:
mov bx, word[esi + SDHCI_CONTROLLER.card_reg_rca] mov bx, word[esi + SDHCI_CONTROLLER.card_reg_rca]
shl ebx, 16 shl ebx, 16
mov ecx, 0x00;0x02 ; read mull mov edx, ((55 shl 8) + RESP_TYPE.R1 ) shl 16
mov edx, (55 shl 8) + RESP_TYPE.R1;11000b + 11b
call send_sdhc_command call send_sdhc_command
; <EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD> <EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ; <EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD> <EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
cmp dword[eax + SDHC_RESP1_0], 0x120 ; <EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> embox, <EFBFBD><EFBFBD><EFBFBD> 1 <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> cmp dword[eax + SDHC_RESP1_0], 0x120 ; <EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> embox, <EFBFBD><EFBFBD><EFBFBD> 1 <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
jnz @b ; <EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(<EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <EFBFBD><EFBFBD><EFBFBD> 63(74)) jnz @b ; <EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(<EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <EFBFBD><EFBFBD><EFBFBD> 63(74))
; <EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> APP_CMD <EFBFBD> READY_FOR_DATA ; <EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> APP_CMD <EFBFBD> READY_FOR_DATA
;TODO: <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>!!!
pop ebx edx ecx pop ebx edx ecx
ret ret
endp endp
@@ -232,8 +292,7 @@ endp
proc SD_SEND_OP_COND proc SD_SEND_OP_COND
call APP_CMD call APP_CMD
mov ecx, 0x00;0x02 ; read mull mov edx, ((41 shl 8) + RESP_TYPE.R3 ) shl 16
mov edx, (41 shl 8) + RESP_TYPE.R3
call send_sdhc_command call send_sdhc_command
mov ecx, [eax + SDHC_RESP1_0] mov ecx, [eax + SDHC_RESP1_0]
mov [esi + SDHCI_CONTROLLER.card_reg_ocr], ecx mov [esi + SDHCI_CONTROLLER.card_reg_ocr], ecx
@@ -245,8 +304,15 @@ endp
;cmd16 - ;cmd16 -
;arg = 0-31 - block Length ;arg = 0-31 - block Length
;resp = R1 ;resp = R1
; IN: ebx - 32bit block length
proc SET_BLOCKLEN proc SET_BLOCKLEN
ret DEBUGF 1,"SDHCI: SET_BLOCKLEN 0x%x\n", ebx
mov edx, ((16 shl 8) + RESP_TYPE.R1 ) shl 16
call send_sdhc_command
mov ecx, [eax + SDHC_RESP1_0]
mov [esi + SDHCI_CONTROLLER.card_reg_ocr], ecx
test dword[esi + SDHCI_CONTROLLER.int_status],0x8000
ret
endp endp
; block read ; block read
@@ -279,9 +345,9 @@ proc WRITE_MULTIPLE_BLOCK
endp endp
;cmd27 - Programming of the programmable bits of the CSD ;cmd27 - Programming of the programmable bits of the CSD
;resp = R1 ;resp = R1
proc PROGRAM_CSD ;proc PROGRAM_CSD
ret ; ret
endp ;endp
; SDIO mode ; SDIO mode
; <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD> SD memory: ; <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD> SD memory:
; - CID <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ; - CID <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
@@ -292,9 +358,7 @@ endp
;resp = R4 ;resp = R4
;IN: ebx - argument ;IN: ebx - argument
proc IO_SEND_OP_COND proc IO_SEND_OP_COND
mov edx, ((5 shl 8) + RESP_TYPE.R4 ) shl 16
mov ecx, 0x00;0x02 ; read mull
mov edx, (5 shl 8) + RESP_TYPE.R4;00000b + 10b ;TODO
call send_sdhc_command call send_sdhc_command
mov ecx, [eax + SDHC_RESP1_0] mov ecx, [eax + SDHC_RESP1_0]

180
sdhc_disk.inc
View File

@@ -1,7 +1,87 @@
; Functions for this driver ; Functions for this driver
proc add_card_disk ;<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> push/pop <EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD>:
;proc GET_SDSC_SIZE uses ecx edx
;proc GET_SDSC_SIZE uses ecx edx, _param1, _param2
proc GET_SDSC_SIZE
; memory capacity = BLOCKNR * BLOCK_LEN ; shl BSF block_len
; BLOCKNR = (C_SIZE + 1) * MULT ; shl ecx, BSF (C_SIZE_MULT + 2)
; MULT = 2^(C_SIZE_MULT + 2)
; BLOCK_LEN = 2^LEN_BL_READ
push ecx edx
mov ecx, dword[esi + SDHCI_CONTROLLER.card_reg_csd + 4] ; C_SIZE_MULT
shr ecx, 7; 39 - 32 = 7
and ecx, 111b
add ecx, 2
mov edx, dword[esi + SDHCI_CONTROLLER.card_reg_csd + 6] ; C_SIZE 48/8
shr edx, 6 ; 48 + 6
and edx, 0xFFF ; data in 12 low bits
inc edx
shl edx, cl
movzx ecx, byte[esi + SDHCI_CONTROLLER.card_reg_csd + 9] ; LEN_BL_READ 72/8
and ecx, 0x0f
shl edx, cl
; get sectors = edx / 512 <- sectorsize for kernel
shr edx, BSF 512
mov dword[esi + SDHCI_CONTROLLER.sector_count], edx
mov dword[esi + SDHCI_CONTROLLER.sector_count + 4], 0
pop edx ecx
ret
endp
proc GET_SDHC_SIZE
; 22 bit [40:61]
; ((C_SIZE + 1) * 512Kbyte ) / sectorsize
push ebx
mov ebx, dword[esi + SDHCI_CONTROLLER.card_reg_csd + 5]
and ebx, not 0xFFC00000 ; <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
mov dword[esi + SDHCI_CONTROLLER.sector_count + 4], 0
inc edx ; C_SIZE + 1
shl ebx, 10 ; *512Kbyte / sectorsize(512)
mov dword[esi + SDHCI_CONTROLLER.sector_count], ebx
;bt dword[esi + SDHCI_CONTROLLER.card_reg_csd + 4], 29 ; read 22 bit C_SIZE
adc dword[esi + SDHCI_CONTROLLER.sector_count + 4], 0
pop ebx
ret
endp
proc GET_SDUC_SIZE
; 28 bit [40:67] 40bit=5*8bit
; ((C_SIZE + 1) * 512Kbyte ) / sectorsize
push ebx
mov ebx, dword[esi + SDHCI_CONTROLLER.card_reg_csd + 5]
and ebx, not 0xC0000000 ; <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
inc edx
mov dword[esi + SDHCI_CONTROLLER.sector_count], ebx
shr ebx, 31-10 ; get hign LBA addr
mov dword[esi + SDHCI_CONTROLLER.card_reg_csd + 4], ebx
shl dword[esi + SDHCI_CONTROLLER.sector_count], 10
pop ebx
ret
endp
proc GET_MMC_SIZE
; <EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <EFBFBD> <EFBFBD>*<EFBFBD><EFBFBD>
ret
endp
proc add_card_disk stdcall, hd_name:dword
invoke DiskAdd, sdhci_callbacks, [hd_name], esi, 0
test eax, eax
jz .disk_add_fail
invoke DiskMediaChanged, eax, 1 ; system will scan for partitions on disk
ret
.disk_add_fail:
DEBUGF 1, "Failed to add disk\n"
ret ret
endp endp
proc del_card_disk proc del_card_disk
@@ -10,46 +90,110 @@ proc del_card_disk
endp endp
; Functions for kernel ; Functions for kernel
; <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:
; <EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> SD <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,
; SDIO <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(<EFBFBD> <EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>) <EFBFBD> MMC(eMMC) <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>.
; <EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
; <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD> <EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(17,18,24,25), <EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
; <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>.
; <EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,
; <EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> SDMA <EFBFBD><EFBFBD><EFBFBD> ADMA2 <EFBFBD><EFBFBD><EFBFBD>, <EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD>, <EFBFBD><EFBFBD>
; <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
proc sdhci_read stdcall pdata: dword, buffer: dword, startsector: qword, numsectors_ptr:dword proc sdhci_read stdcall pdata: dword, buffer: dword, startsector: qword, numsectors_ptr:dword
mov esi, [pdata] mov esi, [pdata]
mov eax, [esi + SDHCI_CONTROLLER.base_reg_map] mov eax, [esi + SDHCI_CONTROLLER.base_reg_map]
cmp dword[numsectors_ptr], 1
ja .multiple
; get phys addr
mov eax, [buffer]
invoke GetPhysAddr
; send CMD 17
ret
.multiple:
; get phys addr table
; send CMD 18
; send CMD 12
ret ret
endp endp
proc sdhci_write stdcall pdata: dword, buffer: dword, startsector: qword, numsectors_ptr:dword proc sdhci_write stdcall pdata: dword, buffer: dword, startsector: qword, numsectors_ptr:dword
mov esi, [pdata] mov esi, [pdata]
mov eax, [esi + SDHCI_CONTROLLER.base_reg_map] mov eax, [esi + SDHCI_CONTROLLER.base_reg_map]
;call [write_functions + ] cmp dword[numsectors_ptr], 1
ja .multiple
; get phys addr
mov eax, [buffer]
invoke GetPhysAddr
; send CMD 24
ret
.multiple:
; get phys addr table
; send CMD 25
; send CMD 12
ret ret
endp endp
; <EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD> DMA <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD> struct DISKMEDIAINFO
read_functions: Flags dd ?
dd 0 ; no dma SectorSize dd ?
dd 0 ; sdma Capacity dq ?
dd 0 ; adma1 ends
dd adma2_read_sectors ; adma2
write_functions:
dd 0 ; no dma
dd 0 ; sdma
dd 0 ; adma1
dd adma2_write_sectors ; adma2
proc sdhci_querymedia stdcall, pdata, mediainfo
push ecx edx
mov eax, [mediainfo]
mov edx, [pdata]
mov [eax + DISKMEDIAINFO.Flags], 0
mov [eax + DISKMEDIAINFO.SectorSize], 512
mov ecx, dword[edx + SDHCI_CONTROLLER.sector_count]
mov dword [eax + DISKMEDIAINFO.Capacity], ecx
mov ecx, dword[edx + SDHCI_CONTROLLER.sector_count + 4]
mov dword [eax + DISKMEDIAINFO.Capacity + 4], ecx
pop edx ecx
xor eax, eax
ret
endp
; UPD: <EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD> <EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
; <EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> int_status
; <EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD> DMA <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
;read_functions:
; dd 0 ; no dma
; dd 0 ; sdma
; dd 0 ; adma1
; dd 0 ;adma2_read_sectors ; adma2
;write_functions:
; dd 0 ; no dma
; dd 0 ; sdma
; dd 0 ; adma1
; dd 0 ;adma2_write_sectors ; adma2
;
align 4 align 4
sdhci_callbacks: sdhci_callbacks:
dd sdhci_callbacks.end - sdhci_callbacks dd sdhci_callbacks.end - sdhci_callbacks
dd 0 ; no close function dd 0 ; no close function
dd 0 ; no closemedia function dd 0 ; no closemedia function
dd 0;ahci_querymedia dd sdhci_querymedia ; +
dd sdhci_read dd sdhci_read ; -
dd sdhci_write dd sdhci_write ; -
dd 0 ; no flush function dd 0 ; no flush function
dd 0 ; use default cache size dd 0 ; use default cache size
.end: .end:
sdcard_disk_name: db 'sdcard00',0 sdcard_disk_name: db 'sdcard00',0
mmccard_disk_name: db 'MMCcard00',0 mmccard_disk_name: db 'MMC00',0

274
sdhci.asm
View File

@@ -15,10 +15,6 @@ use32
; Driver for SD host controller ; ; Driver for SD host controller ;
; ; ; ;
;;; ;;; ;;; ;;;
; <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> sd <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD>-<2D><>
; <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>
; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
DEBUG = 1 DEBUG = 1
__DEBUG__ = 1 __DEBUG__ = 1
__DEBUG_LEVEL__ = 1 ; 1 = verbose, 2 = errors only __DEBUG_LEVEL__ = 1 ; 1 = verbose, 2 = errors only
@@ -56,7 +52,7 @@ use32
;===== ;=====
; <20><><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <20><><EFBFBD><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>-<2D><> <20><><EFBFBD><EFBFBD> ; <20><><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <20><><EFBFBD><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>-<2D><> <20><><EFBFBD><EFBFBD>
; <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> sdma ; <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> sdma
SDHC_SYS_ADDR = 0x00 ;32bit block Count(SDMA System Address) SDHC_SYS_ADDR = 0x00 ;32bit SDMA System Address
;<3B> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 3 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>. ;<3B> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 3 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>.
;0-11 Transfer Block Size ;0-11 Transfer Block Size
; <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> CMD17, CMD18, CMD24, CMD25, CMD35. ; <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> CMD17, CMD18, CMD24, CMD25, CMD35.
@@ -87,8 +83,6 @@ SDHX_BLK_CS = 0x04
_16bit_block_count_register = 0x06 ;word _16bit_block_count_register = 0x06 ;word
; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> SD <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> SD <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
SDHC_CMD_ARG = 0x08 ; dword SDHC_CMD_ARG = 0x08 ; dword
ARGUMENT0 = 0x08 ; word
ARGUMENT1 = 0x0A ; word
; Transfer Mode Register ; Transfer Mode Register
; <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>.<2E><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ; <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>.<2E><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
; <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> Data Pressent Select <20> Command <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>), <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> ; <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> Data Pressent Select <20> Command <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>), <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
@@ -522,7 +516,6 @@ SDHC_ADMA_ERR = 0x54
ADMA_error_status = 0x54 ; byte (using 0-2 bits) ADMA_error_status = 0x54 ; byte (using 0-2 bits)
SDHC_ADMA_SAD = 0x58 SDHC_ADMA_SAD = 0x58
ADMA_system_addres_register = 0x58 ;qword
;0x60-0x6f - Preset Value ;spec version 3 ;0x60-0x6f - Preset Value ;spec version 3
@@ -600,6 +593,8 @@ struct SDHCI_CONTROLLER
card_reg_scr rd 2 ; 64 bits card_reg_scr rd 2 ; 64 bits
card_reg_ssr rd 16 ; 512bit card_reg_ssr rd 16 ; 512bit
sector_count rq 1 ; count rw sectors on SD\SDIO\MMC card
program_id rd 1 ; tid thread for working with no memory cards program_id rd 1 ; tid thread for working with no memory cards
flag_command_copmlate rd 1 ; flag interrapt command complate 00 - interrapt is geting flag_command_copmlate rd 1 ; flag interrapt command complate 00 - interrapt is geting
@@ -608,6 +603,7 @@ struct SDHCI_CONTROLLER
rd 4 ; reserved rd 4 ; reserved
status_control rd 1 ; flags status controller(0x01 - get irq AND int_status good) status_control rd 1 ; flags status controller(0x01 - get irq AND int_status good)
; status for write\read disk, global flags ; status for write\read disk, global flags
ends ends
struct SDHCI_SLOT struct SDHCI_SLOT
@@ -867,11 +863,6 @@ proc sdhci_init
DEBUGF 1,'400KHz : %u\n', edi DEBUGF 1,'400KHz : %u\n', edi
pop eax pop eax
; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> TODO: <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> DMA
;mov eax, [esi + SDHCI_CONTROLLER.base_reg_map]
or dword[eax + SDHC_INT_MASK], 0x40 or 0x80
or word[eax + SDHC_SOG_MASK], 0x40 or 0x80
DEBUGF 1,'SDHCI: Set maximum int mask and mask signal\n'
; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> Host Control Register ; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> Host Control Register
; <20><> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ; <20><> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
@@ -879,25 +870,23 @@ proc sdhci_init
;<3B><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> host control 2 ;<3B><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> host control 2
;set 0x2e ;set 0x2e
;test
mov dword[eax + SDHC_INT_STATUS], 0x00 mov dword[eax + SDHC_INT_STATUS], 0x00
; set Wekeup_control ; set Wekeup_control
or byte[Wekeup_control], 111b or byte[Wekeup_control], 111b
; save and attach IRQ ; save and attach IRQ
invoke PciRead8, dword [esi + SDHCI_CONTROLLER.bus], dword [esi + SDHCI_CONTROLLER.dev], PCI_IRQ_LINE ;al=irq invoke PciRead8, dword [esi + SDHCI_CONTROLLER.bus], dword [esi + SDHCI_CONTROLLER.dev], PCI_IRQ_LINE ;al=irq
;DEBUGF 1,'Attaching to IRQ %x\n',al
movzx eax, al movzx eax, al
;invoke PciWrite16, [esi + SDHCI_CONTROLLER.bus], [esi + SDHCI_CONTROLLER.dev], dword 0x82, 0x0000
; disable smi ;SD_PCI_MSI_CTRL- RW - 16bits - [SD_PCI_CFG: 82h]
;attach interrupt
mov [esi + SDHCI_CONTROLLER.irq_line], eax ;save irq line mov [esi + SDHCI_CONTROLLER.irq_line], eax ;save irq line
invoke AttachIntHandler, eax, sdhc_irq, esi ;esi = pointre to controller invoke AttachIntHandler, eax, sdhc_irq, esi ;esi = pointre to controller struct
mov eax, [esi + SDHCI_CONTROLLER.base_reg_map]
or dword[eax + SDHC_INT_MASK], 0x40 or 0x80
or word[eax + SDHC_SOG_MASK], 0x40 or 0x80
DEBUGF 1,'SDHCI: Enable insert and remove interrupt\n'
; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> ; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
mov eax, [esi + SDHCI_CONTROLLER.base_reg_map] ;mov eax, [esi + SDHCI_CONTROLLER.base_reg_map]
test dword[eax + SDHC_PRSNT_STATE], 0x10000 ; check 16 bit in SDHC_PRSNT_STATE.CARD_INS test dword[eax + SDHC_PRSNT_STATE], 0x10000 ; check 16 bit in SDHC_PRSNT_STATE.CARD_INS
jz @f jz @f
call card_detect ; eax - REGISTER MAP esi - SDHCI_CONTROLLER call card_detect ; eax - REGISTER MAP esi - SDHCI_CONTROLLER
@@ -983,23 +972,15 @@ proc card_init
call IO_SEND_OP_COND; 0 - test voltage mask to check SDIO interface, ZF=1-sdio call IO_SEND_OP_COND; 0 - test voltage mask to check SDIO interface, ZF=1-sdio
jz .sdio jz .sdio
; acmd41 voltage window = 0 ;DEBUGF 1,"SDHCI: CMD8 - check SDHC card\n"
DEBUGF 1,"SDHCI: ACMD41 - get OCR\n"
call SD_SEND_OP_COND
jnz .mmc ; if error command
; cmd8 - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
DEBUGF 1,"SDHCI: CMD8 - check SDHC card\n"
call SEND_IF_COUND call SEND_IF_COUND
mov ebx, 0 ; no set EFLAGS ;DEBUGF 1,"SDHCI: ACMD41 - get OCR\n"
;if card supported 2 spec, acmd41 + set hsp=1 mov [esi + SDHCI_CONTROLLER.card_reg_ocr], 1 shl 30 ; set HSP
jnz @f
mov ebx, 1 shl 30 ; set HSP
@@:
call get_ocr_mask
jz .err
.set_acmd41: .set_acmd41:
; TODO: <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> 10<31><30>, <20><><EFBFBD> <20> embox
call get_ocr_mask
; acmd41 - <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ; acmd41 - <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> OCR, <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
call SD_SEND_OP_COND call SD_SEND_OP_COND
jnz .mmc jnz .mmc
test dword[eax + SDHC_RESP1_0], 0x80000000 ; check 31 bit test dword[eax + SDHC_RESP1_0], 0x80000000 ; check 31 bit
@@ -1009,10 +990,58 @@ proc card_init
; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> irq <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> irq <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
; for all init card : cmd3 - get RCA ; for all init card : cmd3 - get RCA
call SEND_RCA call SEND_RCA
; get CSD register
;TODO: get CSD register
call SEND_CSD call SEND_CSD
; send CMD7
call SELECT_CARD
test [esi + SDHCI_CONTROLLER.card_reg_ocr], 0x40000000
jnz @f
;send CMD 16
mov ebx, 0x200 ; 512 byte
call SET_BLOCKLEN
@@:
; get size device
test dword[esi + SDHCI_CONTROLLER.card_reg_csd + 12], 0x400000 ;check version SCD ver2
jz @f
call GET_SDHC_SIZE
jmp .end_get_size
@@:
test dword[esi + SDHCI_CONTROLLER.card_reg_csd + 12], 0x800000 ;check version SCD ver3
jz @f
call GET_SDUC_SIZE
jmp .end_get_size
@@:
test dword[esi + SDHCI_CONTROLLER.card_reg_csd + 12], 0xC00000 ;check version SCD ver3
jnz .err ; no get size device
call GET_SDSC_SIZE
.end_get_size:
DEBUGF 1,"SDHCI: Sectors card = %d:%d\n",[esi + SDHCI_CONTROLLER.sector_count + 4],\
[esi + SDHCI_CONTROLLER.sector_count]
DEBUGF 1,"SDHCI: TEST1 SDMA - read first sector\n"
call TEST_SDMA_R
DEBUGF 1,"SDHCI: TEST2 SDMA - read first sector\n"
call TEST_SDMA_R_MUL
; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>. <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
; set 4bit mode else card and controler suppoted it mode.
; set bus speed mode
; set new clock. <20><> 50 <20><><EFBFBD>
;TODO: get SCR register ;TODO: get SCR register
mov ebx, 2 mov ebx, 2
ret ret
.sdio: .sdio:
@@ -1028,10 +1057,6 @@ proc card_init
call SEND_RCA call SEND_RCA
;TODO: get CSD register
call SEND_CSD
;TODO: get SCR register
mov ebx, 1 mov ebx, 1
ret ret
@@ -1050,31 +1075,23 @@ endp
proc thread_card_detect proc thread_card_detect
;get event with data ;get event with data
invoke Kmalloc, 6*4 ; 6*Dword sub esp, 6*4 ; 6*Dword
test eax, eax mov edi, esp
jz .no_malloc
mov edi, eax
push edi
invoke GetEvent invoke GetEvent
pop edi mov edi, esp
;DEBUGF 1,'SDHCI: Get event code=%x [edi + 4]=%x, [edi + 8]=%x\n', [edi], [edi + 4], [edi + 8] ;DEBUGF 1,'SDHCI: Get event code=%x [edi + 4]=%x, [edi + 8]=%x\n', [edi], [edi + 4], [edi + 8]
push dword[edi + 4] ; reg map mov eax, dword[edi + 4] ; reg map
push dword[edi + 8] ;controller struct mov esi, dword[edi + 8] ;controller struct
mov eax, edi
invoke Kfree
pop esi
pop eax
call card_detect call card_detect
.no_malloc:
; destryct thread ; destryct thread
mov eax, -1 mov eax, -1
int 0x40 int 0x40
endp endp
proc card_detect proc card_detect
;DEBUGF 1,'SDHCI: eax=%x esi=%x\n', eax, esi
DEBUGF 1,'SDHCI: Card inserted\n' DEBUGF 1,'SDHCI: Card inserted\n'
call card_init ; TODO: get CSD and SRC registers + get SSR register call card_init ; TODO: get SRC registers + get SSR register
mov [esi + SDHCI_CONTROLLER.type_card], ebx mov [esi + SDHCI_CONTROLLER.type_card], ebx
test ebx, ebx test ebx, ebx
jz .unknowe jz .unknowe
@@ -1083,7 +1100,10 @@ proc card_detect
; <20><><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(SD memory, eMMC, SPI), <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>, else set flag SDIO device ; <20><><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(SD memory, eMMC, SPI), <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>, else set flag SDIO device
; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
.memory_card: .memory_card:
call add_card_disk
;call add_card_disk
DEBUGF 1,'SDHCI: Card init - Memory card\n' DEBUGF 1,'SDHCI: Card init - Memory card\n'
ret ret
.SDIO: .SDIO:
@@ -1101,7 +1121,7 @@ proc card_detect
ret ret
endp endp
proc card_destryct proc card_destruct
DEBUGF 1,'SDHCI: Card removed\n' DEBUGF 1,'SDHCI: Card removed\n'
; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD> ; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD>
test ebx, 110b test ebx, 110b
@@ -1158,19 +1178,23 @@ proc sdhc_irq
;DEBUGF 1,"SDHCI: Evend sended, eax=%x uid=%x \n", eax, ebx ;DEBUGF 1,"SDHCI: Evend sended, eax=%x uid=%x \n", eax, ebx
pop eax pop eax
pop esi pop esi
jmp .exit
.no_card_inserted: .no_card_inserted:
test dword[eax + SDHC_INT_STATUS], 0x80 test dword[eax + SDHC_INT_STATUS], 0x80
jz .no_card_removed jz .no_card_removed
or dword[eax + SDHC_INT_STATUS], 0x80 or dword[eax + SDHC_INT_STATUS], 0x80
call card_destryct call card_destruct
jmp .exit
.no_card_removed: .no_card_removed:
mov ecx, [eax + SDHC_INT_STATUS] mov ecx, [eax + SDHC_INT_STATUS]
mov dword[esi + SDHCI_CONTROLLER.int_status], ecx mov dword[esi + SDHCI_CONTROLLER.int_status], ecx
mov [eax + SDHC_INT_STATUS], ecx ; <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> mov [eax + SDHC_INT_STATUS], ecx ; <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
.exit:
popa popa
xor eax, eax xor eax, eax
ret ret
@@ -1206,22 +1230,138 @@ proc get_ocr_mask
ret ret
endp endp
proc TEST_SDMA_R
or dword[eax + SDHC_INT_MASK], 0xFFFFFFFF
or dword[eax + SDHC_SOG_MASK], 0xFFFFFFFF
and dword[eax + SDHC_CTRL1], not 11000b ; set SDMA mode
mov byte[eax + 0x2E], 1110b ; set max
mov ebp, eax
invoke KernelAlloc, 4096
push eax
invoke GetPhysAddr ; arg = eax
xchg eax, ebp
mov dword[eax], ebp;phys addr
mov dword[eax + 4], SD_BLOCK_SIZE
;(block_count shl) 16 + (sdma_buffer_boundary shl 12) + block_size
mov dword[eax + 8], 0 ; arg - num sector
mov dword[eax + 0xC], (((17 shl 8) + DATA_PRSNT + RESP_TYPE.R1 ) shl 16) + 010001b
@@:
cmp dword[esi + SDHCI_CONTROLLER.int_status], 0
hlt
jz @b
DEBUGF 1,"SDHCI: resp1=%x resp2=%x \n", [eax + SDHC_RESP1_0], [eax + SDHC_RESP3_2]
.wait_int:
mov dword[esi + SDHCI_CONTROLLER.int_status], 0
hlt
cmp dword[esi + SDHCI_CONTROLLER.int_status], 0
jz .wait_int
DEBUGF 1,"SDHCI: resp1=%x resp2=%x \n", [eax + SDHC_RESP1_0], [eax + SDHC_RESP3_2]
pop ebp
test dword[eax + SDHC_RESP1_0], 0x8000
jnz @f
push eax
mov dword[.ptr], ebp
mov ebx, .file_struct
invoke FS_Service
pop eax
@@:
ret
.file_struct:
dd 2
dd 0
dd 0
dd 512
.ptr: dd 0
db '/tmp0/1/dump_first_sector',0
endp
; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> SDMA: <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> DMA <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
; <20> <20><><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> 4<><34>
proc TEST_SDMA_R_MUL
or dword[eax + SDHC_INT_MASK], 0xFFFFFFFF
or dword[eax + SDHC_SOG_MASK], 0xFFFFFFFF
and dword[eax + SDHC_CTRL1], not 11000b ; set SDMA mode
mov byte[eax + 0x2E], 1110b ; set max
mov ebp, eax
invoke KernelAlloc, 4096*0x800;128;4096*512
push eax
push eax
invoke GetPhysAddr ; arg = eax
xchg eax, ebp
mov dword[eax], ebp;phys addr
mov dword[eax + 4], ((8*0x800) shl 16) + SD_BLOCK_SIZE
;(block_count shl) 16 + (sdma_buffer_boundary shl 12) + block_size
mov dword[eax + 8], 0;0x2000 ; arg - num sector
mov dword[eax + 0xC], (((18 shl 8) + DATA_PRSNT + RESP_TYPE.R1 ) shl 16) + CMD_TYPE.Multiple + 10101b
@@:
cmp dword[esi + SDHCI_CONTROLLER.int_status], 0
hlt
jz @b
DEBUGF 1,"SDHCI: resp1=%x resp2=%x \n", [eax + SDHC_RESP1_0], [eax + SDHC_RESP3_2]
.wait_int:
mov dword[esi + SDHCI_CONTROLLER.int_status], 0
hlt
cmp dword[esi + SDHCI_CONTROLLER.int_status], 0
jz .wait_int
test dword[esi + SDHCI_CONTROLLER.int_status], 10b
jnz @f
test dword[esi + SDHCI_CONTROLLER.int_status], 1000b
jz @f
xchg eax, ebp
mov eax, dword[esp]
add eax, 4096
mov dword[esp], eax
invoke GetPhysAddr
xchg eax, ebp
mov dword[eax], ebp;phys addr
jmp .wait_int
;DEBUGF 1,"SDHCI: resp1=%x resp2=%x \n", [eax + SDHC_RESP1_0], [eax + SDHC_RESP3_2]
@@:
pop ebp
pop ebp
test dword[eax + SDHC_RESP1_0], 0x8000
jnz @f
push eax
mov dword[.ptr], ebp
mov ebx, .file_struct
invoke FS_Service
pop eax
@@:
ret
.file_struct:
dd 2
dd 0
dd 0
dd 4096*0x800;128
.ptr: dd 0
db '/tmp0/1/dump_first_sector_mul',0
endp
; This function for working drivers and programs worked ; This function for working drivers and programs worked
; with SDIO interface. ; with SDIO interface.
proc service_proc stdcall, ioctl:dword proc service_proc stdcall, ioctl:dword
; 0 - get version
; 1 - get card count
; 2 - get card (hand + info(CID, CSD, RCA, OCR))
; 3 - set card width
; 4 - set card clock
; 5 - set DMA mode
; 6 - set card irq hand (for SDIO)
; 7 - look access card
; 8 - unlook access card
; 9 - call card func (for SDIO)
; 10 - capturing control controller
ret ret
endp endp
drv_name: db 'SDHCI',0 drv_name: db 'SDHCI',0
;base_reg_map: dd 0;pointer on base registers comntroller
;SDMA_sys_addr: dq 0; [base_sdhc_reg]+offset(0x00 or 0x58-0x5f) 32 or 64 bit
;pt_call_command: dd 0; noDMA or DMA function
align 4 align 4
data fixups data fixups
end data end data

BIN
sdhci.sys
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Binary file not shown.

50
sdhci_adma.inc
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@@ -2,24 +2,60 @@
;; SDHC ADMA function ;; SDHC ADMA function
; for ADMA2
proc creat_descripton_table proc create_adma2_table
ret ret
endp endp
proc destryct_description_table proc destruct_adma2_table
ret ret
endp endp
; for ADMA1
proc adma2_read_sectors proc create_adma1_table
ret ret
endp endp
proc adma2_write_sectors proc destruct_adma1_table
ret ret
endp endp
; for SDMA mode and for creating ADMA tables
; ecx = line address
; edx = length
; OUT: ecx = virtual addr on table phys addrs on blocks in 512 byte
; WARNING!!! buffer align 9
; 4096 = 0..4 sectors + 1022*4 sectors + 0..4 sectors
proc create_mem_table
ret
endp
proc destruct_mem_table
ret
endp
; SDMA
; send command
; wait command_complate
;@@:
; wait DMA int or Transfer compalte
; if Transfer complate goto .end
; set new addr ; <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
; goto @f
;.end:
; ADMA
; creat descrption table
; send command
; wait command_complate
; wait transfer complate or ADMA_Error
; destruct description table
; no DMA