Doczom/SDHCI_driver_for_Kolibrios
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Add save divider Base Clock

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Add save divider Base Clock
This commit is contained in:
Doczom
2022-05-22 18:02:44 +05:00
committed by GitHub
parent 49f7cdf2b2
commit c02710fd74
1 changed files with 98 additions and 46 deletions
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sdhci.asm
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@@ -114,7 +114,9 @@ SDHC_BUFFER = 0x20
; 3-7 - Resevred ; 3-7 - Resevred
; 8 - Write Transfer Active ; 8 - Write Transfer Active
; 9 - Read Transfer Active ; 9 - Read Transfer Active
; <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><> DMA <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>.
; 10 - Buffer Write Enable ; 10 - Buffer Write Enable
; <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><> DMA <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>.
; 11 - Buffer Read Enable ; 11 - Buffer Read Enable
; 12-15 - Reserved ; 12-15 - Reserved
; <20><><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD> <20> <20><><EFBFBD><EFBFBD>. <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ; <20><><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD> <20> <20><><EFBFBD><EFBFBD>. <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
@@ -122,13 +124,28 @@ SDHC_BUFFER = 0x20
; 16 - Card Inserted ; 16 - Card Inserted
; 17 - Card State Stable ; 17 - Card State Stable
; 18 - Card Detect Pin Level ; 18 - Card Detect Pin Level
; <20><><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> SDWP#. <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
; 19 - Write Protect Switch Pin Level ; <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>.
; 19 - Write Protect Switch Pin Level (1 - Write enable SDWP#=1, 0 - Write protected SDWP#=0)
;
; 20-23 - DAT[0:3] Line Signal Level ; 20-23 - DAT[0:3] Line Signal Level
; <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> CMD <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>.
; 24 - CMD Line Signal Level ; 24 - CMD Line Signal Level
; 25-31 - Reserved ; 25-31 - Reserved
SDHC_PRSNT_STATE = 0x24 ;word (12-15 , 26 Rsvd) SDHC_PRSNT_STATE = 0x24 ;word (12-15 , 26 Rsvd)
.CMD_INHIB_CMD = 0x01 ; for test [eax + SDHC_PRSNT_STATE], SDHC_PRSNT_STATE.CMD_INHIB_CMD
.CMD_INHIB_DAT = 0x02
.DAT_LINE_ACTIVE = 0x04
.WR_TX_ACTIVE = 0x100
.RD_TX_ACTIVE = 0x200
.BUF_WR_EN = 0x400
.BUF_RD_EN = 0x800
.CARD_INS = 0x10000
.CARD_STABLE = 0x20000
.CD_LEVEL = 0x40000
.WP_LEVEL = 0x80000
.DAT_LEVEL = 0xf00000 ; 4 bits
.CMD_LEVEL = 0x1000000
; Host control Register (offset 0x28) ; Host control Register (offset 0x28)
; 0 - LED Control (0 - LED off; 1 - LED on) ; 0 - LED Control (0 - LED off; 1 - LED on)
; <20><><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><> ; <20><><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><>
@@ -319,6 +336,8 @@ SDHC_INT_STATUS = 0x30
.dma_interrupt = 0x08 .dma_interrupt = 0x08
.buffer_write_ready = 0x10 .buffer_write_ready = 0x10
.buffer_read_ready = 0x20 .buffer_read_ready = 0x20
; <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>, <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0x24 .
;<3B><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(<28><><EFBFBD><EFBFBD><EFBFBD> or <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>).
.card_insertion = 0x40 .card_insertion = 0x40
.card_removal = 0x80 .card_removal = 0x80
.card_interrupt = 0x0100 .card_interrupt = 0x0100
@@ -601,6 +620,13 @@ proc START c, state:dword, cmdline:dword
mov eax, 0 mov eax, 0
ret ret
.stop_drv: .stop_drv:
; deattach irq
; stop power devise
; free struct
; free reg_map
; free memory for DMA
DEBUGF 1,"SDHCI: Stop working driver\n" DEBUGF 1,"SDHCI: Stop working driver\n"
mov eax, 0 mov eax, 0
ret ret
@@ -685,7 +711,7 @@ proc sdhci_init
mov [esi + SDHCI_CONTROLLER.ver_spec], cl mov [esi + SDHCI_CONTROLLER.ver_spec], cl
DEBUGF 1,"Version specification: %x \n",[esi + SDHCI_CONTROLLER.ver_spec] DEBUGF 1,"Version specification: %x \n",[esi + SDHCI_CONTROLLER.ver_spec]
DEBUGF 1,"SLOT_INTRPT: %x \n", [eax + SLOT_INTRPT]
;reset controller (all) ;reset controller (all)
@@ -710,62 +736,70 @@ proc sdhci_init
DEBUGF 1,"SDHCI:Max current capabilities %x %x\n",[esi + SDHCI_CONTROLLER.max_slot_amper + 4],[esi + SDHCI_CONTROLLER.max_slot_amper] DEBUGF 1,"SDHCI:Max current capabilities %x %x\n",[esi + SDHCI_CONTROLLER.max_slot_amper + 4],[esi + SDHCI_CONTROLLER.max_slot_amper]
; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
;push eax push eax
;mov ebx, [esi + SDHCI_CPNTROLLER.Capabilities] mov eax, [esi + SDHCI_CONTROLLER.Capabilities]
;shr ebx, 8 shr eax, 8
;and ebx, 111111b ; 11 1111 and eax, 111111b ; 11 1111
;mov eax, ebx mov ebx, 25
;div dword 25 ; 25 <20><><EFBFBD> xor edx, edx
;bsr eax div ebx ; 25 <20><><EFBFBD>
;xor edx, edx bsr ecx, eax
;inc edx xor edx, edx
;shl edx, eax bsf edx, eax
;mov dword[esi + SDHCI_CONTROLLER.divider25MHz], edx cmp ecx, edx
;shr edx, 1 jnz @f
;mov dword[esi + SDHCI_CONTROLLER.divider50MHz], edx dec ecx
;mov eax, ebx @@:
;imul eax, 1000 xor edi, edi
;div 400 bts edi, ecx
;div 1000 mov dword[esi + SDHCI_CONTROLLER.divider25MHz], edi
DEBUGF 1,'25MHz : %u\n', edi
shr edi, 1 ; +- <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
mov dword[esi + SDHCI_CONTROLLER.divider50MHz], edi
DEBUGF 1,'50MHz : %u\n', edi
imul eax, 63 ; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
;pop eax bsr ecx, eax
xor edx, edx
bsf edx, eax
cmp ecx, edx
jnz @f
dec ecx
@@:
xor edi, edi
bts edi, ecx
mov dword[esi + SDHCI_CONTROLLER.divider400KHz], edi
DEBUGF 1,'400KHz : %u\n', edi
pop eax
; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
;mov eax, [esi + SDHCI_CONTROLLER.base_reg_map]
or dword[eax + SDHC_INT_MASK], -1
or word[eax + SDHC_SOG_MASK], -1
DEBUGF 1,'SDHCI: Set maximum int mask and mask signal\n'
; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> Host Control Register ; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> Host Control Register
; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> ; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
test byte[eax + SDHC_PRSNT_STATE + 2],0x01 ; check 16 bit in SDHC_PRSNT_STATE test dword[eax + SDHC_PRSNT_STATE], 0x10000 ; check 16 bit in SDHC_PRSNT_STATE.CARD_INS
jz @f jz @f
DEBUGF 1,'Card inserted\n'
call card_init ; eax - REGISTER MAP esi - SDHCI_CONTROLLER call card_init ; eax - REGISTER MAP esi - SDHCI_CONTROLLER
@@: @@:
jnz @f
DEBUGF 1,'Card removed\n'
@@:
; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
; <20><> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ; <20><> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
;<3B><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0<>0-0<>4f ;<3B><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0<>0-0<>4f
;<3B><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> host control 2 ;<3B><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> host control 2
;set 0x2e ;set 0x2e
;attach interrupt
; set Wekeup_control ; set Wekeup_control
;or byte[Wekeup_control], 111b ;or byte[Wekeup_control], 111b
; set irq mask
mov eax, [esi + SDHCI_CONTROLLER.base_reg_map]
or dword[eax + SDHC_INT_MASK], -1
or word[eax + SDHC_SOG_MASK], -1
DEBUGF 1,'Set test int mask: insert and remove card \n'
; save and attach IRQ ; save and attach IRQ
invoke PciRead8, dword [esi + SDHCI_CONTROLLER.bus], dword [esi + SDHCI_CONTROLLER.dev], PCI_IRQ_LINE ;al=irq invoke PciRead8, dword [esi + SDHCI_CONTROLLER.bus], dword [esi + SDHCI_CONTROLLER.dev], PCI_IRQ_LINE ;al=irq
DEBUGF 1,'Attaching to IRQ %x\n',al ;DEBUGF 1,'Attaching to IRQ %x\n',al
movzx eax, al movzx eax, al
;attach interrupt
mov [esi + SDHCI_CONTROLLER.irq_line], eax ;save irq line mov [esi + SDHCI_CONTROLLER.irq_line], eax ;save irq line
invoke AttachIntHandler, eax, sdhc_irq, esi ;esi = pointre to controller invoke AttachIntHandler, eax, sdhc_irq, esi ;esi = pointre to controller
; set irq mask
mov eax, [esi + SDHCI_CONTROLLER.base_reg_map]
or dword[eax + SDHC_INT_MASK], -1
xor eax, eax xor eax, eax
ret ret
.fail: .fail:
@@ -775,6 +809,20 @@ proc sdhci_init
endp endp
proc card_init proc card_init
DEBUGF 1,'SDHCI: Card inserted\n'
; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
;<3B><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
; <20><><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>
; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
ret
endp
proc card_destryct
DEBUGF 1,'SDHCI: Card removed\n'
; <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
;<3B><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
ret ret
endp endp
@@ -786,18 +834,20 @@ proc sdhc_irq
mov eax,[esi + SDHCI_CONTROLLER.base_reg_map] mov eax,[esi + SDHCI_CONTROLLER.base_reg_map]
DEBUGF 1,"SLOT_INTRPT: %x \n", [eax + SLOT_INTRPT] DEBUGF 1,"SLOT_INTRPT: %x \n", [eax + SLOT_INTRPT]
DEBUGF 1,"SLOT_INT_STATUS: %x \n",[eax + SDHC_INT_STATUS] DEBUGF 1,"SLOT_INT_STATUS: %x \n",[eax + SDHC_INT_STATUS]
;DEBUGF 1,"SLOT_SOG_MASK: %x \n",[eax + SDHC_SOG_MASK]
test dword[eax + SDHC_INT_STATUS], 0x40 test dword[eax + SDHC_INT_STATUS], 0x40
jz @f jz .no_card_inserted
or dword[eax + SDHC_INT_STATUS], 0x40 or dword[eax + SDHC_INT_STATUS], 0x40
DEBUGF 1,"SDHCI: Card insered \n"
call card_init call card_init
@@: .no_card_inserted:
test dword[eax + SDHC_INT_STATUS], 0x80 test dword[eax + SDHC_INT_STATUS], 0x80
jz @f jz .no_card_removed
or dword[eax + SDHC_INT_STATUS], 0x80 or dword[eax + SDHC_INT_STATUS], 0x80
DEBUGF 1,"SDHCI: Card removed \n" call card_destryct
@@: .no_card_removed:
DEBUGF 1,"SLOT_SOG_MASK: %x \n",[eax + SDHC_SOG_MASK]
sti sti
ret ret
endp endp
@@ -810,6 +860,8 @@ endp
drv_name: db 'SDHCI',0 drv_name: db 'SDHCI',0
sdcard_disk_name: db 'sdcard00',0
;base_reg_map: dd 0;pointer on base registers comntroller ;base_reg_map: dd 0;pointer on base registers comntroller
;SDMA_sys_addr: dq 0; [base_sdhc_reg]+offset(0x00 or 0x58-0x5f) 32 or 64 bit ;SDMA_sys_addr: dq 0; [base_sdhc_reg]+offset(0x00 or 0x58-0x5f) 32 or 64 bit