2013-05-28 19:34:26 +02:00
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; ;;
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2024-05-30 01:50:06 +02:00
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;; Copyright (C) KolibriOS team 2004-2024. All rights reserved. ;;
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2013-05-28 19:34:26 +02:00
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;; Distributed under terms of the GNU General Public License ;;
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;; ;;
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;; Ethernet driver for KolibriOS ;;
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;; This is an adaptation of MenuetOS driver with minimal changes. ;;
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;; Changes were made by CleverMouse. Original copyright follows. ;;
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;; ;;
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;; This driver is based on the SIS900 driver from ;;
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;; the etherboot 5.0.6 project. The copyright statement is ;;
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;; ;;
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;; GNU GENERAL PUBLIC LICENSE ;;
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;; Version 2, June 1991 ;;
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;; ;;
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;; remaining parts Copyright 2004 Jason Delozier, ;;
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;; cordata51@hotmail.com ;;
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;; ;;
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;; See file COPYING for details ;;
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;; ;;
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;; Updates: ;;
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;; Revision Look up table and SIS635 Mac Address by Jarek Pelczar ;;
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;; ;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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2014-07-18 14:56:56 +02:00
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format PE DLL native
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entry START
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CURRENT_API = 0x0200
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COMPATIBLE_API = 0x0100
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API_VERSION = (COMPATIBLE_API shl 16) + CURRENT_API
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2013-05-28 19:34:26 +02:00
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NUM_RX_DESC = 4 ; Number of RX descriptors
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NUM_TX_DESC = 4 ; Number of TX descriptors
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RX_BUFF_SZ = 1520 ; Buffer size for each Rx buffer
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MAX_DEVICES = 16
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__DEBUG__ = 1
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2014-07-18 14:56:56 +02:00
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__DEBUG_LEVEL__ = 2 ; 1 = verbose, 2 = errors only
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2013-05-28 19:34:26 +02:00
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DSIZE = 0x00000fff
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CRC_SIZE = 4
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RFADDR_shift = 16
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; If you are having problems sending/receiving packet try changing the
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; Max DMA Burst, Possible settings are as follows:
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;
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; 0x00000000 = 512 bytes
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; 0x00100000 = 4 bytes
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; 0x00200000 = 8 bytes
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; 0x00300000 = 16 bytes
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; 0x00400000 = 32 bytes
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; 0x00500000 = 64 bytes
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; 0x00600000 = 128 bytes
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; 0x00700000 = 256 bytes
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RX_DMA = 0x00600000
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TX_DMA = 0x00600000
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;-------------------------------------------------------------------------------------------------
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; Symbolic offsets to registers.
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cr = 0x0 ; Command Register
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cfg = 0x4 ; Configuration Register
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mear = 0x8 ; EEPROM Access Register
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ptscr = 0xc ; PCI Test Control Register
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isr = 0x10 ; Interrupt Status Register
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imr = 0x14 ; Interrupt Mask Register
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ier = 0x18 ; Interrupt Enable Register
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epar = 0x18 ; Enhanced PHY Access Register
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txdp = 0x20 ; Transmit Descriptor Pointer Register
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txcfg = 0x24 ; Transmit Configuration Register
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rxdp = 0x30 ; Receive Descriptor Pointer Register
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rxcfg = 0x34 ; Receive Configuration Register
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flctrl = 0x38 ; Flow Control Register
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rxlen = 0x3c ; Receive Packet Length Register
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rfcr = 0x48 ; Receive Filter Control Register
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rfdr = 0x4C ; Receive Filter Data Register
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pmctrl = 0xB0 ; Power Management Control Register
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pmer = 0xB4 ; Power Management Wake-up Event Register
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; Command Register Bits
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RELOAD = 0x00000400
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ACCESSMODE = 0x00000200
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RESET = 0x00000100
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SWI = 0x00000080
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RxRESET = 0x00000020
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TxRESET = 0x00000010
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RxDIS = 0x00000008
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RxENA = 0x00000004
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TxDIS = 0x00000002
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TxENA = 0x00000001
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; Configuration Register Bits
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DESCRFMT = 0x00000100 ; 7016 specific
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REQALG = 0x00000080
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SB = 0x00000040
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POW = 0x00000020
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EXD = 0x00000010
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PESEL = 0x00000008
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LPM = 0x00000004
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BEM = 0x00000001
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RND_CNT = 0x00000400
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FAIR_BACKOFF = 0x00000200
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EDB_MASTER_EN = 0x00002000
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; Eeprom Access Reigster Bits
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MDC = 0x00000040
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MDDIR = 0x00000020
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MDIO = 0x00000010 ; 7016 specific
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EECS = 0x00000008
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EECLK = 0x00000004
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EEDO = 0x00000002
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EEDI = 0x00000001
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; TX Configuration Register Bits
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ATP = 0x10000000 ; Automatic Transmit Padding
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MLB = 0x20000000 ; Mac Loopback Enable
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HBI = 0x40000000 ; HeartBeat Ignore (Req for full-dup)
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CSI = 0x80000000 ; CarrierSenseIgnore (Req for full-du
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; RX Configuration Register Bits
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AJAB = 0x08000000 ;
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ATX = 0x10000000 ; Accept Transmit Packets
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ARP = 0x40000000 ; accept runt packets (<64bytes)
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AEP = 0x80000000 ; accept error packets
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; Interrupt Register Bits
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WKEVT = 0x10000000
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TxPAUSEEND = 0x08000000
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TxPAUSE = 0x04000000
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TxRCMP = 0x02000000 ; Transmit Reset Complete
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RxRCMP = 0x01000000 ; Receive Reset Complete
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DPERR = 0x00800000
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SSERR = 0x00400000
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RMABT = 0x00200000
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RTABT = 0x00100000
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RxSOVR = 0x00010000
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HIBERR = 0x00008000
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SWINT = 0x00001000
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MIBINT = 0x00000800
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TxURN = 0x00000400
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TxIDLE = 0x00000200
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TxERR = 0x00000100
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TxDESC = 0x00000080
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TxOK = 0x00000040
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RxORN = 0x00000020
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RxIDLE = 0x00000010
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RxEARLY = 0x00000008
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RxERR = 0x00000004
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RxDESC = 0x00000002
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RxOK = 0x00000001
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; Interrupt Enable Register Bits
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IE = RxOK + TxOK
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; Revision ID
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SIS900B_900_REV = 0x03
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SIS630A_900_REV = 0x80
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SIS630E_900_REV = 0x81
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SIS630S_900_REV = 0x82
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SIS630EA1_900_REV = 0x83
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SIS630ET_900_REV = 0x84
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SIS635A_900_REV = 0x90
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SIS900_960_REV = 0x91
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; Receive Filter Control Register Bits
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RFEN = 0x80000000 ; enable
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RFAAB = 0x40000000 ; accept all broadcasts
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RFAAM = 0x20000000 ; accept all multicasts
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RFAAP = 0x10000000 ; accept all packets
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; Reveive Filter Data Mask
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RFDAT = 0x0000FFFF
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; Eeprom Address
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EEPROMSignature = 0x00
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EEPROMVendorID = 0x02
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EEPROMDeviceID = 0x03
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EEPROMMACAddr = 0x08
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EEPROMChecksum = 0x0b
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; The EEPROM commands include the alway-set leading bit.
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EEread = 0x0180
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EEwrite = 0x0140
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EEerase = 0x01C0
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EEwriteEnable = 0x0130
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EEwriteDisable = 0x0100
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EEeraseAll = 0x0120
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EEwriteAll = 0x0110
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EEaddrMask = 0x013F
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EEcmdShift = 16
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; For SiS962 or SiS963, request the eeprom software access
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EEREQ = 0x00000400
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EEDONE = 0x00000200
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EEGNT = 0x00000100
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2014-07-18 14:56:56 +02:00
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section '.flat' readable writable executable
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include '../proc32.inc'
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2014-01-17 13:51:32 +01:00
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include '../struct.inc'
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include '../macros.inc'
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2013-05-28 19:34:26 +02:00
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include '../fdo.inc'
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2014-08-31 16:09:14 +02:00
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include '../netdrv.inc'
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2013-05-28 19:34:26 +02:00
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2014-07-18 14:56:56 +02:00
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struct device ETH_DEVICE
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2013-05-28 19:34:26 +02:00
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2014-07-18 14:56:56 +02:00
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io_addr dd ?
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pci_bus dd ?
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pci_dev dd ?
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irq_line db ?
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cur_rx db ?
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cur_tx db ?
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last_tx db ?
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pci_revision db ?
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table_entries db ?
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2013-05-28 19:34:26 +02:00
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2014-07-18 14:56:56 +02:00
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rb 0x100 - ($ and 0xff) ; align 256
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txd rd (4 * NUM_TX_DESC)
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rxd rd (4 * NUM_RX_DESC)
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2013-05-28 19:34:26 +02:00
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2014-07-18 14:56:56 +02:00
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ends
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2013-05-28 19:34:26 +02:00
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macro ee_delay {
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push eax
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in eax, dx
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in eax, dx
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in eax, dx
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in eax, dx
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in eax, dx
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in eax, dx
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in eax, dx
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in eax, dx
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in eax, dx
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in eax, dx
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pop eax
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}
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2014-07-18 14:56:56 +02:00
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; ;;
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;; proc START ;;
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;; ;;
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;; (standard driver proc) ;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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2013-05-28 19:34:26 +02:00
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; Driver entry point - register our service when the driver is loading.
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; TODO: add needed operations when unloading
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2014-07-18 14:56:56 +02:00
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proc START c, reason:dword, cmdline:dword
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cmp [reason], DRV_ENTRY
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jne .fail
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DEBUGF 2,"Loading driver\n"
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invoke RegService, my_service, service_proc
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ret
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.fail:
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2013-05-28 19:34:26 +02:00
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xor eax, eax
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2014-07-18 14:56:56 +02:00
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ret
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endp
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; ;;
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;; proc SERVICE_PROC ;;
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;; ;;
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;; (standard driver proc) ;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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2013-05-28 19:34:26 +02:00
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; Service procedure for the driver - handle all I/O requests for the driver.
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; Currently handled requests are: SRV_GETVERSION = 0 and SRV_HOOK = 1.
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service_proc:
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; 1. Get parameter from the stack: [esp+4] is the first parameter,
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; pointer to IOCTL structure.
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mov edx, [esp+4] ; edx -> IOCTL
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; 2. Get request code and select a handler for the code.
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2014-01-17 16:07:07 +01:00
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mov eax, [edx + IOCTL.io_code]
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2013-05-28 19:34:26 +02:00
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test eax, eax ; check for SRV_GETVERSION
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jnz @f
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; 3. This is SRV_GETVERSION request, no input, 4 bytes output, API_VERSION.
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; 3a. Output size must be at least 4 bytes.
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2014-01-17 16:07:07 +01:00
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cmp [edx + IOCTL.out_size], 4
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2013-05-28 19:34:26 +02:00
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jb .fail
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; 3b. Write result to the output buffer.
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2014-01-17 16:07:07 +01:00
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mov eax, [edx + IOCTL.output]
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2013-05-28 19:34:26 +02:00
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mov [eax], dword API_VERSION
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; 3c. Return success.
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xor eax, eax
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ret 4
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@@:
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dec eax ; check for SRV_HOOK
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jnz .fail
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; 4. This is SRV_HOOK request, input defines the device to hook, no output.
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; 4a. The driver works only with PCI devices,
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; so input must be at least 3 bytes long.
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2014-01-17 16:07:07 +01:00
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cmp [edx + IOCTL.inp_size], 3
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2013-05-28 19:34:26 +02:00
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jb .fail
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; 4b. First byte of input is bus type, 1 stands for PCI.
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2014-01-17 16:07:07 +01:00
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mov eax, [edx + IOCTL.input]
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2013-05-28 19:34:26 +02:00
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cmp byte [eax], 1
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jne .fail
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; 4c. Second and third bytes of the input define the device: bus and dev.
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; Word in bx holds both bytes.
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mov bx, [eax+1]
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; 4d. Check if the device was already hooked,
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; scan through the list of known devices.
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; check if the device is already listed
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mov esi, device_list
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mov ecx, [devices]
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test ecx, ecx
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jz .firstdevice
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2014-07-18 14:56:56 +02:00
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; mov eax, [edx + IOCTL.input] ; get the pci bus and device numbers
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mov ax, [eax+1] ;
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2013-05-28 19:34:26 +02:00
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.nextdevice:
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mov ebx, [esi]
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2014-07-18 14:56:56 +02:00
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cmp al, byte[ebx + device.pci_bus]
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2013-05-28 19:34:26 +02:00
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jne @f
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2014-07-18 14:56:56 +02:00
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cmp ah, byte[ebx + device.pci_dev]
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2024-05-30 01:50:06 +02:00
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je .find_devicenum ; Device is already loaded, let's find its device number
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2013-05-28 19:34:26 +02:00
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@@:
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add esi, 4
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loop .nextdevice
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; 4e. This device doesn't have its own eth_device structure yet, let's create one
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.firstdevice:
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; 4f. Check that we have place for new device.
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cmp [devices], MAX_DEVICES
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jae .fail
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; 4g. Allocate memory for device descriptor and receive+transmit buffers.
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; 4h. Zero the structure.
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2014-07-18 14:56:56 +02:00
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allocate_and_clear ebx, sizeof.device, .fail
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2013-05-28 19:34:26 +02:00
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; 4i. Save PCI coordinates
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2014-01-17 16:07:07 +01:00
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mov eax, [edx + IOCTL.input]
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2013-05-28 19:34:26 +02:00
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movzx ecx, byte[eax+1]
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2014-07-18 14:56:56 +02:00
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mov [ebx + device.pci_bus], ecx
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2013-05-28 19:34:26 +02:00
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movzx ecx, byte[eax+2]
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2014-07-18 14:56:56 +02:00
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mov [ebx + device.pci_dev], ecx
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2013-05-28 19:34:26 +02:00
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; 4j. Fill in the direct call addresses into the struct.
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2014-07-18 14:56:56 +02:00
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|
|
mov [ebx + device.reset], reset
|
|
|
|
mov [ebx + device.transmit], transmit
|
|
|
|
mov [ebx + device.unload], unload
|
|
|
|
mov [ebx + device.name], my_service
|
2013-05-28 19:34:26 +02:00
|
|
|
|
2024-05-30 01:50:06 +02:00
|
|
|
; 4k. Now, it's time to find the base io address of the PCI device
|
2013-05-28 19:34:26 +02:00
|
|
|
; TODO: implement check if bus and dev exist on this machine
|
|
|
|
|
2024-05-30 01:50:06 +02:00
|
|
|
; Now, it's time to find the base io address of the PCI device
|
2014-07-18 14:56:56 +02:00
|
|
|
stdcall PCI_find_io, [ebx + device.pci_bus], [ebx + device.pci_dev]
|
|
|
|
mov [ebx + device.io_addr], eax
|
2013-05-28 19:34:26 +02:00
|
|
|
|
|
|
|
; We've found the io address, find IRQ now
|
2014-07-18 14:56:56 +02:00
|
|
|
|
|
|
|
invoke PciRead8, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.interrupt_line
|
|
|
|
mov [ebx + device.irq_line], al
|
2013-05-28 19:34:26 +02:00
|
|
|
|
|
|
|
; 4m. Add new device to the list (required for int_handler).
|
|
|
|
mov eax, [devices]
|
|
|
|
mov [device_list+4*eax], ebx
|
|
|
|
inc [devices]
|
|
|
|
|
|
|
|
; 4m. Ok, the eth_device structure is ready, let's probe the device
|
|
|
|
call probe
|
|
|
|
test eax, eax
|
|
|
|
jnz .destroy
|
|
|
|
; 4n. If device was successfully initialized, register it for the kernel.
|
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
mov [ebx + device.type], NET_TYPE_ETH
|
|
|
|
invoke NetRegDev
|
2013-05-28 19:34:26 +02:00
|
|
|
|
|
|
|
cmp eax, -1
|
|
|
|
je .destroy
|
|
|
|
|
|
|
|
ret 4
|
|
|
|
|
|
|
|
; 5. If the device was already loaded, find the device number and return it in eax
|
|
|
|
|
|
|
|
.find_devicenum:
|
2014-07-18 14:56:56 +02:00
|
|
|
invoke NetPtrToNum ; This kernel procedure converts a pointer to device struct in ebx
|
|
|
|
; into a device number in edi
|
|
|
|
mov eax, edi ; Application wants it in eax instead
|
2013-05-28 19:34:26 +02:00
|
|
|
ret 4
|
|
|
|
|
|
|
|
; If an error occured, remove all allocated data and exit (returning -1 in eax)
|
|
|
|
|
|
|
|
.destroy:
|
|
|
|
dec [devices]
|
|
|
|
; todo: reset device into virgin state
|
|
|
|
|
|
|
|
.err:
|
2014-07-18 14:56:56 +02:00
|
|
|
invoke KernelFree, ebx
|
2013-05-28 19:34:26 +02:00
|
|
|
|
|
|
|
.fail:
|
|
|
|
xor eax, eax
|
|
|
|
ret 4
|
|
|
|
|
|
|
|
|
|
|
|
;;/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\;;
|
|
|
|
;; ;;
|
|
|
|
;; Actual Hardware dependent code starts here ;;
|
|
|
|
;; ;;
|
|
|
|
;;/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\;;
|
|
|
|
|
|
|
|
unload:
|
|
|
|
; TODO: (in this particular order)
|
|
|
|
;
|
|
|
|
; - Stop the device
|
|
|
|
; - Detach int handler
|
|
|
|
; - Remove device from local list
|
|
|
|
; - call unregister function in kernel
|
|
|
|
; - Remove all allocated structures and buffers the card used
|
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
or eax, -1
|
2015-03-17 22:50:29 +01:00
|
|
|
ret
|
2013-05-28 19:34:26 +02:00
|
|
|
|
|
|
|
;***************************************************************************
|
|
|
|
;
|
|
|
|
; probe
|
|
|
|
;
|
|
|
|
; checks the card and enables it
|
|
|
|
;
|
|
|
|
; TODO: probe mii transceivers
|
|
|
|
;
|
|
|
|
;***************************************************************************
|
|
|
|
align 4
|
|
|
|
probe:
|
|
|
|
DEBUGF 1, "Probe\n"
|
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
; wake up device
|
|
|
|
; TODO: check capabilities pointer instead of using hardcoded offset.
|
|
|
|
invoke PciWrite8, [ebx + device.pci_bus], [ebx + device.pci_dev], 0x40, 0
|
|
|
|
|
|
|
|
; Make the device a bus master
|
|
|
|
invoke PciRead32, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.command
|
|
|
|
or al, PCI_CMD_MASTER
|
|
|
|
invoke PciWrite32, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.command, eax
|
|
|
|
|
|
|
|
; Adjust PCI latency to be at least 64
|
|
|
|
invoke PciRead8, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.max_latency
|
|
|
|
cmp al, 64
|
|
|
|
jae @f
|
|
|
|
mov al, 64
|
|
|
|
invoke PciWrite8, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.max_latency, eax
|
|
|
|
@@:
|
2013-05-28 19:34:26 +02:00
|
|
|
|
|
|
|
; Get Card Revision
|
2014-07-18 14:56:56 +02:00
|
|
|
invoke PciRead8, [ebx + device.pci_bus], [ebx + device.pci_dev], 0x08
|
|
|
|
mov [ebx + device.pci_revision], al ; save the revision for later use
|
2013-05-28 19:34:26 +02:00
|
|
|
|
|
|
|
; Look up through the specific_table
|
|
|
|
mov esi, specific_table
|
|
|
|
.tableloop:
|
2014-07-18 14:56:56 +02:00
|
|
|
cmp dword[esi], 0 ; Check if we reached end of the list
|
2013-05-28 19:34:26 +02:00
|
|
|
je .notsupported
|
2014-07-18 14:56:56 +02:00
|
|
|
cmp al, [esi] ; Check if revision is OK
|
2013-05-28 19:34:26 +02:00
|
|
|
je .ok
|
2014-07-18 14:56:56 +02:00
|
|
|
add esi, 12 ; Advance to next entry
|
2013-05-28 19:34:26 +02:00
|
|
|
jmp .tableloop
|
|
|
|
.ok:
|
2014-07-18 14:56:56 +02:00
|
|
|
call dword[esi + 4] ; "get MAC" function
|
2013-05-28 19:34:26 +02:00
|
|
|
|
|
|
|
; Set table entries
|
2014-07-18 14:56:56 +02:00
|
|
|
mov [ebx + device.table_entries], 16
|
|
|
|
cmp [ebx + device.pci_revision], SIS635A_900_REV
|
2013-05-28 19:34:26 +02:00
|
|
|
jae @f
|
2014-07-18 14:56:56 +02:00
|
|
|
cmp [ebx + device.pci_revision], SIS900B_900_REV
|
2013-05-28 19:34:26 +02:00
|
|
|
je @f
|
2014-07-18 14:56:56 +02:00
|
|
|
mov [ebx + device.table_entries], 8
|
2013-05-28 19:34:26 +02:00
|
|
|
@@:
|
|
|
|
|
|
|
|
; TODO: Probe for mii transceiver
|
|
|
|
jmp reset
|
|
|
|
|
|
|
|
.notsupported:
|
2014-07-18 14:56:56 +02:00
|
|
|
DEBUGF 2, "Device not supported\n"
|
2013-05-28 19:34:26 +02:00
|
|
|
or eax, -1
|
|
|
|
|
|
|
|
ret
|
|
|
|
|
|
|
|
reset:
|
|
|
|
|
|
|
|
DEBUGF 1, "reset\n"
|
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
movzx eax, [ebx + device.irq_line]
|
|
|
|
invoke AttachIntHandler, eax, int_handler, ebx
|
|
|
|
test eax, eax
|
|
|
|
jnz @f
|
|
|
|
DEBUGF 2,"Could not attach int handler!\n"
|
|
|
|
or eax, -1
|
|
|
|
ret
|
2024-05-30 01:50:06 +02:00
|
|
|
@@:
|
2013-05-28 19:34:26 +02:00
|
|
|
|
|
|
|
;--------------------------------------------
|
|
|
|
; Disable Interrupts and reset Receive Filter
|
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
set_io [ebx + device.io_addr], 0
|
|
|
|
set_io [ebx + device.io_addr], ier
|
2013-05-28 19:34:26 +02:00
|
|
|
xor eax, eax
|
|
|
|
out dx, eax
|
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
set_io [ebx + device.io_addr], imr
|
2013-05-28 19:34:26 +02:00
|
|
|
out dx, eax
|
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
set_io [ebx + device.io_addr], rfcr
|
2013-05-28 19:34:26 +02:00
|
|
|
out dx, eax
|
|
|
|
|
|
|
|
;-----------
|
|
|
|
; Reset Card
|
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
set_io [ebx + device.io_addr], cr
|
|
|
|
in eax, dx ; Get current Command Register
|
|
|
|
or eax, RESET + RxRESET + TxRESET ; set flags
|
|
|
|
out dx, eax ; Write new Command Register
|
2013-05-28 19:34:26 +02:00
|
|
|
|
|
|
|
;----------
|
|
|
|
; Wait loop
|
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
set_io [ebx + device.io_addr], isr
|
2013-05-28 19:34:26 +02:00
|
|
|
mov ecx, 1000
|
|
|
|
.loop:
|
|
|
|
dec ecx
|
|
|
|
jz .fail
|
2014-07-18 14:56:56 +02:00
|
|
|
in eax, dx ; read interrupt status
|
2013-05-28 19:34:26 +02:00
|
|
|
test eax, TxRCMP + RxRCMP
|
|
|
|
jz .loop
|
|
|
|
DEBUGF 1, "status=%x\n", eax
|
|
|
|
|
|
|
|
;------------------------------------------------------
|
|
|
|
; Set Configuration Register depending on Card Revision
|
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
set_io [ebx + device.io_addr], cfg
|
|
|
|
mov eax, PESEL ; Configuration Register Bit
|
|
|
|
cmp [ebx + device.pci_revision], SIS635A_900_REV
|
2013-05-28 19:34:26 +02:00
|
|
|
je .match
|
2014-07-18 14:56:56 +02:00
|
|
|
cmp [ebx + device.pci_revision], SIS900B_900_REV ; Check card revision
|
2013-05-28 19:34:26 +02:00
|
|
|
jne .done
|
2014-07-18 14:56:56 +02:00
|
|
|
.match: ; Revision match
|
|
|
|
or eax, RND_CNT ; Configuration Register Bit
|
2013-05-28 19:34:26 +02:00
|
|
|
.done:
|
|
|
|
out dx, eax
|
|
|
|
|
|
|
|
DEBUGF 1, "Initialising RX Filter\n"
|
|
|
|
|
|
|
|
; Get Receive Filter Control Register
|
2014-07-18 14:56:56 +02:00
|
|
|
set_io [ebx + device.io_addr], rfcr
|
2013-05-28 19:34:26 +02:00
|
|
|
in eax, dx
|
|
|
|
push eax
|
|
|
|
|
|
|
|
; disable packet filtering before setting filter
|
|
|
|
and eax, not RFEN
|
|
|
|
out dx, eax
|
|
|
|
|
|
|
|
; load MAC addr to filter data register
|
|
|
|
xor ecx, ecx
|
|
|
|
.macloop:
|
|
|
|
mov eax, ecx
|
2014-07-18 14:56:56 +02:00
|
|
|
set_io [ebx + device.io_addr], 0
|
|
|
|
set_io [ebx + device.io_addr], rfcr
|
|
|
|
shl eax, 16 ; high word of eax tells card which mac byte to write
|
|
|
|
out dx, eax ;
|
|
|
|
set_io [ebx + device.io_addr], rfdr
|
|
|
|
mov ax, word [ebx + device.mac + ecx*2] ; Get Mac ID word
|
|
|
|
out dx, ax ; Send Mac ID
|
|
|
|
inc cl ; send next word
|
|
|
|
cmp cl, 3 ; more to send?
|
2013-05-28 19:34:26 +02:00
|
|
|
jne .macloop
|
|
|
|
|
|
|
|
; enable packet filtering
|
2014-07-18 14:56:56 +02:00
|
|
|
pop eax ; old register value
|
|
|
|
set_io [ebx + device.io_addr], rfcr
|
|
|
|
or eax, RFEN ; enable filtering
|
|
|
|
out dx, eax ; set register
|
2013-05-28 19:34:26 +02:00
|
|
|
|
|
|
|
DEBUGF 1, "Initialising TX Descriptors\n"
|
|
|
|
|
|
|
|
mov ecx, NUM_TX_DESC
|
2014-07-18 14:56:56 +02:00
|
|
|
lea esi, [ebx + device.txd]
|
2013-05-28 19:34:26 +02:00
|
|
|
.txdescloop:
|
2014-07-18 14:56:56 +02:00
|
|
|
lea eax, [esi + 16] ; next ptr
|
|
|
|
invoke GetPhysAddr
|
|
|
|
mov dword[esi], eax ; link to next desc
|
|
|
|
mov dword[esi + 4], 0 ; status field
|
|
|
|
mov dword[esi + 8], 0 ; ptr to buffer
|
2013-05-28 19:34:26 +02:00
|
|
|
add esi, 16
|
|
|
|
dec ecx
|
|
|
|
jnz .txdescloop
|
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
lea eax, [ebx + device.txd]
|
|
|
|
invoke GetPhysAddr
|
|
|
|
mov dword[esi - 16], eax ; correct last descriptor link ptr
|
2013-05-28 19:34:26 +02:00
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
set_io [ebx + device.io_addr], txdp ; TX Descriptor Pointer
|
|
|
|
; lea eax, [ebx + device.txd]
|
|
|
|
; invoke GetPhysAddr
|
2013-05-28 19:34:26 +02:00
|
|
|
out dx, eax
|
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
mov [ebx + device.cur_tx], 0 ; Set current tx descriptor to 0
|
|
|
|
mov [ebx + device.last_tx], 0
|
2013-05-28 19:34:26 +02:00
|
|
|
|
|
|
|
DEBUGF 1, "Initialising RX Descriptors\n"
|
|
|
|
|
|
|
|
mov ecx, NUM_RX_DESC
|
2014-07-18 14:56:56 +02:00
|
|
|
lea esi, [ebx + device.rxd]
|
2013-05-28 19:34:26 +02:00
|
|
|
.rxdescloop:
|
2014-07-18 14:56:56 +02:00
|
|
|
lea eax, [esi + 16] ; next ptr
|
|
|
|
invoke GetPhysAddr
|
2013-05-28 19:34:26 +02:00
|
|
|
mov dword [esi], eax
|
2014-07-18 14:56:56 +02:00
|
|
|
mov dword [esi + 4], RX_BUFF_SZ ; size
|
2013-05-28 19:34:26 +02:00
|
|
|
|
|
|
|
push ecx esi
|
2015-03-17 22:50:29 +01:00
|
|
|
invoke NetAlloc, RX_BUFF_SZ+NET_BUFF.data
|
2013-05-28 19:34:26 +02:00
|
|
|
pop esi ecx
|
|
|
|
test eax, eax
|
|
|
|
jz .fail
|
2014-07-18 14:56:56 +02:00
|
|
|
mov dword [esi + 12], eax ; address
|
|
|
|
invoke GetPhysAddr
|
2015-03-17 22:50:29 +01:00
|
|
|
add eax, NET_BUFF.data
|
2014-07-18 14:56:56 +02:00
|
|
|
mov dword [esi + 8], eax ; real address
|
2013-05-28 19:34:26 +02:00
|
|
|
add esi, 16
|
|
|
|
dec ecx
|
|
|
|
jnz .rxdescloop
|
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
lea eax, [ebx + device.rxd]
|
|
|
|
invoke GetPhysAddr
|
|
|
|
mov dword [esi - 16], eax ; correct last descriptor link ptr
|
2013-05-28 19:34:26 +02:00
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
set_io [ebx + device.io_addr], 0
|
|
|
|
set_io [ebx + device.io_addr], rxdp
|
|
|
|
; lea eax, [ebx + device.rxd]
|
|
|
|
; invoke GetPhysAddr
|
2013-05-28 19:34:26 +02:00
|
|
|
out dx, eax
|
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
mov [ebx + device.cur_rx], 0 ; Set current rx descriptor to 0
|
2013-05-28 19:34:26 +02:00
|
|
|
|
|
|
|
DEBUGF 1, "setting RX mode\n"
|
|
|
|
|
|
|
|
xor cl, cl
|
|
|
|
.rxfilterloop:
|
2014-07-18 14:56:56 +02:00
|
|
|
set_io [ebx + device.io_addr], 0
|
|
|
|
set_io [ebx + device.io_addr], rfcr ; Receive Filter Control Reg offset
|
|
|
|
mov eax, 4 ; determine table entry
|
2013-05-28 19:34:26 +02:00
|
|
|
add al, cl
|
|
|
|
shl eax, 16
|
2014-07-18 14:56:56 +02:00
|
|
|
out dx, eax ; tell card which entry to modify
|
2013-05-28 19:34:26 +02:00
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
set_io [ebx + device.io_addr], rfdr ; Receive Filter Control Reg offset
|
|
|
|
mov eax, 0xffff ; entry value
|
|
|
|
out dx, ax ; write value to table in card
|
2013-05-28 19:34:26 +02:00
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
inc cl ; next entry
|
|
|
|
cmp cl, [ebx + device.table_entries]
|
2013-05-28 19:34:26 +02:00
|
|
|
jb .rxfilterloop
|
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
set_io [ebx + device.io_addr], rfcr ; Receive Filter Control Register offset
|
2013-05-28 19:34:26 +02:00
|
|
|
mov eax, RFAAB + RFAAM + RFAAP + RFEN
|
|
|
|
out dx, eax
|
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
set_io [ebx + device.io_addr], rxcfg ; Receive Config Register offset
|
|
|
|
mov eax, ATX + RX_DMA + 2 ; 0x2 : RX Drain Threshold = 8*8=64 bytes
|
2013-05-28 19:34:26 +02:00
|
|
|
out dx, eax
|
|
|
|
|
|
|
|
DEBUGF 1, "setting TX mode\n"
|
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
set_io [ebx + device.io_addr], txcfg ; Transmit config Register offset
|
|
|
|
mov eax, ATP + HBI + CSI + TX_DMA + 0x120 ; TX Fill threshold = 0x100
|
|
|
|
; TX Drain Threshold = 0x20
|
2013-05-28 19:34:26 +02:00
|
|
|
out dx, eax
|
|
|
|
|
|
|
|
DEBUGF 1, "Enabling interrupts\n"
|
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
set_io [ebx + device.io_addr], imr
|
|
|
|
mov eax, IE ; Interrupt enable mask
|
2013-05-28 19:34:26 +02:00
|
|
|
out dx, eax
|
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
set_io [ebx + device.io_addr], cr
|
2013-05-28 19:34:26 +02:00
|
|
|
in eax, dx
|
2014-07-18 14:56:56 +02:00
|
|
|
or eax, RxENA ; Enable Receive
|
2013-05-28 19:34:26 +02:00
|
|
|
out dx, eax
|
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
set_io [ebx + device.io_addr], ier ; Interrupt enable
|
2013-05-28 19:34:26 +02:00
|
|
|
mov eax, 1
|
|
|
|
out dx, eax
|
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
mov [ebx + device.mtu], 1514
|
2013-05-28 19:34:26 +02:00
|
|
|
|
|
|
|
; Set link state to unknown
|
2014-07-18 14:56:56 +02:00
|
|
|
mov [ebx + device.state], ETH_LINK_UNKNOWN
|
2013-05-28 19:34:26 +02:00
|
|
|
|
|
|
|
xor eax, eax
|
|
|
|
ret
|
|
|
|
|
|
|
|
.fail:
|
2014-07-18 14:56:56 +02:00
|
|
|
DEBUGF 2, "Resetting device failed\n"
|
2013-05-28 19:34:26 +02:00
|
|
|
or eax, -1
|
|
|
|
|
|
|
|
ret
|
|
|
|
|
|
|
|
|
|
|
|
;***************************************************************************
|
|
|
|
;
|
|
|
|
; SIS960_get_mac_addr: - Get MAC address for SiS962 or SiS963 model
|
|
|
|
;
|
|
|
|
; SiS962 or SiS963 model, use EEPROM to store MAC address.
|
|
|
|
; EEPROM is shared by LAN and 1394.
|
|
|
|
; When access EEPROM, send EEREQ signal to hardware first, and wait for EEGNT.
|
|
|
|
; If EEGNT is ON, EEPROM is permitted to be accessed by LAN, otherwise is not.
|
|
|
|
; After MAC address is read from EEPROM, send
|
|
|
|
; EEDONE signal to refuse EEPROM access by LAN.
|
|
|
|
; The EEPROM map of SiS962 or SiS963 is different to SiS900.
|
|
|
|
; The signature field in SiS962 or SiS963 spec is meaningless.
|
|
|
|
;
|
|
|
|
; Return 0 is EAX = failure
|
|
|
|
;
|
|
|
|
;***************************************************************************
|
|
|
|
align 4
|
|
|
|
SIS960_get_mac_addr:
|
2014-07-18 14:56:56 +02:00
|
|
|
DEBUGF 1, "SIS960 - get mac:\n"
|
2013-05-28 19:34:26 +02:00
|
|
|
|
|
|
|
;-------------------------------
|
|
|
|
; Send Request for eeprom access
|
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
set_io [ebx + device.io_addr], 0
|
|
|
|
set_io [ebx + device.io_addr], mear ; Eeprom access register
|
|
|
|
mov eax, EEREQ ; Request access to eeprom
|
|
|
|
out dx, eax ; Send request
|
2013-05-28 19:34:26 +02:00
|
|
|
|
|
|
|
;-----------------------------------------------------
|
|
|
|
; Loop 4000 times and if access not granted, error out
|
|
|
|
|
|
|
|
mov ecx, 4000
|
|
|
|
.loop:
|
2014-07-18 14:56:56 +02:00
|
|
|
in eax, dx ; get eeprom status
|
|
|
|
test eax, EEGNT ; see if eeprom access granted flag is set
|
|
|
|
jnz .got_access ; if it is, go access the eeprom
|
|
|
|
loop .loop ; else keep waiting
|
2013-05-28 19:34:26 +02:00
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
DEBUGF 2, "Access to EEprom failed!\n", 0
|
2013-05-28 19:34:26 +02:00
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
set_io [ebx + device.io_addr], mear ; Eeprom access register
|
|
|
|
mov eax, EEDONE ; tell eeprom we are done
|
2013-05-28 19:34:26 +02:00
|
|
|
out dx, eax
|
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
or eax, -1 ; error
|
2013-05-28 19:34:26 +02:00
|
|
|
ret
|
|
|
|
|
|
|
|
.got_access:
|
|
|
|
|
|
|
|
;------------------------------------------
|
|
|
|
; EEprom access granted, read MAC from card
|
|
|
|
|
|
|
|
; zero based so 3-16 bit reads will take place
|
|
|
|
|
|
|
|
mov ecx, 2
|
|
|
|
.read_loop:
|
2014-07-18 14:56:56 +02:00
|
|
|
mov eax, EEPROMMACAddr ; Base Mac Address
|
|
|
|
add eax, ecx ; Current Mac Byte Offset
|
2013-05-28 19:34:26 +02:00
|
|
|
push ecx
|
2014-07-18 14:56:56 +02:00
|
|
|
call read_eeprom ; try to read 16 bits
|
2013-05-28 19:34:26 +02:00
|
|
|
pop ecx
|
2014-07-18 14:56:56 +02:00
|
|
|
mov word [ebx + device.mac+ecx*2], ax ; save 16 bits to the MAC ID varible
|
|
|
|
dec ecx ; one less word to read
|
|
|
|
jns .read_loop ; if more read more
|
|
|
|
mov eax, 1 ; return non-zero indicating success
|
2013-05-28 19:34:26 +02:00
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
DEBUGF 1,"%x-%x-%x-%x-%x-%x\n",\
|
|
|
|
[ebx + device.mac]:2,[ebx + device.mac+1]:2,[ebx + device.mac+2]:2,[ebx + device.mac+3]:2,[ebx + device.mac+4]:2,[ebx + device.mac+5]:2
|
2013-05-28 19:34:26 +02:00
|
|
|
|
|
|
|
;-------------------------------------
|
|
|
|
; Tell EEPROM We are Done Accessing It
|
|
|
|
|
|
|
|
.done:
|
2014-07-18 14:56:56 +02:00
|
|
|
set_io [ebx + device.io_addr], 0
|
|
|
|
set_io [ebx + device.io_addr], mear ; Eeprom access register
|
|
|
|
mov eax, EEDONE ; tell eeprom we are done
|
2013-05-28 19:34:26 +02:00
|
|
|
out dx, eax
|
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
xor eax, eax ; ok
|
2013-05-28 19:34:26 +02:00
|
|
|
ret
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
;***************************************************************************
|
|
|
|
;
|
|
|
|
; get_mac_addr: - Get MAC address for stand alone SiS900 model
|
|
|
|
;
|
|
|
|
; Older SiS900 and friends, use EEPROM to store MAC address.
|
|
|
|
;
|
|
|
|
;***************************************************************************
|
|
|
|
align 4
|
|
|
|
SIS900_get_mac_addr:
|
2014-07-18 14:56:56 +02:00
|
|
|
DEBUGF 1, "SIS900 - get mac:\n"
|
2013-05-28 19:34:26 +02:00
|
|
|
|
|
|
|
;------------------------------------
|
|
|
|
; check to see if we have sane EEPROM
|
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
mov eax, EEPROMSignature ; Base Eeprom Signature
|
|
|
|
call read_eeprom ; try to read 16 bits
|
2013-05-28 19:34:26 +02:00
|
|
|
cmp ax, 0xffff
|
|
|
|
je .err
|
|
|
|
test ax, ax
|
|
|
|
je .err
|
|
|
|
|
|
|
|
;-----------
|
|
|
|
; Read MacID
|
|
|
|
|
|
|
|
; zero based so 3-16 bit reads will take place
|
|
|
|
|
|
|
|
mov ecx, 2
|
|
|
|
.loop:
|
2014-07-18 14:56:56 +02:00
|
|
|
mov eax, EEPROMMACAddr ; Base Mac Address
|
|
|
|
add eax, ecx ; Current Mac Byte Offset
|
2013-05-28 19:34:26 +02:00
|
|
|
push ecx
|
2014-07-18 14:56:56 +02:00
|
|
|
call read_eeprom ; try to read 16 bits
|
2013-05-28 19:34:26 +02:00
|
|
|
pop ecx
|
2014-07-18 14:56:56 +02:00
|
|
|
mov word [ebx + device.mac+ecx*2], ax ; save 16 bits to the MAC ID storage
|
|
|
|
dec ecx ; one less word to read
|
|
|
|
jns .loop ; if more read more
|
2013-05-28 19:34:26 +02:00
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
DEBUGF 1,"%x-%x-%x-%x-%x-%x\n",\
|
|
|
|
[ebx + device.mac]:2,[ebx + device.mac+1]:2,[ebx + device.mac+2]:2,[ebx + device.mac+3]:2,[ebx + device.mac+4]:2,[ebx + device.mac+5]:2
|
2013-05-28 19:34:26 +02:00
|
|
|
|
|
|
|
xor eax, eax
|
|
|
|
ret
|
|
|
|
|
|
|
|
|
|
|
|
.err:
|
|
|
|
DEBUGF 1, "Access to EEprom failed!\n", 0
|
|
|
|
|
|
|
|
or eax, -1
|
|
|
|
ret
|
|
|
|
|
|
|
|
|
|
|
|
;***************************************************************************
|
|
|
|
;
|
|
|
|
; Get_Mac_SIS635_900_REV: - Get MAC address for model 635
|
|
|
|
;
|
|
|
|
;***************************************************************************
|
|
|
|
align 4
|
|
|
|
Get_Mac_SIS635_900_REV:
|
2014-07-18 14:56:56 +02:00
|
|
|
DEBUGF 1, "SIS635 - get mac:\n"
|
2013-05-28 19:34:26 +02:00
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
set_io [ebx + device.io_addr], 0
|
|
|
|
set_io [ebx + device.io_addr], rfcr
|
2013-05-28 19:34:26 +02:00
|
|
|
in eax, dx
|
|
|
|
mov esi, eax
|
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
set_io [ebx + device.io_addr], cr
|
2013-05-28 19:34:26 +02:00
|
|
|
or eax, RELOAD
|
|
|
|
out dx, eax
|
|
|
|
|
|
|
|
xor eax, eax
|
|
|
|
out dx, eax
|
|
|
|
|
|
|
|
;-----------------------------------------------
|
|
|
|
; Disable packet filtering before setting filter
|
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
set_io [ebx + device.io_addr], rfcr
|
2013-05-28 19:34:26 +02:00
|
|
|
mov eax, esi
|
|
|
|
and eax, not RFEN
|
|
|
|
out dx, eax
|
|
|
|
|
|
|
|
;---------------------------------
|
|
|
|
; Load MAC to filter data register
|
|
|
|
|
|
|
|
xor ecx, ecx
|
2014-07-18 14:56:56 +02:00
|
|
|
lea edi, [ebx + device.mac]
|
2013-05-28 19:34:26 +02:00
|
|
|
.loop:
|
2014-07-18 14:56:56 +02:00
|
|
|
set_io [ebx + device.io_addr], 0
|
|
|
|
set_io [ebx + device.io_addr], rfcr
|
2013-05-28 19:34:26 +02:00
|
|
|
mov eax, ecx
|
|
|
|
shl eax, RFADDR_shift
|
|
|
|
out dx, eax
|
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
set_io [ebx + device.io_addr], rfdr
|
2013-05-28 19:34:26 +02:00
|
|
|
in ax, dx
|
|
|
|
stosw
|
|
|
|
inc ecx
|
|
|
|
cmp ecx, 3
|
|
|
|
jb .loop
|
|
|
|
|
|
|
|
;------------------------
|
|
|
|
; Enable packet filtering
|
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
set_io [ebx + device.io_addr], rfcr
|
2013-05-28 19:34:26 +02:00
|
|
|
mov eax, esi
|
|
|
|
or eax, RFEN
|
|
|
|
out dx, eax
|
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
DEBUGF 1,"%x-%x-%x-%x-%x-%x\n",\
|
|
|
|
[ebx + device.mac]:2,[ebx + device.mac+1]:2,[ebx + device.mac+2]:2,[ebx + device.mac+3]:2,[ebx + device.mac+4]:2,[ebx + device.mac+5]:2
|
2013-05-28 19:34:26 +02:00
|
|
|
|
|
|
|
xor eax, eax
|
|
|
|
ret
|
|
|
|
|
|
|
|
;***************************************************************************
|
|
|
|
;
|
|
|
|
; read_eeprom
|
|
|
|
;
|
|
|
|
; reads and returns a given location from EEPROM
|
|
|
|
;
|
|
|
|
; IN: si = addr
|
|
|
|
; OUT: ax = data
|
|
|
|
;
|
|
|
|
;***************************************************************************
|
|
|
|
align 4
|
|
|
|
read_eeprom:
|
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
set_io [ebx + device.io_addr], 0
|
|
|
|
set_io [ebx + device.io_addr], mear
|
2013-05-28 19:34:26 +02:00
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
xor eax, eax ; start send
|
2013-05-28 19:34:26 +02:00
|
|
|
out dx, eax
|
|
|
|
ee_delay
|
|
|
|
|
|
|
|
or eax, EECLK
|
|
|
|
out dx, eax
|
|
|
|
ee_delay
|
|
|
|
|
|
|
|
;------------------------------------
|
|
|
|
; Send the read command
|
|
|
|
|
|
|
|
or esi, EEread
|
|
|
|
mov ecx, 1 shl 9
|
|
|
|
|
|
|
|
.loop:
|
|
|
|
mov eax, EECS
|
|
|
|
test esi, ecx
|
|
|
|
jz @f
|
|
|
|
or eax, EEDI
|
|
|
|
@@:
|
|
|
|
out dx, eax
|
|
|
|
ee_delay
|
|
|
|
|
|
|
|
or eax, EECLK
|
|
|
|
out dx, eax
|
|
|
|
ee_delay
|
|
|
|
|
|
|
|
shr esi, 1
|
|
|
|
jnc .loop
|
|
|
|
|
|
|
|
mov eax, EECS
|
|
|
|
out dx, eax
|
|
|
|
ee_delay
|
|
|
|
|
|
|
|
;------------------------
|
|
|
|
; Read 16-bits of data in
|
|
|
|
|
|
|
|
xor esi, esi
|
|
|
|
mov cx, 16
|
|
|
|
.loop2:
|
|
|
|
mov eax, EECS
|
|
|
|
out dx, eax
|
|
|
|
ee_delay
|
|
|
|
|
|
|
|
or eax, EECLK
|
|
|
|
out dx, eax
|
|
|
|
ee_delay
|
|
|
|
|
|
|
|
in eax, dx
|
|
|
|
shl esi, 1
|
|
|
|
test eax, EEDO
|
|
|
|
jz @f
|
|
|
|
inc esi
|
|
|
|
@@:
|
|
|
|
loop .loop2
|
|
|
|
|
|
|
|
;----------------------------
|
|
|
|
; Terminate the EEPROM access
|
|
|
|
|
|
|
|
xor eax, eax
|
|
|
|
out dx, eax
|
|
|
|
ee_delay
|
|
|
|
|
|
|
|
mov eax, EECLK
|
|
|
|
out dx, eax
|
|
|
|
ee_delay
|
|
|
|
|
|
|
|
movzx eax, si
|
|
|
|
|
|
|
|
ret
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
align 4
|
|
|
|
write_mac:
|
2014-07-18 14:56:56 +02:00
|
|
|
DEBUGF 2,'Setting MAC is not supported for SIS900 card.\n'
|
2013-05-28 19:34:26 +02:00
|
|
|
add esp, 6
|
|
|
|
ret
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
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;***************************************************************************
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; Function
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; transmit
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; Description
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; Transmits a packet of data via the ethernet card
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; buffer pointer in [esp+4]
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; size of buffer in [esp+8]
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; pointer to device structure in ebx
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;
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;***************************************************************************
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align 4
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2014-07-18 14:56:56 +02:00
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2015-03-17 22:50:29 +01:00
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proc transmit stdcall bufferptr
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2014-07-18 14:56:56 +02:00
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pushf
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cli
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2015-03-17 22:50:29 +01:00
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mov esi, [bufferptr]
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DEBUGF 1,"Transmitting packet, buffer:%x, size:%u\n", [bufferptr], [esi + NET_BUFF.length]
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lea eax, [esi + NET_BUFF.data]
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2013-05-28 19:34:26 +02:00
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DEBUGF 1,"To: %x-%x-%x-%x-%x-%x From: %x-%x-%x-%x-%x-%x Type:%x%x\n",\
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[eax+00]:2,[eax+01]:2,[eax+02]:2,[eax+03]:2,[eax+04]:2,[eax+05]:2,\
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[eax+06]:2,[eax+07]:2,[eax+08]:2,[eax+09]:2,[eax+10]:2,[eax+11]:2,\
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[eax+13]:2,[eax+12]:2
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2015-03-17 22:50:29 +01:00
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cmp [esi + NET_BUFF.length], 1514
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2014-07-18 14:56:56 +02:00
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ja .fail
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2015-03-17 22:50:29 +01:00
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cmp [esi + NET_BUFF.length], 60
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2014-07-18 14:56:56 +02:00
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jb .fail
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2013-05-28 19:34:26 +02:00
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2014-07-18 14:56:56 +02:00
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movzx ecx, [ebx + device.cur_tx]
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shl ecx, 4 ; *16
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lea ecx, [ebx + device.txd + ecx]
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2013-05-28 19:34:26 +02:00
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2014-07-18 14:56:56 +02:00
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test dword[ecx + 4], 0x80000000 ; card owns descriptor ?
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jnz .fail
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2013-05-28 19:34:26 +02:00
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2015-03-17 22:50:29 +01:00
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mov eax, esi
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2014-07-18 14:56:56 +02:00
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mov dword[ecx + 12], eax
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2015-03-17 22:50:29 +01:00
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add eax, [eax + NET_BUFF.offset]
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2014-07-18 14:56:56 +02:00
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invoke GetPhysAddr
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mov dword[ecx + 8], eax ; buffer address
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2013-05-28 19:34:26 +02:00
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2015-03-17 22:50:29 +01:00
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mov eax, [esi + NET_BUFF.length]
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2013-05-28 19:34:26 +02:00
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and eax, DSIZE
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2014-07-18 14:56:56 +02:00
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or eax, 0x80000000 ; card owns descriptor
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mov dword[ecx + 4], eax ; status field
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2013-05-28 19:34:26 +02:00
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2014-07-18 14:56:56 +02:00
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set_io [ebx + device.io_addr], 0
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set_io [ebx + device.io_addr], cr
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2013-05-28 19:34:26 +02:00
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in eax, dx
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2014-07-18 14:56:56 +02:00
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or eax, TxENA ; Enable the transmit state machine
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2013-05-28 19:34:26 +02:00
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out dx, eax
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2014-07-18 14:56:56 +02:00
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inc [ebx + device.cur_tx]
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and [ebx + device.cur_tx], NUM_TX_DESC-1
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2013-05-28 19:34:26 +02:00
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; update stats
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2015-03-17 22:50:29 +01:00
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mov ecx, [esi + NET_BUFF.length]
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2014-07-18 14:56:56 +02:00
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inc [ebx + device.packets_tx]
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add dword [ebx + device.bytes_tx], ecx
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adc dword [ebx + device.bytes_tx + 4], 0
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2013-05-28 19:34:26 +02:00
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2014-07-18 14:56:56 +02:00
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DEBUGF 1,"Transmit OK\n"
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popf
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2013-05-28 19:34:26 +02:00
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xor eax, eax
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2014-07-18 14:56:56 +02:00
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ret
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2013-05-28 19:34:26 +02:00
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2014-07-18 14:56:56 +02:00
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.fail:
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DEBUGF 2,"Transmit failed\n"
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2015-03-17 22:50:29 +01:00
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invoke NetFree, [bufferptr]
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2014-07-18 14:56:56 +02:00
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popf
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2013-05-28 19:34:26 +02:00
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or eax, -1
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2014-07-18 14:56:56 +02:00
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ret
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endp
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2013-05-28 19:34:26 +02:00
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;***************************************************************************
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;
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; int_handler
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;
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; handles received IRQs, which signal received packets
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;
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; Currently only supports one descriptor per packet, if packet is fragmented
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; between multiple descriptors you will lose part of the packet
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;
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;***************************************************************************
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align 4
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int_handler:
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push ebx esi edi
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2014-07-18 14:56:56 +02:00
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DEBUGF 1,"INT\n"
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2013-05-28 19:34:26 +02:00
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; find pointer of device which made IRQ occur
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mov ecx, [devices]
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test ecx, ecx
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jz .nothing
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mov esi, device_list
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.nextdevice:
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mov ebx, [esi]
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2014-07-18 14:56:56 +02:00
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set_io [ebx + device.io_addr], 0
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set_io [ebx + device.io_addr], isr
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in eax, dx ; note that this clears all interrupts
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2013-05-28 19:34:26 +02:00
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test ax, IE
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jnz .got_it
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.continue:
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add esi, 4
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dec ecx
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jnz .nextdevice
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.nothing:
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pop edi esi ebx
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xor eax, eax
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ret
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.got_it:
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2014-07-18 14:56:56 +02:00
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DEBUGF 1,"Device: %x Status: %x\n", ebx, ax
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2013-05-28 19:34:26 +02:00
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test ax, RxOK
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jz .no_rx_
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push ax
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.rx_loop:
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;-----------
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; Get Status
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2014-07-18 14:56:56 +02:00
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movzx eax, [ebx + device.cur_rx] ; find current descriptor
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2013-05-28 19:34:26 +02:00
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shl eax, 4 ; * 16
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2014-07-18 14:56:56 +02:00
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mov ecx, dword[ebx + device.rxd + eax + 4] ; get receive status
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2013-05-28 19:34:26 +02:00
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;-------------------------------------------
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; Check RX_Status to see if packet is waiting
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test ecx, 0x80000000
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jz .no_rx
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;----------------------------------------------
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; There is a packet waiting check it for errors
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2014-07-18 14:56:56 +02:00
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test ecx, 0x67C0000 ; see if there are any errors
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2013-05-28 19:34:26 +02:00
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jnz .error_status
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;---------------------
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; Check size of packet
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2014-07-18 14:56:56 +02:00
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and ecx, DSIZE ; get packet size minus CRC
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sub ecx, CRC_SIZE ; make sure packet contains data
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2013-05-28 19:34:26 +02:00
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jbe .error_size
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; update statistics
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2014-07-18 14:56:56 +02:00
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inc dword [ebx + device.packets_rx]
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add dword [ebx + device.bytes_rx], ecx
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adc dword [ebx + device.bytes_rx + 4], 0
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2013-05-28 19:34:26 +02:00
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push ebx
|
2015-03-17 22:50:29 +01:00
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push .return ; return addr
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mov eax, [ebx + device.rxd + eax + 12]
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push eax ; packet ptr
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mov [eax + NET_BUFF.length], ecx
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mov [eax + NET_BUFF.device], ebx
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mov [eax + NET_BUFF.offset], NET_BUFF.data
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2013-05-28 19:34:26 +02:00
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DEBUGF 1, "Packet received OK\n"
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2015-03-17 22:50:29 +01:00
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jmp [EthInput]
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2013-05-28 19:34:26 +02:00
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.return:
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pop ebx
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; Reset status, allow ethernet card access to descriptor
|
2015-03-17 22:50:29 +01:00
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invoke NetAlloc, RX_BUFF_SZ + NET_BUFF.data
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2013-05-28 19:34:26 +02:00
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test eax, eax
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jz .fail
|
2014-07-18 14:56:56 +02:00
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movzx ecx, [ebx + device.cur_rx]
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shl ecx, 4 ; *16
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lea ecx, [ebx + device.rxd + ecx]
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2013-05-28 19:34:26 +02:00
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mov dword [ecx + 12], eax
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2014-07-18 14:56:56 +02:00
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invoke GetPhysAddr
|
2015-03-17 22:50:29 +01:00
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add eax, NET_BUFF.data
|
2013-05-28 19:34:26 +02:00
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mov dword [ecx + 8], eax
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mov dword [ecx + 4], RX_BUFF_SZ
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|
2014-07-18 14:56:56 +02:00
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inc [ebx + device.cur_rx] ; get next descriptor
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and [ebx + device.cur_rx], NUM_RX_DESC-1 ; only 4 descriptors 0-3
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2013-05-28 19:34:26 +02:00
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jmp .rx_loop
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.no_rx:
|
2014-07-18 14:56:56 +02:00
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set_io [ebx + device.io_addr], 0
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set_io [ebx + device.io_addr], cr
|
2013-05-28 19:34:26 +02:00
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in eax, dx
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or eax, RxENA ; Re-Enable the Receive state machine
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out dx, eax
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pop ax
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.no_rx_:
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test ax, TxOK
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jz .no_tx
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DEBUGF 1, "TX ok!\n"
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.tx_loop:
|
2014-07-18 14:56:56 +02:00
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movzx ecx, [ebx + device.last_tx]
|
2013-05-28 19:34:26 +02:00
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shl ecx, 4 ; *16
|
2014-07-18 14:56:56 +02:00
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lea ecx, [ebx + device.txd + ecx]
|
2013-05-28 19:34:26 +02:00
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|
2014-07-18 14:56:56 +02:00
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test dword[ecx + 4], 0x80000000 ; card owns descr
|
2013-05-28 19:34:26 +02:00
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jnz .no_tx
|
2014-07-18 14:56:56 +02:00
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cmp dword[ecx + 12], 0
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2013-05-28 19:34:26 +02:00
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je .no_tx
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DEBUGF 1, "Freeing packet = %x\n", [ecx + 12]:8
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2014-07-18 14:56:56 +02:00
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push dword[ecx + 12]
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mov dword[ecx + 12], 0
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2015-03-17 22:50:29 +01:00
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|
invoke NetFree
|
2013-05-28 19:34:26 +02:00
|
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|
2014-07-18 14:56:56 +02:00
|
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inc [ebx + device.last_tx]
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and [ebx + device.last_tx], NUM_TX_DESC-1
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2013-05-28 19:34:26 +02:00
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jmp .tx_loop
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.no_tx:
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.fail:
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pop edi esi ebx
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xor eax, eax
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inc eax
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ret
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ret
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.error_status:
|
2014-07-18 14:56:56 +02:00
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DEBUGF 2, "Packet error: %x\n", ecx
|
2013-05-28 19:34:26 +02:00
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jmp .fail
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.error_size:
|
2014-07-18 14:56:56 +02:00
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DEBUGF 2, "Packet too large/small\n"
|
2013-05-28 19:34:26 +02:00
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jmp .fail
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; End of code
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|
|
2014-07-18 14:56:56 +02:00
|
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|
data fixups
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end data
|
2013-05-28 19:34:26 +02:00
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
include '../peimport.inc'
|
|
|
|
|
|
|
|
my_service db 'SIS900',0 ; max 16 chars include zero
|
2013-05-28 19:34:26 +02:00
|
|
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|
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|
|
specific_table:
|
|
|
|
; dd SIS630A_900_REV, Get_Mac_SIS630A_900_REV, 0
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|
|
; dd SIS630E_900_REV, Get_Mac_SIS630E_900_REV, 0
|
|
|
|
dd SIS630S_900_REV, Get_Mac_SIS635_900_REV, 0
|
|
|
|
dd SIS630EA1_900_REV, Get_Mac_SIS635_900_REV, 0
|
2014-07-18 14:56:56 +02:00
|
|
|
dd SIS630ET_900_REV, Get_Mac_SIS635_900_REV, 0 ; SIS630ET_900_REV_SpecialFN
|
2013-05-28 19:34:26 +02:00
|
|
|
dd SIS635A_900_REV, Get_Mac_SIS635_900_REV, 0
|
|
|
|
dd SIS900_960_REV, SIS960_get_mac_addr, 0
|
|
|
|
dd SIS900B_900_REV, SIS900_get_mac_addr, 0
|
2014-07-18 14:56:56 +02:00
|
|
|
dd 0 ; end of list
|
2013-05-28 19:34:26 +02:00
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
include_debug_strings ; All data wich FDO uses will be included here
|
2013-05-28 19:34:26 +02:00
|
|
|
|
2014-07-18 14:56:56 +02:00
|
|
|
align 4
|
|
|
|
devices dd 0
|
|
|
|
device_list rd MAX_DEVICES ; This list contains all pointers to device structures the driver is handling
|
2013-05-28 19:34:26 +02:00
|
|
|
|