forked from KolibriOS/kolibrios
blit from system memory in PIO mode
git-svn-id: svn://kolibrios.org@1002 a494cfbc-eb01-0410-851d-a64ba20cac60
This commit is contained in:
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76bc83bd66
commit
80c71dc52a
@ -10,20 +10,20 @@ static int _L1OutCode( clip_t *clip, int x, int y )
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Verify that a point is inside or outside the active viewport. */
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Verify that a point is inside or outside the active viewport. */
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{
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{
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int flag;
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int flag;
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flag = 0;
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flag = 0;
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if( x < clip->xmin ) {
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if( x < clip->xmin ) {
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flag |= CLIP_LEFT;
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flag |= CLIP_LEFT;
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} else if( x > clip->xmax ) {
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} else if( x > clip->xmax ) {
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flag |= CLIP_RIGHT;
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flag |= CLIP_RIGHT;
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}
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}
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if( y < clip->ymin ) {
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if( y < clip->ymin ) {
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flag |= CLIP_TOP;
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flag |= CLIP_TOP;
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} else if( y > clip->ymax ) {
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} else if( y > clip->ymax ) {
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flag |= CLIP_BOTTOM;
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flag |= CLIP_BOTTOM;
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}
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}
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return( flag );
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return( flag );
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}
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}
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@ -35,18 +35,18 @@ static void line_inter( int * x1, int* y1, int x2, int y2, int x )
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NOTE : the signs of denom and ( x - *x1 ) cancel out during division
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NOTE : the signs of denom and ( x - *x1 ) cancel out during division
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so make both of them positive before rounding. */
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so make both of them positive before rounding. */
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{
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{
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int numer;
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int numer;
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int denom;
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int denom;
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denom = abs( x2 - *x1 );
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denom = abs( x2 - *x1 );
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numer = 2L * (long)( y2 - *y1 ) * abs( x - *x1 );
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numer = 2L * (long)( y2 - *y1 ) * abs( x - *x1 );
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if( numer > 0 ) {
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if( numer > 0 ) {
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numer += denom; /* round to closest pixel */
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numer += denom; /* round to closest pixel */
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} else {
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} else {
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numer -= denom;
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numer -= denom;
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}
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}
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*y1 += numer / ( denom << 1 );
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*y1 += numer / ( denom << 1 );
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*x1 = x;
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*x1 = x;
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}
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}
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@ -57,39 +57,39 @@ int LineClip( clip_t *clip, int *x1, int *y1, int *x2, int *y2 )
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viewport using the Cohen-Sutherland clipping algorithm. Return the
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viewport using the Cohen-Sutherland clipping algorithm. Return the
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clipped coordinates and a decision drawing flag. */
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clipped coordinates and a decision drawing flag. */
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{
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{
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int flag1;
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int flag1;
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int flag2;
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int flag2;
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flag1 = _L1OutCode( clip, *x1, *y1 );
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flag1 = _L1OutCode( clip, *x1, *y1 );
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flag2 = _L1OutCode( clip, *x2, *y2 );
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flag2 = _L1OutCode( clip, *x2, *y2 );
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for( ;; ) {
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for( ;; ) {
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if( flag1 & flag2 ) break; /* trivially outside */
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if( flag1 & flag2 ) break; /* trivially outside */
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if( flag1 == flag2 ) break; /* completely inside */
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if( flag1 == flag2 ) break; /* completely inside */
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if( flag1 == 0 ) { /* first point inside */
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if( flag1 == 0 ) { /* first point inside */
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if( flag2 & CLIP_TOP ) {
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if( flag2 & CLIP_TOP ) {
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line_inter( y2, x2, *y1, *x1, clip->ymin );
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line_inter( y2, x2, *y1, *x1, clip->ymin );
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} else if( flag2 & CLIP_BOTTOM ) {
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} else if( flag2 & CLIP_BOTTOM ) {
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line_inter( y2, x2, *y1, *x1, clip->ymax );
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line_inter( y2, x2, *y1, *x1, clip->ymax );
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} else if( flag2 & CLIP_RIGHT ) {
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} else if( flag2 & CLIP_RIGHT ) {
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line_inter( x2, y2, *x1, *y1, clip->xmax );
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line_inter( x2, y2, *x1, *y1, clip->xmax );
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} else if( flag2 & CLIP_LEFT ) {
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} else if( flag2 & CLIP_LEFT ) {
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line_inter( x2, y2, *x1, *y1, clip->xmin );
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line_inter( x2, y2, *x1, *y1, clip->xmin );
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}
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}
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flag2 = _L1OutCode( clip, *x2, *y2 );
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flag2 = _L1OutCode( clip, *x2, *y2 );
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} else { /* second point inside */
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} else { /* second point inside */
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if( flag1 & CLIP_TOP ) {
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if( flag1 & CLIP_TOP ) {
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line_inter( y1, x1, *y2, *x2, clip->ymin );
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line_inter( y1, x1, *y2, *x2, clip->ymin );
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} else if( flag1 & CLIP_BOTTOM ) {
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} else if( flag1 & CLIP_BOTTOM ) {
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line_inter( y1, x1, *y2, *x2, clip->ymax );
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line_inter( y1, x1, *y2, *x2, clip->ymax );
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} else if( flag1 & CLIP_RIGHT ) {
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} else if( flag1 & CLIP_RIGHT ) {
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line_inter( x1, y1, *x2, *y2, clip->xmax );
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line_inter( x1, y1, *x2, *y2, clip->xmax );
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} else if( flag1 & CLIP_LEFT ) {
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} else if( flag1 & CLIP_LEFT ) {
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line_inter( x1, y1, *x2, *y2, clip->xmin );
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line_inter( x1, y1, *x2, *y2, clip->xmin );
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}
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}
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flag1 = _L1OutCode( clip, *x1, *y1 );
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flag1 = _L1OutCode( clip, *x1, *y1 );
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}
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}
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}
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}
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return( flag1 & flag2 );
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return( flag1 & flag2 );
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}
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}
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@ -98,15 +98,15 @@ static void block_inter( clip_t *clip, int *x, int *y, int flag )
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Find the intersection of a block with a boundary of the viewport. */
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Find the intersection of a block with a boundary of the viewport. */
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{
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{
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if( flag & CLIP_TOP ) {
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if( flag & CLIP_TOP ) {
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*y = clip->ymin;
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*y = clip->ymin;
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} else if( flag & CLIP_BOTTOM ) {
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} else if( flag & CLIP_BOTTOM ) {
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*y = clip->ymax;
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*y = clip->ymax;
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} else if( flag & CLIP_RIGHT ) {
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} else if( flag & CLIP_RIGHT ) {
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*x = clip->xmax;
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*x = clip->xmax;
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} else if( flag & CLIP_LEFT ) {
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} else if( flag & CLIP_LEFT ) {
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*x = clip->xmin;
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*x = clip->xmin;
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}
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}
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}
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}
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@ -118,23 +118,23 @@ int BlockClip(clip_t *clip, int *x1, int *y1, int *x2, int* y2 )
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clipping. Return the clipped coordinates and a decision drawing
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clipping. Return the clipped coordinates and a decision drawing
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flag ( 0 draw : 1 don't draw ). */
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flag ( 0 draw : 1 don't draw ). */
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{
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{
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int flag1;
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int flag1;
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int flag2;
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int flag2;
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flag1 = _L1OutCode( clip, *x1, *y1 );
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flag1 = _L1OutCode( clip, *x1, *y1 );
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flag2 = _L1OutCode( clip, *x2, *y2 );
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flag2 = _L1OutCode( clip, *x2, *y2 );
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for( ;; ) {
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for( ;; ) {
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if( flag1 & flag2 ) break; /* trivially outside */
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if( flag1 & flag2 ) break; /* trivially outside */
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if( flag1 == flag2 ) break; /* completely inside */
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if( flag1 == flag2 ) break; /* completely inside */
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if( flag1 == 0 ) {
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if( flag1 == 0 ) {
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block_inter( clip, x2, y2, flag2 );
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block_inter( clip, x2, y2, flag2 );
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flag2 = _L1OutCode( clip, *x2, *y2 );
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flag2 = _L1OutCode( clip, *x2, *y2 );
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} else {
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} else {
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block_inter( clip, x1, y1, flag1 );
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block_inter( clip, x1, y1, flag1 );
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flag1 = _L1OutCode( clip, *x1, *y1 );
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flag1 = _L1OutCode( clip, *x1, *y1 );
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}
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}
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}
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}
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return( flag1 & flag2 );
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return( flag1 & flag2 );
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}
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}
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@ -142,39 +142,39 @@ int blit_clip(clip_t *dst_clip,int *dst_x,int *dst_y,
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clip_t *src_clip,int *src_x, int *src_y,
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clip_t *src_clip,int *src_x, int *src_y,
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int *w, int *h)
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int *w, int *h)
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{
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{
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int sx0, sy0, sx1, sy1;
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int sx0, sy0, sx1, sy1;
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sx0 = *src_x;
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sx0 = *src_x;
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sy0 = *src_y;
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sy0 = *src_y;
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sx1 = sx0 + *w - 1;
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sx1 = sx0 + *w - 1;
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sy1 = sy0 + *h - 1;
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sy1 = sy0 + *h - 1;
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if( ! BlockClip( src_clip, &sx0, &sy0, &sx1, &sy1))
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if( ! BlockClip( src_clip, &sx0, &sy0, &sx1, &sy1))
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{
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{
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int dx0, dy0, dx1, dy1;
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int dx0, dy0, dx1, dy1;
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dx0 = *dst_x + sx0 - *src_x;
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dx0 = *dst_x + sx0 - *src_x;
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dy0 = *dst_y + sy0 - *src_y;
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dy0 = *dst_y + sy0 - *src_y;
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dx1 = dx0 + sx1 - sx0;
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dx1 = dx0 + sx1 - sx0;
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dy1 = dy0 + sy1 - sy0;
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dy1 = dy0 + sy1 - sy0;
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if( ! BlockClip( dst_clip, &dx0, &dy0, &dx1, &dy1))
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if( ! BlockClip( dst_clip, &dx0, &dy0, &dx1, &dy1))
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{
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{
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*w = dx1 - dx0 + 1;
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*w = dx1 - dx0 + 1;
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*h = dy1 - dy0 + 1;
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*h = dy1 - dy0 + 1;
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*src_x += dx0 - *dst_x;
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*src_x += dx0 - *dst_x;
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*src_y += dy0 - *dst_y;
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*src_y += dy0 - *dst_y;
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*dst_x = dx0;
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*dst_x = dx0;
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*dst_y = dx0;
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*dst_y = dy0;
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return 0;
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return 0;
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};
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};
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};
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}
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return 1;
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return 1;
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};
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};
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@ -558,29 +558,29 @@ int Blit(pixmap_t *dst_pixmap, int dst_x, int dst_y,
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int width, int height)
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int width, int height)
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{
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{
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clip_t src_clip, dst_clip;
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clip_t src_clip, dst_clip;
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if( ( width <= 0 ) || ( height<=0 ) )
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if( ( width <= 0 ) || ( height<=0 ) )
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return ERR_PARAM;
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return ERR_PARAM;
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/* if "hardware acceleration present" and
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/* if "hardware acceleration present" and
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"destinastion is primary screen or local videomemory" and
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"destinastion is primary screen or local videomemory"
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"source is primary screen or local videomemory"
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*/
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*/
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if( (srv_hw2d != 0) &&
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if( (srv_hw2d != 0) &&
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( (dst_pixmap == (void*)-1) ||
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( (dst_pixmap == (void*)-1) ||
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( (dst_pixmap->flags & PX_MEM_MASK)==PX_MEM_LOCAL) ) &&
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( (dst_pixmap->flags & PX_MEM_MASK)==PX_MEM_LOCAL) ) /* &&
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( (src_pixmap == (void*)-1) ||
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( (src_pixmap == (void*)-1) ||
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( (src_pixmap->flags & PX_MEM_MASK)==PX_MEM_LOCAL) ) )
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( (src_pixmap->flags & PX_MEM_MASK)==PX_MEM_LOCAL) ) */ )
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{
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{
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ioctl_t io;
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ioctl_t io;
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pxblit_t *blit = (pxblit_t*)&dst_pixmap;
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pxblit_t *blit = (pxblit_t*)&dst_pixmap;
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if((int)dst_pixmap != -1)
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if((int)dst_pixmap != -1)
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blit->dst_pixmap = (pixmap_t*)dst_pixmap->handle;
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blit->dst_pixmap = (pixmap_t*)dst_pixmap->handle;
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if((int)src_pixmap != -1)
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if( (int)src_pixmap != -1 &&
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blit->src_pixmap = (pixmap_t*)src_pixmap->handle;
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(src_pixmap->flags & PX_MEM_MASK) != PX_MEM_SYSTEM)
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blit->src_pixmap = (pixmap_t*)src_pixmap->handle;
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io.handle = srv_hw2d;
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io.handle = srv_hw2d;
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io.io_code = PX_BLIT;
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io.io_code = PX_BLIT;
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@ -590,83 +590,83 @@ int Blit(pixmap_t *dst_pixmap, int dst_x, int dst_y,
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io.out_size = 0;
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io.out_size = 0;
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return call_service(&io);
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return call_service(&io);
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}
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}
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dst_pixmap = (dst_pixmap == (void*)-1) ? &scrn_pixmap : dst_pixmap ;
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dst_pixmap = (dst_pixmap == (void*)-1) ? &scrn_pixmap : dst_pixmap ;
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src_pixmap = (src_pixmap == (void*)-1) ? &scrn_pixmap : src_pixmap ;
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src_pixmap = (src_pixmap == (void*)-1) ? &scrn_pixmap : src_pixmap ;
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src_clip.xmin = 0;
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src_clip.xmin = 0;
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src_clip.ymin = 0;
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src_clip.ymin = 0;
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src_clip.xmax = src_pixmap->width-1;
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src_clip.xmax = src_pixmap->width-1;
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src_clip.ymax = src_pixmap->height-1;
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src_clip.ymax = src_pixmap->height-1;
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dst_clip.xmin = 0;
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dst_clip.xmin = 0;
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dst_clip.ymin = 0;
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dst_clip.ymin = 0;
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dst_clip.xmax = dst_pixmap->width-1;
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dst_clip.xmax = dst_pixmap->width-1;
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dst_clip.ymax = dst_pixmap->height-1;
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dst_clip.ymax = dst_pixmap->height-1;
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if( !blit_clip(&dst_clip, &dst_x, &dst_y,
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if( !blit_clip(&dst_clip, &dst_x, &dst_y,
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&src_clip, &src_x, &src_y,
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&src_clip, &src_x, &src_y,
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&width, &height) )
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&width, &height) )
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{
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{
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color_t *src_addr = &((color_t*)(src_pixmap->mapped))[src_pixmap->pitch*src_y/4+src_x];
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color_t *src_addr = &((color_t*)(src_pixmap->mapped))[src_pixmap->pitch*src_y/4+src_x];
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color_t *dst_addr = &((color_t*)(dst_pixmap->mapped))[dst_pixmap->pitch*dst_y/4+dst_x];
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color_t *dst_addr = &((color_t*)(dst_pixmap->mapped))[dst_pixmap->pitch*dst_y/4+dst_x];
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while( height-- )
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while( height-- )
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{
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{
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int w = width;
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int w = width;
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color_t *tmp_src = src_addr;
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color_t *tmp_src = src_addr;
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color_t *tmp_dst = dst_addr;
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color_t *tmp_dst = dst_addr;
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src_addr += src_pixmap->pitch/4;
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src_addr += src_pixmap->pitch/4;
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dst_addr += dst_pixmap->pitch/4;
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dst_addr += dst_pixmap->pitch/4;
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while( w >= 8)
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while( w >= 8)
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{
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{
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__asm__ __volatile__ (
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__asm__ __volatile__ (
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"movq (%0), %%mm0\n"
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"movq (%0), %%mm0\n"
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"movq 8(%0), %%mm1\n"
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"movq 8(%0), %%mm1\n"
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"movq 16(%0), %%mm2\n"
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"movq 16(%0), %%mm2\n"
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"movq 24(%0), %%mm3\n"
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"movq 24(%0), %%mm3\n"
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"movq %%mm0, (%1)\n"
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"movq %%mm0, (%1)\n"
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"movq %%mm1, 8(%1)\n"
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"movq %%mm1, 8(%1)\n"
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"movq %%mm2, 16(%1)\n"
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"movq %%mm2, 16(%1)\n"
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"movq %%mm3, 24(%1)\n"
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"movq %%mm3, 24(%1)\n"
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:: "r" (tmp_src), "r" (tmp_dst)
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:: "r" (tmp_src), "r" (tmp_dst)
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: "memory", "%mm0", "%mm1", "%mm2", "%mm3");
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: "memory", "%mm0", "%mm1", "%mm2", "%mm3");
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w -= 8;
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w -= 8;
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tmp_src += 8;
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tmp_src += 8;
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tmp_dst += 8;
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tmp_dst += 8;
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};
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};
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if( w >= 4 )
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if( w >= 4 )
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{
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{
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__asm__ __volatile__ (
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__asm__ __volatile__ (
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"movq (%0), %%mm0\n"
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"movq (%0), %%mm0\n"
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"movq 8(%0), %%mm1\n"
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"movq 8(%0), %%mm1\n"
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"movq %%mm0, (%1)\n"
|
"movq %%mm0, (%1)\n"
|
||||||
"movq %%mm1, 8(%1)\n"
|
"movq %%mm1, 8(%1)\n"
|
||||||
:: "r" (tmp_src), "r" (tmp_dst)
|
:: "r" (tmp_src), "r" (tmp_dst)
|
||||||
: "memory", "%mm0", "%mm1");
|
: "memory", "%mm0", "%mm1");
|
||||||
w -= 4;
|
w -= 4;
|
||||||
tmp_src += 4;
|
tmp_src += 4;
|
||||||
tmp_dst += 4;
|
tmp_dst += 4;
|
||||||
};
|
};
|
||||||
if( w >= 2 )
|
if( w >= 2 )
|
||||||
{
|
{
|
||||||
__asm__ __volatile__ (
|
__asm__ __volatile__ (
|
||||||
"movq (%0), %%mm0\n"
|
"movq (%0), %%mm0\n"
|
||||||
"movq %%mm0, (%1)\n"
|
"movq %%mm0, (%1)\n"
|
||||||
:: "r" (tmp_src), "r" (tmp_dst)
|
:: "r" (tmp_src), "r" (tmp_dst)
|
||||||
: "memory", "%mm0");
|
: "memory", "%mm0");
|
||||||
w -= 2;
|
w -= 2;
|
||||||
tmp_src += 2;
|
tmp_src += 2;
|
||||||
tmp_dst += 2;
|
tmp_dst += 2;
|
||||||
};
|
};
|
||||||
if( w )
|
if( w )
|
||||||
*tmp_dst = *tmp_src;
|
*tmp_dst = *tmp_src;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
return ERR_OK;
|
return ERR_OK;
|
||||||
};
|
};
|
||||||
|
|
||||||
int TransparentBlit(pixmap_t *dst_pixmap, int dst_x, int dst_y,
|
int TransparentBlit(pixmap_t *dst_pixmap, int dst_x, int dst_y,
|
||||||
@ -705,6 +705,9 @@ int TransparentBlit(pixmap_t *dst_pixmap, int dst_x, int dst_y,
|
|||||||
return call_service(&io);
|
return call_service(&io);
|
||||||
};
|
};
|
||||||
|
|
||||||
|
dst_pixmap = (dst_pixmap == (void*)-1) ? &scrn_pixmap : dst_pixmap ;
|
||||||
|
src_pixmap = (src_pixmap == (void*)-1) ? &scrn_pixmap : src_pixmap ;
|
||||||
|
|
||||||
src_clip.xmin = 0;
|
src_clip.xmin = 0;
|
||||||
src_clip.ymin = 0;
|
src_clip.ymin = 0;
|
||||||
src_clip.xmax = src_pixmap->width-1;
|
src_clip.xmax = src_pixmap->width-1;
|
||||||
@ -722,8 +725,6 @@ int TransparentBlit(pixmap_t *dst_pixmap, int dst_x, int dst_y,
|
|||||||
{
|
{
|
||||||
__m64 clr_key;
|
__m64 clr_key;
|
||||||
|
|
||||||
dst_pixmap = (dst_pixmap == (void*)-1) ? &scrn_pixmap : dst_pixmap ;
|
|
||||||
src_pixmap = (src_pixmap == (void*)-1) ? &scrn_pixmap : src_pixmap ;
|
|
||||||
|
|
||||||
color_t *src_addr = &((color_t*)(src_pixmap->mapped))[src_pixmap->pitch*src_y/4+src_x];
|
color_t *src_addr = &((color_t*)(src_pixmap->mapped))[src_pixmap->pitch*src_y/4+src_x];
|
||||||
color_t *dst_addr = &((color_t*)(dst_pixmap->mapped))[dst_pixmap->pitch*dst_y/4+dst_x];
|
color_t *dst_addr = &((color_t*)(dst_pixmap->mapped))[dst_pixmap->pitch*dst_y/4+dst_x];
|
||||||
@ -766,4 +767,106 @@ int TransparentBlit(pixmap_t *dst_pixmap, int dst_x, int dst_y,
|
|||||||
return ERR_OK;
|
return ERR_OK;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
unsigned long long m_0080 = 0x0080008000800080ULL;
|
||||||
|
|
||||||
|
int BlitAlpha(pixmap_t *dst_pixmap, int dst_x, int dst_y,
|
||||||
|
pixmap_t *src_pixmap, int src_x, int src_y,
|
||||||
|
int width, int height, u32_t alpha)
|
||||||
|
{
|
||||||
|
clip_t src_clip, dst_clip;
|
||||||
|
|
||||||
|
if( (srv_hw2d != 0) &&
|
||||||
|
( (dst_pixmap == (void*)-1) ||
|
||||||
|
( (dst_pixmap->flags & PX_MEM_MASK)==PX_MEM_LOCAL) ) &&
|
||||||
|
( (src_pixmap == (void*)-1) ||
|
||||||
|
( (src_pixmap->flags & PX_MEM_MASK)==PX_MEM_LOCAL) ) )
|
||||||
|
{
|
||||||
|
ioctl_t io;
|
||||||
|
pxblit_t *blit = (pxblit_t*)&dst_pixmap;
|
||||||
|
|
||||||
|
if((int)dst_pixmap != -1)
|
||||||
|
blit->dst_pixmap = (pixmap_t*)dst_pixmap->handle;
|
||||||
|
|
||||||
|
if((int)src_pixmap != -1)
|
||||||
|
blit->src_pixmap = (pixmap_t*)src_pixmap->handle;
|
||||||
|
|
||||||
|
io.handle = srv_hw2d;
|
||||||
|
io.io_code = PX_BLIT_ALPHA;
|
||||||
|
io.input = blit;
|
||||||
|
io.inp_size = 9;
|
||||||
|
io.output = NULL;
|
||||||
|
io.out_size = 0;
|
||||||
|
|
||||||
|
return call_service(&io);
|
||||||
|
};
|
||||||
|
|
||||||
|
dst_pixmap = (dst_pixmap == (void*)-1) ? &scrn_pixmap : dst_pixmap ;
|
||||||
|
src_pixmap = (src_pixmap == (void*)-1) ? &scrn_pixmap : src_pixmap ;
|
||||||
|
|
||||||
|
src_clip.xmin = 0;
|
||||||
|
src_clip.ymin = 0;
|
||||||
|
src_clip.xmax = src_pixmap->width-1;
|
||||||
|
src_clip.ymax = src_pixmap->height-1;
|
||||||
|
|
||||||
|
dst_clip.xmin = 0;
|
||||||
|
dst_clip.ymin = 0;
|
||||||
|
dst_clip.xmax = dst_pixmap->width-1;
|
||||||
|
dst_clip.ymax = dst_pixmap->height-1;
|
||||||
|
|
||||||
|
|
||||||
|
if( !blit_clip(&dst_clip, &dst_x, &dst_y,
|
||||||
|
&src_clip, &src_x, &src_y,
|
||||||
|
&width, &height) )
|
||||||
|
{
|
||||||
|
__m64 m_alpha;
|
||||||
|
__m64 m_one_alpha;
|
||||||
|
|
||||||
|
color_t *src_addr = &((color_t*)(src_pixmap->mapped))[src_pixmap->pitch*src_y/4+src_x];
|
||||||
|
color_t *dst_addr = &((color_t*)(dst_pixmap->mapped))[dst_pixmap->pitch*dst_y/4+dst_x];
|
||||||
|
|
||||||
|
m_alpha = _mm_cvtsi32_si64((alpha << 16) | alpha);
|
||||||
|
m_alpha = _mm_unpacklo_pi32(m_alpha, m_alpha);
|
||||||
|
m_one_alpha = _mm_subs_pu16((__m64)0x00FF00FF00FF00FFULL, m_alpha);
|
||||||
|
|
||||||
|
while( height-- )
|
||||||
|
{
|
||||||
|
int w = width;
|
||||||
|
color_t *tmp_src = src_addr;
|
||||||
|
color_t *tmp_dst = dst_addr;
|
||||||
|
|
||||||
|
src_addr += src_pixmap->pitch/4;
|
||||||
|
dst_addr += dst_pixmap->pitch/4;
|
||||||
|
|
||||||
|
while( w-- )
|
||||||
|
{
|
||||||
|
__asm__ __volatile__ (
|
||||||
|
"movd (%0), %%mm0 \n\t"
|
||||||
|
"pxor %%mm1, %%mm1 \n\t"
|
||||||
|
"punpcklbw %%mm1, %%mm0 \n\t"
|
||||||
|
"pmullw %[clr_key], %%mm0 \n\t"
|
||||||
|
// "paddw %[m_0080], %%mm0 \n\t"
|
||||||
|
|
||||||
|
"movd (%1), %%mm2 \n\t"
|
||||||
|
"punpcklbw %%mm1, %%mm2 \n\t"
|
||||||
|
"pmullw %[m_one_alpha], %%mm2 \n\t"
|
||||||
|
// "paddw %[m_0080], %%mm2 \n\t"
|
||||||
|
|
||||||
|
"paddw %%mm2, %%mm0 \n\t"
|
||||||
|
"psrlw $8, %%mm0 \n\t"
|
||||||
|
"packuswb %%mm0, %%mm0 \n\t"
|
||||||
|
"movd %%mm0, (%1)"
|
||||||
|
:: "r" (tmp_src),
|
||||||
|
"r" (tmp_dst),
|
||||||
|
[clr_key] "y" (m_alpha),
|
||||||
|
[m_one_alpha] "y" (m_one_alpha)
|
||||||
|
:"memory","mm0", "mm1", "mm2");
|
||||||
|
|
||||||
|
tmp_src++;
|
||||||
|
tmp_dst++;
|
||||||
|
};
|
||||||
|
// if( w && (*tmp_src != alpha) )
|
||||||
|
// *tmp_dst = *tmp_src;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
return ERR_OK;
|
||||||
|
}
|
||||||
|
@ -1,4 +1,6 @@
|
|||||||
|
|
||||||
|
//#define KOLIBRI_PE
|
||||||
|
|
||||||
#include "types.h"
|
#include "types.h"
|
||||||
#include "system.h"
|
#include "system.h"
|
||||||
|
|
||||||
@ -64,9 +66,9 @@ int __stdcall start(int state)
|
|||||||
scrn_pixmap.width = scrnsize >> 16;
|
scrn_pixmap.width = scrnsize >> 16;
|
||||||
scrn_pixmap.height = scrnsize & 0xFFFF;
|
scrn_pixmap.height = scrnsize & 0xFFFF;
|
||||||
scrn_pixmap.format = PICT_a8r8g8b8;
|
scrn_pixmap.format = PICT_a8r8g8b8;
|
||||||
scrn_pixmap.flags = 0;
|
scrn_pixmap.flags = PX_MEM_LOCAL;
|
||||||
scrn_pixmap.pitch = scrnpitch;
|
scrn_pixmap.pitch = scrnpitch;
|
||||||
scrn_pixmap.mapped = (void*)0xFE000000;
|
scrn_pixmap.mapped = (void*)LFB_BASE;
|
||||||
|
|
||||||
br_slab.available = 256;
|
br_slab.available = 256;
|
||||||
br_slab.start = brushes;
|
br_slab.start = brushes;
|
||||||
@ -129,6 +131,7 @@ char szDrawRect[] = "DrawRect";
|
|||||||
char szFillRect[] = "FillRect";
|
char szFillRect[] = "FillRect";
|
||||||
char szBlit[] = "Blit";
|
char szBlit[] = "Blit";
|
||||||
char szTransparentBlit[] = "TransparentBlit";
|
char szTransparentBlit[] = "TransparentBlit";
|
||||||
|
char szBlitAlpha[] = "BlitAlpha";
|
||||||
|
|
||||||
|
|
||||||
export_t EXPORTS[] __asm__("EXPORTS") =
|
export_t EXPORTS[] __asm__("EXPORTS") =
|
||||||
@ -155,6 +158,7 @@ export_t EXPORTS[] __asm__("EXPORTS") =
|
|||||||
{ szFillRect, FillRect },
|
{ szFillRect, FillRect },
|
||||||
{ szBlit, Blit },
|
{ szBlit, Blit },
|
||||||
{ szTransparentBlit, TransparentBlit },
|
{ szTransparentBlit, TransparentBlit },
|
||||||
|
{ szBlitAlpha, BlitAlpha },
|
||||||
|
|
||||||
{ NULL, NULL },
|
{ NULL, NULL },
|
||||||
};
|
};
|
||||||
|
@ -151,6 +151,7 @@ typedef struct
|
|||||||
int src_y;
|
int src_y;
|
||||||
int w;
|
int w;
|
||||||
int h;
|
int h;
|
||||||
|
color_t key;
|
||||||
}pxblit_t;
|
}pxblit_t;
|
||||||
|
|
||||||
#define PX_CREATE 1
|
#define PX_CREATE 1
|
||||||
|
@ -126,6 +126,21 @@ macro Blit dstpix, dstx, dsty, srcpix, srcx, srcy, w, h
|
|||||||
add esp, 8*4
|
add esp, 8*4
|
||||||
}
|
}
|
||||||
|
|
||||||
|
macro BlitAlpha dstpix, dstx, dsty, srcpix, srcx, srcy, w, h, alpha
|
||||||
|
{
|
||||||
|
pushd alpha
|
||||||
|
pushd h
|
||||||
|
pushd w
|
||||||
|
pushd srcy
|
||||||
|
pushd srcx
|
||||||
|
pushd srcpix
|
||||||
|
pushd dsty
|
||||||
|
pushd dstx
|
||||||
|
pushd dstpix
|
||||||
|
call [imp_BlitAlpha]
|
||||||
|
add esp, 9*4
|
||||||
|
}
|
||||||
|
|
||||||
macro TransparentBlit dstpix, dstx, dsty, srcpix, srcx, srcy, w, h, key
|
macro TransparentBlit dstpix, dstx, dsty, srcpix, srcx, srcy, w, h, key
|
||||||
{
|
{
|
||||||
pushd key
|
pushd key
|
||||||
@ -141,6 +156,25 @@ macro TransparentBlit dstpix, dstx, dsty, srcpix, srcx, srcy, w, h, key
|
|||||||
add esp, 9*4
|
add esp, 9*4
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
macro fix_cwd path
|
||||||
|
{
|
||||||
|
pushd path
|
||||||
|
|
||||||
|
push '/'
|
||||||
|
push path
|
||||||
|
call _strrchr
|
||||||
|
|
||||||
|
mov byte [eax], 0
|
||||||
|
|
||||||
|
mov eax, 30
|
||||||
|
mov ebx, 1
|
||||||
|
mov ecx, [esp+8]
|
||||||
|
int 0x40
|
||||||
|
|
||||||
|
add esp, 12
|
||||||
|
}
|
||||||
|
|
||||||
szPxlib db '/rd/1/lib/pixlib.obj',0
|
szPxlib db '/rd/1/lib/pixlib.obj',0
|
||||||
|
|
||||||
szStart db 'START',0
|
szStart db 'START',0
|
||||||
@ -162,6 +196,7 @@ szDrawRect db 'DrawRect',0
|
|||||||
szFillRect db 'FillRect',0
|
szFillRect db 'FillRect',0
|
||||||
szBlit db 'Blit',0
|
szBlit db 'Blit',0
|
||||||
szTransparentBlit db 'TransparentBlit',0
|
szTransparentBlit db 'TransparentBlit',0
|
||||||
|
szBlitAlpha db 'BlitAlpha',0
|
||||||
|
|
||||||
align 4
|
align 4
|
||||||
|
|
||||||
@ -186,6 +221,7 @@ imp_DrawRect dd szDrawRect
|
|||||||
imp_FillRect dd szFillRect
|
imp_FillRect dd szFillRect
|
||||||
imp_Blit dd szBlit
|
imp_Blit dd szBlit
|
||||||
imp_TransparentBlit dd szTransparentBlit
|
imp_TransparentBlit dd szTransparentBlit
|
||||||
|
imp_BlitAlpha dd szBlitAlpha
|
||||||
|
|
||||||
dd 0
|
dd 0
|
||||||
|
|
||||||
@ -257,4 +293,31 @@ load_pxlib:
|
|||||||
xor eax, eax
|
xor eax, eax
|
||||||
ret
|
ret
|
||||||
|
|
||||||
|
align 4
|
||||||
|
_strrchr:
|
||||||
|
push ebp
|
||||||
|
mov ebp, esp
|
||||||
|
push edi
|
||||||
|
mov edi, [8+ebp]
|
||||||
|
mov ecx, -1
|
||||||
|
xor al, al
|
||||||
|
cld
|
||||||
|
repne
|
||||||
|
scasb
|
||||||
|
not ecx
|
||||||
|
dec edi
|
||||||
|
mov al, [12+ebp]
|
||||||
|
std
|
||||||
|
repne
|
||||||
|
scasb
|
||||||
|
cld
|
||||||
|
jne .failure
|
||||||
|
lea eax, [edi+1]
|
||||||
|
pop edi
|
||||||
|
pop ebp
|
||||||
|
ret
|
||||||
|
.failure:
|
||||||
|
xor eax, eax
|
||||||
|
pop edi
|
||||||
|
pop ebp
|
||||||
|
ret
|
||||||
|
@ -23,17 +23,17 @@ static void free_pixmap(pixmap_t *pixmap)
|
|||||||
|
|
||||||
pixmap_t* CreatePixmap(unsigned width, unsigned height, u32_t format, u32_t flags)
|
pixmap_t* CreatePixmap(unsigned width, unsigned height, u32_t format, u32_t flags)
|
||||||
{
|
{
|
||||||
pixmap_t *pixmap;
|
pixmap_t *pixmap;
|
||||||
|
|
||||||
if( (width == 0) || ( width > 2048)||
|
if( (width == 0) || ( width > 2048)||
|
||||||
(height == 0) || (height > 2048)||
|
(height == 0) || (height > 2048)||
|
||||||
(format != PICT_a8r8g8b8))
|
(format != PICT_a8r8g8b8))
|
||||||
return NULL;
|
return NULL;
|
||||||
|
|
||||||
pixmap = alloc_pixmap();
|
pixmap = alloc_pixmap();
|
||||||
|
|
||||||
if( pixmap )
|
if( pixmap )
|
||||||
{
|
{
|
||||||
void *raw;
|
void *raw;
|
||||||
int pitch;
|
int pitch;
|
||||||
|
|
||||||
@ -43,45 +43,43 @@ pixmap_t* CreatePixmap(unsigned width, unsigned height, u32_t format, u32_t flag
|
|||||||
pixmap->flags = flags;
|
pixmap->flags = flags;
|
||||||
|
|
||||||
if( (srv_hw2d != 0) &&
|
if( (srv_hw2d != 0) &&
|
||||||
( (flags & PX_MEM_MASK)==PX_MEM_LOCAL) )
|
( (flags & PX_MEM_MASK)==PX_MEM_LOCAL) )
|
||||||
{
|
{
|
||||||
ioctl_t io;
|
ioctl_t io;
|
||||||
io.handle = srv_hw2d;
|
io.handle = srv_hw2d;
|
||||||
io.io_code = PX_CREATE;
|
io.io_code = PX_CREATE;
|
||||||
io.input = pixmap;
|
io.input = pixmap;
|
||||||
io.inp_size = 7;
|
io.inp_size = 7;
|
||||||
io.output = NULL;
|
io.output = NULL;
|
||||||
io.out_size = 0;
|
io.out_size = 0;
|
||||||
|
|
||||||
if (call_service(&io)==ERR_OK)
|
if (call_service(&io)==ERR_OK)
|
||||||
return pixmap;
|
return pixmap;
|
||||||
else
|
else{
|
||||||
{
|
free_pixmap(pixmap) ;
|
||||||
free_pixmap(pixmap) ;
|
return NULL;
|
||||||
return NULL;
|
}
|
||||||
}
|
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
/*
|
/*
|
||||||
Only system memory
|
Only system memory
|
||||||
*/
|
*/
|
||||||
pixmap->flags &= ~PX_MEM_MASK;
|
pixmap->flags &= ~PX_MEM_MASK;
|
||||||
|
|
||||||
pitch = ((width+8)&~8)*4;
|
pitch = ((width+8)&~8)*4;
|
||||||
raw = UserAlloc(pitch * height);
|
raw = UserAlloc(pitch * height);
|
||||||
|
|
||||||
if (! raw)
|
if ( !raw ){
|
||||||
{
|
free_pixmap(pixmap);
|
||||||
free_pixmap(pixmap);
|
return NULL;
|
||||||
return NULL;
|
};
|
||||||
|
pixmap->pitch = pitch;
|
||||||
|
pixmap->mapped = raw;
|
||||||
};
|
};
|
||||||
pixmap->pitch = pitch;
|
return pixmap;
|
||||||
pixmap->mapped = raw;
|
};
|
||||||
};
|
return NULL;
|
||||||
return pixmap;
|
|
||||||
};
|
|
||||||
return NULL;
|
|
||||||
};
|
};
|
||||||
|
|
||||||
int DestroyPixmap( pixmap_t *pixmap)
|
int DestroyPixmap( pixmap_t *pixmap)
|
||||||
|
@ -18,6 +18,12 @@ typedef struct
|
|||||||
|
|
||||||
///////////////////////////////////////////////////////////////////////////////
|
///////////////////////////////////////////////////////////////////////////////
|
||||||
|
|
||||||
|
#ifdef KOLIBRI_PE
|
||||||
|
#define LFB_BASE 0xDF000000
|
||||||
|
#else
|
||||||
|
#define LFB_BASE 0xFE000000
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
void usleep(u32_t delay);
|
void usleep(u32_t delay);
|
||||||
|
|
||||||
|
@ -64,8 +64,14 @@ typedef struct
|
|||||||
void *local;
|
void *local;
|
||||||
}local_pixmap_t;
|
}local_pixmap_t;
|
||||||
|
|
||||||
|
#define PX_MEM_SYSTEM 0
|
||||||
|
#define PX_MEM_LOCAL 1
|
||||||
|
#define PX_MEM_GART 2
|
||||||
|
|
||||||
#define PX_LOCK 1
|
#define PX_MEM_MASK 3
|
||||||
|
|
||||||
|
|
||||||
|
#define PX_LOCK 1
|
||||||
|
|
||||||
typedef struct
|
typedef struct
|
||||||
{
|
{
|
||||||
|
@ -567,43 +567,140 @@ int FillRect(io_fill_t *fill)
|
|||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
|
#define ADDRREG(addr) ((volatile u32_t *)(rhd.MMIOBase + (addr)))
|
||||||
|
|
||||||
|
|
||||||
|
static int blit_host(u32_t dstpitch, int dstx, int dsty,
|
||||||
|
u32_t src, int srcx, int srcy,
|
||||||
|
int w, int h, int srcpitch)
|
||||||
|
{
|
||||||
|
u32_t ifl;
|
||||||
|
color_t *src_addr;
|
||||||
|
|
||||||
|
ifl = safe_cli();
|
||||||
|
|
||||||
|
#if R300_PIO
|
||||||
|
|
||||||
|
R5xxFIFOWait(5);
|
||||||
|
|
||||||
|
OUTREG(R5XX_DP_GUI_MASTER_CNTL,
|
||||||
|
RADEON_GMC_DST_PITCH_OFFSET_CNTL |
|
||||||
|
// RADEON_GMC_DST_CLIPPING |
|
||||||
|
RADEON_GMC_BRUSH_NONE |
|
||||||
|
RADEON_GMC_DST_32BPP |
|
||||||
|
RADEON_GMC_SRC_DATATYPE_COLOR |
|
||||||
|
RADEON_DP_SRC_SOURCE_HOST_DATA |
|
||||||
|
// RADEON_GMC_BYTE_MSB_TO_LSB |
|
||||||
|
R5XX_GMC_CLR_CMP_CNTL_DIS |
|
||||||
|
R5XX_GMC_WR_MSK_DIS |
|
||||||
|
R5XX_ROP3_S
|
||||||
|
);
|
||||||
|
|
||||||
|
OUTREG(R5XX_DP_CNTL, R5XX_DST_X_LEFT_TO_RIGHT |
|
||||||
|
R5XX_DST_Y_TOP_TO_BOTTOM);
|
||||||
|
|
||||||
|
OUTREG(R5XX_DST_PITCH_OFFSET, dstpitch);
|
||||||
|
|
||||||
|
// OUTREG(RADEON_SC_TOP_LEFT, (y << 16) | ((x+skipleft) & 0xffff));
|
||||||
|
// OUTREG(RADEON_SC_BOTTOM_RIGHT, ((y+h) << 16) | ((x+w) & 0xffff));
|
||||||
|
|
||||||
|
OUTREG(RADEON_DST_Y_X, (dsty << 16) | (dstx & 0xffff));
|
||||||
|
OUTREG(RADEON_DST_HEIGHT_WIDTH, (h << 16) | w);
|
||||||
|
|
||||||
|
|
||||||
|
src_addr = &((color_t*)src)[srcpitch*srcy/4+srcx];
|
||||||
|
|
||||||
|
while ( h-- )
|
||||||
|
{
|
||||||
|
color_t *tmp_src = src_addr;
|
||||||
|
src_addr += srcpitch/4;
|
||||||
|
|
||||||
|
int left = w;
|
||||||
|
|
||||||
|
while( left )
|
||||||
|
{
|
||||||
|
volatile u32_t *d;
|
||||||
|
|
||||||
|
if( left > 8 )
|
||||||
|
{
|
||||||
|
int i;
|
||||||
|
|
||||||
|
R5xxFIFOWait(8);
|
||||||
|
d = ADDRREG(RADEON_HOST_DATA0);
|
||||||
|
|
||||||
|
/* Unrolling doesn't improve performance */
|
||||||
|
for ( i = 0; i < 8; i++)
|
||||||
|
*d++ = *tmp_src++;
|
||||||
|
left -= 8;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
R5xxFIFOWait(left);
|
||||||
|
|
||||||
|
if( h )
|
||||||
|
d = ADDRREG(RADEON_HOST_DATA7) - (left - 1);
|
||||||
|
else
|
||||||
|
d = ADDRREG(RADEON_HOST_DATA_LAST) - (left - 1);
|
||||||
|
|
||||||
|
for ( ; left; --left)
|
||||||
|
*d++ = *tmp_src++;
|
||||||
|
left = 0;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
safe_sti(ifl);
|
||||||
|
|
||||||
|
return ERR_OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
int Blit(io_blit_t *blit)
|
int Blit(io_blit_t *blit)
|
||||||
{
|
{
|
||||||
clip_t src_clip, dst_clip;
|
clip_t src_clip, dst_clip;
|
||||||
|
|
||||||
local_pixmap_t *srcpixmap;
|
local_pixmap_t *srcpixmap;
|
||||||
local_pixmap_t *dstpixmap;
|
local_pixmap_t *dstpixmap;
|
||||||
|
|
||||||
//dbgprintf("Pixblit src: %x dst: %x\n",blit->srcpix, blit->dstpix);
|
//dbgprintf("Pixblit src: %x dst: %x\n",blit->srcpix, blit->dstpix);
|
||||||
|
|
||||||
dstpixmap = (blit->dstpix == (void*)-1) ? &scr_pixmap : blit->dstpix ;
|
dstpixmap = (blit->dstpix == (void*)-1) ? &scr_pixmap : blit->dstpix ;
|
||||||
srcpixmap = (blit->srcpix == (void*)-1) ? &scr_pixmap : blit->srcpix ;
|
srcpixmap = (blit->srcpix == (void*)-1) ? &scr_pixmap : blit->srcpix ;
|
||||||
|
|
||||||
//dbgprintf("srcpixmap: %x dstpixmap: %x\n",srcpixmap, dstpixmap);
|
//dbgprintf("srcpixmap: %x dstpixmap: %x\n",srcpixmap, dstpixmap);
|
||||||
|
|
||||||
//dbgprintf("dst.width: %d dst.height: %d\n", dstpixmap->width,dstpixmap->height);
|
//dbgprintf("dst.width: %d dst.height: %d\n", dstpixmap->width,dstpixmap->height);
|
||||||
//dbgprintf("src.width: %d src.height: %d\n", srcpixmap->width,srcpixmap->height);
|
//dbgprintf("src.width: %d src.height: %d\n", srcpixmap->width,srcpixmap->height);
|
||||||
//dbgprintf("srcpitch: %x dstpitch: %x\n",
|
//dbgprintf("srcpitch: %x dstpitch: %x\n",
|
||||||
// srcpixmap->pitch_offset,dstpixmap->pitch_offset);
|
// srcpixmap->pitch_offset,dstpixmap->pitch_offset);
|
||||||
|
|
||||||
src_clip.xmin = 0;
|
src_clip.xmin = 0;
|
||||||
src_clip.ymin = 0;
|
src_clip.ymin = 0;
|
||||||
src_clip.xmax = srcpixmap->width-1;
|
src_clip.xmax = srcpixmap->width-1;
|
||||||
src_clip.ymax = srcpixmap->height-1;
|
src_clip.ymax = srcpixmap->height-1;
|
||||||
|
|
||||||
dst_clip.xmin = 0;
|
dst_clip.xmin = 0;
|
||||||
dst_clip.ymin = 0;
|
dst_clip.ymin = 0;
|
||||||
dst_clip.xmax = dstpixmap->width-1;
|
dst_clip.xmax = dstpixmap->width-1;
|
||||||
dst_clip.ymax = dstpixmap->height-1;
|
dst_clip.ymax = dstpixmap->height-1;
|
||||||
|
|
||||||
if( !blit_clip(&dst_clip, &blit->dst_x, &blit->dst_y,
|
if( !blit_clip(&dst_clip, &blit->dst_x, &blit->dst_y,
|
||||||
&src_clip, &blit->src_x, &blit->src_y,
|
&src_clip, &blit->src_x, &blit->src_y,
|
||||||
&blit->w, &blit->h) )
|
&blit->w, &blit->h) )
|
||||||
{
|
{
|
||||||
u32_t *ring, write;
|
u32_t *ring, write;
|
||||||
u32_t ifl;
|
u32_t ifl;
|
||||||
|
|
||||||
|
if( (srcpixmap->flags & PX_MEM_MASK)==PX_MEM_SYSTEM)
|
||||||
|
return blit_host(dstpixmap->pitch_offset,
|
||||||
|
blit->dst_x, blit->dst_y,
|
||||||
|
srcpixmap->mapped,
|
||||||
|
blit->src_x, blit->src_y,
|
||||||
|
blit->w, blit->h,
|
||||||
|
srcpixmap->pitch);
|
||||||
|
|
||||||
ifl = safe_cli();
|
ifl = safe_cli();
|
||||||
|
|
||||||
#if R300_PIO
|
#if R300_PIO
|
||||||
@ -632,31 +729,31 @@ int Blit(io_blit_t *blit)
|
|||||||
OUTREG(R5XX_DST_HEIGHT_WIDTH,(blit->h<<16)|blit->w);
|
OUTREG(R5XX_DST_HEIGHT_WIDTH,(blit->h<<16)|blit->w);
|
||||||
|
|
||||||
#else
|
#else
|
||||||
BEGIN_RING(7);
|
BEGIN_RING(7);
|
||||||
|
|
||||||
OUT_RING(CP_PACKET3(RADEON_CNTL_BITBLT, 5));
|
OUT_RING(CP_PACKET3(RADEON_CNTL_BITBLT, 5));
|
||||||
|
|
||||||
OUT_RING(RADEON_GMC_SRC_PITCH_OFFSET_CNTL |
|
OUT_RING(RADEON_GMC_SRC_PITCH_OFFSET_CNTL |
|
||||||
RADEON_GMC_DST_PITCH_OFFSET_CNTL |
|
RADEON_GMC_DST_PITCH_OFFSET_CNTL |
|
||||||
RADEON_GMC_BRUSH_NONE |
|
RADEON_GMC_BRUSH_NONE |
|
||||||
RADEON_GMC_DST_32BPP |
|
RADEON_GMC_DST_32BPP |
|
||||||
RADEON_GMC_SRC_DATATYPE_COLOR |
|
RADEON_GMC_SRC_DATATYPE_COLOR |
|
||||||
RADEON_DP_SRC_SOURCE_MEMORY |
|
RADEON_DP_SRC_SOURCE_MEMORY |
|
||||||
R5XX_GMC_CLR_CMP_CNTL_DIS |
|
R5XX_GMC_CLR_CMP_CNTL_DIS |
|
||||||
R5XX_GMC_WR_MSK_DIS |
|
R5XX_GMC_WR_MSK_DIS |
|
||||||
R5XX_ROP3_S
|
R5XX_ROP3_S
|
||||||
);
|
);
|
||||||
|
|
||||||
OUT_RING(srcpixmap->pitch_offset);
|
OUT_RING(srcpixmap->pitch_offset);
|
||||||
OUT_RING(dstpixmap->pitch_offset);
|
OUT_RING(dstpixmap->pitch_offset);
|
||||||
|
|
||||||
OUT_RING((blit->src_x<<16)|blit->src_y);
|
OUT_RING((blit->src_x<<16)|blit->src_y);
|
||||||
OUT_RING((blit->dst_x<<16)|blit->dst_y);
|
OUT_RING((blit->dst_x<<16)|blit->dst_y);
|
||||||
OUT_RING((blit->w<<16)|blit->h);
|
OUT_RING((blit->w<<16)|blit->h);
|
||||||
COMMIT_RING();
|
COMMIT_RING();
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
safe_sti(ifl);
|
safe_sti(ifl);
|
||||||
};
|
};
|
||||||
return ERR_OK;
|
return ERR_OK;
|
||||||
};
|
};
|
||||||
|
@ -1,6 +1,11 @@
|
|||||||
|
|
||||||
|
|
||||||
#define R300_PIO 0 /* now we have cp */
|
#define R300_PIO 1
|
||||||
|
|
||||||
|
|
||||||
|
#define API_VERSION 0x01000100
|
||||||
|
|
||||||
|
#define SRV_GETVERSION 0
|
||||||
|
|
||||||
|
|
||||||
#include "types.h"
|
#include "types.h"
|
||||||
@ -72,8 +77,11 @@ u32_t __stdcall drvEntry(int action)
|
|||||||
|
|
||||||
R5xx2DInit();
|
R5xx2DInit();
|
||||||
|
|
||||||
|
#if !R300_PIO
|
||||||
|
|
||||||
Init3DEngine(&rhd);
|
Init3DEngine(&rhd);
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
retval = RegService("HDRAW", srv_2d);
|
retval = RegService("HDRAW", srv_2d);
|
||||||
dbgprintf("reg service %s as: %x\n", "HDRAW", retval);
|
dbgprintf("reg service %s as: %x\n", "HDRAW", retval);
|
||||||
@ -82,11 +90,6 @@ u32_t __stdcall drvEntry(int action)
|
|||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
#define API_VERSION 0x01000100
|
|
||||||
|
|
||||||
#define SRV_GETVERSION 0
|
|
||||||
|
|
||||||
|
|
||||||
int __stdcall srv_2d(ioctl_t *io)
|
int __stdcall srv_2d(ioctl_t *io)
|
||||||
{
|
{
|
||||||
u32_t *inp;
|
u32_t *inp;
|
||||||
|
@ -39,49 +39,50 @@
|
|||||||
* already mapped into each client's address space.
|
* already mapped into each client's address space.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
struct mem_block {
|
struct mem_block
|
||||||
struct mem_block *next;
|
{
|
||||||
struct mem_block *prev;
|
struct mem_block *next;
|
||||||
u32_t start;
|
struct mem_block *prev;
|
||||||
size_t size;
|
u32_t start;
|
||||||
|
size_t size;
|
||||||
};
|
};
|
||||||
|
|
||||||
/* Initialize. How to check for an uninitialized heap?
|
/* Initialize. How to check for an uninitialized heap?
|
||||||
*/
|
*/
|
||||||
static int init_heap(struct mem_block **heap, int start, int size)
|
static int init_heap(struct mem_block **heap, int start, int size)
|
||||||
{
|
{
|
||||||
struct mem_block *blocks = malloc(sizeof(*blocks));
|
struct mem_block *blocks = malloc(sizeof(*blocks));
|
||||||
|
|
||||||
if (!blocks)
|
if (!blocks)
|
||||||
return -1; //-ENOMEM;
|
return -1; //-ENOMEM;
|
||||||
|
|
||||||
*heap = malloc(sizeof(**heap));
|
*heap = malloc(sizeof(**heap));
|
||||||
if (!*heap)
|
if (!*heap)
|
||||||
{
|
{
|
||||||
free(blocks);
|
free(blocks);
|
||||||
return -1; //-ENOMEM;
|
return -1; //-ENOMEM;
|
||||||
}
|
}
|
||||||
|
|
||||||
blocks->start = start;
|
blocks->start = start;
|
||||||
blocks->size = size;
|
blocks->size = size;
|
||||||
blocks->next = blocks->prev = *heap;
|
blocks->next = blocks->prev = *heap;
|
||||||
|
|
||||||
__clear(*heap,sizeof(**heap));
|
__clear(*heap,sizeof(**heap));
|
||||||
(*heap)->next = (*heap)->prev = blocks;
|
(*heap)->next = (*heap)->prev = blocks;
|
||||||
(*heap)->start |= USED_BLOCK;
|
(*heap)->start |= USED_BLOCK;
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static struct mem_block **get_heap(RHDPtr rhdPtr, int region)
|
static struct mem_block **get_heap(RHDPtr rhdPtr, int region)
|
||||||
{
|
{
|
||||||
switch (region)
|
switch (region)
|
||||||
{
|
{
|
||||||
case RHD_MEM_GART:
|
case RHD_MEM_GART:
|
||||||
return &rhdPtr->gart_heap;
|
return &rhdPtr->gart_heap;
|
||||||
case RHD_MEM_FB:
|
case RHD_MEM_FB:
|
||||||
return &rhdPtr->fb_heap;
|
return &rhdPtr->fb_heap;
|
||||||
default:
|
default:
|
||||||
return NULL;
|
return NULL;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -91,17 +92,17 @@ static struct mem_block *split_block(struct mem_block *p, int size)
|
|||||||
/* Maybe cut off the end of an existing block */
|
/* Maybe cut off the end of an existing block */
|
||||||
if (size < p->size)
|
if (size < p->size)
|
||||||
{
|
{
|
||||||
struct mem_block *newblock = malloc(sizeof(*newblock));
|
struct mem_block *newblock = malloc(sizeof(*newblock));
|
||||||
if (!newblock)
|
if (!newblock)
|
||||||
goto out;
|
goto out;
|
||||||
newblock->start = p->start + size;
|
newblock->start = p->start + size;
|
||||||
newblock->size = p->size - size;
|
newblock->size = p->size - size;
|
||||||
newblock->next = p->next;
|
newblock->next = p->next;
|
||||||
newblock->prev = p;
|
newblock->prev = p;
|
||||||
p->next->prev = newblock;
|
p->next->prev = newblock;
|
||||||
p->next = newblock;
|
p->next = newblock;
|
||||||
p->size = size;
|
p->size = size;
|
||||||
p->start|=USED_BLOCK;
|
p->start|=USED_BLOCK;
|
||||||
}
|
}
|
||||||
|
|
||||||
out:
|
out:
|
||||||
@ -112,11 +113,10 @@ static struct mem_block *alloc_block(struct mem_block *heap, int size)
|
|||||||
{
|
{
|
||||||
struct mem_block *p;
|
struct mem_block *p;
|
||||||
|
|
||||||
list_for_each(p, heap)
|
list_for_each(p, heap)
|
||||||
{
|
{
|
||||||
|
if ( !(p->start & USED_BLOCK) && size <= p->size)
|
||||||
if ( !(p->start & USED_BLOCK) && size <= p->size)
|
return split_block(p, size);
|
||||||
return split_block(p, size);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
return NULL;
|
return NULL;
|
||||||
@ -140,70 +140,70 @@ static void free_block(struct mem_block *p)
|
|||||||
* 'heap' to stop it being subsumed.
|
* 'heap' to stop it being subsumed.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
p->start &= ~USED_BLOCK;
|
p->start &= ~USED_BLOCK;
|
||||||
|
|
||||||
if ( !(p->next->start & USED_BLOCK))
|
if ( !(p->next->start & USED_BLOCK))
|
||||||
{
|
{
|
||||||
struct mem_block *q = p->next;
|
struct mem_block *q = p->next;
|
||||||
p->size += q->size;
|
p->size += q->size;
|
||||||
p->next = q->next;
|
p->next = q->next;
|
||||||
p->next->prev = p;
|
p->next->prev = p;
|
||||||
free(q);
|
free(q);
|
||||||
}
|
}
|
||||||
|
|
||||||
if ( !(p->prev->start & USED_BLOCK))
|
if ( !(p->prev->start & USED_BLOCK))
|
||||||
{
|
{
|
||||||
struct mem_block *q = p->prev;
|
struct mem_block *q = p->prev;
|
||||||
q->size += p->size;
|
q->size += p->size;
|
||||||
q->next = p->next;
|
q->next = p->next;
|
||||||
q->next->prev = q;
|
q->next->prev = q;
|
||||||
free(p);
|
free(p);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
int rhdInitHeap(RHDPtr rhdPtr)
|
int rhdInitHeap(RHDPtr rhdPtr)
|
||||||
{
|
{
|
||||||
int base = rhdPtr->FbFreeStart;
|
int base = rhdPtr->FbFreeStart;
|
||||||
|
|
||||||
return init_heap(&rhdPtr->fb_heap, base, rhdPtr->FbFreeSize);
|
return init_heap(&rhdPtr->fb_heap, base, rhdPtr->FbFreeSize);
|
||||||
};
|
};
|
||||||
|
|
||||||
void *rhd_mem_alloc(RHDPtr rhdPtr,int region, int size)
|
void *rhd_mem_alloc(RHDPtr rhdPtr,int region, int size)
|
||||||
{
|
{
|
||||||
struct mem_block *block, **heap;
|
struct mem_block *block, **heap;
|
||||||
|
|
||||||
heap = get_heap(rhdPtr, region);
|
heap = get_heap(rhdPtr, region);
|
||||||
if (!heap || !*heap)
|
if (!heap || !*heap)
|
||||||
return NULL;
|
return NULL;
|
||||||
|
|
||||||
/* Make things easier on ourselves: all allocations at least
|
/* Make things easier on ourselves: all allocations at least
|
||||||
* 4k aligned.
|
* 4k aligned.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
size = (size+4095) & ~4095;
|
size = (size+4095) & ~4095;
|
||||||
|
|
||||||
block = alloc_block(*heap, size);
|
block = alloc_block(*heap, size);
|
||||||
|
|
||||||
if (!block)
|
if (!block)
|
||||||
return NULL;
|
return NULL;
|
||||||
|
|
||||||
return (void*)(block->start & ~USED_BLOCK);
|
return (void*)(block->start & ~USED_BLOCK);
|
||||||
}
|
}
|
||||||
|
|
||||||
int rhd_mem_free(RHDPtr rhdPtr, int region, void *offset)
|
int rhd_mem_free(RHDPtr rhdPtr, int region, void *offset)
|
||||||
{
|
{
|
||||||
struct mem_block *block, **heap;
|
struct mem_block *block, **heap;
|
||||||
|
|
||||||
heap = get_heap(rhdPtr, region);
|
heap = get_heap(rhdPtr, region);
|
||||||
if (!heap || !*heap)
|
if (!heap || !*heap)
|
||||||
return -1;
|
return -1;
|
||||||
|
|
||||||
block = find_block(*heap, (int)offset);
|
block = find_block(*heap, (int)offset);
|
||||||
if (!block)
|
if (!block)
|
||||||
return -1;
|
return -1;
|
||||||
|
|
||||||
if ( !(block->start & USED_BLOCK))
|
if ( !(block->start & USED_BLOCK))
|
||||||
return -1;
|
return -1;
|
||||||
|
|
||||||
free_block(block);
|
free_block(block);
|
||||||
return 0;
|
return 0;
|
||||||
@ -212,13 +212,13 @@ int rhd_mem_free(RHDPtr rhdPtr, int region, void *offset)
|
|||||||
void dump_mem()
|
void dump_mem()
|
||||||
{
|
{
|
||||||
struct mem_block *p;
|
struct mem_block *p;
|
||||||
struct mem_block **heap;
|
struct mem_block **heap;
|
||||||
|
|
||||||
heap = &rhd.fb_heap;
|
heap = &rhd.fb_heap;
|
||||||
|
|
||||||
list_for_each(p, *heap)
|
list_for_each(p, *heap)
|
||||||
{
|
{
|
||||||
dbgprintf("block: %x next: %x prev: %x start: %x size:%x\n",
|
dbgprintf("block: %x next: %x prev: %x start: %x size:%x\n",
|
||||||
p,p->next,p->prev,p->start,p->size);
|
p,p->next,p->prev,p->start,p->size);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -19,25 +19,25 @@ unsigned INMC(RHDPtr info, int addr)
|
|||||||
|
|
||||||
if ((info->ChipFamily == CHIP_FAMILY_RS690) ||
|
if ((info->ChipFamily == CHIP_FAMILY_RS690) ||
|
||||||
(info->ChipFamily == CHIP_FAMILY_RS740)) {
|
(info->ChipFamily == CHIP_FAMILY_RS740)) {
|
||||||
OUTREG(RS690_MC_INDEX, (addr & RS690_MC_INDEX_MASK));
|
OUTREG(RS690_MC_INDEX, (addr & RS690_MC_INDEX_MASK));
|
||||||
data = INREG(RS690_MC_DATA);
|
data = INREG(RS690_MC_DATA);
|
||||||
} else if (info->ChipFamily == CHIP_FAMILY_RS600) {
|
} else if (info->ChipFamily == CHIP_FAMILY_RS600) {
|
||||||
OUTREG(RS600_MC_INDEX, (addr & RS600_MC_INDEX_MASK));
|
OUTREG(RS600_MC_INDEX, (addr & RS600_MC_INDEX_MASK));
|
||||||
data = INREG(RS600_MC_DATA);
|
data = INREG(RS600_MC_DATA);
|
||||||
} else if (IS_AVIVO_VARIANT) {
|
} else if (IS_AVIVO_VARIANT) {
|
||||||
OUTREG(AVIVO_MC_INDEX, (addr & 0xff) | 0x7f0000);
|
OUTREG(AVIVO_MC_INDEX, (addr & 0xff) | 0x7f0000);
|
||||||
(void)INREG(AVIVO_MC_INDEX);
|
(void)INREG(AVIVO_MC_INDEX);
|
||||||
data = INREG(AVIVO_MC_DATA);
|
data = INREG(AVIVO_MC_DATA);
|
||||||
|
|
||||||
OUTREG(AVIVO_MC_INDEX, 0);
|
OUTREG(AVIVO_MC_INDEX, 0);
|
||||||
(void)INREG(AVIVO_MC_INDEX);
|
(void)INREG(AVIVO_MC_INDEX);
|
||||||
} else {
|
} else {
|
||||||
OUTREG(R300_MC_IND_INDEX, addr & 0x3f);
|
OUTREG(R300_MC_IND_INDEX, addr & 0x3f);
|
||||||
(void)INREG(R300_MC_IND_INDEX);
|
(void)INREG(R300_MC_IND_INDEX);
|
||||||
data = INREG(R300_MC_IND_DATA);
|
data = INREG(R300_MC_IND_DATA);
|
||||||
|
|
||||||
OUTREG(R300_MC_IND_INDEX, 0);
|
OUTREG(R300_MC_IND_INDEX, 0);
|
||||||
(void)INREG(R300_MC_IND_INDEX);
|
(void)INREG(R300_MC_IND_INDEX);
|
||||||
}
|
}
|
||||||
|
|
||||||
return data;
|
return data;
|
||||||
@ -46,65 +46,65 @@ unsigned INMC(RHDPtr info, int addr)
|
|||||||
/* Write MC information */
|
/* Write MC information */
|
||||||
void OUTMC(RHDPtr info, int addr, u32_t data)
|
void OUTMC(RHDPtr info, int addr, u32_t data)
|
||||||
{
|
{
|
||||||
if ((info->ChipFamily == CHIP_FAMILY_RS690) ||
|
if ((info->ChipFamily == CHIP_FAMILY_RS690) ||
|
||||||
(info->ChipFamily == CHIP_FAMILY_RS740)) {
|
(info->ChipFamily == CHIP_FAMILY_RS740)) {
|
||||||
OUTREG(RS690_MC_INDEX, ((addr & RS690_MC_INDEX_MASK) | RS690_MC_INDEX_WR_EN));
|
OUTREG(RS690_MC_INDEX, ((addr & RS690_MC_INDEX_MASK) | RS690_MC_INDEX_WR_EN));
|
||||||
OUTREG(RS690_MC_DATA, data);
|
OUTREG(RS690_MC_DATA, data);
|
||||||
OUTREG(RS690_MC_INDEX, RS690_MC_INDEX_WR_ACK);
|
OUTREG(RS690_MC_INDEX, RS690_MC_INDEX_WR_ACK);
|
||||||
}
|
}
|
||||||
else if (info->ChipFamily == CHIP_FAMILY_RS600) {
|
else if (info->ChipFamily == CHIP_FAMILY_RS600) {
|
||||||
OUTREG(RS600_MC_INDEX, ((addr & RS600_MC_INDEX_MASK) | RS600_MC_INDEX_WR_EN));
|
OUTREG(RS600_MC_INDEX, ((addr & RS600_MC_INDEX_MASK) | RS600_MC_INDEX_WR_EN));
|
||||||
OUTREG(RS600_MC_DATA, data);
|
OUTREG(RS600_MC_DATA, data);
|
||||||
OUTREG(RS600_MC_INDEX, RS600_MC_INDEX_WR_ACK);
|
OUTREG(RS600_MC_INDEX, RS600_MC_INDEX_WR_ACK);
|
||||||
}
|
}
|
||||||
else if (IS_AVIVO_VARIANT) {
|
else if (IS_AVIVO_VARIANT) {
|
||||||
OUTREG(AVIVO_MC_INDEX, (addr & 0xff) | 0xff0000);
|
OUTREG(AVIVO_MC_INDEX, (addr & 0xff) | 0xff0000);
|
||||||
(void)INREG(AVIVO_MC_INDEX);
|
(void)INREG(AVIVO_MC_INDEX);
|
||||||
OUTREG(AVIVO_MC_DATA, data);
|
OUTREG(AVIVO_MC_DATA, data);
|
||||||
OUTREG(AVIVO_MC_INDEX, 0);
|
OUTREG(AVIVO_MC_INDEX, 0);
|
||||||
(void)INREG(AVIVO_MC_INDEX);
|
(void)INREG(AVIVO_MC_INDEX);
|
||||||
}
|
}
|
||||||
else {
|
else {
|
||||||
OUTREG(R300_MC_IND_INDEX, (((addr) & 0x3f) | R300_MC_IND_WR_EN));
|
OUTREG(R300_MC_IND_INDEX, (((addr) & 0x3f) | R300_MC_IND_WR_EN));
|
||||||
(void)INREG(R300_MC_IND_INDEX);
|
(void)INREG(R300_MC_IND_INDEX);
|
||||||
OUTREG(R300_MC_IND_DATA, data);
|
OUTREG(R300_MC_IND_DATA, data);
|
||||||
OUTREG(R300_MC_IND_INDEX, 0);
|
OUTREG(R300_MC_IND_INDEX, 0);
|
||||||
(void)INREG(R300_MC_IND_INDEX);
|
(void)INREG(R300_MC_IND_INDEX);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static Bool avivo_get_mc_idle(RHDPtr info)
|
static Bool avivo_get_mc_idle(RHDPtr info)
|
||||||
{
|
{
|
||||||
|
|
||||||
if (info->ChipFamily >= CHIP_FAMILY_R600) {
|
if (info->ChipFamily >= CHIP_FAMILY_R600) {
|
||||||
/* no idea where this is on r600 yet */
|
/* no idea where this is on r600 yet */
|
||||||
return TRUE;
|
return TRUE;
|
||||||
}
|
}
|
||||||
else if (info->ChipFamily == CHIP_FAMILY_RV515) {
|
else if (info->ChipFamily == CHIP_FAMILY_RV515) {
|
||||||
if (INMC(info, RV515_MC_STATUS) & RV515_MC_STATUS_IDLE)
|
if (INMC(info, RV515_MC_STATUS) & RV515_MC_STATUS_IDLE)
|
||||||
return TRUE;
|
return TRUE;
|
||||||
else
|
else
|
||||||
return FALSE;
|
return FALSE;
|
||||||
}
|
}
|
||||||
else if (info->ChipFamily == CHIP_FAMILY_RS600)
|
else if (info->ChipFamily == CHIP_FAMILY_RS600)
|
||||||
{
|
{
|
||||||
if (INMC(info, RS600_MC_STATUS) & RS600_MC_STATUS_IDLE)
|
if (INMC(info, RS600_MC_STATUS) & RS600_MC_STATUS_IDLE)
|
||||||
return TRUE;
|
return TRUE;
|
||||||
else
|
else
|
||||||
return FALSE;
|
return FALSE;
|
||||||
}
|
}
|
||||||
else if ((info->ChipFamily == CHIP_FAMILY_RS690) ||
|
else if ((info->ChipFamily == CHIP_FAMILY_RS690) ||
|
||||||
(info->ChipFamily == CHIP_FAMILY_RS740)) {
|
(info->ChipFamily == CHIP_FAMILY_RS740)) {
|
||||||
if (INMC(info, RS690_MC_STATUS) & RS690_MC_STATUS_IDLE)
|
if (INMC(info, RS690_MC_STATUS) & RS690_MC_STATUS_IDLE)
|
||||||
return TRUE;
|
return TRUE;
|
||||||
else
|
else
|
||||||
return FALSE;
|
return FALSE;
|
||||||
}
|
}
|
||||||
else {
|
else {
|
||||||
if (INMC(info, R520_MC_STATUS) & R520_MC_STATUS_IDLE)
|
if (INMC(info, R520_MC_STATUS) & R520_MC_STATUS_IDLE)
|
||||||
return TRUE;
|
return TRUE;
|
||||||
else
|
else
|
||||||
return FALSE;
|
return FALSE;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -448,115 +448,115 @@ static void RADEONUpdateMemMapRegisters(RHDPtr info)
|
|||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
static void RADEONInitMemoryMap(RHDPtr info)
|
static void RADEONInitMemoryMap(RHDPtr info)
|
||||||
{
|
{
|
||||||
u32_t mem_size;
|
u32_t mem_size;
|
||||||
u32_t aper_size;
|
u32_t aper_size;
|
||||||
|
|
||||||
radeon_read_mc_fb_agp_location(info, LOC_FB | LOC_AGP, &info->mc_fb_location,
|
radeon_read_mc_fb_agp_location(info, LOC_FB | LOC_AGP, &info->mc_fb_location,
|
||||||
&info->mc_agp_location, &info->mc_agp_location_hi);
|
&info->mc_agp_location, &info->mc_agp_location_hi);
|
||||||
|
|
||||||
dbgprintf(" MC_FB_LOCATION : 0x%08x\n", (unsigned)info->mc_fb_location);
|
dbgprintf(" MC_FB_LOCATION : 0x%08x\n", (unsigned)info->mc_fb_location);
|
||||||
dbgprintf(" MC_AGP_LOCATION : 0x%08x\n", (unsigned)info->mc_agp_location);
|
dbgprintf(" MC_AGP_LOCATION : 0x%08x\n", (unsigned)info->mc_agp_location);
|
||||||
|
|
||||||
|
|
||||||
/* We shouldn't use info->videoRam here which might have been clipped
|
/* We shouldn't use info->videoRam here which might have been clipped
|
||||||
* but the real video RAM instead
|
* but the real video RAM instead
|
||||||
*/
|
*/
|
||||||
if (info->ChipFamily >= CHIP_FAMILY_R600){
|
if (info->ChipFamily >= CHIP_FAMILY_R600){
|
||||||
mem_size = INREG(R600_CONFIG_MEMSIZE);
|
mem_size = INREG(R600_CONFIG_MEMSIZE);
|
||||||
aper_size = INREG(R600_CONFIG_APER_SIZE);
|
aper_size = INREG(R600_CONFIG_APER_SIZE);
|
||||||
}
|
}
|
||||||
else {
|
else {
|
||||||
mem_size = INREG(RADEON_CONFIG_MEMSIZE);
|
mem_size = INREG(RADEON_CONFIG_MEMSIZE);
|
||||||
aper_size = INREG(RADEON_CONFIG_APER_SIZE);
|
aper_size = INREG(RADEON_CONFIG_APER_SIZE);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (mem_size == 0)
|
if (mem_size == 0)
|
||||||
mem_size = 0x800000;
|
mem_size = 0x800000;
|
||||||
|
|
||||||
/* Fix for RN50, M6, M7 with 8/16/32(??) MBs of VRAM -
|
/* Fix for RN50, M6, M7 with 8/16/32(??) MBs of VRAM -
|
||||||
Novell bug 204882 + along with lots of ubuntu ones */
|
Novell bug 204882 + along with lots of ubuntu ones */
|
||||||
if (aper_size > mem_size)
|
if (aper_size > mem_size)
|
||||||
mem_size = aper_size;
|
mem_size = aper_size;
|
||||||
|
|
||||||
|
|
||||||
if ( (info->ChipFamily != CHIP_FAMILY_RS600) &&
|
if ( (info->ChipFamily != CHIP_FAMILY_RS600) &&
|
||||||
(info->ChipFamily != CHIP_FAMILY_RS690) &&
|
(info->ChipFamily != CHIP_FAMILY_RS690) &&
|
||||||
(info->ChipFamily != CHIP_FAMILY_RS740)) {
|
(info->ChipFamily != CHIP_FAMILY_RS740))
|
||||||
|
{
|
||||||
if (info->IsIGP)
|
if (info->IsIGP)
|
||||||
info->mc_fb_location = INREG(RADEON_NB_TOM);
|
info->mc_fb_location = INREG(RADEON_NB_TOM);
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
u32_t aper0_base;
|
u32_t aper0_base;
|
||||||
|
|
||||||
if (info->ChipFamily >= CHIP_FAMILY_R600) {
|
if (info->ChipFamily >= CHIP_FAMILY_R600) {
|
||||||
aper0_base = INREG(R600_CONFIG_F0_BASE);
|
aper0_base = INREG(R600_CONFIG_F0_BASE);
|
||||||
}
|
}
|
||||||
else {
|
else {
|
||||||
aper0_base = INREG(RADEON_CONFIG_APER_0_BASE);
|
aper0_base = INREG(RADEON_CONFIG_APER_0_BASE);
|
||||||
}
|
}
|
||||||
dbgprintf("aper0 base %x\n", aper0_base );
|
dbgprintf("aper0 base %x\n", aper0_base );
|
||||||
|
|
||||||
/* Recent chips have an "issue" with the memory controller, the
|
/* Recent chips have an "issue" with the memory controller, the
|
||||||
* location must be aligned to the size. We just align it down,
|
* location must be aligned to the size. We just align it down,
|
||||||
* too bad if we walk over the top of system memory, we don't
|
* too bad if we walk over the top of system memory, we don't
|
||||||
* use DMA without a remapped anyway.
|
* use DMA without a remapped anyway.
|
||||||
* Affected chips are rv280, all r3xx, and all r4xx, but not IGP
|
* Affected chips are rv280, all r3xx, and all r4xx, but not IGP
|
||||||
*/
|
*/
|
||||||
if ( info->ChipFamily == CHIP_FAMILY_RV280 ||
|
if ( info->ChipFamily == CHIP_FAMILY_RV280 ||
|
||||||
info->ChipFamily == CHIP_FAMILY_R300 ||
|
info->ChipFamily == CHIP_FAMILY_R300 ||
|
||||||
info->ChipFamily == CHIP_FAMILY_R350 ||
|
info->ChipFamily == CHIP_FAMILY_R350 ||
|
||||||
info->ChipFamily == CHIP_FAMILY_RV350 ||
|
info->ChipFamily == CHIP_FAMILY_RV350 ||
|
||||||
info->ChipFamily == CHIP_FAMILY_RV380 ||
|
info->ChipFamily == CHIP_FAMILY_RV380 ||
|
||||||
info->ChipFamily == CHIP_FAMILY_R420 ||
|
info->ChipFamily == CHIP_FAMILY_R420 ||
|
||||||
info->ChipFamily == CHIP_FAMILY_RV410)
|
info->ChipFamily == CHIP_FAMILY_RV410)
|
||||||
aper0_base &= ~(mem_size - 1);
|
aper0_base &= ~(mem_size - 1);
|
||||||
|
|
||||||
if ( info->ChipFamily >= CHIP_FAMILY_R600) {
|
if ( info->ChipFamily >= CHIP_FAMILY_R600) {
|
||||||
info->mc_fb_location = (aper0_base >> 24) |
|
info->mc_fb_location = (aper0_base >> 24) |
|
||||||
(((aper0_base + mem_size - 1) & 0xff000000U) >> 8);
|
(((aper0_base + mem_size - 1) & 0xff000000U) >> 8);
|
||||||
dbgprintf("mc fb loc is %08x\n", (unsigned int)info->mc_fb_location);
|
dbgprintf("mc fb loc is %08x\n", (unsigned int)info->mc_fb_location);
|
||||||
}
|
}
|
||||||
else {
|
else {
|
||||||
info->mc_fb_location = (aper0_base >> 16) |
|
info->mc_fb_location = (aper0_base >> 16) |
|
||||||
((aper0_base + mem_size - 1) & 0xffff0000U);
|
((aper0_base + mem_size - 1) & 0xffff0000U);
|
||||||
dbgprintf("mc fb loc is %08x\n", (unsigned int)info->mc_fb_location);
|
dbgprintf("mc fb loc is %08x\n", (unsigned int)info->mc_fb_location);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
if (info->ChipFamily >= CHIP_FAMILY_R600) {
|
if (info->ChipFamily >= CHIP_FAMILY_R600) {
|
||||||
info->fbLocation = (info->mc_fb_location & 0xffff) << 24;
|
info->fbLocation = (info->mc_fb_location & 0xffff) << 24;
|
||||||
}
|
}
|
||||||
else {
|
else {
|
||||||
info->fbLocation = (info->mc_fb_location & 0xffff) << 16;
|
info->fbLocation = (info->mc_fb_location & 0xffff) << 16;
|
||||||
}
|
}
|
||||||
/* Just disable the damn AGP apertures for now, it may be
|
/* Just disable the damn AGP apertures for now, it may be
|
||||||
* re-enabled later by the DRM
|
* re-enabled later by the DRM
|
||||||
*/
|
*/
|
||||||
|
|
||||||
// if (IS_AVIVO_VARIANT) {
|
// if (IS_AVIVO_VARIANT) {
|
||||||
// if (info->ChipFamily >= CHIP_FAMILY_R600) {
|
// if (info->ChipFamily >= CHIP_FAMILY_R600) {
|
||||||
// OUTREG(R600_HDP_NONSURFACE_BASE, (info->mc_fb_location << 16) & 0xff0000);
|
// OUTREG(R600_HDP_NONSURFACE_BASE, (info->mc_fb_location << 16) & 0xff0000);
|
||||||
// }
|
// }
|
||||||
// else {
|
// else {
|
||||||
// OUTREG(AVIVO_HDP_FB_LOCATION, info->mc_fb_location);
|
// OUTREG(AVIVO_HDP_FB_LOCATION, info->mc_fb_location);
|
||||||
// }
|
// }
|
||||||
// info->mc_agp_location = 0x003f0000;
|
// info->mc_agp_location = 0x003f0000;
|
||||||
// }
|
// }
|
||||||
// else
|
// else
|
||||||
// info->mc_agp_location = 0xffffffc0;
|
// info->mc_agp_location = 0xffffffc0;
|
||||||
|
|
||||||
dbgprintf("RADEONInitMemoryMap() : \n");
|
dbgprintf("RADEONInitMemoryMap() : \n");
|
||||||
dbgprintf(" mem_size : 0x%08x\n", (u32_t)mem_size);
|
dbgprintf(" mem_size : 0x%08x\n", (u32_t)mem_size);
|
||||||
dbgprintf(" MC_FB_LOCATION : 0x%08x\n", (unsigned)info->mc_fb_location);
|
dbgprintf(" MC_FB_LOCATION : 0x%08x\n", (unsigned)info->mc_fb_location);
|
||||||
dbgprintf(" MC_AGP_LOCATION : 0x%08x\n", (unsigned)info->mc_agp_location);
|
dbgprintf(" MC_AGP_LOCATION : 0x%08x\n", (unsigned)info->mc_agp_location);
|
||||||
dbgprintf(" FB_LOCATION : 0x%08x\n", (unsigned)info->fbLocation);
|
dbgprintf(" FB_LOCATION : 0x%08x\n", (unsigned)info->fbLocation);
|
||||||
|
|
||||||
#if !R300_PIO
|
#if !R300_PIO
|
||||||
|
|
||||||
RADEONUpdateMemMapRegisters(info);
|
RADEONUpdateMemMapRegisters(info);
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
@ -813,31 +813,31 @@ static Bool RADEONPreInitVRAM(RHDPtr info)
|
|||||||
|
|
||||||
static Bool RADEONPreInitChipType(RHDPtr rhdPtr)
|
static Bool RADEONPreInitChipType(RHDPtr rhdPtr)
|
||||||
{
|
{
|
||||||
u32_t cmd_stat;
|
u32_t cmd_stat;
|
||||||
|
|
||||||
rhdPtr->ChipErrata = 0;
|
rhdPtr->ChipErrata = 0;
|
||||||
|
|
||||||
if ( (rhdPtr->ChipFamily == CHIP_FAMILY_R300) &&
|
if ( (rhdPtr->ChipFamily == CHIP_FAMILY_R300) &&
|
||||||
((_RHDRegRead(rhdPtr,RADEON_CONFIG_CNTL) & RADEON_CFG_ATI_REV_ID_MASK)
|
((_RHDRegRead(rhdPtr,RADEON_CONFIG_CNTL) & RADEON_CFG_ATI_REV_ID_MASK)
|
||||||
== RADEON_CFG_ATI_REV_A11))
|
== RADEON_CFG_ATI_REV_A11))
|
||||||
rhdPtr->ChipErrata |= CHIP_ERRATA_R300_CG;
|
rhdPtr->ChipErrata |= CHIP_ERRATA_R300_CG;
|
||||||
|
|
||||||
if ( (rhdPtr->ChipFamily == CHIP_FAMILY_RV200) ||
|
if ( (rhdPtr->ChipFamily == CHIP_FAMILY_RV200) ||
|
||||||
(rhdPtr->ChipFamily == CHIP_FAMILY_RS200) )
|
(rhdPtr->ChipFamily == CHIP_FAMILY_RS200) )
|
||||||
rhdPtr->ChipErrata |= CHIP_ERRATA_PLL_DUMMYREADS;
|
rhdPtr->ChipErrata |= CHIP_ERRATA_PLL_DUMMYREADS;
|
||||||
|
|
||||||
if ( (rhdPtr->ChipFamily == CHIP_FAMILY_RV100) ||
|
if ( (rhdPtr->ChipFamily == CHIP_FAMILY_RV100) ||
|
||||||
(rhdPtr->ChipFamily == CHIP_FAMILY_RS100) ||
|
(rhdPtr->ChipFamily == CHIP_FAMILY_RS100) ||
|
||||||
(rhdPtr->ChipFamily == CHIP_FAMILY_RS200) )
|
(rhdPtr->ChipFamily == CHIP_FAMILY_RS200) )
|
||||||
rhdPtr->ChipErrata |= CHIP_ERRATA_PLL_DELAY;
|
rhdPtr->ChipErrata |= CHIP_ERRATA_PLL_DELAY;
|
||||||
|
|
||||||
rhdPtr->cardType = CARD_PCI;
|
rhdPtr->cardType = CARD_PCI;
|
||||||
|
|
||||||
|
|
||||||
cmd_stat = pciReadLong(rhdPtr->PciTag, PCI_CMD_STAT_REG);
|
cmd_stat = pciReadLong(rhdPtr->PciTag, PCI_CMD_STAT_REG);
|
||||||
|
|
||||||
if (cmd_stat & RADEON_CAP_LIST)
|
if (cmd_stat & RADEON_CAP_LIST)
|
||||||
{
|
{
|
||||||
u32_t cap_ptr, cap_id;
|
u32_t cap_ptr, cap_id;
|
||||||
|
|
||||||
cap_ptr = pciReadLong(rhdPtr->PciTag, RADEON_CAPABILITIES_PTR_PCI_CONFIG);
|
cap_ptr = pciReadLong(rhdPtr->PciTag, RADEON_CAPABILITIES_PTR_PCI_CONFIG);
|
||||||
@ -845,42 +845,42 @@ static Bool RADEONPreInitChipType(RHDPtr rhdPtr)
|
|||||||
|
|
||||||
while(cap_ptr != RADEON_CAP_ID_NULL)
|
while(cap_ptr != RADEON_CAP_ID_NULL)
|
||||||
{
|
{
|
||||||
cap_id = pciReadLong(rhdPtr->PciTag, cap_ptr);
|
cap_id = pciReadLong(rhdPtr->PciTag, cap_ptr);
|
||||||
if ((cap_id & 0xff)== RADEON_CAP_ID_AGP) {
|
if ((cap_id & 0xff)== RADEON_CAP_ID_AGP) {
|
||||||
rhdPtr->cardType = CARD_AGP;
|
rhdPtr->cardType = CARD_AGP;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
if ((cap_id & 0xff)== RADEON_CAP_ID_EXP) {
|
if ((cap_id & 0xff)== RADEON_CAP_ID_EXP) {
|
||||||
rhdPtr->cardType = CARD_PCIE;
|
rhdPtr->cardType = CARD_PCIE;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
cap_ptr = (cap_id >> 8) & RADEON_CAP_PTR_MASK;
|
cap_ptr = (cap_id >> 8) & RADEON_CAP_PTR_MASK;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
dbgprintf("%s card detected\n",(rhdPtr->cardType==CARD_PCI) ? "PCI" :
|
dbgprintf("%s card detected\n",(rhdPtr->cardType==CARD_PCI) ? "PCI" :
|
||||||
(rhdPtr->cardType==CARD_PCIE) ? "PCIE" : "AGP");
|
(rhdPtr->cardType==CARD_PCIE) ? "PCIE" : "AGP");
|
||||||
|
|
||||||
/* treat PCIE IGP cards as PCI */
|
/* treat PCIE IGP cards as PCI */
|
||||||
if (rhdPtr->cardType == CARD_PCIE && rhdPtr->IsIGP)
|
if (rhdPtr->cardType == CARD_PCIE && rhdPtr->IsIGP)
|
||||||
rhdPtr->cardType = CARD_PCI;
|
rhdPtr->cardType = CARD_PCI;
|
||||||
|
|
||||||
if ( (rhdPtr->ChipFamily == CHIP_FAMILY_RS100) ||
|
if ( (rhdPtr->ChipFamily == CHIP_FAMILY_RS100) ||
|
||||||
(rhdPtr->ChipFamily == CHIP_FAMILY_RS200) ||
|
(rhdPtr->ChipFamily == CHIP_FAMILY_RS200) ||
|
||||||
(rhdPtr->ChipFamily == CHIP_FAMILY_RS300) ||
|
(rhdPtr->ChipFamily == CHIP_FAMILY_RS300) ||
|
||||||
(rhdPtr->ChipFamily == CHIP_FAMILY_RS400) ||
|
(rhdPtr->ChipFamily == CHIP_FAMILY_RS400) ||
|
||||||
(rhdPtr->ChipFamily == CHIP_FAMILY_RS480) ||
|
(rhdPtr->ChipFamily == CHIP_FAMILY_RS480) ||
|
||||||
(rhdPtr->ChipFamily == CHIP_FAMILY_RS600) ||
|
(rhdPtr->ChipFamily == CHIP_FAMILY_RS600) ||
|
||||||
(rhdPtr->ChipFamily == CHIP_FAMILY_RS690) ||
|
(rhdPtr->ChipFamily == CHIP_FAMILY_RS690) ||
|
||||||
(rhdPtr->ChipFamily == CHIP_FAMILY_RS740))
|
(rhdPtr->ChipFamily == CHIP_FAMILY_RS740))
|
||||||
rhdPtr->has_tcl = FALSE;
|
rhdPtr->has_tcl = FALSE;
|
||||||
else {
|
else {
|
||||||
rhdPtr->has_tcl = TRUE;
|
rhdPtr->has_tcl = TRUE;
|
||||||
}
|
}
|
||||||
|
|
||||||
rhdPtr->LinearAddr = rhdPtr->memBase[RHD_FB_BAR];
|
rhdPtr->LinearAddr = rhdPtr->memBase[RHD_FB_BAR];
|
||||||
|
|
||||||
return TRUE;
|
return TRUE;
|
||||||
}
|
}
|
||||||
|
|
||||||
#if 0
|
#if 0
|
||||||
@ -958,29 +958,29 @@ Bool RHDPreInit()
|
|||||||
RHDPtr info;
|
RHDPtr info;
|
||||||
|
|
||||||
/* We need access to IO space already */
|
/* We need access to IO space already */
|
||||||
if ( !rhdMapMMIO(&rhd) ) {
|
if ( !rhdMapMMIO(&rhd) ) {
|
||||||
dbgprintf("Failed to map MMIO.\n");
|
dbgprintf("Failed to map MMIO.\n");
|
||||||
return FALSE;
|
return FALSE;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
if( !RADEONPreInitChipType(&rhd))
|
if( !RADEONPreInitChipType(&rhd))
|
||||||
return FALSE;
|
return FALSE;
|
||||||
|
|
||||||
if (!RADEONPreInitVRAM(&rhd))
|
if (!RADEONPreInitVRAM(&rhd))
|
||||||
return FALSE;
|
return FALSE;
|
||||||
|
|
||||||
RADEONInitMemoryMap(&rhd);
|
RADEONInitMemoryMap(&rhd);
|
||||||
|
|
||||||
if (!rhd.videoRam)
|
if (!rhd.videoRam)
|
||||||
{
|
{
|
||||||
dbgprintf("No Video RAM detected.\n");
|
dbgprintf("No Video RAM detected.\n");
|
||||||
goto error1;
|
goto error1;
|
||||||
}
|
}
|
||||||
dbgprintf("VideoRAM: %d kByte\n",rhd.videoRam);
|
dbgprintf("VideoRAM: %d kByte\n",rhd.videoRam);
|
||||||
|
|
||||||
// rhd.FbFreeStart = 0;
|
// rhd.FbFreeStart = 0;
|
||||||
rhd.FbFreeSize = rhd.videoRam << 10;
|
rhd.FbFreeSize = rhd.videoRam << 10;
|
||||||
|
|
||||||
// if( !rhdMapFB(&rhd))
|
// if( !rhdMapFB(&rhd))
|
||||||
// return FALSE;
|
// return FALSE;
|
||||||
@ -988,19 +988,131 @@ Bool RHDPreInit()
|
|||||||
// rhd.FbScanoutStart = 0;
|
// rhd.FbScanoutStart = 0;
|
||||||
// rhd.FbScanoutSize = 8*1024*1024;
|
// rhd.FbScanoutSize = 8*1024*1024;
|
||||||
|
|
||||||
rhd.FbFreeStart = 10*1024*1024;
|
rhd.FbFreeStart = 10*1024*1024;
|
||||||
rhd.FbFreeSize = rhd.FbMapSize - rhd.FbFreeStart - rhd.FbSecureSize;
|
rhd.FbFreeSize = rhd.FbMapSize - rhd.FbFreeStart - rhd.FbSecureSize;
|
||||||
|
|
||||||
rhdInitHeap(&rhd);
|
rhdInitHeap(&rhd);
|
||||||
|
|
||||||
info = &rhd;
|
info = &rhd;
|
||||||
|
|
||||||
|
return TRUE;
|
||||||
return TRUE;
|
|
||||||
|
|
||||||
error1:
|
error1:
|
||||||
return FALSE;
|
|
||||||
|
return FALSE;
|
||||||
|
};
|
||||||
|
|
||||||
|
static void RADEONPllErrataAfterIndex()
|
||||||
|
{
|
||||||
|
if (!(rhd.ChipErrata & CHIP_ERRATA_PLL_DUMMYREADS))
|
||||||
|
return;
|
||||||
|
|
||||||
|
/* This workaround is necessary on rv200 and RS200 or PLL
|
||||||
|
* reads may return garbage (among others...)
|
||||||
|
*/
|
||||||
|
(void)INREG(RADEON_CLOCK_CNTL_DATA);
|
||||||
|
(void)INREG(RADEON_CRTC_GEN_CNTL);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
static void RADEONPllErrataAfterData()
|
||||||
|
{
|
||||||
|
|
||||||
|
/* This function is required to workaround a hardware bug in some (all?)
|
||||||
|
* revisions of the R300. This workaround should be called after every
|
||||||
|
* CLOCK_CNTL_INDEX register access. If not, register reads afterward
|
||||||
|
* may not be correct.
|
||||||
|
*/
|
||||||
|
if (rhd.ChipFamily <= CHIP_FAMILY_RV380)
|
||||||
|
{
|
||||||
|
u32_t save, tmp;
|
||||||
|
|
||||||
|
save = INREG(RADEON_CLOCK_CNTL_INDEX);
|
||||||
|
tmp = save & ~(0x3f | RADEON_PLL_WR_EN);
|
||||||
|
OUTREG(RADEON_CLOCK_CNTL_INDEX, tmp);
|
||||||
|
tmp = INREG(RADEON_CLOCK_CNTL_DATA);
|
||||||
|
OUTREG(RADEON_CLOCK_CNTL_INDEX, save);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/* Read PLL register */
|
||||||
|
static u32_t RADEONINPLL(int addr)
|
||||||
|
{
|
||||||
|
u32_t data;
|
||||||
|
|
||||||
|
OUTREG8(RADEON_CLOCK_CNTL_INDEX, addr & 0x3f);
|
||||||
|
RADEONPllErrataAfterIndex();
|
||||||
|
data = INREG(RADEON_CLOCK_CNTL_DATA);
|
||||||
|
RADEONPllErrataAfterData();
|
||||||
|
|
||||||
|
return data;
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Write PLL information */
|
||||||
|
static void RADEONOUTPLL(int addr, u32_t data)
|
||||||
|
{
|
||||||
|
OUTREG8(RADEON_CLOCK_CNTL_INDEX, (((addr) & 0x3f) |
|
||||||
|
RADEON_PLL_WR_EN));
|
||||||
|
RADEONPllErrataAfterIndex();
|
||||||
|
OUTREG(RADEON_CLOCK_CNTL_DATA, data);
|
||||||
|
RADEONPllErrataAfterData();
|
||||||
|
}
|
||||||
|
|
||||||
|
static void init_pipes(RHDPtr info)
|
||||||
|
{
|
||||||
|
u32_t gb_tile_config = 0;
|
||||||
|
|
||||||
|
if ( (info->ChipFamily == CHIP_FAMILY_RV410) ||
|
||||||
|
(info->ChipFamily == CHIP_FAMILY_R420) ||
|
||||||
|
(info->ChipFamily == CHIP_FAMILY_RS600) ||
|
||||||
|
(info->ChipFamily == CHIP_FAMILY_RS690) ||
|
||||||
|
(info->ChipFamily == CHIP_FAMILY_RS740) ||
|
||||||
|
(info->ChipFamily == CHIP_FAMILY_RS400) ||
|
||||||
|
(info->ChipFamily == CHIP_FAMILY_RS480) || IS_R500_3D)
|
||||||
|
{
|
||||||
|
u32_t gb_pipe_sel = INREG(R400_GB_PIPE_SELECT);
|
||||||
|
|
||||||
|
info->num_gb_pipes = ((gb_pipe_sel >> 12) & 0x3) + 1;
|
||||||
|
if (IS_R500_3D)
|
||||||
|
OUTPLL(R500_DYN_SCLK_PWMEM_PIPE, (1 | ((gb_pipe_sel >> 8) & 0xf) << 4));
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
if ((info->ChipFamily == CHIP_FAMILY_R300) ||
|
||||||
|
(info->ChipFamily == CHIP_FAMILY_R350))
|
||||||
|
{
|
||||||
|
/* R3xx chips */
|
||||||
|
info->num_gb_pipes = 2;
|
||||||
|
}
|
||||||
|
else {
|
||||||
|
/* RV3xx chips */
|
||||||
|
info->num_gb_pipes = 1;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
if (IS_R300_3D || IS_R500_3D)
|
||||||
|
{
|
||||||
|
|
||||||
|
dbgprintf("num quad-pipes is %d\n", info->num_gb_pipes);
|
||||||
|
|
||||||
|
switch(info->num_gb_pipes) {
|
||||||
|
case 2: gb_tile_config |= R300_PIPE_COUNT_R300; break;
|
||||||
|
case 3: gb_tile_config |= R300_PIPE_COUNT_R420_3P; break;
|
||||||
|
case 4: gb_tile_config |= R300_PIPE_COUNT_R420; break;
|
||||||
|
default:
|
||||||
|
case 1: gb_tile_config |= R300_PIPE_COUNT_RV350; break;
|
||||||
|
}
|
||||||
|
|
||||||
|
OUTREG(R300_GB_TILE_CONFIG, gb_tile_config);
|
||||||
|
OUTREG(RADEON_WAIT_UNTIL, RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_3D_IDLECLEAN);
|
||||||
|
OUTREG(R300_DST_PIPE_CONFIG, INREG(R300_DST_PIPE_CONFIG) | R300_PIPE_AUTO_CONFIG);
|
||||||
|
OUTREG(R300_RB2D_DSTCACHE_MODE, (INREG(R300_RB2D_DSTCACHE_MODE) |
|
||||||
|
R300_DC_AUTOFLUSH_ENABLE |
|
||||||
|
R300_DC_DC_DISABLE_IGNORE_PE));
|
||||||
|
}
|
||||||
|
else
|
||||||
|
OUTREG(RADEON_RB3D_CNTL, 0);
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
@ -635,7 +635,6 @@ int Init3DEngine(RHDPtr info)
|
|||||||
FINISH_ACCEL();
|
FINISH_ACCEL();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
safe_sti(ifl);
|
safe_sti(ifl);
|
||||||
|
|
||||||
}
|
}
|
||||||
|
@ -20,65 +20,9 @@
|
|||||||
|
|
||||||
|
|
||||||
#define RADEON_IDLE_RETRY 16 /* Fall out of idle loops after this count */
|
#define RADEON_IDLE_RETRY 16 /* Fall out of idle loops after this count */
|
||||||
#define RADEON_TIMEOUT 2000000 /* Fall out of wait loops after this count */
|
#define RADEON_TIMEOUT 4000000 /* Fall out of wait loops after this count */
|
||||||
|
|
||||||
|
|
||||||
void RADEONPllErrataAfterIndex()
|
|
||||||
{
|
|
||||||
if (!(rhd.ChipErrata & CHIP_ERRATA_PLL_DUMMYREADS))
|
|
||||||
return;
|
|
||||||
|
|
||||||
/* This workaround is necessary on rv200 and RS200 or PLL
|
|
||||||
* reads may return garbage (among others...)
|
|
||||||
*/
|
|
||||||
(void)INREG(RADEON_CLOCK_CNTL_DATA);
|
|
||||||
(void)INREG(RADEON_CRTC_GEN_CNTL);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
void RADEONPllErrataAfterData()
|
|
||||||
{
|
|
||||||
|
|
||||||
/* This function is required to workaround a hardware bug in some (all?)
|
|
||||||
* revisions of the R300. This workaround should be called after every
|
|
||||||
* CLOCK_CNTL_INDEX register access. If not, register reads afterward
|
|
||||||
* may not be correct.
|
|
||||||
*/
|
|
||||||
if (rhd.ChipFamily <= CHIP_FAMILY_RV380)
|
|
||||||
{
|
|
||||||
u32_t save, tmp;
|
|
||||||
|
|
||||||
save = INREG(RADEON_CLOCK_CNTL_INDEX);
|
|
||||||
tmp = save & ~(0x3f | RADEON_PLL_WR_EN);
|
|
||||||
OUTREG(RADEON_CLOCK_CNTL_INDEX, tmp);
|
|
||||||
tmp = INREG(RADEON_CLOCK_CNTL_DATA);
|
|
||||||
OUTREG(RADEON_CLOCK_CNTL_INDEX, save);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
/* Read PLL register */
|
|
||||||
u32_t RADEONINPLL(int addr)
|
|
||||||
{
|
|
||||||
u32_t data;
|
|
||||||
|
|
||||||
OUTREG8(RADEON_CLOCK_CNTL_INDEX, addr & 0x3f);
|
|
||||||
RADEONPllErrataAfterIndex();
|
|
||||||
data = INREG(RADEON_CLOCK_CNTL_DATA);
|
|
||||||
RADEONPllErrataAfterData();
|
|
||||||
|
|
||||||
return data;
|
|
||||||
};
|
|
||||||
|
|
||||||
/* Write PLL information */
|
|
||||||
void RADEONOUTPLL(int addr, u32_t data)
|
|
||||||
{
|
|
||||||
OUTREG8(RADEON_CLOCK_CNTL_INDEX, (((addr) & 0x3f) |
|
|
||||||
RADEON_PLL_WR_EN));
|
|
||||||
RADEONPllErrataAfterIndex();
|
|
||||||
OUTREG(RADEON_CLOCK_CNTL_DATA, data);
|
|
||||||
RADEONPllErrataAfterData();
|
|
||||||
}
|
|
||||||
|
|
||||||
void RADEONEngineFlush(RHDPtr info)
|
void RADEONEngineFlush(RHDPtr info)
|
||||||
{
|
{
|
||||||
@ -148,61 +92,6 @@ static int radeon_do_wait_for_idle()
|
|||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
static void init_pipes(RHDPtr info)
|
|
||||||
{
|
|
||||||
u32_t gb_tile_config = 0;
|
|
||||||
|
|
||||||
if ( (info->ChipFamily == CHIP_FAMILY_RV410) ||
|
|
||||||
(info->ChipFamily == CHIP_FAMILY_R420) ||
|
|
||||||
(info->ChipFamily == CHIP_FAMILY_RS600) ||
|
|
||||||
(info->ChipFamily == CHIP_FAMILY_RS690) ||
|
|
||||||
(info->ChipFamily == CHIP_FAMILY_RS740) ||
|
|
||||||
(info->ChipFamily == CHIP_FAMILY_RS400) ||
|
|
||||||
(info->ChipFamily == CHIP_FAMILY_RS480) || IS_R500_3D)
|
|
||||||
{
|
|
||||||
u32_t gb_pipe_sel = INREG(R400_GB_PIPE_SELECT);
|
|
||||||
|
|
||||||
info->num_gb_pipes = ((gb_pipe_sel >> 12) & 0x3) + 1;
|
|
||||||
if (IS_R500_3D)
|
|
||||||
OUTPLL(R500_DYN_SCLK_PWMEM_PIPE, (1 | ((gb_pipe_sel >> 8) & 0xf) << 4));
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
if ((info->ChipFamily == CHIP_FAMILY_R300) ||
|
|
||||||
(info->ChipFamily == CHIP_FAMILY_R350))
|
|
||||||
{
|
|
||||||
/* R3xx chips */
|
|
||||||
info->num_gb_pipes = 2;
|
|
||||||
}
|
|
||||||
else {
|
|
||||||
/* RV3xx chips */
|
|
||||||
info->num_gb_pipes = 1;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
if (IS_R300_3D || IS_R500_3D)
|
|
||||||
{
|
|
||||||
|
|
||||||
dbgprintf("num quad-pipes is %d\n", info->num_gb_pipes);
|
|
||||||
|
|
||||||
switch(info->num_gb_pipes) {
|
|
||||||
case 2: gb_tile_config |= R300_PIPE_COUNT_R300; break;
|
|
||||||
case 3: gb_tile_config |= R300_PIPE_COUNT_R420_3P; break;
|
|
||||||
case 4: gb_tile_config |= R300_PIPE_COUNT_R420; break;
|
|
||||||
default:
|
|
||||||
case 1: gb_tile_config |= R300_PIPE_COUNT_RV350; break;
|
|
||||||
}
|
|
||||||
|
|
||||||
OUTREG(R300_GB_TILE_CONFIG, gb_tile_config);
|
|
||||||
OUTREG(RADEON_WAIT_UNTIL, RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_3D_IDLECLEAN);
|
|
||||||
OUTREG(R300_DST_PIPE_CONFIG, INREG(R300_DST_PIPE_CONFIG) | R300_PIPE_AUTO_CONFIG);
|
|
||||||
OUTREG(R300_RB2D_DSTCACHE_MODE, (INREG(R300_RB2D_DSTCACHE_MODE) |
|
|
||||||
R300_DC_AUTOFLUSH_ENABLE |
|
|
||||||
R300_DC_DC_DISABLE_IGNORE_PE));
|
|
||||||
}
|
|
||||||
else
|
|
||||||
OUTREG(RADEON_RB3D_CNTL, 0);
|
|
||||||
};
|
|
||||||
|
|
||||||
/* ================================================================
|
/* ================================================================
|
||||||
* CP control, initialization
|
* CP control, initialization
|
||||||
@ -357,10 +246,10 @@ void init_ring_buffer(RHDPtr info)
|
|||||||
|
|
||||||
void radeon_engine_reset(RHDPtr info)
|
void radeon_engine_reset(RHDPtr info)
|
||||||
{
|
{
|
||||||
u32_t clock_cntl_index;
|
u32_t clock_cntl_index;
|
||||||
u32_t mclk_cntl;
|
u32_t mclk_cntl;
|
||||||
u32_t rbbm_soft_reset;
|
u32_t rbbm_soft_reset;
|
||||||
u32_t host_path_cntl;
|
u32_t host_path_cntl;
|
||||||
|
|
||||||
if (info->ChipFamily <= CHIP_FAMILY_RV410)
|
if (info->ChipFamily <= CHIP_FAMILY_RV410)
|
||||||
{
|
{
|
||||||
@ -501,6 +390,7 @@ Bool init_cp(RHDPtr info)
|
|||||||
|
|
||||||
radeon_cp_start(&rhd);
|
radeon_cp_start(&rhd);
|
||||||
|
|
||||||
|
return TRUE;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
|
@ -22,8 +22,7 @@ SRC_DEP:= init.c \
|
|||||||
blend.inc \
|
blend.inc \
|
||||||
r500.inc \
|
r500.inc \
|
||||||
pixmap.inc \
|
pixmap.inc \
|
||||||
accel_2d.inc \
|
accel_2d.inc
|
||||||
accel_3d.inc
|
|
||||||
|
|
||||||
ATI_SRC:= ati2d.c
|
ATI_SRC:= ati2d.c
|
||||||
|
|
||||||
|
@ -34,83 +34,81 @@ const RADEONCardInfo *RadeonDevMatch(u16_t dev,const RADEONCardInfo *list)
|
|||||||
|
|
||||||
RHDPtr FindPciDevice()
|
RHDPtr FindPciDevice()
|
||||||
{
|
{
|
||||||
const RADEONCardInfo *dev;
|
const RADEONCardInfo *dev;
|
||||||
u32_t bus, last_bus;
|
u32_t bus, last_bus;
|
||||||
|
|
||||||
if( (last_bus = PciApi(1))==-1)
|
if( (last_bus = PciApi(1))==-1)
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
for(bus=0;bus<=last_bus;bus++)
|
for(bus=0;bus<=last_bus;bus++)
|
||||||
{
|
|
||||||
u32_t devfn;
|
|
||||||
|
|
||||||
for(devfn=0;devfn<256;devfn++)
|
|
||||||
{
|
{
|
||||||
u32_t id;
|
u32_t devfn;
|
||||||
id = PciRead32(bus,devfn, 0);
|
|
||||||
|
|
||||||
if( (u16_t)id != VENDOR_ATI)
|
for(devfn=0;devfn<256;devfn++)
|
||||||
continue;
|
|
||||||
|
|
||||||
rhd.PciDeviceID = (id>>16);
|
|
||||||
|
|
||||||
if( (dev = RadeonDevMatch(rhd.PciDeviceID, RADEONCards))!=NULL)
|
|
||||||
{
|
|
||||||
u32_t reg2C;
|
|
||||||
int i;
|
|
||||||
|
|
||||||
rhd.chipset = (char*)xf86TokenToString(RADEONChipsets, rhd.PciDeviceID);
|
|
||||||
if (!rhd.chipset)
|
|
||||||
{
|
{
|
||||||
dbgprintf("ChipID 0x%04x is not recognized\n", rhd.PciDeviceID);
|
u32_t id;
|
||||||
return FALSE;
|
id = PciRead32(bus,devfn, 0);
|
||||||
}
|
|
||||||
dbgprintf("Chipset: \"%s\" (ChipID = 0x%04x)\n",rhd.chipset,rhd.PciDeviceID);
|
|
||||||
|
|
||||||
rhd.bus = bus;
|
if( (u16_t)id != VENDOR_ATI)
|
||||||
rhd.devfn = devfn;
|
continue;
|
||||||
rhd.PciTag = pciTag(bus,(devfn>>3)&0x1F,devfn&0x7);
|
|
||||||
|
|
||||||
rhd.ChipFamily = dev->chip_family;
|
rhd.PciDeviceID = (id>>16);
|
||||||
rhd.IsMobility = dev->mobility;
|
|
||||||
rhd.IsIGP = dev->igp;
|
|
||||||
rhd.HasCRTC2 = !dev->nocrtc2;
|
|
||||||
|
|
||||||
reg2C = PciRead32(bus,devfn, 0x2C);
|
if( (dev = RadeonDevMatch(rhd.PciDeviceID, RADEONCards))!=NULL)
|
||||||
|
|
||||||
rhd.subvendor_id = reg2C & 0xFFFF;;
|
|
||||||
rhd.subdevice_id = reg2C >> 16;
|
|
||||||
|
|
||||||
if (rhd.ChipFamily >= CHIP_FAMILY_R600)
|
|
||||||
dbgprintf("R600 unsupported yet.\nExit\n");
|
|
||||||
|
|
||||||
|
|
||||||
for (i = 0; i < 6; i++)
|
|
||||||
{
|
|
||||||
u32_t base;
|
|
||||||
Bool validSize;
|
|
||||||
|
|
||||||
base = PciRead32(bus,devfn, PCI_MAP_REG_START + (i << 2));
|
|
||||||
if(base)
|
|
||||||
{
|
|
||||||
if (base & PCI_MAP_IO)
|
|
||||||
{
|
{
|
||||||
rhd.ioBase[i] = (u32_t)PCIGETIO(base);
|
u32_t reg2C;
|
||||||
rhd.memtype[i] = base & PCI_MAP_IO_ATTR_MASK;
|
int i;
|
||||||
|
|
||||||
|
rhd.chipset = (char*)xf86TokenToString(RADEONChipsets, rhd.PciDeviceID);
|
||||||
|
if (!rhd.chipset){
|
||||||
|
dbgprintf("ChipID 0x%04x is not recognized\n", rhd.PciDeviceID);
|
||||||
|
return FALSE;
|
||||||
|
}
|
||||||
|
dbgprintf("Chipset: \"%s\" (ChipID = 0x%04x)\n",
|
||||||
|
rhd.chipset,rhd.PciDeviceID);
|
||||||
|
|
||||||
|
rhd.bus = bus;
|
||||||
|
rhd.devfn = devfn;
|
||||||
|
rhd.PciTag = pciTag(bus,(devfn>>3)&0x1F,devfn&0x7);
|
||||||
|
|
||||||
|
rhd.ChipFamily = dev->chip_family;
|
||||||
|
rhd.IsMobility = dev->mobility;
|
||||||
|
rhd.IsIGP = dev->igp;
|
||||||
|
rhd.HasCRTC2 = !dev->nocrtc2;
|
||||||
|
|
||||||
|
reg2C = PciRead32(bus,devfn, 0x2C);
|
||||||
|
|
||||||
|
rhd.subvendor_id = reg2C & 0xFFFF;;
|
||||||
|
rhd.subdevice_id = reg2C >> 16;
|
||||||
|
|
||||||
|
if (rhd.ChipFamily >= CHIP_FAMILY_R600)
|
||||||
|
dbgprintf("R600 unsupported yet.\nExit\n");
|
||||||
|
|
||||||
|
|
||||||
|
for (i = 0; i < 6; i++)
|
||||||
|
{
|
||||||
|
u32_t base;
|
||||||
|
Bool validSize;
|
||||||
|
|
||||||
|
base = PciRead32(bus,devfn, PCI_MAP_REG_START + (i << 2));
|
||||||
|
if(base)
|
||||||
|
{
|
||||||
|
if (base & PCI_MAP_IO){
|
||||||
|
rhd.ioBase[i] = (u32_t)PCIGETIO(base);
|
||||||
|
rhd.memtype[i] = base & PCI_MAP_IO_ATTR_MASK;
|
||||||
|
}
|
||||||
|
else{
|
||||||
|
rhd.memBase[i] = (u32_t)PCIGETMEMORY(base);
|
||||||
|
rhd.memtype[i] = base & PCI_MAP_MEMORY_ATTR_MASK;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
rhd.memsize[i] = pciGetBaseSize(bus,devfn, i, TRUE, &validSize);
|
||||||
|
}
|
||||||
|
return &rhd;
|
||||||
}
|
}
|
||||||
else
|
|
||||||
{
|
|
||||||
rhd.memBase[i] = (u32_t)PCIGETMEMORY(base);
|
|
||||||
rhd.memtype[i] = base & PCI_MAP_MEMORY_ATTR_MASK;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
rhd.memsize[i] = pciGetBaseSize(bus,devfn, i, TRUE, &validSize);
|
|
||||||
}
|
}
|
||||||
return &rhd;
|
|
||||||
}
|
|
||||||
};
|
};
|
||||||
};
|
return NULL;
|
||||||
return NULL;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
@ -50,7 +50,7 @@ int CreatePixmap(pixmap_t *io)
|
|||||||
pixmap->width = io->width;
|
pixmap->width = io->width;
|
||||||
pixmap->height = io->height;
|
pixmap->height = io->height;
|
||||||
pixmap->format = PICT_a8r8g8b8;
|
pixmap->format = PICT_a8r8g8b8;
|
||||||
pixmap->flags = io->flags;
|
pixmap->flags = PX_MEM_LOCAL; //io->flags;
|
||||||
pixmap->pitch = pitch;
|
pixmap->pitch = pitch;
|
||||||
pixmap->mapped = mapped;
|
pixmap->mapped = mapped;
|
||||||
pixmap->pitch_offset = ((pitch/64)<<22)| (((u32_t)local+rhd.fbLocation)>>10);
|
pixmap->pitch_offset = ((pitch/64)<<22)| (((u32_t)local+rhd.fbLocation)>>10);
|
||||||
|
@ -39,8 +39,8 @@ R5xx2DFlush()
|
|||||||
R5XX_DSTCACHE_FLUSH_ALL, R5XX_DSTCACHE_FLUSH_ALL);
|
R5XX_DSTCACHE_FLUSH_ALL, R5XX_DSTCACHE_FLUSH_ALL);
|
||||||
|
|
||||||
for (i = 0; i < R5XX_LOOP_COUNT; i++)
|
for (i = 0; i < R5XX_LOOP_COUNT; i++)
|
||||||
if (!(INREG(R5XX_DSTCACHE_CTLSTAT) & R5XX_DSTCACHE_BUSY))
|
if (!(INREG(R5XX_DSTCACHE_CTLSTAT) & R5XX_DSTCACHE_BUSY))
|
||||||
return TRUE;
|
return TRUE;
|
||||||
|
|
||||||
dbgprintf("%s: Timeout 0x%08x.\n", __func__,
|
dbgprintf("%s: Timeout 0x%08x.\n", __func__,
|
||||||
(unsigned int)INREG(R5XX_DSTCACHE_CTLSTAT));
|
(unsigned int)INREG(R5XX_DSTCACHE_CTLSTAT));
|
||||||
@ -54,24 +54,23 @@ R5xx2DIdleLocal() //R100-R500
|
|||||||
|
|
||||||
/* wait for fifo to clear */
|
/* wait for fifo to clear */
|
||||||
for (i = 0; i < R5XX_LOOP_COUNT; i++)
|
for (i = 0; i < R5XX_LOOP_COUNT; i++)
|
||||||
if (64 == (INREG(R5XX_RBBM_STATUS) & R5XX_RBBM_FIFOCNT_MASK))
|
if (64 == (INREG(R5XX_RBBM_STATUS) & R5XX_RBBM_FIFOCNT_MASK))
|
||||||
break;
|
break;
|
||||||
|
|
||||||
if (i == R5XX_LOOP_COUNT) {
|
if (i == R5XX_LOOP_COUNT) {
|
||||||
dbgprintf("%s: FIFO Timeout 0x%08X.\n", __func__,INREG(R5XX_RBBM_STATUS));
|
dbgprintf("%s: FIFO Timeout 0x%08X.\n", __func__,INREG(R5XX_RBBM_STATUS));
|
||||||
return FALSE;
|
return FALSE;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* wait for engine to go idle */
|
/* wait for engine to go idle */
|
||||||
for (i = 0; i < R5XX_LOOP_COUNT; i++) {
|
for (i = 0; i < R5XX_LOOP_COUNT; i++) {
|
||||||
if (!(INREG(R5XX_RBBM_STATUS) & R5XX_RBBM_ACTIVE)) {
|
if (!(INREG(R5XX_RBBM_STATUS) & R5XX_RBBM_ACTIVE)) {
|
||||||
R5xx2DFlush();
|
R5xx2DFlush();
|
||||||
return TRUE;
|
return TRUE;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
dbgprintf("%s: Idle Timeout 0x%08X.\n", __func__,INREG(R5XX_RBBM_STATUS));
|
dbgprintf("%s: Idle Timeout 0x%08X.\n", __func__,INREG(R5XX_RBBM_STATUS));
|
||||||
return FALSE;
|
return FALSE;
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@ -174,6 +173,7 @@ void R5xx2DInit()
|
|||||||
scr_pixmap.width = rhd.displayWidth;
|
scr_pixmap.width = rhd.displayWidth;
|
||||||
scr_pixmap.height = rhd.displayHeight;
|
scr_pixmap.height = rhd.displayHeight;
|
||||||
scr_pixmap.format = PICT_a8r8g8b8;
|
scr_pixmap.format = PICT_a8r8g8b8;
|
||||||
|
scr_pixmap.flags = PX_MEM_LOCAL;
|
||||||
scr_pixmap.pitch = rhd.displayWidth * 4 ;//screenpitch;
|
scr_pixmap.pitch = rhd.displayWidth * 4 ;//screenpitch;
|
||||||
scr_pixmap.local = (void*)rhd.fbLocation;
|
scr_pixmap.local = (void*)rhd.fbLocation;
|
||||||
scr_pixmap.pitch_offset = rhd.dst_pitch_offset;
|
scr_pixmap.pitch_offset = rhd.dst_pitch_offset;
|
||||||
@ -188,9 +188,10 @@ void R5xx2DInit()
|
|||||||
|
|
||||||
OUTREG(R5XX_SURFACE_CNTL, rhd.surface_cntl);
|
OUTREG(R5XX_SURFACE_CNTL, rhd.surface_cntl);
|
||||||
|
|
||||||
#if R300_PIO
|
#if !R300_PIO
|
||||||
#else
|
|
||||||
init_cp(&rhd);
|
init_cp(&rhd);
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
R5xx2DSetup();
|
R5xx2DSetup();
|
||||||
|
Loading…
Reference in New Issue
Block a user