i915: 3.12.9 fix tiling for Gen3 gpu's

git-svn-id: svn://kolibrios.org@4557 a494cfbc-eb01-0410-851d-a64ba20cac60
This commit is contained in:
Sergey Semyonov (Serge) 2014-02-04 20:49:21 +00:00
parent 49560506b1
commit 9297b1d4c8
2 changed files with 42 additions and 92 deletions

View File

@ -3352,7 +3352,7 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
intel_crtc->config.has_pch_encoder); intel_crtc->config.has_pch_encoder);
intel_enable_plane(dev_priv, plane, pipe); intel_enable_plane(dev_priv, plane, pipe);
intel_enable_planes(crtc); intel_enable_planes(crtc);
// intel_crtc_update_cursor(crtc, true); intel_crtc_update_cursor(crtc, true);
if (intel_crtc->config.has_pch_encoder) if (intel_crtc->config.has_pch_encoder)
ironlake_pch_enable(crtc); ironlake_pch_enable(crtc);
@ -3460,7 +3460,7 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
intel_crtc->config.has_pch_encoder); intel_crtc->config.has_pch_encoder);
intel_enable_plane(dev_priv, plane, pipe); intel_enable_plane(dev_priv, plane, pipe);
intel_enable_planes(crtc); intel_enable_planes(crtc);
// intel_crtc_update_cursor(crtc, true); intel_crtc_update_cursor(crtc, true);
hsw_enable_ips(intel_crtc); hsw_enable_ips(intel_crtc);
@ -3523,7 +3523,7 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc)
if (dev_priv->fbc.plane == plane) if (dev_priv->fbc.plane == plane)
intel_disable_fbc(dev); intel_disable_fbc(dev);
// intel_crtc_update_cursor(crtc, false); intel_crtc_update_cursor(crtc, false);
intel_disable_planes(crtc); intel_disable_planes(crtc);
intel_disable_plane(dev_priv, plane, pipe); intel_disable_plane(dev_priv, plane, pipe);
@ -3596,7 +3596,7 @@ static void haswell_crtc_disable(struct drm_crtc *crtc)
hsw_disable_ips(intel_crtc); hsw_disable_ips(intel_crtc);
// intel_crtc_update_cursor(crtc, false); intel_crtc_update_cursor(crtc, false);
intel_disable_planes(crtc); intel_disable_planes(crtc);
intel_disable_plane(dev_priv, plane, pipe); intel_disable_plane(dev_priv, plane, pipe);
@ -3739,7 +3739,7 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
intel_enable_pipe(dev_priv, pipe, false); intel_enable_pipe(dev_priv, pipe, false);
intel_enable_plane(dev_priv, plane, pipe); intel_enable_plane(dev_priv, plane, pipe);
intel_enable_planes(crtc); intel_enable_planes(crtc);
// intel_crtc_update_cursor(crtc, true); intel_crtc_update_cursor(crtc, true);
intel_update_fbc(dev); intel_update_fbc(dev);
@ -3780,7 +3780,7 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
/* The fixup needs to happen before cursor is enabled */ /* The fixup needs to happen before cursor is enabled */
if (IS_G4X(dev)) if (IS_G4X(dev))
g4x_fixup_plane(dev_priv, pipe); g4x_fixup_plane(dev_priv, pipe);
// intel_crtc_update_cursor(crtc, true); intel_crtc_update_cursor(crtc, true);
/* Give the overlay scaler a chance to enable if it's on this pipe */ /* Give the overlay scaler a chance to enable if it's on this pipe */
intel_crtc_dpms_overlay(intel_crtc, true); intel_crtc_dpms_overlay(intel_crtc, true);
@ -3829,7 +3829,7 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc)
intel_disable_fbc(dev); intel_disable_fbc(dev);
intel_crtc_dpms_overlay(intel_crtc, false); intel_crtc_dpms_overlay(intel_crtc, false);
// intel_crtc_update_cursor(crtc, false); intel_crtc_update_cursor(crtc, false);
intel_disable_planes(crtc); intel_disable_planes(crtc);
intel_disable_plane(dev_priv, plane, pipe); intel_disable_plane(dev_priv, plane, pipe);
@ -3841,6 +3841,9 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc)
if (encoder->post_disable) if (encoder->post_disable)
encoder->post_disable(encoder); encoder->post_disable(encoder);
if (IS_VALLEYVIEW(dev))
vlv_disable_pll(dev_priv, pipe);
else
i9xx_disable_pll(dev_priv, pipe); i9xx_disable_pll(dev_priv, pipe);
intel_crtc->active = false; intel_crtc->active = false;
@ -6794,6 +6797,7 @@ static void i845_update_cursor(struct drm_crtc *crtc, u32 base)
intel_crtc->cursor_visible = visible; intel_crtc->cursor_visible = visible;
} }
#endif
static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base) static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base)
{ {
@ -6906,13 +6910,11 @@ static void intel_crtc_update_cursor(struct drm_crtc *crtc,
ivb_update_cursor(crtc, base); ivb_update_cursor(crtc, base);
} else { } else {
I915_WRITE(CURPOS(pipe), pos); I915_WRITE(CURPOS(pipe), pos);
if (IS_845G(dev) || IS_I865G(dev))
i845_update_cursor(crtc, base);
else
i9xx_update_cursor(crtc, base); i9xx_update_cursor(crtc, base);
} }
} }
#if 0
static int intel_crtc_cursor_set(struct drm_crtc *crtc, static int intel_crtc_cursor_set(struct drm_crtc *crtc,
struct drm_file *file, struct drm_file *file,
uint32_t handle, uint32_t handle,
@ -7027,6 +7029,7 @@ fail:
drm_gem_object_unreference_unlocked(&obj->base); drm_gem_object_unreference_unlocked(&obj->base);
return ret; return ret;
} }
#endif
static int intel_crtc_cursor_move(struct drm_crtc *crtc, int x, int y) static int intel_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
{ {
@ -7040,7 +7043,6 @@ static int intel_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
return 0; return 0;
} }
#endif
/** Sets the color ramps on behalf of RandR */ /** Sets the color ramps on behalf of RandR */
void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green, void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
@ -9348,7 +9350,7 @@ out_config:
static const struct drm_crtc_funcs intel_crtc_funcs = { static const struct drm_crtc_funcs intel_crtc_funcs = {
// .cursor_set = intel_crtc_cursor_set, // .cursor_set = intel_crtc_cursor_set,
// .cursor_move = intel_crtc_cursor_move, .cursor_move = intel_crtc_cursor_move,
.gamma_set = intel_crtc_gamma_set, .gamma_set = intel_crtc_gamma_set,
.set_config = intel_crtc_set_config, .set_config = intel_crtc_set_config,
.destroy = intel_crtc_destroy, .destroy = intel_crtc_destroy,

View File

@ -111,6 +111,7 @@ bool set_mode(struct drm_device *dev, struct drm_connector *connector,
const char *con_name; const char *con_name;
const char *enc_name; const char *enc_name;
unsigned hdisplay, vdisplay; unsigned hdisplay, vdisplay;
int stride;
int ret; int ret;
mutex_lock(&dev->mode_config.mutex); mutex_lock(&dev->mode_config.mutex);
@ -169,10 +170,27 @@ do_set:
fb->width = reqmode->width; fb->width = reqmode->width;
fb->height = reqmode->height; fb->height = reqmode->height;
fb->pitches[0] = fb->pitches[1] = fb->pitches[2] = if(dev_priv->mm.bit_6_swizzle_x != I915_BIT_6_SWIZZLE_NONE)
fb->pitches[3] = ALIGN(reqmode->width * 4, 512); {
fb_obj->tiling_mode = I915_TILING_X;
fb_obj->stride = fb->pitches[0]; if(IS_GEN3(dev))
for (stride = 512; stride < reqmode->width * 4; stride <<= 1);
else
stride = ALIGN(reqmode->width * 4, 512);
}
else
{
fb_obj->tiling_mode = I915_TILING_NONE;
stride = ALIGN(reqmode->width * 4, 64);
}
fb->pitches[0] =
fb->pitches[1] =
fb->pitches[2] =
fb->pitches[3] = stride;
fb_obj->stride = stride;
fb->bits_per_pixel = 32; fb->bits_per_pixel = 32;
fb->depth = 24; fb->depth = 24;
@ -590,86 +608,14 @@ int init_cursor(cursor_t *cursor)
} }
static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base)
{
struct drm_device *dev = crtc->dev;
struct drm_i915_private *dev_priv = dev->dev_private;
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
int pipe = intel_crtc->pipe;
bool visible = base != 0;
if (intel_crtc->cursor_visible != visible) {
uint32_t cntl = I915_READ(CURCNTR(pipe));
if (base) {
cntl &= ~(CURSOR_MODE | MCURSOR_PIPE_SELECT);
cntl |= CURSOR_MODE_64_ARGB_AX | MCURSOR_GAMMA_ENABLE;
cntl |= pipe << 28; /* Connect to correct pipe */
} else {
cntl &= ~(CURSOR_MODE | MCURSOR_GAMMA_ENABLE);
cntl |= CURSOR_MODE_DISABLE;
}
I915_WRITE(CURCNTR(pipe), cntl);
intel_crtc->cursor_visible = visible;
}
/* and commit changes on next vblank */
I915_WRITE(CURBASE(pipe), base);
}
void __stdcall move_cursor_kms(cursor_t *cursor, int x, int y) void __stdcall move_cursor_kms(cursor_t *cursor, int x, int y)
{ {
struct drm_i915_private *dev_priv = os_display->ddev->dev_private; struct drm_crtc *crtc = os_display->crtc;
struct intel_crtc *intel_crtc = to_intel_crtc(os_display->crtc); x-= cursor->hot_x;
u32 base, pos; y-= cursor->hot_y;
bool visible;
int pipe = intel_crtc->pipe; if (crtc->funcs->cursor_move)
crtc->funcs->cursor_move(crtc, x, y);
intel_crtc->cursor_x = x;
intel_crtc->cursor_y = y;
x = x - cursor->hot_x;
y = y - cursor->hot_y;
pos = 0;
base = intel_crtc->cursor_addr;
if (x >= os_display->width)
base = 0;
if (y >= os_display->height)
base = 0;
if (x < 0)
{
if (x + intel_crtc->cursor_width < 0)
base = 0;
pos |= CURSOR_POS_SIGN << CURSOR_X_SHIFT;
x = -x;
}
pos |= x << CURSOR_X_SHIFT;
if (y < 0)
{
if (y + intel_crtc->cursor_height < 0)
base = 0;
pos |= CURSOR_POS_SIGN << CURSOR_Y_SHIFT;
y = -y;
}
pos |= y << CURSOR_Y_SHIFT;
visible = base != 0;
if (!visible && !intel_crtc->cursor_visible)
return;
I915_WRITE(CURPOS(pipe), pos);
// if (IS_845G(dev) || IS_I865G(dev))
// i845_update_cursor(crtc, base);
// else
i9xx_update_cursor(os_display->crtc, base);
}; };
@ -683,6 +629,8 @@ cursor_t* __stdcall select_cursor_kms(cursor_t *cursor)
old = os_display->cursor; old = os_display->cursor;
os_display->cursor = cursor; os_display->cursor = cursor;
intel_crtc->cursor_bo = cursor->cobj;
if (!dev_priv->info->cursor_needs_physical) if (!dev_priv->info->cursor_needs_physical)
intel_crtc->cursor_addr = i915_gem_obj_ggtt_offset(cursor->cobj); intel_crtc->cursor_addr = i915_gem_obj_ggtt_offset(cursor->cobj);
else else