forked from KolibriOS/kolibrios
Added more hardware diversities, refactored chip wake up procedure, set PCI_CMD_PIO bit to allow access to devices which have this bit disabled by default.
git-svn-id: svn://kolibrios.org@6711 a494cfbc-eb01-0410-851d-a64ba20cac60
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@ -144,26 +144,30 @@ include '../netdrv.inc'
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EE_93C56_CMD_LENGTH = 11 ; start bit + cmd + 8bit ddress
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; See chapter "5.7 Transmit Configuration Register" of RTL8139D(L).pdf
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VER_RTL8139 = 1100000b
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VER_RTL8139 = 1000000b
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VER_RTL8139_K = 1100000b
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VER_RTL8139A = 1110000b
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VER_RTL8139AG = 1110100b
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VER_RTL8139A_G = 1110010b
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VER_RTL8139B = 1111000b
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VER_RTL8130 = VER_RTL8139B
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VER_RTL8130 = 1111100b
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VER_RTL8139C = 1110100b
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VER_RTL8100 = 1111010b
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VER_RTL8100B = 1110101b
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VER_RTL8139D = VER_RTL8100B
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VER_RTL8139CP = 1110110b
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VER_RTL8100_8139D = 1110101b
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VER_RTL8101 = 1110111b
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IDX_RTL8139 = 0
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IDX_RTL8139A = 1
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IDX_RTL8139B = 2
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IDX_RTL8139C = 3
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IDX_RTL8100 = 4
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IDX_RTL8139D = 5
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IDX_RTL8139D = 6
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IDX_RTL8101 = 7
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IDX_UNKNOWN = 0
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IDX_RTL8139 = 1
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IDX_RTL8139_K = 2
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IDX_RTL8139A = 3
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IDX_RTL8139A_G = 4
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IDX_RTL8139B = 5
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IDX_RTL8130 = 6
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IDX_RTL8139C = 7
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IDX_RTL8100 = 8
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IDX_RTL8100_8139D = 9
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IDX_RTL8101 = 10
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HW_VERSIONS = 10
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ISR_SERR = 1 shl 15
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ISR_TIMEOUT = 1 shl 14
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@ -327,8 +331,8 @@ proc service_proc stdcall, ioctl:dword
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invoke PciRead8, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.interrupt_line
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mov [ebx + device.irq_line], al
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DEBUGF 1, "Hooking into device, dev:%x, bus:%x, irq:%x, I/O addr:%x\n",\
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[ebx + device.pci_dev]:1,[ebx + device.pci_bus]:1,[ebx + device.irq_line]:1,[ebx + device.io_addr]:4
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DEBUGF 1, "Hooking into device, devfn:%x, bus:%x, irq:%x, I/O addr:%x\n",\
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[ebx + device.pci_dev]:2,[ebx + device.pci_bus]:2,[ebx + device.irq_line]:2,[ebx + device.io_addr]:4
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; Allocate the receive buffer
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@ -377,7 +381,7 @@ proc service_proc stdcall, ioctl:dword
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dec [devices]
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.err:
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DEBUGF 2, "Error, removing all data !\n"
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DEBUGF 2, "Fatal error occured, aborting\n"
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invoke KernelFree, [ebx + device.rx_buffer]
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invoke KernelFree, ebx
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@ -421,82 +425,82 @@ probe:
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; Make the device a bus master
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invoke PciRead32, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.command
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or al, PCI_CMD_MASTER
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or al, PCI_CMD_MASTER or PCI_CMD_PIO
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invoke PciWrite32, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.command, eax
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; get chip version
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set_io [ebx + device.io_addr], 0
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set_io [ebx + device.io_addr], REG_TXCONFIG + 2
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in ax, dx
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shr ah, 2
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shr ax, 6
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and al, 01111111b
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; now find it in our array
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mov ecx, HW_VER_ARRAY_SIZE-1
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.chip_ver_loop:
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cmp al, [hw_ver_array + ecx]
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je .chip_ver_found
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dec ecx
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jns .chip_ver_loop
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.unknown:
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mov ecx, 8
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.chip_ver_found:
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cmp ecx, 8
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ja .unknown
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mov [ebx + device.hw_ver_id], cl
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mov ecx, [crosslist+ecx*4]
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mov [ebx + device.name], ecx
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DEBUGF 1, "Chip version: %s\n", ecx
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; wake up the chip
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; wake up old chips
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set_io [ebx + device.io_addr], 0
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set_io [ebx + device.io_addr], REG_HLTCLK
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mov al, 'R' ; run the clock
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out dx, al
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; unlock config and BMCR registers
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set_io [ebx + device.io_addr], REG_9346CR
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mov al, (1 shl BIT_93C46_EEM1) or (1 shl BIT_93C46_EEM0)
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out dx, al
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; get chip version
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set_io [ebx + device.io_addr], REG_TXCONFIG
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in eax, dx
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shr eax, 16
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shr ah, 2
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shr ax, 6
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and al, 0x7f
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DEBUGF 1, "Chip version: %x\n", eax:2
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; now find it in our array
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mov ecx, HW_VERSIONS
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@@:
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cmp al, [hw_ver_array + ecx]
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je @f
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dec ecx
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jnz @r
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@@:
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mov [ebx + device.hw_ver_id], cl
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mov ecx, [hw_ver_names+ecx*4]
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mov [ebx + device.name], ecx
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DEBUGF 1, "Chip version: %s\n", ecx
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; enable power management
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set_io [ebx + device.io_addr], REG_CONFIG1
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in al, dx
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cmp [ebx + device.hw_ver_id], IDX_RTL8139B
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jae .new_chip
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; wake up older chips
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.old_chip:
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DEBUGF 1, "Wake up chip old style\n"
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set_io [ebx + device.io_addr], REG_CONFIG1
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in al, dx
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and al, not ((1 shl BIT_SLEEP) or (1 shl BIT_PWRDWN))
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out dx, al
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jmp .finish_wake_up
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jmp .done
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; set LWAKE pin to active high (default value).
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; it is for Wake-On-LAN functionality of some motherboards.
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; this signal is used to inform the motherboard to execute a wake-up process.
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; only at newer chips.
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.new_chip:
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DEBUGF 1, "Wake up chip new style\n"
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; unlock config and BMCR registers
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set_io [ebx + device.io_addr], 0
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set_io [ebx + device.io_addr], REG_9346CR
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mov al, (1 shl BIT_93C46_EEM1) or (1 shl BIT_93C46_EEM0)
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out dx, al
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;
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set_io [ebx + device.io_addr], REG_CONFIG1
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in al, dx
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or al, (1 shl BIT_PMEn)
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and al, not (1 shl BIT_LWACT)
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out dx, al
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;
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set_io [ebx + device.io_addr], REG_CONFIG4
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in al, dx
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and al, not (1 shl BIT_LWPTN)
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out dx, al
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; lock config and BMCR registers
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.finish_wake_up:
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xor al, al
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set_io [ebx + device.io_addr], 0
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set_io [ebx + device.io_addr], REG_9346CR
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out dx, al
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.done:
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DEBUGF 1, "probing done!\n"
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xor eax, eax
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ret
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@ -516,16 +520,16 @@ reset:
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mov al, 1 shl BIT_RST
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out dx, al
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mov cx, 1000 ; wait no longer for the reset
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.wait_for_reset:
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@@:
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in al, dx
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test al, 1 shl BIT_RST
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jz .reset_completed ; RST remains 1 during reset
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jz @f ; RST remains 1 during reset
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dec cx
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jns .wait_for_reset
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jnz @r
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DEBUGF 2, "Reset timeout!\n"
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or eax, -1
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ret
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.reset_completed:
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@@:
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; Read MAC address
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call read_mac
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@ -620,6 +624,7 @@ reset:
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; Set the mtu, kernel will be able to send now
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mov [ebx + device.mtu], 1514
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; Detect current link status
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call link
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; Indicate that we have successfully reset the card
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@ -1122,39 +1127,43 @@ include '../peimport.inc'
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my_service db 'RTL8139',0 ; max 16 chars include zero
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device_1 db 'Realtek 8139',0
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device_2 db 'Realtek 8139A',0
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device_3 db 'Realtek 8139B',0
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device_4 db 'Realtek 8139C',0
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device_5 db 'Realtek 8100',0
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device_6 db 'Realtek 8139D',0
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device_7 db 'Realtek 8139CP',0
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device_8 db 'Realtek 8101',0
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device_unknown db 'Unknown RTL8139 clone', 0
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sz_unknown db 'Unknown RTL8139 clone', 0
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sz_RTL8139 db 'Realtek 8139',0
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sz_RTL8139_K db 'Realtek 8139 rev K',0
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sz_RTL8139A db 'Realtek 8139A',0
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sz_RTL8139A_G db 'Realtek 8139A rev G',0
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sz_RTL8139B db 'Realtek 8139B',0
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sz_RTL8130 db 'Realtek 8130',0
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sz_RTL8139C db 'Realtek 8139C',0
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sz_RTL8100 db 'Realtek 8100',0
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sz_RTL8100_8139D db 'Realtek 8100B / 8139D',0
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sz_RTL8101 db 'Realtek 8101',0
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crosslist:
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dd device_1
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dd device_2
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dd device_3
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dd device_4
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dd device_5
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dd device_6
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dd device_7
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dd device_8
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dd device_unknown
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hw_ver_names:
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dd sz_unknown
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dd sz_RTL8139
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dd sz_RTL8139_K
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dd sz_RTL8139A
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dd sz_RTL8139A_G
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dd sz_RTL8139B
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dd sz_RTL8130
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dd sz_RTL8139C
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dd sz_RTL8100
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dd sz_RTL8100_8139D
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dd sz_RTL8101
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hw_ver_array: ; This array is used by the probe routine to find out wich version of the RTL8139 we are working with
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db 0
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db VER_RTL8139
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db VER_RTL8139_K
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db VER_RTL8139A
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db VER_RTL8139A_G
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db VER_RTL8139B
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db VER_RTL8130
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db VER_RTL8139C
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db VER_RTL8100
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db VER_RTL8139D
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db VER_RTL8139CP
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db VER_RTL8100_8139D
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db VER_RTL8101
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db 0
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HW_VER_ARRAY_SIZE = $-hw_ver_array
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include_debug_strings ; All data wich FDO uses will be included here
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