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mirror of https://git.missingno.dev/kolibrios-nvme-driver/ synced 2025-09-21 09:30:08 +02:00

refactor: organize code into proper components

This commit is contained in:
2024-04-17 15:35:01 -04:00
parent bc11bcfa37
commit d0ddd1233d

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@@ -5,8 +5,6 @@
;; ;; ;; ;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;driver sceletone
format PE DLL native format PE DLL native
entry START entry START
@@ -27,21 +25,29 @@ include "../peimport.inc"
include "nvme.inc" include "nvme.inc"
proc START c, reason:dword proc START c, reason:dword
cmp [reason], DRV_ENTRY cmp [reason], DRV_ENTRY
jne .exit jne .err
.entry: .entry:
push esi
DEBUGF DBG_INFO, "Detecting NVMe hardware...\n" DEBUGF DBG_INFO, "Detecting NVMe hardware...\n"
call detect call detect_nvme
pop esi
test eax, eax test eax, eax
jz .exit jz .err ; no NVMe device found?
DEBUGF DBG_INFO, "Found NVMe device...\n"
stdcall nvme_init, dword [eax + PCIDEV.bus], dword [eax + PCIDEV.devfn]
test eax, eax
jz .err ; failed to initialize controller?
invoke RegService, my_service, service_proc invoke RegService, my_service, service_proc
ret ret
.exit:
.err:
call nvme_cleanup
xor eax, eax xor eax, eax
ret ret
endp endp
proc service_proc stdcall, ioctl:dword proc service_proc stdcall, ioctl:dword
@@ -53,111 +59,106 @@ proc service_proc stdcall, ioctl:dword
mov eax, [ebx+IOCTL.output] mov eax, [ebx+IOCTL.output]
cmp [ebx+IOCTL.out_size], 4 cmp [ebx+IOCTL.out_size], 4
jne .fail jne @F
mov dword [eax], API_VERSION mov dword [eax], API_VERSION
xor eax, eax xor eax, eax
ret ret
@@: @@:
.fail:
or eax, -1 or eax, -1
ret ret
endp endp
proc memset stdcall, p_data:dword, val:byte, sz:dword proc memset stdcall, p_data:dword, val:byte, sz:dword
mov bh, byte [val] mov bh, byte [val]
xor eax, eax xor ecx, ecx
@@: @@:
mov byte [p_data + eax], bh mov byte [p_data + ecx], bh
inc eax inc ecx
test eax, dword [sz] cmp ecx, dword [sz]
jnz @b jne @b
xor eax, eax
ret ret
endp endp
; Submit a Command in the Admin Submission Queue ; Submit a Command in the Admin Submission Queue
proc submit_asq stdcall, p_sq:dword proc submit_asq stdcall, p_sq:dword
xor eax, eax xor eax, eax
ret ret
endp endp
proc nvme_identify stdcall, nsid:dword, dptr:dword, cns:byte proc nvme_identify stdcall, nsid:dword, dptr:dword, cns:byte
sub esp, sizeof.SQ_ENTRY sub esp, sizeof.SQ_ENTRY
stdcall memset, esp, 0, sizeof.SQ_ENTRY stdcall memset, esp, 0, sizeof.SQ_ENTRY
mov eax, dword [nsid] mov eax, dword [nsid]
mov [esp + SQ_ENTRY.nsid], eax mov dword [esp + SQ_ENTRY.nsid], eax
mov eax, dword [dptr] mov eax, dword [dptr]
mov dword [esp + SQ_ENTRY.dptr], eax mov dword [esp + SQ_ENTRY.dptr], eax
; TODO: setting CID to 0 for now but later on keep a list of unique list of identifiers mov dword [esp + SQ_ENTRY.cdw0], ADM_CMD_IDENTIFY ; TODO: setting CID to 0 for now but later on keep a unique list of identifiers
mov dword [esp + SQ_ENTRY.cdw0], ADM_CMD_IDENTIFY
mov ah, byte [cns] mov ah, byte [cns]
mov byte [esp + SQ_ENTRY.cdw10], ah mov byte [esp + SQ_ENTRY.cdw10], ah
stdcall submit_asq, esp stdcall submit_asq, esp
add esp, sizeof.SQ_ENTRY add esp, sizeof.SQ_ENTRY
xor eax, eax xor eax, eax
ret ret
endp endp
proc detect ;
push ebx proc detect_nvme
invoke GetPCIList invoke GetPCIList
mov edx, eax mov edx, eax
.check_dev: .check_dev:
mov ecx, [eax+PCIDEV.class] mov ebx, dword [eax + PCIDEV.class]
and ecx, 0x00ffff00 ; retrieve class/subclass code only and ebx, 0x00ffff00 ; retrieve class/subclass code only
cmp ecx, 0x00010800 ; Mass Storage Controller - Non-Volatile Memory Controller cmp ebx, 0x00010800 ; Mass Storage Controller - Non-Volatile Memory Controller
je .check_cap je .found_dev
.next_dev: .next_dev:
mov eax, [eax + PCIDEV.fd] mov eax, dword [eax + PCIDEV.fd]
cmp eax, edx cmp eax, edx
jne .check_dev jne .check_dev
xor eax, eax ; no more PCI devices to enumerate?
; no more PCI devices to enumerate? .found_dev:
xor eax, eax
pop ebx
ret ret
.check_cap:
push eax
movzx ebx, [eax + PCIDEV.bus]
mov [pcidev_bus], ebx
movzx ebx, [eax + PCIDEV.devfn]
mov [pcidev_devfn], ebx
invoke PciRead16, [pcidev_bus], [pcidev_devfn], PCI_header00.status
test ax, 0x10 ; check capabilities list bit
jnz .got_cap
pop eax
.got_cap:
DEBUGF DBG_INFO,"Found NVMe device with capabilities\n"
invoke PciRead8, [pcidev_bus], [pcidev_devfn], PCI_header00.cap_ptr
and eax, 11111100b
mov edi, eax
@@:
invoke PciRead32, [pcidev_bus], [pcidev_devfn], edi
mov ecx, eax
;and ecx, 0xff
mov eax, ecx
movzx edi, ah
test edi, edi
jnz @b
; read BAR0 endp
invoke PciRead32, [pcidev_bus], [pcidev_devfn], PCI_header00.base_addr_0
; nvme_init: Initializes the NVMe controller
proc nvme_init, bus:dword, devfn:dword
invoke PciRead32, [bus], [devfn], PCI_header00.base_addr_0
and eax, 0xfffffff0 and eax, 0xfffffff0
test eax, eax test eax, eax
jz .no_mmio jz .exit_fail
invoke MapIoMem, eax, sizeof.NVME_REG_MAP, PG_SW+PG_NOCACHE invoke MapIoMem, eax, sizeof.NVME_REG_MAP, PG_SW+PG_NOCACHE
test eax, eax test eax, eax
jz .no_mmio jz .exit_fail
mov [p_mmap], eax mov [p_mmap], eax
mov ebx, dword [eax + NVME_REG_MAP.CAP] mov ebx, dword [eax + NVME_REG_MAP.CAP]
DEBUGF DBG_INFO, "(NVMe) Maximum queue entries supported: %u\n", bx DEBUGF DBG_INFO, "(NVMe) Maximum queue entries supported: %u\n", bx
test ebx, CAP_CQR test ebx, CAP_CQR
jz .cqr_not_req jz .cqr_not_req
DEBUGF DBG_INFO, "(NVMe) Contiguous queues required\n" DEBUGF DBG_INFO, "(NVMe) Contiguous queues required\n"
.cqr_not_req: .cqr_not_req:
mov ebx, dword [eax + NVME_REG_MAP.CAP + 4] mov ebx, dword [eax + NVME_REG_MAP.CAP + 4]
mov ecx, ebx mov ecx, ebx
test ebx, CAP_CSS_NVM_CMDSET test ebx, CAP_CSS_NVM_CMDSET
jz .exit_fail jz .exit_fail
if __DEBUG__
and ebx, CAP_MPSMIN and ebx, CAP_MPSMIN
and ecx, CAP_MPSMAX and ecx, CAP_MPSMAX
shr ebx, 16 shr ebx, 16
@@ -171,58 +172,42 @@ proc detect
and ecx, CC_IOCQES and ecx, CC_IOCQES
shl ebx, 16 shl ebx, 16
shl ecx, 16 shl ecx, 16
DEBUGF DBG_INFO,"(NVMe) I/O Submission Queue Entry Size: %u\n", ebx
; TODO: Change entry sizes to their appropriate values
DEBUGF DBG_INFO,"(NVMe) I/O Submission Queue entry Size: %u\n", ebx
DEBUGF DBG_INFO,"(NVMe) I/O completion queue entry size: %u\n", ecx DEBUGF DBG_INFO,"(NVMe) I/O completion queue entry size: %u\n", ecx
; Initialize the controller end if
invoke KernelAlloc, sizeof.NVME_IDENT_CONTROLLER
test eax, eax
jz .alloc_ident_controller_fail
mov [p_ident], eax
stdcall nvme_identify, 0, dword [p_ident], CNS_IDCS
mov ecx, dword [p_ident]
mov edx, dword [ecx + NVME_IDENT_CONTROLLER.tnvmcap]
DEBUGF DBG_INFO,"Total NVMe SSD capacity: %ub\n", edx
; return successfully
call nvme_cleanup
pop eax
pop ebx
xor eax, eax xor eax, eax
inc eax inc eax
ret ret
.alloc_ident_controller_fail:
DEBUGF DBG_INFO,"ERROR: failed to allocate %u bytes for 'NVME_IDENT_CONTROLLER'\n", sizeof.NVME_IDENT_CONTROLLER
jmp .exit_fail
.no_mmio:
DEBUGF DBG_INFO,"ERROR: NVMe Device has no MMIO\n"
.exit_fail: .exit_fail:
pop eax DEBUGF DBG_INFO, "ERROR: failed to initialize NVMe controller\n"
pop ebx
xor eax, eax xor eax, eax
ret ret
endp endp
proc nvme_cleanup proc nvme_cleanup
mov eax, [p_ident] mov eax, [p_ident]
test eax, eax test eax, eax
jz @f jz @f
invoke Kfree, eax invoke KernelFree, eax
@@: @@:
ret ret
endp endp
; uninitialized data ; uninitialized data
align 4 align 4
pcidev_bus dd ?
pcidev_devfn dd ?
p_mmap dd ? p_mmap dd ?
p_ident dd ? p_ident dd ?
;all initialized data place here ;all initialized data place here
align 4 align 4
my_service db "NVMe Service",0 ;max 16 chars include zero my_service db "NVME",0 ;max 16 chars include zero
include_debug_strings include_debug_strings
align 4 align 4