mirror of
https://git.missingno.dev/kolibrios-nvme-driver/
synced 2025-09-21 09:30:08 +02:00
refactor: organize code into proper components
This commit is contained in:
@@ -5,8 +5,6 @@
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;; ;;
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;; ;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;driver sceletone
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format PE DLL native
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format PE DLL native
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entry START
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entry START
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@@ -27,21 +25,29 @@ include "../peimport.inc"
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include "nvme.inc"
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include "nvme.inc"
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proc START c, reason:dword
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proc START c, reason:dword
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cmp [reason], DRV_ENTRY
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cmp [reason], DRV_ENTRY
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jne .exit
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jne .err
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.entry:
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.entry:
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push esi
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DEBUGF DBG_INFO, "Detecting NVMe hardware...\n"
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DEBUGF DBG_INFO, "Detecting NVMe hardware...\n"
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call detect
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call detect_nvme
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pop esi
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test eax, eax
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test eax, eax
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jz .exit
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jz .err ; no NVMe device found?
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DEBUGF DBG_INFO, "Found NVMe device...\n"
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stdcall nvme_init, dword [eax + PCIDEV.bus], dword [eax + PCIDEV.devfn]
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test eax, eax
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jz .err ; failed to initialize controller?
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invoke RegService, my_service, service_proc
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invoke RegService, my_service, service_proc
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ret
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ret
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.exit:
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.err:
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call nvme_cleanup
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xor eax, eax
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xor eax, eax
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ret
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ret
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endp
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endp
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proc service_proc stdcall, ioctl:dword
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proc service_proc stdcall, ioctl:dword
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@@ -53,111 +59,106 @@ proc service_proc stdcall, ioctl:dword
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mov eax, [ebx+IOCTL.output]
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mov eax, [ebx+IOCTL.output]
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cmp [ebx+IOCTL.out_size], 4
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cmp [ebx+IOCTL.out_size], 4
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jne .fail
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jne @F
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mov dword [eax], API_VERSION
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mov dword [eax], API_VERSION
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xor eax, eax
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xor eax, eax
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ret
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ret
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@@:
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@@:
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.fail:
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or eax, -1
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or eax, -1
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ret
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ret
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endp
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endp
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proc memset stdcall, p_data:dword, val:byte, sz:dword
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proc memset stdcall, p_data:dword, val:byte, sz:dword
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mov bh, byte [val]
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mov bh, byte [val]
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xor eax, eax
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xor ecx, ecx
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@@:
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@@:
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mov byte [p_data + eax], bh
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mov byte [p_data + ecx], bh
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inc eax
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inc ecx
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test eax, dword [sz]
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cmp ecx, dword [sz]
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jnz @b
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jne @b
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xor eax, eax
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ret
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ret
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endp
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endp
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; Submit a Command in the Admin Submission Queue
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; Submit a Command in the Admin Submission Queue
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proc submit_asq stdcall, p_sq:dword
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proc submit_asq stdcall, p_sq:dword
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xor eax, eax
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xor eax, eax
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ret
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ret
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endp
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endp
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proc nvme_identify stdcall, nsid:dword, dptr:dword, cns:byte
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proc nvme_identify stdcall, nsid:dword, dptr:dword, cns:byte
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sub esp, sizeof.SQ_ENTRY
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sub esp, sizeof.SQ_ENTRY
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stdcall memset, esp, 0, sizeof.SQ_ENTRY
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stdcall memset, esp, 0, sizeof.SQ_ENTRY
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mov eax, dword [nsid]
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mov eax, dword [nsid]
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mov [esp + SQ_ENTRY.nsid], eax
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mov dword [esp + SQ_ENTRY.nsid], eax
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mov eax, dword [dptr]
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mov eax, dword [dptr]
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mov dword [esp + SQ_ENTRY.dptr], eax
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mov dword [esp + SQ_ENTRY.dptr], eax
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; TODO: setting CID to 0 for now but later on keep a list of unique list of identifiers
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mov dword [esp + SQ_ENTRY.cdw0], ADM_CMD_IDENTIFY ; TODO: setting CID to 0 for now but later on keep a unique list of identifiers
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mov dword [esp + SQ_ENTRY.cdw0], ADM_CMD_IDENTIFY
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mov ah, byte [cns]
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mov ah, byte [cns]
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mov byte [esp + SQ_ENTRY.cdw10], ah
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mov byte [esp + SQ_ENTRY.cdw10], ah
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stdcall submit_asq, esp
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stdcall submit_asq, esp
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add esp, sizeof.SQ_ENTRY
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add esp, sizeof.SQ_ENTRY
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xor eax, eax
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xor eax, eax
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ret
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ret
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endp
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endp
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proc detect
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;
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push ebx
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proc detect_nvme
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invoke GetPCIList
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invoke GetPCIList
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mov edx, eax
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mov edx, eax
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.check_dev:
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.check_dev:
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mov ecx, [eax+PCIDEV.class]
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mov ebx, dword [eax + PCIDEV.class]
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and ecx, 0x00ffff00 ; retrieve class/subclass code only
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and ebx, 0x00ffff00 ; retrieve class/subclass code only
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cmp ecx, 0x00010800 ; Mass Storage Controller - Non-Volatile Memory Controller
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cmp ebx, 0x00010800 ; Mass Storage Controller - Non-Volatile Memory Controller
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je .check_cap
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je .found_dev
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.next_dev:
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.next_dev:
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mov eax, [eax + PCIDEV.fd]
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mov eax, dword [eax + PCIDEV.fd]
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cmp eax, edx
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cmp eax, edx
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jne .check_dev
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jne .check_dev
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xor eax, eax ; no more PCI devices to enumerate?
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; no more PCI devices to enumerate?
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.found_dev:
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xor eax, eax
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pop ebx
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ret
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ret
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.check_cap:
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push eax
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movzx ebx, [eax + PCIDEV.bus]
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mov [pcidev_bus], ebx
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movzx ebx, [eax + PCIDEV.devfn]
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mov [pcidev_devfn], ebx
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invoke PciRead16, [pcidev_bus], [pcidev_devfn], PCI_header00.status
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test ax, 0x10 ; check capabilities list bit
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jnz .got_cap
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pop eax
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.got_cap:
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DEBUGF DBG_INFO,"Found NVMe device with capabilities\n"
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invoke PciRead8, [pcidev_bus], [pcidev_devfn], PCI_header00.cap_ptr
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and eax, 11111100b
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mov edi, eax
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@@:
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invoke PciRead32, [pcidev_bus], [pcidev_devfn], edi
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mov ecx, eax
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;and ecx, 0xff
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mov eax, ecx
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movzx edi, ah
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test edi, edi
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jnz @b
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; read BAR0
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endp
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invoke PciRead32, [pcidev_bus], [pcidev_devfn], PCI_header00.base_addr_0
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; nvme_init: Initializes the NVMe controller
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proc nvme_init, bus:dword, devfn:dword
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invoke PciRead32, [bus], [devfn], PCI_header00.base_addr_0
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and eax, 0xfffffff0
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and eax, 0xfffffff0
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test eax, eax
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test eax, eax
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jz .no_mmio
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jz .exit_fail
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invoke MapIoMem, eax, sizeof.NVME_REG_MAP, PG_SW+PG_NOCACHE
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invoke MapIoMem, eax, sizeof.NVME_REG_MAP, PG_SW+PG_NOCACHE
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test eax, eax
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test eax, eax
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jz .no_mmio
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jz .exit_fail
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mov [p_mmap], eax
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mov [p_mmap], eax
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mov ebx, dword [eax + NVME_REG_MAP.CAP]
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mov ebx, dword [eax + NVME_REG_MAP.CAP]
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DEBUGF DBG_INFO, "(NVMe) Maximum queue entries supported: %u\n", bx
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DEBUGF DBG_INFO, "(NVMe) Maximum queue entries supported: %u\n", bx
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test ebx, CAP_CQR
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test ebx, CAP_CQR
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jz .cqr_not_req
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jz .cqr_not_req
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DEBUGF DBG_INFO, "(NVMe) Contiguous queues required\n"
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DEBUGF DBG_INFO, "(NVMe) Contiguous queues required\n"
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.cqr_not_req:
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.cqr_not_req:
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mov ebx, dword [eax + NVME_REG_MAP.CAP + 4]
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mov ebx, dword [eax + NVME_REG_MAP.CAP + 4]
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mov ecx, ebx
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mov ecx, ebx
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test ebx, CAP_CSS_NVM_CMDSET
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test ebx, CAP_CSS_NVM_CMDSET
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jz .exit_fail
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jz .exit_fail
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if __DEBUG__
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and ebx, CAP_MPSMIN
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and ebx, CAP_MPSMIN
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and ecx, CAP_MPSMAX
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and ecx, CAP_MPSMAX
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shr ebx, 16
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shr ebx, 16
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@@ -171,58 +172,42 @@ proc detect
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and ecx, CC_IOCQES
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and ecx, CC_IOCQES
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shl ebx, 16
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shl ebx, 16
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shl ecx, 16
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shl ecx, 16
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DEBUGF DBG_INFO,"(NVMe) I/O Submission Queue Entry Size: %u\n", ebx
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; TODO: Change entry sizes to their appropriate values
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DEBUGF DBG_INFO,"(NVMe) I/O Submission Queue entry Size: %u\n", ebx
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DEBUGF DBG_INFO,"(NVMe) I/O completion queue entry size: %u\n", ecx
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DEBUGF DBG_INFO,"(NVMe) I/O completion queue entry size: %u\n", ecx
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; Initialize the controller
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end if
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invoke KernelAlloc, sizeof.NVME_IDENT_CONTROLLER
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test eax, eax
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jz .alloc_ident_controller_fail
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mov [p_ident], eax
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stdcall nvme_identify, 0, dword [p_ident], CNS_IDCS
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mov ecx, dword [p_ident]
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mov edx, dword [ecx + NVME_IDENT_CONTROLLER.tnvmcap]
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DEBUGF DBG_INFO,"Total NVMe SSD capacity: %ub\n", edx
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; return successfully
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call nvme_cleanup
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pop eax
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pop ebx
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xor eax, eax
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xor eax, eax
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inc eax
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inc eax
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ret
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ret
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.alloc_ident_controller_fail:
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DEBUGF DBG_INFO,"ERROR: failed to allocate %u bytes for 'NVME_IDENT_CONTROLLER'\n", sizeof.NVME_IDENT_CONTROLLER
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jmp .exit_fail
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.no_mmio:
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DEBUGF DBG_INFO,"ERROR: NVMe Device has no MMIO\n"
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.exit_fail:
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.exit_fail:
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pop eax
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DEBUGF DBG_INFO, "ERROR: failed to initialize NVMe controller\n"
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pop ebx
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xor eax, eax
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xor eax, eax
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ret
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ret
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endp
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endp
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proc nvme_cleanup
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proc nvme_cleanup
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mov eax, [p_ident]
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mov eax, [p_ident]
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test eax, eax
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test eax, eax
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jz @f
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jz @f
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invoke Kfree, eax
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invoke KernelFree, eax
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@@:
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@@:
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ret
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ret
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endp
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endp
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; uninitialized data
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; uninitialized data
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align 4
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align 4
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pcidev_bus dd ?
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pcidev_devfn dd ?
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p_mmap dd ?
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p_mmap dd ?
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p_ident dd ?
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p_ident dd ?
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;all initialized data place here
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;all initialized data place here
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align 4
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align 4
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my_service db "NVMe Service",0 ;max 16 chars include zero
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my_service db "NVME",0 ;max 16 chars include zero
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include_debug_strings
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include_debug_strings
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align 4
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align 4
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