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https://git.missingno.dev/kolibrios-nvme-driver/
synced 2024-11-10 02:20:27 +01:00
add verbose debug logs
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@ -429,7 +429,7 @@ proc nvme_readwrite stdcall, ns:dword, buf:dword, start_sector:qword, numsectors
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mov eax, [numsectors_ptr]
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mov eax, dword [eax]
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;DEBUGF DBG_INFO, "buf: %x, start_sector: %u:%u, numsectors: %u\n", [buf], [start_sector + 4], [start_sector], eax
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DEBUGF DBG_INFO, "buf: %x, start_sector: %u:%u, numsectors: %u\n", [buf], [start_sector + 4], [start_sector], eax
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mov dword [ebx + 4], 0 ; PRP2 entry (0 by default)
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mov dword [ebx + 8], edx ; command type (read or write)
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mov dword [ebx + 12], eax ; save original numsectors value
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@ -445,7 +445,7 @@ proc nvme_readwrite stdcall, ns:dword, buf:dword, start_sector:qword, numsectors
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test eax, eax
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jz .fail
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;DEBUGF DBG_INFO, "PRP1: %x, PRP2: %x\n", [ebx], [ebx + 4]
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DEBUGF DBG_INFO, "PRP1: %x, PRP2: %x\n", [ebx], [ebx + 4]
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mov eax, dword [start_sector]
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; According to the NVMe specification, the NLB field in the I/O read and write
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@ -672,9 +672,9 @@ proc nvme_init stdcall, pci:dword
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; check maximum queue entries supported
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mov eax, dword [edi + NVME_MMIO.CAP]
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DEBUGF DBG_INFO, "nvme%u: Maximum queue entries available is %u (required: %u)\n", [esi + pcidev.num], ax, SQ_ENTRIES
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cmp ax, SQ_ENTRIES
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jb .exit_fail
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DEBUGF DBG_INFO, "nvme%u: OK... maximum queue entries is %u\n", [esi + pcidev.num], ax
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if __DEBUG__
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test eax, CAP_CQR
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@ -684,11 +684,13 @@ proc nvme_init stdcall, pci:dword
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; Check if NVM command set is supported
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mov eax, dword [edi + NVME_MMIO.CAP + 4]
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DEBUGF DBG_INFO, "nvme%u: Checking if NVM command set is supported...\n", [esi + pcidev.num]
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test eax, CAP_CSS_NVM_CMDSET
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jz .exit_fail
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DEBUGF DBG_INFO, "nvme%u: OK... NVM command set supported\n", [esi + pcidev.num]
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stdcall nvme_disable_ctrl, esi
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DEBUGF DBG_INFO, "nvme%u: Checking if memory page size is supported...\n", [esi + pcidev.num]
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mov eax, dword [edi + NVME_MMIO.CAP + 4]
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mov edx, eax
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and edx, CAP_MPSMIN
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@ -710,6 +712,7 @@ proc nvme_init stdcall, pci:dword
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xor eax, eax
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or eax, (4 shl 20) or (6 shl 16)
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mov dword [edi + NVME_MMIO.CC], eax
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DEBUGF DBG_INFO, "nvme%u: OK... controller is configured to appropriate settings\n", [esi + pcidev.num]
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; Configure Admin Queue Attributes
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xor eax, eax
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@ -718,6 +721,7 @@ proc nvme_init stdcall, pci:dword
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DEBUGF DBG_INFO, "nvme%u: Admin queue attributes: 0x%x\n", [esi + pcidev.num], eax
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; Allocate list of queues
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DEBUGF DBG_INFO, "nvme%u: Allocating Administrator and I/O queues...\n",, [esi + pcidev.num]
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invoke KernelAlloc, sizeof.NVM_QUEUE_ENTRY * (LAST_QUEUE_ID + 1)
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test eax, eax
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jz .exit_fail
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@ -1000,6 +1004,7 @@ proc get_new_cid stdcall, pci:dword, y:dword
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mov ecx, [y]
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shl ecx, SIZEOF_NVM_QUEUE_ENTRY
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movzx eax, word [eax + ecx + NVM_QUEUE_ENTRY.head]
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DEBUGF DBG_INFO, "get_new_cid: %u\n", eax
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ret
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endp
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@ -1093,7 +1098,7 @@ proc cqyhdbl_write stdcall, pci:dword, y:dword, cqh:dword
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mov edi, dword [esi + pcidev.queue_entries]
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lea edi, dword [edi + ecx]
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mov eax, [cqh]
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;DEBUGF DBG_INFO, "nvme%u: Writing to CQ%u doorbell register 0x%x: %u\n", [esi + pcidev.num], [y], dx, ax
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DEBUGF DBG_INFO, "nvme%u: Writing to CQ%u doorbell register 0x%x: %u\n", [esi + pcidev.num], [y], dx, ax
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mov esi, dword [esi + pcidev.io_addr]
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mov word [esi + edx], ax ; Write to CQyHDBL
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mov word [edi + NVM_QUEUE_ENTRY.head], ax
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@ -1150,7 +1155,7 @@ proc sqytdbl_write stdcall, pci:dword, y:word, cmd:dword
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shl edx, cl
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imul edx, ebx
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add edx, 0x1000
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;DEBUGF DBG_INFO, "nvme%u: Writing to SQ%u doorbell register 0x%x: %u\n", [esi + pcidev.num], [y], dx, ax
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DEBUGF DBG_INFO, "nvme%u: Writing to SQ%u doorbell register 0x%x: %u\n", [esi + pcidev.num], [y], dx, ax
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mov word [edi + NVM_QUEUE_ENTRY.tail], ax
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mov esi, dword [esi + pcidev.io_addr]
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mov word [esi + edx], ax
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