2014-12-06 09:39:39 +01:00
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/* Select disassembly routine for specified architecture.
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2016-03-12 04:07:23 +01:00
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Copyright (C) 1994-2015 Free Software Foundation, Inc.
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2014-12-06 09:39:39 +01:00
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This file is part of the GNU opcodes library.
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This library is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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#include "sysdep.h"
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#include "dis-asm.h"
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#ifdef ARCH_all
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#define ARCH_aarch64
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#define ARCH_alpha
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#define ARCH_arc
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#define ARCH_arm
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#define ARCH_avr
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#define ARCH_bfin
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#define ARCH_cr16
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#define ARCH_cris
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#define ARCH_crx
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#define ARCH_d10v
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#define ARCH_d30v
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#define ARCH_dlx
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#define ARCH_epiphany
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#define ARCH_fr30
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#define ARCH_frv
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2016-03-12 04:07:23 +01:00
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#define ARCH_ft32
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2014-12-06 09:39:39 +01:00
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#define ARCH_h8300
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#define ARCH_h8500
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#define ARCH_hppa
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#define ARCH_i370
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#define ARCH_i386
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#define ARCH_i860
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#define ARCH_i960
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#define ARCH_ia64
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#define ARCH_ip2k
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#define ARCH_iq2000
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#define ARCH_lm32
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#define ARCH_m32c
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#define ARCH_m32r
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#define ARCH_m68hc11
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#define ARCH_m68hc12
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#define ARCH_m68k
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#define ARCH_m88k
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#define ARCH_mcore
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#define ARCH_mep
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#define ARCH_metag
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#define ARCH_microblaze
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#define ARCH_mips
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#define ARCH_mmix
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#define ARCH_mn10200
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#define ARCH_mn10300
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#define ARCH_moxie
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#define ARCH_mt
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#define ARCH_msp430
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2016-03-12 04:07:23 +01:00
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#define ARCH_nds32
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2014-12-06 09:39:39 +01:00
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#define ARCH_nios2
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#define ARCH_ns32k
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2016-03-12 04:07:23 +01:00
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#define ARCH_or1k
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2014-12-06 09:39:39 +01:00
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#define ARCH_pdp11
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#define ARCH_pj
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#define ARCH_powerpc
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#define ARCH_rs6000
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#define ARCH_rl78
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#define ARCH_rx
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#define ARCH_s390
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#define ARCH_score
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#define ARCH_sh
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#define ARCH_sparc
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#define ARCH_spu
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#define ARCH_tic30
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#define ARCH_tic4x
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#define ARCH_tic54x
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#define ARCH_tic6x
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#define ARCH_tic80
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#define ARCH_tilegx
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#define ARCH_tilepro
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#define ARCH_v850
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#define ARCH_vax
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2016-03-12 04:07:23 +01:00
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#define ARCH_visium
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2014-12-06 09:39:39 +01:00
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#define ARCH_w65
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#define ARCH_xstormy16
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#define ARCH_xc16x
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#define ARCH_xgate
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#define ARCH_xtensa
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#define ARCH_z80
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#define ARCH_z8k
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#define INCLUDE_SHMEDIA
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#endif
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#ifdef ARCH_m32c
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#include "m32c-desc.h"
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#endif
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disassembler_ftype
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disassembler (abfd)
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bfd *abfd;
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{
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enum bfd_architecture a = bfd_get_arch (abfd);
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disassembler_ftype disassemble;
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switch (a)
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{
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/* If you add a case to this table, also add it to the
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ARCH_all definition right above this function. */
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#ifdef ARCH_aarch64
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case bfd_arch_aarch64:
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disassemble = print_insn_aarch64;
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break;
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#endif
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#ifdef ARCH_alpha
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case bfd_arch_alpha:
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disassemble = print_insn_alpha;
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break;
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#endif
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#ifdef ARCH_arc
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case bfd_arch_arc:
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disassemble = arc_get_disassembler (abfd);
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break;
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#endif
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#ifdef ARCH_arm
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case bfd_arch_arm:
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if (bfd_big_endian (abfd))
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disassemble = print_insn_big_arm;
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else
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disassemble = print_insn_little_arm;
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break;
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#endif
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#ifdef ARCH_avr
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case bfd_arch_avr:
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disassemble = print_insn_avr;
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break;
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#endif
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#ifdef ARCH_bfin
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case bfd_arch_bfin:
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disassemble = print_insn_bfin;
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break;
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#endif
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#ifdef ARCH_cr16
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case bfd_arch_cr16:
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disassemble = print_insn_cr16;
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break;
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#endif
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#ifdef ARCH_cris
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case bfd_arch_cris:
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disassemble = cris_get_disassembler (abfd);
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break;
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#endif
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#ifdef ARCH_crx
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case bfd_arch_crx:
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disassemble = print_insn_crx;
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break;
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#endif
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#ifdef ARCH_d10v
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case bfd_arch_d10v:
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disassemble = print_insn_d10v;
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break;
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#endif
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#ifdef ARCH_d30v
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case bfd_arch_d30v:
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disassemble = print_insn_d30v;
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break;
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#endif
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#ifdef ARCH_dlx
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case bfd_arch_dlx:
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/* As far as I know we only handle big-endian DLX objects. */
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disassemble = print_insn_dlx;
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break;
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#endif
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#ifdef ARCH_h8300
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case bfd_arch_h8300:
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if (bfd_get_mach (abfd) == bfd_mach_h8300h
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|| bfd_get_mach (abfd) == bfd_mach_h8300hn)
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disassemble = print_insn_h8300h;
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else if (bfd_get_mach (abfd) == bfd_mach_h8300s
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|| bfd_get_mach (abfd) == bfd_mach_h8300sn
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|| bfd_get_mach (abfd) == bfd_mach_h8300sx
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|| bfd_get_mach (abfd) == bfd_mach_h8300sxn)
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disassemble = print_insn_h8300s;
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else
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disassemble = print_insn_h8300;
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break;
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#endif
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#ifdef ARCH_h8500
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case bfd_arch_h8500:
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disassemble = print_insn_h8500;
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break;
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#endif
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#ifdef ARCH_hppa
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case bfd_arch_hppa:
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disassemble = print_insn_hppa;
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break;
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#endif
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#ifdef ARCH_i370
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case bfd_arch_i370:
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disassemble = print_insn_i370;
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break;
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#endif
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#ifdef ARCH_i386
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case bfd_arch_i386:
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2016-03-12 04:07:23 +01:00
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case bfd_arch_iamcu:
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2014-12-06 09:39:39 +01:00
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case bfd_arch_l1om:
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case bfd_arch_k1om:
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disassemble = print_insn_i386;
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break;
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#endif
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#ifdef ARCH_i860
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case bfd_arch_i860:
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disassemble = print_insn_i860;
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break;
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#endif
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#ifdef ARCH_i960
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case bfd_arch_i960:
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disassemble = print_insn_i960;
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break;
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#endif
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#ifdef ARCH_ia64
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case bfd_arch_ia64:
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disassemble = print_insn_ia64;
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break;
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#endif
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#ifdef ARCH_ip2k
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case bfd_arch_ip2k:
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disassemble = print_insn_ip2k;
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break;
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#endif
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#ifdef ARCH_epiphany
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case bfd_arch_epiphany:
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disassemble = print_insn_epiphany;
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break;
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#endif
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#ifdef ARCH_fr30
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case bfd_arch_fr30:
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disassemble = print_insn_fr30;
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break;
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#endif
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#ifdef ARCH_lm32
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case bfd_arch_lm32:
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disassemble = print_insn_lm32;
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break;
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#endif
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#ifdef ARCH_m32r
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case bfd_arch_m32r:
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disassemble = print_insn_m32r;
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break;
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#endif
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#if defined(ARCH_m68hc11) || defined(ARCH_m68hc12) \
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|| defined(ARCH_9s12x) || defined(ARCH_m9s12xg)
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case bfd_arch_m68hc11:
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disassemble = print_insn_m68hc11;
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break;
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case bfd_arch_m68hc12:
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disassemble = print_insn_m68hc12;
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break;
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case bfd_arch_m9s12x:
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disassemble = print_insn_m9s12x;
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break;
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case bfd_arch_m9s12xg:
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disassemble = print_insn_m9s12xg;
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break;
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#endif
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#ifdef ARCH_m68k
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case bfd_arch_m68k:
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disassemble = print_insn_m68k;
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break;
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#endif
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#ifdef ARCH_m88k
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case bfd_arch_m88k:
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disassemble = print_insn_m88k;
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break;
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#endif
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#ifdef ARCH_mt
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case bfd_arch_mt:
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disassemble = print_insn_mt;
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break;
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#endif
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#ifdef ARCH_microblaze
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case bfd_arch_microblaze:
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disassemble = print_insn_microblaze;
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break;
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#endif
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#ifdef ARCH_msp430
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case bfd_arch_msp430:
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disassemble = print_insn_msp430;
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break;
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#endif
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2016-03-12 04:07:23 +01:00
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#ifdef ARCH_nds32
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case bfd_arch_nds32:
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disassemble = print_insn_nds32;
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break;
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#endif
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2014-12-06 09:39:39 +01:00
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#ifdef ARCH_ns32k
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case bfd_arch_ns32k:
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disassemble = print_insn_ns32k;
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break;
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#endif
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#ifdef ARCH_mcore
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case bfd_arch_mcore:
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disassemble = print_insn_mcore;
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break;
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#endif
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#ifdef ARCH_mep
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case bfd_arch_mep:
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disassemble = print_insn_mep;
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break;
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#endif
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#ifdef ARCH_metag
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case bfd_arch_metag:
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disassemble = print_insn_metag;
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break;
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#endif
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#ifdef ARCH_mips
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case bfd_arch_mips:
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|
|
if (bfd_big_endian (abfd))
|
|
|
|
|
disassemble = print_insn_big_mips;
|
|
|
|
|
else
|
|
|
|
|
disassemble = print_insn_little_mips;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_mmix
|
|
|
|
|
case bfd_arch_mmix:
|
|
|
|
|
disassemble = print_insn_mmix;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_mn10200
|
|
|
|
|
case bfd_arch_mn10200:
|
|
|
|
|
disassemble = print_insn_mn10200;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_mn10300
|
|
|
|
|
case bfd_arch_mn10300:
|
|
|
|
|
disassemble = print_insn_mn10300;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_nios2
|
|
|
|
|
case bfd_arch_nios2:
|
|
|
|
|
if (bfd_big_endian (abfd))
|
|
|
|
|
disassemble = print_insn_big_nios2;
|
|
|
|
|
else
|
|
|
|
|
disassemble = print_insn_little_nios2;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
2016-03-12 04:07:23 +01:00
|
|
|
#ifdef ARCH_or1k
|
|
|
|
|
case bfd_arch_or1k:
|
|
|
|
|
disassemble = print_insn_or1k;
|
2014-12-06 09:39:39 +01:00
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_pdp11
|
|
|
|
|
case bfd_arch_pdp11:
|
|
|
|
|
disassemble = print_insn_pdp11;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_pj
|
|
|
|
|
case bfd_arch_pj:
|
|
|
|
|
disassemble = print_insn_pj;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_powerpc
|
|
|
|
|
case bfd_arch_powerpc:
|
|
|
|
|
if (bfd_big_endian (abfd))
|
|
|
|
|
disassemble = print_insn_big_powerpc;
|
|
|
|
|
else
|
|
|
|
|
disassemble = print_insn_little_powerpc;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_rs6000
|
|
|
|
|
case bfd_arch_rs6000:
|
|
|
|
|
if (bfd_get_mach (abfd) == bfd_mach_ppc_620)
|
|
|
|
|
disassemble = print_insn_big_powerpc;
|
|
|
|
|
else
|
|
|
|
|
disassemble = print_insn_rs6000;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_rl78
|
|
|
|
|
case bfd_arch_rl78:
|
2016-03-12 04:07:23 +01:00
|
|
|
disassemble = rl78_get_disassembler (abfd);
|
2014-12-06 09:39:39 +01:00
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_rx
|
|
|
|
|
case bfd_arch_rx:
|
|
|
|
|
disassemble = print_insn_rx;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_s390
|
|
|
|
|
case bfd_arch_s390:
|
|
|
|
|
disassemble = print_insn_s390;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_score
|
|
|
|
|
case bfd_arch_score:
|
|
|
|
|
if (bfd_big_endian (abfd))
|
|
|
|
|
disassemble = print_insn_big_score;
|
|
|
|
|
else
|
|
|
|
|
disassemble = print_insn_little_score;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_sh
|
|
|
|
|
case bfd_arch_sh:
|
|
|
|
|
disassemble = print_insn_sh;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_sparc
|
|
|
|
|
case bfd_arch_sparc:
|
|
|
|
|
disassemble = print_insn_sparc;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_spu
|
|
|
|
|
case bfd_arch_spu:
|
|
|
|
|
disassemble = print_insn_spu;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_tic30
|
|
|
|
|
case bfd_arch_tic30:
|
|
|
|
|
disassemble = print_insn_tic30;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_tic4x
|
|
|
|
|
case bfd_arch_tic4x:
|
|
|
|
|
disassemble = print_insn_tic4x;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_tic54x
|
|
|
|
|
case bfd_arch_tic54x:
|
|
|
|
|
disassemble = print_insn_tic54x;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_tic6x
|
|
|
|
|
case bfd_arch_tic6x:
|
|
|
|
|
disassemble = print_insn_tic6x;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_tic80
|
|
|
|
|
case bfd_arch_tic80:
|
|
|
|
|
disassemble = print_insn_tic80;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
2016-03-12 04:07:23 +01:00
|
|
|
#ifdef ARCH_ft32
|
|
|
|
|
case bfd_arch_ft32:
|
|
|
|
|
disassemble = print_insn_ft32;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
2014-12-06 09:39:39 +01:00
|
|
|
#ifdef ARCH_v850
|
|
|
|
|
case bfd_arch_v850:
|
|
|
|
|
case bfd_arch_v850_rh850:
|
|
|
|
|
disassemble = print_insn_v850;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_w65
|
|
|
|
|
case bfd_arch_w65:
|
|
|
|
|
disassemble = print_insn_w65;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_xgate
|
|
|
|
|
case bfd_arch_xgate:
|
|
|
|
|
disassemble = print_insn_xgate;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_xstormy16
|
|
|
|
|
case bfd_arch_xstormy16:
|
|
|
|
|
disassemble = print_insn_xstormy16;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_xc16x
|
|
|
|
|
case bfd_arch_xc16x:
|
|
|
|
|
disassemble = print_insn_xc16x;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_xtensa
|
|
|
|
|
case bfd_arch_xtensa:
|
|
|
|
|
disassemble = print_insn_xtensa;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_z80
|
|
|
|
|
case bfd_arch_z80:
|
|
|
|
|
disassemble = print_insn_z80;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_z8k
|
|
|
|
|
case bfd_arch_z8k:
|
|
|
|
|
if (bfd_get_mach(abfd) == bfd_mach_z8001)
|
|
|
|
|
disassemble = print_insn_z8001;
|
|
|
|
|
else
|
|
|
|
|
disassemble = print_insn_z8002;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_vax
|
|
|
|
|
case bfd_arch_vax:
|
|
|
|
|
disassemble = print_insn_vax;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
2016-03-12 04:07:23 +01:00
|
|
|
#ifdef ARCH_visium
|
|
|
|
|
case bfd_arch_visium:
|
|
|
|
|
disassemble = print_insn_visium;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
2014-12-06 09:39:39 +01:00
|
|
|
#ifdef ARCH_frv
|
|
|
|
|
case bfd_arch_frv:
|
|
|
|
|
disassemble = print_insn_frv;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_moxie
|
|
|
|
|
case bfd_arch_moxie:
|
|
|
|
|
disassemble = print_insn_moxie;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_iq2000
|
|
|
|
|
case bfd_arch_iq2000:
|
|
|
|
|
disassemble = print_insn_iq2000;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_m32c
|
|
|
|
|
case bfd_arch_m32c:
|
|
|
|
|
disassemble = print_insn_m32c;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_tilegx
|
|
|
|
|
case bfd_arch_tilegx:
|
|
|
|
|
disassemble = print_insn_tilegx;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_tilepro
|
|
|
|
|
case bfd_arch_tilepro:
|
|
|
|
|
disassemble = print_insn_tilepro;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
default:
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
return disassemble;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
disassembler_usage (stream)
|
|
|
|
|
FILE * stream ATTRIBUTE_UNUSED;
|
|
|
|
|
{
|
|
|
|
|
#ifdef ARCH_aarch64
|
|
|
|
|
print_aarch64_disassembler_options (stream);
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_arm
|
|
|
|
|
print_arm_disassembler_options (stream);
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_mips
|
|
|
|
|
print_mips_disassembler_options (stream);
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_powerpc
|
|
|
|
|
print_ppc_disassembler_options (stream);
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_i386
|
|
|
|
|
print_i386_disassembler_options (stream);
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_s390
|
|
|
|
|
print_s390_disassembler_options (stream);
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
disassemble_init_for_target (struct disassemble_info * info)
|
|
|
|
|
{
|
|
|
|
|
if (info == NULL)
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
switch (info->arch)
|
|
|
|
|
{
|
|
|
|
|
#ifdef ARCH_aarch64
|
|
|
|
|
case bfd_arch_aarch64:
|
|
|
|
|
info->symbol_is_valid = aarch64_symbol_is_valid;
|
|
|
|
|
info->disassembler_needs_relocs = TRUE;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_arm
|
|
|
|
|
case bfd_arch_arm:
|
|
|
|
|
info->symbol_is_valid = arm_symbol_is_valid;
|
|
|
|
|
info->disassembler_needs_relocs = TRUE;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_ia64
|
|
|
|
|
case bfd_arch_ia64:
|
|
|
|
|
info->skip_zeroes = 16;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_tic4x
|
|
|
|
|
case bfd_arch_tic4x:
|
|
|
|
|
info->skip_zeroes = 32;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_mep
|
|
|
|
|
case bfd_arch_mep:
|
|
|
|
|
info->skip_zeroes = 256;
|
|
|
|
|
info->skip_zeroes_at_end = 0;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_metag
|
|
|
|
|
case bfd_arch_metag:
|
|
|
|
|
info->disassembler_needs_relocs = TRUE;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_m32c
|
|
|
|
|
case bfd_arch_m32c:
|
|
|
|
|
/* This processor in fact is little endian. The value set here
|
|
|
|
|
reflects the way opcodes are written in the cgen description. */
|
|
|
|
|
info->endian = BFD_ENDIAN_BIG;
|
|
|
|
|
if (! info->insn_sets)
|
|
|
|
|
{
|
|
|
|
|
info->insn_sets = cgen_bitset_create (ISA_MAX);
|
|
|
|
|
if (info->mach == bfd_mach_m16c)
|
|
|
|
|
cgen_bitset_set (info->insn_sets, ISA_M16C);
|
|
|
|
|
else
|
|
|
|
|
cgen_bitset_set (info->insn_sets, ISA_M32C);
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_powerpc
|
|
|
|
|
case bfd_arch_powerpc:
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef ARCH_rs6000
|
|
|
|
|
case bfd_arch_rs6000:
|
|
|
|
|
#endif
|
|
|
|
|
#if defined (ARCH_powerpc) || defined (ARCH_rs6000)
|
|
|
|
|
disassemble_init_powerpc (info);
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
default:
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
