basic embedded features
git-svn-id: svn://kolibrios.org@1507 a494cfbc-eb01-0410-851d-a64ba20cac60
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@ -28,7 +28,6 @@ $Revision: 1463 $
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;
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;***************************************************************************
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PCIe_CONFIG_SPACE equ 0xF0000000 ; to be moved to const.inc
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mmio_pcie_cfg_addr dd 0x0 ; intel pcie space may be defined here
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mmio_pcie_cfg_lim dd 0x0 ; upper pcie space address
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@ -8,11 +8,13 @@
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;; ;;
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;; 32 bit PCI driver code ;;
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;; ;;
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;; Version 0.4 February 2nd, 2010 ;;
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;; Version 0.3 April 9, 2007 ;;
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;; Version 0.2 December 21st, 2002 ;;
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;; ;;
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;; Author: Victor Prodan, victorprodan@yahoo.com ;;
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;; Mihailov Ilia, ghost.nsk@gmail.com ;;
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;; Artem Jerdev, kolibri@jerdev.co.uk ;;
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;; Credits: ;;
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;; Ralf Brown ;;
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;; Mike Hibbett, mikeh@oceanfree.net ;;
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@ -30,7 +32,7 @@ $Revision$
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; Description
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; entry point for system PCI calls
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;***************************************************************************
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;mmio_pci_addr equ 0x400 ; set actual PCI address here to activate user-MMIO
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mmio_pci_addr dw 0x400 ; default PCI device bdf-address
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align 4
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@ -76,14 +78,13 @@ pci_fn_3:
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cmp al,10
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jz pci_write_reg ;dword
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if defined mmio_pci_addr
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cmp al,11 ; user-level MMIO functions
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jz pci_mmio_init
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cmp al,12
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jz pci_mmio_map
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cmp al,13
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jz pci_mmio_unmap
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end if
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no_pci_access_for_applications:
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@ -384,14 +385,14 @@ if defined mmio_pci_addr ; must be set above
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;
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; Description
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; IN: bx = device's PCI bus address (bbbbbbbbdddddfff)
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; Returns eax = user heap space available (bytes)
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; Returns eax = phys. address of user-accessible DMA block
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; Error codes
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; eax = -1 : PCI user access blocked,
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; eax = -2 : device not registered for uMMIO service
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; eax = -3 : user heap initialization failure
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;***************************************************************************
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pci_mmio_init:
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cmp bx, mmio_pci_addr
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cmp bx, [mmio_pci_addr]
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jz @f
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mov eax,-2
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ret
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@ -399,6 +400,7 @@ pci_mmio_init:
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call init_heap ; (if not initialized yet)
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or eax,eax
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jz @f
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mov eax, [UserDMAaddr]
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ret
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@@:
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mov eax,-3
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@ -412,10 +414,9 @@ pci_mmio_init:
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; Description
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; maps a block of PCI memory to user-accessible linear address
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;
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; WARNING! This VERY EXPERIMENTAL service is for one chosen PCI device only!
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; The target device address should be set in kernel var mmio_pci_addr
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;
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; IN: ah = BAR#;
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; IN: ah = BAR#; or
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; IN: ah = 0xDA for DMA-mapping requests;
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; IN: ebx = block size (bytes);
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; IN: ecx = offset in MMIO block (in 4K-pages, to avoid misaligned pages);
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;
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@ -432,11 +433,20 @@ pci_mmio_init:
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pci_mmio_map:
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and edx,0x0ffff
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cmp ah, 0xDA
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jz .dma_map
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cmp ah,6
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jc .bar_0_5
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jz .bar_rom
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mov eax,-2
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ret
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.dma_map:
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push ecx
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mov ecx,ebx
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mov eax,[UserDMAaddr]
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jmp .allocate_block
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.bar_rom:
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mov ah, 8 ; bar6 = Expansion ROM base address
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.bar_0_5:
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@ -448,7 +458,7 @@ pci_mmio_map:
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shl bl, 1
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shl bl, 1
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add bl, 0x10 ; now bl = BAR offset in PCI config. space
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mov ax, mmio_pci_addr
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mov ax, [mmio_pci_addr]
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mov bh, al ; bh = dddddfff
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mov al, 2 ; al : DW to read
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call pci_read_reg
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@ -465,7 +475,9 @@ pci_mmio_map:
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pop ecx ; ecx = block size, bytes (expanded to whole page)
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mov ebx, ecx ; user_alloc destroys eax, ecx, edx, but saves ebx
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and eax, 0xFFFFFFF0
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push eax ; store MMIO physical address + keep 2DWords in the stack
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.allocate_block:
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push eax ; store MMIO physical address + keep the stack 2x4b deep
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stdcall user_alloc, ecx
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or eax, eax
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jnz mmio_map_over
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@ -484,9 +496,7 @@ mmio_map_over:
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pop edx ; edx = MMIO shift (pages)
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shl edx, 12 ; edx = MMIO shift (bytes)
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add eax, edx ; eax = uMMIO physical address
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or eax, PG_SHARED
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or eax, PG_UW
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or eax, PG_NOCACHE
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or eax, (PG_SHARED+PG_UW+PG_NOCACHE)
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mov edi, ebx
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call commit_pages
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mov eax, edi
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@ -253,6 +253,7 @@ BytesPerScanLine equ (OS_BASE+0x000FE08)
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SCR_MODE equ (OS_BASE+0x000FE0C)
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LFBAddress equ (OS_BASE+0x000FE80)
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UserDMAaddr equ (OS_BASE+0x000FE84)
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BTN_ADDR equ (OS_BASE+0x000FE88)
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MEM_AMOUNT equ (OS_BASE+0x000FE8C)
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@ -322,6 +323,9 @@ end virtual
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HEAP_BASE equ (OS_BASE+0x0800000)
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HEAP_MIN_SIZE equ 0x01000000
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PCIe_CONFIG_SPACE equ 0xF0000000
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USER_DMA_BUFFER equ 0xFD000000 ; linear addr.
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page_tabs equ 0xFDC00000
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app_page_tabs equ 0xFDC00000
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kernel_tabs equ (page_tabs+ (OS_BASE shr 10)) ;0xFDE00000
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@ -373,9 +373,7 @@ proc init_LFB
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mov [pg_count], edi
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shr edi, 10
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bt [cpu_caps], CAPS_PSE
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jnc .map_page_tables
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or esi, PG_LARGE+PG_UW
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or esi, PG_GLOBAL+PG_LARGE+PG_UW
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mov edx, sys_pgdir+(LFB_BASE shr 20)
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@@:
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mov [edx], esi
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@ -384,39 +382,29 @@ proc init_LFB
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dec edi
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jnz @B
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bt [cpu_caps], CAPS_PGE
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jnc @F
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or dword [sys_pgdir+(LFB_BASE shr 20)], PG_GLOBAL
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@@:
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mov dword [LFBAddress], LFB_BASE
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mov eax, cr3 ;flush TLB
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mov cr3, eax
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ret
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endp
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.map_page_tables:
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@@:
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call alloc_page
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stdcall map_page_table, edx, eax
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add edx, 0x00400000
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dec edi
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jnz @B
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mov eax, [LFBAddress]
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mov edi, page_tabs + (LFB_BASE shr 10)
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or eax, PG_UW
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mov ecx, [pg_count]
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cld
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@@:
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stosd
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add eax, 0x1000
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dec ecx
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jnz @B
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mov dword [LFBAddress], LFB_BASE
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mov eax, cr3 ;flush TLB
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mov cr3, eax
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align 4
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proc init_userDMA
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stdcall alloc_pages, 4096 ; 16M <<<<<<<<<<+++++++++++++++++++++++++++++++++
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add eax, 0x007FFFF0
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and eax, 0xFF800000 ; align at 8M boundary
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mov [UserDMAaddr], eax
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or eax, PG_UW + PG_NOCACHE
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mov ebx, USER_DMA_BUFFER
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mov ecx, 2048 ; 8M, to be sure
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call commit_pages
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mov eax, [UserDMAaddr]
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or eax, PG_LARGE + PG_UW + PG_NOCACHE
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mov ebx, sys_pgdir + (USER_DMA_BUFFER shr 20)
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mov [ebx], eax
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add ebx, 4
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add eax, 0x00400000
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mov [ebx], eax
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ret
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endp
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@ -12,38 +12,6 @@ MEM_WB equ 6 ;write-back memory
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MEM_WC equ 1 ;write combined memory
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MEM_UC equ 0 ;uncached memory
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align 4
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proc mem_test
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; if we have BIOS with fn E820, skip the test
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cmp dword [BOOT_VAR-OS_BASE + 0x9100], 0
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jnz .ret
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mov eax, cr0
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and eax, not (CR0_CD+CR0_NW)
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or eax, CR0_CD ;disable caching
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mov cr0, eax
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wbinvd ;invalidate cache
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xor edi, edi
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mov ebx, 'TEST'
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@@:
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add edi, 0x100000
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xchg ebx, dword [edi]
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cmp dword [edi], 'TEST'
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xchg ebx, dword [edi]
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je @b
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and eax, not (CR0_CD+CR0_NW) ;enable caching
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mov cr0, eax
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inc dword [BOOT_VAR-OS_BASE + 0x9100]
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xor eax, eax
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mov [BOOT_VAR-OS_BASE + 0x9104], eax
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mov [BOOT_VAR-OS_BASE + 0x9108], eax
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mov [BOOT_VAR-OS_BASE + 0x910C], edi
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mov [BOOT_VAR-OS_BASE + 0x9110], eax
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.ret:
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ret
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endp
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align 4
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proc init_mem
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@ -129,8 +97,6 @@ proc init_mem
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rep stosd
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mov edx, (sys_pgdir-OS_BASE)+ 0x800; (OS_BASE shr 20)
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bt [cpu_caps-OS_BASE], CAPS_PSE
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jnc .no_PSE
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mov ebx, cr4
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or ebx, CR4_PSE
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@ -142,20 +108,6 @@ proc init_mem
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add edx, 4
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mov edi, [tmp_page_tabs]
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jmp .map_kernel_heap ; new kernel fits to the first 4Mb - nothing to do with ".map_low"
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.no_PSE:
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mov eax, PG_SW
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mov ecx, [tmp_page_tabs]
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shr ecx, 12
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.map_low:
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mov edi, [tmp_page_tabs]
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@@: ;
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stosd
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add eax, 0x1000
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dec ecx
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jnz @B
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.map_kernel_heap:
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mov ecx, [pg_data.kernel_tables-OS_BASE]
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shl ecx, 10
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xor eax, eax
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@ -1,6 +1,6 @@
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;
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;; Copyright (C) KolibriOS team 2004-2009. All rights reserved.
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;; Copyright (C) KolibriOS team 2004-2010. All rights reserved.
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;; PROGRAMMING:
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;; Ivan Poddubny
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;; Marat Zakiyanov (Mario79)
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@ -19,6 +19,7 @@
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;; SPraid (simba)
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;; Hidnplayr
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;; Alexey Teplov (<Lrz>)
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;; Artem Jerdev (art_zh)
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;;
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;; Data in this file was originally part of MenuetOS project which is
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;; distributed under the terms of GNU GPL. It is modified and redistributed as
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@ -249,7 +250,6 @@ B32:
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call init_BIOS32
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; MEMORY MODEL
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call mem_test
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call init_mem
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call init_page_map
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@ -850,6 +850,9 @@ end if
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call set_network_conf
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no_st_network:
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call init_userDMA ; <<<<<<<<< ================ core/memory.inc ========================================
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call pci_ext_config ; <<<<<<<<< bus/pci/pcie.inc
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; LOAD FIRST APPLICATION
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cli
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@ -1035,8 +1038,8 @@ boot_log:
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align 32
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osloop:
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call [draw_pointer]
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call window_check_events
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call mouse_check_events
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call window_check_events
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call mouse_check_events
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call checkmisc
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call checkVga_N13
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call stack_handler
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@ -268,8 +268,8 @@ include "gui/mouse.inc"
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include "gui/skincode.inc"
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; Pci functions
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include "bus/pci/pci32.inc"
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include "bus/pci/pcie.inc"
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; Floppy drive controller
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