basic embedded features

git-svn-id: svn://kolibrios.org@1507 a494cfbc-eb01-0410-851d-a64ba20cac60
This commit is contained in:
Artem Jerdev (art_zh) 2010-06-25 17:44:14 +00:00
parent 93e2a6c29f
commit 1b582176be
7 changed files with 54 additions and 98 deletions

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@ -28,7 +28,6 @@ $Revision: 1463 $
;
;***************************************************************************
PCIe_CONFIG_SPACE equ 0xF0000000 ; to be moved to const.inc
mmio_pcie_cfg_addr dd 0x0 ; intel pcie space may be defined here
mmio_pcie_cfg_lim dd 0x0 ; upper pcie space address

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@ -8,11 +8,13 @@
;; ;;
;; 32 bit PCI driver code ;;
;; ;;
;; Version 0.4 February 2nd, 2010 ;;
;; Version 0.3 April 9, 2007 ;;
;; Version 0.2 December 21st, 2002 ;;
;; ;;
;; Author: Victor Prodan, victorprodan@yahoo.com ;;
;; Mihailov Ilia, ghost.nsk@gmail.com ;;
;; Artem Jerdev, kolibri@jerdev.co.uk ;;
;; Credits: ;;
;; Ralf Brown ;;
;; Mike Hibbett, mikeh@oceanfree.net ;;
@ -30,7 +32,7 @@ $Revision$
; Description
; entry point for system PCI calls
;***************************************************************************
;mmio_pci_addr equ 0x400 ; set actual PCI address here to activate user-MMIO
mmio_pci_addr dw 0x400 ; default PCI device bdf-address
align 4
@ -76,14 +78,13 @@ pci_fn_3:
cmp al,10
jz pci_write_reg ;dword
if defined mmio_pci_addr
cmp al,11 ; user-level MMIO functions
jz pci_mmio_init
cmp al,12
jz pci_mmio_map
cmp al,13
jz pci_mmio_unmap
end if
no_pci_access_for_applications:
@ -384,14 +385,14 @@ if defined mmio_pci_addr ; must be set above
;
; Description
; IN: bx = device's PCI bus address (bbbbbbbbdddddfff)
; Returns eax = user heap space available (bytes)
; Returns eax = phys. address of user-accessible DMA block
; Error codes
; eax = -1 : PCI user access blocked,
; eax = -2 : device not registered for uMMIO service
; eax = -3 : user heap initialization failure
;***************************************************************************
pci_mmio_init:
cmp bx, mmio_pci_addr
cmp bx, [mmio_pci_addr]
jz @f
mov eax,-2
ret
@ -399,6 +400,7 @@ pci_mmio_init:
call init_heap ; (if not initialized yet)
or eax,eax
jz @f
mov eax, [UserDMAaddr]
ret
@@:
mov eax,-3
@ -412,10 +414,9 @@ pci_mmio_init:
; Description
; maps a block of PCI memory to user-accessible linear address
;
; WARNING! This VERY EXPERIMENTAL service is for one chosen PCI device only!
; The target device address should be set in kernel var mmio_pci_addr
;
; IN: ah = BAR#;
; IN: ah = BAR#; or
; IN: ah = 0xDA for DMA-mapping requests;
; IN: ebx = block size (bytes);
; IN: ecx = offset in MMIO block (in 4K-pages, to avoid misaligned pages);
;
@ -432,11 +433,20 @@ pci_mmio_init:
pci_mmio_map:
and edx,0x0ffff
cmp ah, 0xDA
jz .dma_map
cmp ah,6
jc .bar_0_5
jz .bar_rom
mov eax,-2
ret
.dma_map:
push ecx
mov ecx,ebx
mov eax,[UserDMAaddr]
jmp .allocate_block
.bar_rom:
mov ah, 8 ; bar6 = Expansion ROM base address
.bar_0_5:
@ -448,7 +458,7 @@ pci_mmio_map:
shl bl, 1
shl bl, 1
add bl, 0x10 ; now bl = BAR offset in PCI config. space
mov ax, mmio_pci_addr
mov ax, [mmio_pci_addr]
mov bh, al ; bh = dddddfff
mov al, 2 ; al : DW to read
call pci_read_reg
@ -465,7 +475,9 @@ pci_mmio_map:
pop ecx ; ecx = block size, bytes (expanded to whole page)
mov ebx, ecx ; user_alloc destroys eax, ecx, edx, but saves ebx
and eax, 0xFFFFFFF0
push eax ; store MMIO physical address + keep 2DWords in the stack
.allocate_block:
push eax ; store MMIO physical address + keep the stack 2x4b deep
stdcall user_alloc, ecx
or eax, eax
jnz mmio_map_over
@ -484,9 +496,7 @@ mmio_map_over:
pop edx ; edx = MMIO shift (pages)
shl edx, 12 ; edx = MMIO shift (bytes)
add eax, edx ; eax = uMMIO physical address
or eax, PG_SHARED
or eax, PG_UW
or eax, PG_NOCACHE
or eax, (PG_SHARED+PG_UW+PG_NOCACHE)
mov edi, ebx
call commit_pages
mov eax, edi

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@ -253,6 +253,7 @@ BytesPerScanLine equ (OS_BASE+0x000FE08)
SCR_MODE equ (OS_BASE+0x000FE0C)
LFBAddress equ (OS_BASE+0x000FE80)
UserDMAaddr equ (OS_BASE+0x000FE84)
BTN_ADDR equ (OS_BASE+0x000FE88)
MEM_AMOUNT equ (OS_BASE+0x000FE8C)
@ -322,6 +323,9 @@ end virtual
HEAP_BASE equ (OS_BASE+0x0800000)
HEAP_MIN_SIZE equ 0x01000000
PCIe_CONFIG_SPACE equ 0xF0000000
USER_DMA_BUFFER equ 0xFD000000 ; linear addr.
page_tabs equ 0xFDC00000
app_page_tabs equ 0xFDC00000
kernel_tabs equ (page_tabs+ (OS_BASE shr 10)) ;0xFDE00000

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@ -373,9 +373,7 @@ proc init_LFB
mov [pg_count], edi
shr edi, 10
bt [cpu_caps], CAPS_PSE
jnc .map_page_tables
or esi, PG_LARGE+PG_UW
or esi, PG_GLOBAL+PG_LARGE+PG_UW
mov edx, sys_pgdir+(LFB_BASE shr 20)
@@:
mov [edx], esi
@ -384,39 +382,29 @@ proc init_LFB
dec edi
jnz @B
bt [cpu_caps], CAPS_PGE
jnc @F
or dword [sys_pgdir+(LFB_BASE shr 20)], PG_GLOBAL
@@:
mov dword [LFBAddress], LFB_BASE
mov eax, cr3 ;flush TLB
mov cr3, eax
ret
endp
.map_page_tables:
@@:
call alloc_page
stdcall map_page_table, edx, eax
add edx, 0x00400000
dec edi
jnz @B
mov eax, [LFBAddress]
mov edi, page_tabs + (LFB_BASE shr 10)
or eax, PG_UW
mov ecx, [pg_count]
cld
@@:
stosd
add eax, 0x1000
dec ecx
jnz @B
mov dword [LFBAddress], LFB_BASE
mov eax, cr3 ;flush TLB
mov cr3, eax
align 4
proc init_userDMA
stdcall alloc_pages, 4096 ; 16M <<<<<<<<<<+++++++++++++++++++++++++++++++++
add eax, 0x007FFFF0
and eax, 0xFF800000 ; align at 8M boundary
mov [UserDMAaddr], eax
or eax, PG_UW + PG_NOCACHE
mov ebx, USER_DMA_BUFFER
mov ecx, 2048 ; 8M, to be sure
call commit_pages
mov eax, [UserDMAaddr]
or eax, PG_LARGE + PG_UW + PG_NOCACHE
mov ebx, sys_pgdir + (USER_DMA_BUFFER shr 20)
mov [ebx], eax
add ebx, 4
add eax, 0x00400000
mov [ebx], eax
ret
endp

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@ -12,38 +12,6 @@ MEM_WB equ 6 ;write-back memory
MEM_WC equ 1 ;write combined memory
MEM_UC equ 0 ;uncached memory
align 4
proc mem_test
; if we have BIOS with fn E820, skip the test
cmp dword [BOOT_VAR-OS_BASE + 0x9100], 0
jnz .ret
mov eax, cr0
and eax, not (CR0_CD+CR0_NW)
or eax, CR0_CD ;disable caching
mov cr0, eax
wbinvd ;invalidate cache
xor edi, edi
mov ebx, 'TEST'
@@:
add edi, 0x100000
xchg ebx, dword [edi]
cmp dword [edi], 'TEST'
xchg ebx, dword [edi]
je @b
and eax, not (CR0_CD+CR0_NW) ;enable caching
mov cr0, eax
inc dword [BOOT_VAR-OS_BASE + 0x9100]
xor eax, eax
mov [BOOT_VAR-OS_BASE + 0x9104], eax
mov [BOOT_VAR-OS_BASE + 0x9108], eax
mov [BOOT_VAR-OS_BASE + 0x910C], edi
mov [BOOT_VAR-OS_BASE + 0x9110], eax
.ret:
ret
endp
align 4
proc init_mem
@ -129,8 +97,6 @@ proc init_mem
rep stosd
mov edx, (sys_pgdir-OS_BASE)+ 0x800; (OS_BASE shr 20)
bt [cpu_caps-OS_BASE], CAPS_PSE
jnc .no_PSE
mov ebx, cr4
or ebx, CR4_PSE
@ -142,20 +108,6 @@ proc init_mem
add edx, 4
mov edi, [tmp_page_tabs]
jmp .map_kernel_heap ; new kernel fits to the first 4Mb - nothing to do with ".map_low"
.no_PSE:
mov eax, PG_SW
mov ecx, [tmp_page_tabs]
shr ecx, 12
.map_low:
mov edi, [tmp_page_tabs]
@@: ;
stosd
add eax, 0x1000
dec ecx
jnz @B
.map_kernel_heap:
mov ecx, [pg_data.kernel_tables-OS_BASE]
shl ecx, 10
xor eax, eax

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@ -1,6 +1,6 @@
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;
;; Copyright (C) KolibriOS team 2004-2009. All rights reserved.
;; Copyright (C) KolibriOS team 2004-2010. All rights reserved.
;; PROGRAMMING:
;; Ivan Poddubny
;; Marat Zakiyanov (Mario79)
@ -19,6 +19,7 @@
;; SPraid (simba)
;; Hidnplayr
;; Alexey Teplov (<Lrz>)
;; Artem Jerdev (art_zh)
;;
;; Data in this file was originally part of MenuetOS project which is
;; distributed under the terms of GNU GPL. It is modified and redistributed as
@ -249,7 +250,6 @@ B32:
call init_BIOS32
; MEMORY MODEL
call mem_test
call init_mem
call init_page_map
@ -850,6 +850,9 @@ end if
call set_network_conf
no_st_network:
call init_userDMA ; <<<<<<<<< ================ core/memory.inc ========================================
call pci_ext_config ; <<<<<<<<< bus/pci/pcie.inc
; LOAD FIRST APPLICATION
cli
@ -1035,8 +1038,8 @@ boot_log:
align 32
osloop:
call [draw_pointer]
call window_check_events
call mouse_check_events
call window_check_events
call mouse_check_events
call checkmisc
call checkVga_N13
call stack_handler

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@ -268,8 +268,8 @@ include "gui/mouse.inc"
include "gui/skincode.inc"
; Pci functions
include "bus/pci/pci32.inc"
include "bus/pci/pcie.inc"
; Floppy drive controller