Converted unfinished cardbus and AGP drivers to PE, moved to drivers/unfinished
git-svn-id: svn://kolibrios.org@5066 a494cfbc-eb01-0410-851d-a64ba20cac60
This commit is contained in:
parent
5c90aa59dc
commit
24547ca793
@ -10,39 +10,94 @@
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struct PCI_header
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vendor_id dw ?
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device_id dw ?
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command dw ?
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status dw ?
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revision_id db ?
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prog_if db ?
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subclass db ?
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class_code db ?
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cache_line_size db ?
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latency_timer db ?
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header_type db ?
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bist db ?
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vendor_id dw ? ; 0x00
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device_id dw ? ; 0x02
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command dw ? ; 0x04
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status dw ? ; 0x06
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revision_id db ? ; 0x08
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prog_if db ? ; 0x09
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subclass db ? ; 0x0A
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class_code db ? ; 0x0B
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cache_line_size db ? ; 0x0C
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latency_timer db ? ; 0x0D
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header_type db ? ; 0x0E
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bist db ? ; 0x0F
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ends
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struct PCI_header00 PCI_header
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base_addr_0 dd ?
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base_addr_1 dd ?
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base_addr_2 dd ?
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base_addr_3 dd ?
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base_addr_4 dd ?
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base_addr_5 dd ?
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cardbus_cis_ptr dd ?
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subsys_vendor dw ?
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subsys_id dw ?
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exp_rom_addr dd ?
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cap_ptr db ?
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reserved rb 7
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interrupt_line db ?
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interrupt_pin db ?
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min_grant db ?
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max_latency db ?
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base_addr_0 dd ? ; 0x10
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base_addr_1 dd ? ; 0x14
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base_addr_2 dd ? ; 0x18
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base_addr_3 dd ? ; 0x1C
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base_addr_4 dd ? ; 0x20
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base_addr_5 dd ? ; 0x24
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cardbus_cis_ptr dd ? ; 0x28
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subsys_vendor dw ? ; 0x2C
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subsys_id dw ? ; 0x2E
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exp_rom_addr dd ? ; 0x30
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cap_ptr db ? ; 0x34
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rb 7 ; reserved
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interrupt_line db ? ; 0x3C
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interrupt_pin db ? ; 0x3D
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min_grant db ? ; 0x3E
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max_latency db ? ; 0x3F
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ends
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struct PCI_header01 PCI_header
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base_addr_0 dd ? ; 0x10
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base_addr_1 dd ? ; 0x14
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prim_bus_nr db ? ; 0x18
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sec_bus_nr db ? ; 0x19
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sub_bus_nr db ? ; 0x1A
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sec_lat_tmr db ? ; 0x1B
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io_base db ? ; 0x1C
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io_limit db ? ; 0x1D
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sec_status dw ? ; 0x1E
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mem_base dw ? ; 0x20
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mem_limit dw ? ; 0x22
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pref_mem_base dw ? ; 0x24
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pref_mem_limit dw ? ; 0x26
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pref_base_up dd ? ; 0x28
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pref_limit_up dd ? ; 0x2C
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io_base_up dw ? ; 0x30
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io_limit_up dw ? ; 0x32
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cap_ptr db ? ; 0x34
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rb 3 ; reserved
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exp_rom_addr dd ? ; 0x38
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interrupt_line db ? ; 0x3C
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interrupt_pin db ? ; 0x3E
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bridge_ctrl dw ? ; 0x3F
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ends
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struct PCI_header02 PCI_header
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base_addr dd ? ; 0x10
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cap_list_offs db ? ; 0x14
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rb 1 ; reserved
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sec_stat dw ? ; 0x16
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pci_bus_nr db ? ; 0x18
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cardbus_bus_nr db ? ; 0x19
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sub_bus_nr db ? ; 0x1A
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cardbus_lat_tmr db ? ; 0x1B
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mbar_0 dd ? ; 0x1C
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mlimit_0 dd ? ; 0x20
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mbar_1 dd ? ; 0x24
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mlimit_1 dd ? ; 0x28
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iobar_0 dd ? ; 0x2C
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iolimit_0 dd ? ; 0x30
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iobar_1 dd ? ; 0x34
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iolimit_1 dd ? ; 0x38
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interrupt_line db ? ; 0x3C
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interrupt_pin db ? ; 0x3D
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bridge_ctrl dw ? ; 0x3E
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subs_did dw ? ; 0x40
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subs_vid dw ? ; 0x42
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legacy_bar dd ? ; 0x44
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ends
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@ -1,6 +1,6 @@
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; ;;
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;; Copyright (C) KolibriOS team 2004-2012. All rights reserved. ;;
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;; Copyright (C) KolibriOS team 2004-2014. All rights reserved. ;;
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;; Distributed under terms of the GNU General Public License ;;
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;; ;;
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;; simple AGP driver for KolibriOS ;;
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@ -13,99 +13,78 @@
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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format MS COFF
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format PE DLL native
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entry START
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DEBUG equ 1
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FAST_WRITE equ 0 ; may cause problems with some motherboards
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CURRENT_API = 0x0200
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COMPATIBLE_API = 0x0100
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API_VERSION = (COMPATIBLE_API shl 16) + CURRENT_API
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include 'proc32.inc'
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include 'imports.inc'
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FAST_WRITE = 0 ; may cause problems with some motherboards
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struc IOCTL
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{ .handle dd ?
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.io_code dd ?
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.input dd ?
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.inp_size dd ?
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.output dd ?
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.out_size dd ?
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}
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section '.flat' readable writable executable
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virtual at 0
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IOCTL IOCTL
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end virtual
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include '../proc32.inc'
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include '../struct.inc'
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include '../macros.inc'
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include '../pci_pe.inc'
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public START
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public service_proc
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public version
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; ;;
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;; proc START ;;
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;; ;;
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;; (standard driver proc) ;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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DRV_ENTRY equ 1
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DRV_EXIT equ -1
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proc START c, reason:dword, cmdline:dword
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SRV_GETVERSION equ 0
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SRV_DETECT equ 1
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cmp [reason], DRV_ENTRY
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jne .fail
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API_VERSION equ 1
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section '.flat' code readable align 16
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proc START stdcall, state:dword
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cmp [state], 1
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jne .exit
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.entry:
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if DEBUG
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mov esi, msgInit
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call SysMsgBoardStr
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end if
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invoke SysMsgBoardStr
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invoke RegService, my_service, service_proc
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call detect
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stdcall RegService, my_service, service_proc
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ret
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.fail:
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.exit:
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xor eax, eax
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ret
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endp
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handle equ IOCTL.handle
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io_code equ IOCTL.io_code
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input equ IOCTL.input
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inp_size equ IOCTL.inp_size
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output equ IOCTL.output
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out_size equ IOCTL.out_size
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; ;;
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;; proc SERVICE_PROC ;;
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;; ;;
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;; (standard driver proc) ;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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align 4
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proc service_proc stdcall, ioctl:dword
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mov ebx, [ioctl]
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mov eax, [ebx+io_code]
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cmp eax, SRV_GETVERSION
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jne @F
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mov edx, [ioctl]
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mov eax, [edx + IOCTL.io_code]
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mov eax, [ebx+output]
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cmp [ebx+out_size], 4
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;------------------------------------------------------
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cmp eax, 0 ;SRV_GETVERSION
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jne .fail
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cmp [edx + IOCTL.out_size], 4
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jb .fail
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mov eax, [edx + IOCTL.output]
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mov [eax], dword API_VERSION
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xor eax, eax
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ret
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@@:
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mov ebx, [ioctl]
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mov eax, [ebx+io_code]
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cmp eax, SRV_DETECT
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jne @F
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call detect
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@@:
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.fail:
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or eax, -1
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ret
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endp
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restore handle
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restore io_code
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restore input
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restore inp_size
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restore output
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restore out_size
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endp
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align 4
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proc detect
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@ -114,12 +93,12 @@ proc detect
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endl
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mov esi, msgSearch
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call SysMsgBoardStr
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invoke SysMsgBoardStr
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xor eax, eax
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mov [bus], eax
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inc eax
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call PciApi ; get last bus
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invoke PciApi ; get last bus
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cmp eax, -1
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je .error
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mov [last_bus], eax
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@ -127,14 +106,11 @@ proc detect
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.next_bus:
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and [devfn], 0
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.next_dev:
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stdcall PciRead16, [bus], [devfn], dword 0x0a ; read class/subclass
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invoke PciRead16, [bus], [devfn], PCI_header.subclass ; subclass/vendor
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cmp ax, 0x0300 ; display controller - vga compatable controller
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je .found
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cmp ax, 0x0302 ; display controller - 3d controller
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je .found
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cmp ax, 0x0380 ; display controller - other display controller
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je .found
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@ -150,14 +126,14 @@ proc detect
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.error:
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mov esi, msgFail
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call SysMsgBoardStr
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invoke SysMsgBoardStr
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xor eax, eax
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inc eax
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ret
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.found:
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stdcall PciRead8, [bus], [devfn], dword 0x06 ; read prog IF
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invoke PciRead8, [bus], [devfn], PCI_header00.prog_if
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test al, 1 shl 4 ; got capabilities list?
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jnz .got_capabilities_list
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@ -167,12 +143,12 @@ proc detect
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jmp .next
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.got_capabilities_list:
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stdcall PciRead8, [bus], [devfn], dword 0x34 ; read capabilities offset
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invoke PciRead8, [bus], [devfn], PCI_header00.cap_ptr
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and eax, 11111100b ; always dword aligned
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mov edi, eax
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.read_capability:
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stdcall PciRead32, [bus], [devfn], edi ; read capability
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invoke PciRead32, [bus], [devfn], edi ; read capability
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cmp al, 0x02 ; AGP
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je .got_agp
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movzx edi, ah ; pointer to next capability
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@ -191,47 +167,45 @@ proc detect
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.agp_2:
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mov esi, msgAGP2
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call SysMsgBoardStr
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invoke SysMsgBoardStr
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stdcall PciRead32, [bus], [devfn], edi ; read AGP status
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invoke PciRead32, [bus], [devfn], edi ; read AGP status
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.agp_2_:
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test al, 100b
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jnz .100b
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test al, 10b
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jnz .010b
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test al, 1b
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jz .error
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.001b:
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mov [cmd], 001b
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mov esi, msg1
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call SysMsgBoardStr
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invoke SysMsgBoardStr
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jmp .agp_go
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.010b:
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mov [cmd], 010b
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mov esi, msg2
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call SysMsgBoardStr
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invoke SysMsgBoardStr
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jmp .agp_go
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.100b:
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mov [cmd], 100b
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mov esi, msg4
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call SysMsgBoardStr
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invoke SysMsgBoardStr
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jmp .agp_go
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.agp_2m:
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mov esi, msgAGP2m
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call SysMsgBoardStr
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invoke SysMsgBoardStr
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jmp .agp_2_
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.agp_3:
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mov esi, msgAGP3
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call SysMsgBoardStr
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invoke SysMsgBoardStr
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stdcall PciRead32, [bus], [devfn], edi ; read AGP status
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invoke PciRead32, [bus], [devfn], edi ; read AGP status
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test al, 1 shl 3
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jz .agp_2m
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@ -239,13 +213,13 @@ proc detect
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jnz .8x
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mov [cmd], 01b
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mov esi, msg4
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call SysMsgBoardStr
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invoke SysMsgBoardStr
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jmp .agp_go
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.8x:
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mov [cmd], 10b
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mov esi, msg8
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call SysMsgBoardStr
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invoke SysMsgBoardStr
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.agp_go:
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@ -254,7 +228,7 @@ if FAST_WRITE
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jz @f
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or [cmd], 1 shl 4
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mov esi, msgfast
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call SysMsgBoardStr
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invoke SysMsgBoardStr
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@@:
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end if
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@ -262,26 +236,28 @@ end if
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jz @f
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or [cmd], 1 shl 9
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mov esi, msgside
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call SysMsgBoardStr
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invoke SysMsgBoardStr
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@@:
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add edi, 4
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mov eax, [cmd]
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or eax, 1 shl 8 ; enable AGP
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stdcall PciWrite32, [bus], [devfn], edi, eax ; write AGP cmd
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invoke PciWrite32, [bus], [devfn], edi, eax ; write AGP cmd
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mov esi, msgOK
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call SysMsgBoardStr
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invoke SysMsgBoardStr
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ret
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endp
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; initialized data
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; End of code
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align 4
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version dd (5 shl 16) or (API_VERSION and 0xFFFF)
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data fixups
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end data
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include '../peimport.inc'
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my_service db 'AGP', 0 ; max 16 chars include zero
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@ -299,8 +275,6 @@ msg1 db '1x speed', 13, 10, 0
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msgfast db 'Fast Write', 13, 10, 0
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msgside db 'Side band addressing', 13, 10, 0
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section '.data' data readable writable align 16
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; uninitialized data
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revision db ?
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@ -17,31 +17,26 @@
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; WARNING: Cards must be inserted before the driver starts, and shouldn't be removed.
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; This module doesn't handle insertions and removals.
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format MS COFF
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format PE DLL native
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entry START
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API_VERSION = 0x01000100
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DRIVER_VERSION = 5
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CURRENT_API = 0x0200
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COMPATIBLE_API = 0x0100
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API_VERSION = (COMPATIBLE_API shl 16) + CURRENT_API
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CARDBUS_IO = 0xFC00
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DEBUG = 1
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__DEBUG__ = 1
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__DEBUG_LEVEL__ = 1
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section '.flat' readable writable executable
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include '../proc32.inc'
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include '../struct.inc'
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include '../macros.inc'
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include '../proc32.inc'
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include '../imports.inc'
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include '../pci.inc'
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include '../pci_pe.inc'
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include '../fdo.inc'
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public START
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public service_proc
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public version
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section '.flat' code readable align 16
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; ;;
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;; proc START ;;
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@ -49,23 +44,19 @@ section '.flat' code readable align 16
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;; (standard driver proc) ;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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align 4
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proc START stdcall, state:dword
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proc START c, reason:dword, cmdline:dword
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cmp [state], 1
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jne .exit
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.entry:
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cmp [reason], DRV_ENTRY
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jne .fail
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DEBUGF 1, "Loading cardbus driver\n"
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stdcall RegService, my_service, service_proc
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invoke RegService, my_service, service_proc
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call detect
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ret
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.fail:
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.exit:
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xor eax, eax
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ret
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@ -80,7 +71,6 @@ endp
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;; (standard driver proc) ;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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align 4
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proc service_proc stdcall, ioctl:dword
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mov edx, [ioctl]
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@ -120,7 +110,7 @@ proc detect
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xor eax, eax
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mov [bus], eax
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inc eax
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call PciApi
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invoke PciApi
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cmp eax, -1
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je .err
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mov [last_bus], eax
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@ -131,13 +121,13 @@ proc detect
|
||||
.next_bus:
|
||||
and [devfn], 0
|
||||
.next_dev:
|
||||
stdcall PciRead32, [bus], [devfn], PCI_VENDOR_ID
|
||||
invoke PciRead32, [bus], [devfn], PCI_header02.vendor_id
|
||||
test eax, eax
|
||||
jz .next
|
||||
cmp eax, -1
|
||||
je .next
|
||||
|
||||
stdcall PciRead16, [bus], [devfn], 0x0a ; class & subclass
|
||||
invoke PciRead16, [bus], [devfn], 0x0a ; class & subclass
|
||||
cmp ax, 0x0607
|
||||
je .found
|
||||
|
||||
@ -159,15 +149,14 @@ proc detect
|
||||
.found:
|
||||
DEBUGF 1, "Found cardbus bridge: bus=0x%x, dev=0x%x\n", [bus], [devfn]
|
||||
|
||||
stdcall PciRead8, [bus], [devfn], 0x0e ; get header type
|
||||
invoke PciRead8, [bus], [devfn], PCI_header.header_type
|
||||
DEBUGF 1, "Header type=0x%x\n", eax:2
|
||||
|
||||
test al, al
|
||||
jz .next
|
||||
cmp al, 2
|
||||
jne .next
|
||||
|
||||
; Write PCI and cardbus numbers
|
||||
|
||||
stdcall PciRead32, [bus], [devfn], 0x18 ; PCcard latency settings + Card bus number, PCI bus number
|
||||
invoke PciRead32, [bus], [devfn], PCI_header02.pci_bus_nr ; PCcard latency settings + Card bus number, PCI bus number
|
||||
and eax, 0xff000000 ; Keep original latency setting, clear the rest
|
||||
mov al, byte[bus]
|
||||
mov ah, byte[card_bus]
|
||||
@ -175,31 +164,31 @@ proc detect
|
||||
shl ebx, 16
|
||||
or eax, ebx
|
||||
DEBUGF 1, "Latency, bus,.. 0x%x\n", eax
|
||||
stdcall PciWrite32, [bus], [devfn], 0x18, eax
|
||||
invoke PciWrite32, [bus], [devfn], PCI_header02.pci_bus_nr, eax
|
||||
|
||||
; set ExCA legacy mode base
|
||||
|
||||
stdcall PciWrite32, [bus], [devfn], 0x44, 1
|
||||
invoke PciWrite32, [bus], [devfn], 0x44, 1
|
||||
|
||||
; Enable power
|
||||
|
||||
stdcall PciRead8, [bus], [devfn], 0x14 ; get capabilities offset
|
||||
invoke PciRead8, [bus], [devfn], 0x14 ; get capabilities offset
|
||||
movzx eax, al ; (A0 for TI bridges)
|
||||
DEBUGF 1, "Capabilities offset=0x%x\n", eax:2
|
||||
add al, 4 ; Power management control/status
|
||||
stdcall PciWrite16, [bus], [devfn], eax, 0x0100 ; Enable PME signaling, power state=D0
|
||||
invoke PciWrite16, [bus], [devfn], eax, 0x0100 ; Enable PME signaling, power state=D0
|
||||
|
||||
; Enable Bus master, io space, memory space
|
||||
|
||||
stdcall PciWrite16, [bus], [devfn], PCI_REG_COMMAND, 0x0007
|
||||
invoke PciWrite16, [bus], [devfn], PCI_header02.command, 0x0007
|
||||
|
||||
; Write CardBus Socket/ExCA base address
|
||||
|
||||
mov eax, 0x7f000000
|
||||
push eax
|
||||
stdcall PciWrite32, [bus], [devfn], 0x10, eax ; base is 4 Kbyte aligned
|
||||
invoke PciWrite32, [bus], [devfn], PCI_header02.base_addr, eax ; base is 4 Kbyte aligned
|
||||
pop ebx
|
||||
stdcall MapIoMem, ebx, 4096, 0x1b
|
||||
invoke MapIoMem, ebx, 4096, 0x1b
|
||||
mov ecx, eax
|
||||
|
||||
; Check if a card is present in the socket
|
||||
@ -212,7 +201,7 @@ proc detect
|
||||
|
||||
; No card found... set PCI command back to 0
|
||||
|
||||
stdcall PciWrite16, [bus], [devfn], PCI_REG_COMMAND, 0 ; To avoid conflicts with other sockets
|
||||
invoke PciWrite16, [bus], [devfn], PCI_header02.command, 0 ; To avoid conflicts with other sockets
|
||||
DEBUGF 1, "Cardbus KO\n"
|
||||
jmp .next
|
||||
|
||||
@ -222,7 +211,7 @@ proc detect
|
||||
mov dword[ecx + 0x10], 0x33 ; Request 3.3V for Vcc and Vpp (Control register)
|
||||
;push ecx
|
||||
;mov esi, 10
|
||||
;call Sleep
|
||||
;invoke Sleep
|
||||
;pop ecx
|
||||
;mov byte[ecx + 0x803], 0x40 ; stop reset
|
||||
mov dword[ecx + 0xC], 0x4000 ; force Card CV test (Force register) ;;; WHY???
|
||||
@ -245,23 +234,23 @@ irp regvalue, 0x7efff000, 0x7effffff, 0x7effe000, 0x7effe000, CARDBUS_IO,
|
||||
common
|
||||
reg = 0x1C
|
||||
forward
|
||||
stdcall PciWrite32, [bus], [devfn], reg, regvalue
|
||||
invoke PciWrite32, [bus], [devfn], reg, regvalue
|
||||
DEBUGF 1, "Writing 0x%x to 0x%x\n", regvalue, reg
|
||||
reg = reg + 4
|
||||
}
|
||||
|
||||
stdcall PciWrite8, [bus], [devfn], 0x3c, 0xc ; IRQ line
|
||||
invoke PciWrite8, [bus], [devfn], PCI_header02.interrupt_line, 0xc ; IRQ line
|
||||
|
||||
stdcall PciRead16, [bus], [devfn], 0x3e ; Bridge control
|
||||
invoke PciRead16, [bus], [devfn], PCI_header02.bridge_ctrl ; Bridge control
|
||||
or ax, 0x0700 ; Enable write posting, both memory windows prefetchable
|
||||
stdcall PciWrite16, [bus], [devfn], 0x3e, eax
|
||||
invoke PciWrite16, [bus], [devfn], PCI_header02.bridge_ctrl, eax
|
||||
DEBUGF 1, "Write posting enabled\n"
|
||||
|
||||
|
||||
DEBUGF 1, "Bridge PCI registers:\n"
|
||||
rept 17 reg
|
||||
{
|
||||
stdcall PciRead32, [bus], [devfn], 4*(reg-1)
|
||||
invoke PciRead32, [bus], [devfn], 4*(reg-1)
|
||||
DEBUGF 1, "0x%x\n", eax
|
||||
}
|
||||
|
||||
@ -271,11 +260,11 @@ rept 17 reg
|
||||
mov ecx, 100
|
||||
.waitactive:
|
||||
push ecx
|
||||
stdcall PciRead32, [card_bus], 0, PCI_VENDOR_ID ; Check if the card is awake yet
|
||||
invoke PciRead32, [card_bus], 0, PCI_header02.vendor_id ; Check if the card is awake yet
|
||||
inc eax
|
||||
jnz .got_it
|
||||
mov esi, 2
|
||||
call Sleep
|
||||
invoke Sleep
|
||||
pop ecx
|
||||
dec ecx
|
||||
jnz .waitactive
|
||||
@ -288,9 +277,9 @@ rept 17 reg
|
||||
pop eax
|
||||
DEBUGF 1, "Card is enabled!\n"
|
||||
|
||||
stdcall PciWrite32, [card_bus], 0, PCI_BASE_ADDRESS_0, CARDBUS_IO ; Supposing it's IO space that is needed
|
||||
stdcall PciWrite8, [card_bus], 0, PCI_REG_IRQ, 0xC ; FIXME
|
||||
stdcall PciWrite16, [card_bus], 0, PCI_REG_COMMAND, PCI_BIT_PIO or PCI_BIT_MMIO
|
||||
invoke PciWrite32, [card_bus], 0, PCI_header02.base_addr, CARDBUS_IO ; Supposing it's IO space that is needed
|
||||
invoke PciWrite8, [card_bus], 0, PCI_header02.interrupt_line, 0xC ; FIXME
|
||||
invoke PciWrite16, [card_bus], 0, PCI_header02.command, PCI_CMD_PIO or PCI_CMD_MMIO
|
||||
|
||||
DEBUGF 1, "done\n"
|
||||
|
||||
@ -302,18 +291,16 @@ rept 17 reg
|
||||
|
||||
ret
|
||||
|
||||
|
||||
|
||||
endp
|
||||
|
||||
|
||||
|
||||
|
||||
; End of code
|
||||
|
||||
section '.data' data readable writable align 16
|
||||
data fixups
|
||||
end data
|
||||
|
||||
include '../peimport.inc'
|
||||
|
||||
version dd (DRIVER_VERSION shl 16) or (API_VERSION and 0xFFFF)
|
||||
my_service db 'CARDBUS',0 ; max 16 chars include zero
|
||||
|
||||
include_debug_strings ; All data wich FDO uses will be included here
|
Loading…
Reference in New Issue
Block a user