drm: 3.17-rc4
git-svn-id: svn://kolibrios.org@5097 a494cfbc-eb01-0410-851d-a64ba20cac60
This commit is contained in:
parent
750da8262b
commit
94776ec237
@ -3,7 +3,7 @@
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CC = gcc.exe
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FASM = e:/fasm/fasm.exe
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DEFINES = -D__KERNEL__ -DCONFIG_X86_32 -DCONFIG_DRM_I915_FBDEV
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DEFINES = -D__KERNEL__ -DCONFIG_X86_32 -DCONFIG_DRM_I915_FBDEV -DCONFIG_DMI
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DDK_TOPDIR = /d/kos/kolibri/drivers/ddk
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DRV_INCLUDES = /d/kos/kolibri/drivers/include
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@ -2,7 +2,7 @@
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CC = gcc
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FASM = e:/fasm/fasm.exe
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DEFINES = -D__KERNEL__ -DCONFIG_X86_32 -DCONFIG_DRM_I915_FBDEV
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DEFINES = -D__KERNEL__ -DCONFIG_X86_32 -DCONFIG_DRM_I915_FBDEV -DCONFIG_DMI
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DDK_TOPDIR = /d/kos/kolibri/drivers/ddk
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DRV_INCLUDES = /d/kos/kolibri/drivers/include
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@ -24,8 +24,9 @@
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* Eric Anholt <eric@anholt.net>
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*
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*/
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#include <drm/drmP.h>
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#include <linux/dmi.h>
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#include <drm/drm_dp_helper.h>
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#include <drm/drmP.h>
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#include <drm/i915_drm.h>
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#include "i915_drv.h"
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#include "intel_bios.h"
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@ -1122,6 +1123,26 @@ init_vbt_defaults(struct drm_i915_private *dev_priv)
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}
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}
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static int intel_no_opregion_vbt_callback(const struct dmi_system_id *id)
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{
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DRM_DEBUG_KMS("Falling back to manually reading VBT from "
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"VBIOS ROM for %s\n",
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id->ident);
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return 1;
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}
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static const struct dmi_system_id intel_no_opregion_vbt[] = {
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{
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.callback = intel_no_opregion_vbt_callback,
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.ident = "ThinkCentre A57",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
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DMI_MATCH(DMI_PRODUCT_NAME, "97027RG"),
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},
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},
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{ }
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};
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static struct bdb_header *validate_vbt(char *base, size_t size,
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struct vbt_header *vbt,
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const char *source)
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@ -1185,7 +1206,7 @@ intel_parse_bios(struct drm_device *dev)
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init_vbt_defaults(dev_priv);
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/* XXX Should this validation be moved to intel_opregion.c? */
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if (dev_priv->opregion.vbt)
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if (!dmi_check_system(intel_no_opregion_vbt) && dev_priv->opregion.vbt)
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bdb = validate_vbt((char *)dev_priv->opregion.header, OPREGION_SIZE,
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(struct vbt_header *)dev_priv->opregion.vbt,
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"OpRegion");
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@ -24,6 +24,7 @@
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* Eric Anholt <eric@anholt.net>
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*/
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#include <linux/dmi.h>
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#include <linux/i2c.h>
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#include <linux/slab.h>
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#include <drm/drmP.h>
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@ -803,6 +804,32 @@ static const struct drm_encoder_funcs intel_crt_enc_funcs = {
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.destroy = intel_encoder_destroy,
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};
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static int intel_no_crt_dmi_callback(const struct dmi_system_id *id)
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{
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DRM_INFO("Skipping CRT initialization for %s\n", id->ident);
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return 1;
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}
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static const struct dmi_system_id intel_no_crt[] = {
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{
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.callback = intel_no_crt_dmi_callback,
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.ident = "ACER ZGB",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
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DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
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},
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},
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{
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.callback = intel_no_crt_dmi_callback,
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.ident = "DELL XPS 8700",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
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DMI_MATCH(DMI_PRODUCT_NAME, "XPS 8700"),
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},
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},
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{ }
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};
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void intel_crt_init(struct drm_device *dev)
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{
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struct drm_connector *connector;
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@ -810,6 +837,10 @@ void intel_crt_init(struct drm_device *dev)
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struct intel_connector *intel_connector;
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struct drm_i915_private *dev_priv = dev->dev_private;
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/* Skip machines without VGA that falsely report hotplug events */
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if (dmi_check_system(intel_no_crt))
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return;
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crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
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if (!crt)
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return;
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@ -24,7 +24,7 @@
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* Eric Anholt <eric@anholt.net>
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*/
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//#include <linux/dmi.h>
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#include <linux/dmi.h>
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#include <linux/module.h>
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//#include <linux/input.h>
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#include <linux/i2c.h>
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@ -2244,6 +2244,15 @@ intel_pin_and_fence_fb_obj(struct drm_device *dev,
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if (need_vtd_wa(dev) && alignment < 256 * 1024)
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alignment = 256 * 1024;
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/*
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* Global gtt pte registers are special registers which actually forward
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* writes to a chunk of system memory. Which means that there is no risk
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* that the register values disappear as soon as we call
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* intel_runtime_pm_put(), so it is correct to wrap only the
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* pin/unpin/fence and not more.
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*/
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intel_runtime_pm_get(dev_priv);
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dev_priv->mm.interruptible = false;
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ret = i915_gem_object_pin_to_display_plane(obj, alignment, pipelined);
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if (ret)
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@ -2261,12 +2270,14 @@ intel_pin_and_fence_fb_obj(struct drm_device *dev,
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i915_gem_object_pin_fence(obj);
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dev_priv->mm.interruptible = true;
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intel_runtime_pm_put(dev_priv);
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return 0;
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err_unpin:
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i915_gem_object_unpin_from_display_plane(obj);
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err_interruptible:
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dev_priv->mm.interruptible = true;
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intel_runtime_pm_put(dev_priv);
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return ret;
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}
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@ -4184,10 +4195,6 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc)
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intel_set_pch_fifo_underrun_reporting(dev, pipe, false);
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intel_disable_pipe(dev_priv, pipe);
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if (intel_crtc->config.dp_encoder_is_mst)
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intel_ddi_set_vc_payload_alloc(crtc, false);
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ironlake_pfit_disable(intel_crtc);
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for_each_encoder_on_crtc(dev, crtc, encoder)
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@ -4252,6 +4259,9 @@ static void haswell_crtc_disable(struct drm_crtc *crtc)
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intel_set_pch_fifo_underrun_reporting(dev, TRANSCODER_A, false);
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intel_disable_pipe(dev_priv, pipe);
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if (intel_crtc->config.dp_encoder_is_mst)
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intel_ddi_set_vc_payload_alloc(crtc, false);
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intel_ddi_disable_transcoder_func(dev_priv, cpu_transcoder);
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ironlake_pfit_disable(intel_crtc);
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@ -8238,6 +8248,15 @@ static int intel_crtc_cursor_set_obj(struct drm_crtc *crtc,
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goto fail_locked;
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}
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/*
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* Global gtt pte registers are special registers which actually
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* forward writes to a chunk of system memory. Which means that
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* there is no risk that the register values disappear as soon
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* as we call intel_runtime_pm_put(), so it is correct to wrap
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* only the pin/unpin/fence and not more.
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*/
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intel_runtime_pm_get(dev_priv);
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/* Note that the w/a also requires 2 PTE of padding following
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* the bo. We currently fill all unused PTE with the shadow
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* page and so we should always have valid PTE following the
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@ -8250,16 +8269,20 @@ static int intel_crtc_cursor_set_obj(struct drm_crtc *crtc,
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ret = i915_gem_object_pin_to_display_plane(obj, alignment, NULL);
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if (ret) {
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DRM_DEBUG_KMS("failed to move cursor bo into the GTT\n");
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intel_runtime_pm_put(dev_priv);
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goto fail_locked;
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}
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ret = i915_gem_object_put_fence(obj);
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if (ret) {
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DRM_DEBUG_KMS("failed to release fence for cursor");
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intel_runtime_pm_put(dev_priv);
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goto fail_unpin;
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}
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addr = i915_gem_obj_ggtt_offset(obj);
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intel_runtime_pm_put(dev_priv);
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} else {
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int align = IS_I830(dev) ? 16 * 1024 : 256;
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// ret = i915_gem_object_attach_phys(obj, align);
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@ -12186,6 +12209,9 @@ static struct intel_quirk intel_quirks[] = {
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/* Acer C720 and C720P Chromebooks (Celeron 2955U) have backlights */
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{ 0x0a06, 0x1025, 0x0a11, quirk_backlight_present },
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/* Acer C720 Chromebook (Core i3 4005U) */
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{ 0x0a16, 0x1025, 0x0a11, quirk_backlight_present },
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/* Toshiba CB35 Chromebook (Celeron 2955U) */
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{ 0x0a06, 0x1179, 0x0a88, quirk_backlight_present },
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@ -12208,6 +12234,10 @@ static void intel_init_quirks(struct drm_device *dev)
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q->subsystem_device == PCI_ANY_ID))
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q->hook(dev);
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}
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for (i = 0; i < ARRAY_SIZE(intel_dmi_quirks); i++) {
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if (dmi_check_system(*intel_dmi_quirks[i].dmi_id_list) != 0)
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intel_dmi_quirks[i].hook(dev);
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}
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}
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/* Disable the VGA plane that we never use */
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@ -3615,24 +3615,12 @@ ironlake_dp_detect(struct intel_dp *intel_dp)
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return intel_dp_detect_dpcd(intel_dp);
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}
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static enum drm_connector_status
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g4x_dp_detect(struct intel_dp *intel_dp)
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static int g4x_digital_port_connected(struct drm_device *dev,
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struct intel_digital_port *intel_dig_port)
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{
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struct drm_device *dev = intel_dp_to_dev(intel_dp);
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
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uint32_t bit;
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/* Can't disconnect eDP, but you can close the lid... */
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if (is_edp(intel_dp)) {
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enum drm_connector_status status;
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status = intel_panel_detect(dev);
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if (status == connector_status_unknown)
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status = connector_status_connected;
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return status;
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}
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if (IS_VALLEYVIEW(dev)) {
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switch (intel_dig_port->port) {
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case PORT_B:
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@ -3645,7 +3633,7 @@ g4x_dp_detect(struct intel_dp *intel_dp)
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bit = PORTD_HOTPLUG_LIVE_STATUS_VLV;
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break;
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default:
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return connector_status_unknown;
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return -EINVAL;
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}
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} else {
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switch (intel_dig_port->port) {
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@ -3659,11 +3647,36 @@ g4x_dp_detect(struct intel_dp *intel_dp)
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bit = PORTD_HOTPLUG_LIVE_STATUS_G4X;
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break;
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default:
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return connector_status_unknown;
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return -EINVAL;
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}
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}
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if ((I915_READ(PORT_HOTPLUG_STAT) & bit) == 0)
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return 0;
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return 1;
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}
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static enum drm_connector_status
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g4x_dp_detect(struct intel_dp *intel_dp)
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{
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struct drm_device *dev = intel_dp_to_dev(intel_dp);
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struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
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int ret;
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/* Can't disconnect eDP, but you can close the lid... */
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if (is_edp(intel_dp)) {
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enum drm_connector_status status;
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status = intel_panel_detect(dev);
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if (status == connector_status_unknown)
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status = connector_status_connected;
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return status;
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}
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ret = g4x_digital_port_connected(dev, intel_dig_port);
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if (ret == -EINVAL)
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return connector_status_unknown;
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else if (ret == 0)
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return connector_status_disconnected;
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return intel_dp_detect_dpcd(intel_dp);
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@ -4016,8 +4029,14 @@ intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port, bool long_hpd)
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intel_display_power_get(dev_priv, power_domain);
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if (long_hpd) {
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if (HAS_PCH_SPLIT(dev)) {
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if (!ibx_digital_port_connected(dev_priv, intel_dig_port))
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goto mst_fail;
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} else {
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if (g4x_digital_port_connected(dev, intel_dig_port) != 1)
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goto mst_fail;
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}
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if (!intel_dp_get_dpcd(intel_dp)) {
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goto mst_fail;
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@ -28,7 +28,7 @@
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*/
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//#include <acpi/button.h>
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//#include <linux/dmi.h>
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#include <linux/dmi.h>
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#include <linux/i2c.h>
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#include <linux/slab.h>
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#include <drm/drmP.h>
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@ -538,7 +538,7 @@ static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
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.destroy = intel_encoder_destroy,
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};
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static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
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static int intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
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{
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DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
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return 1;
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@ -845,8 +845,8 @@ static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
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if (i915.lvds_channel_mode > 0)
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return i915.lvds_channel_mode == 2;
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// if (dmi_check_system(intel_dual_link_lvds))
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// return true;
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if (dmi_check_system(intel_dual_link_lvds))
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return true;
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/* BIOS should set the proper LVDS register value at boot, but
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* in reality, it doesn't set the value when the lid is closed;
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@ -904,8 +904,8 @@ void intel_lvds_init(struct drm_device *dev)
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return;
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/* Skip init on machines we know falsely report LVDS */
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// if (dmi_check_system(intel_no_lvds))
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// return false;
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if (dmi_check_system(intel_no_lvds))
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return;
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pin = GMBUS_PORT_PANEL;
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if (!lvds_is_present_in_vbt(dev, &pin)) {
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|
@ -796,7 +796,7 @@ static void pch_enable_backlight(struct intel_connector *connector)
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cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
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if (cpu_ctl2 & BLM_PWM_ENABLE) {
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WARN(1, "cpu backlight already enabled\n");
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DRM_DEBUG_KMS("cpu backlight already enabled\n");
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cpu_ctl2 &= ~BLM_PWM_ENABLE;
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I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
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}
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@ -840,7 +840,7 @@ static void i9xx_enable_backlight(struct intel_connector *connector)
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ctl = I915_READ(BLC_PWM_CTL);
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if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) {
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WARN(1, "backlight already enabled\n");
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DRM_DEBUG_KMS("backlight already enabled\n");
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I915_WRITE(BLC_PWM_CTL, 0);
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}
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@ -871,7 +871,7 @@ static void i965_enable_backlight(struct intel_connector *connector)
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ctl2 = I915_READ(BLC_PWM_CTL2);
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if (ctl2 & BLM_PWM_ENABLE) {
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WARN(1, "backlight already enabled\n");
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DRM_DEBUG_KMS("backlight already enabled\n");
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ctl2 &= ~BLM_PWM_ENABLE;
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I915_WRITE(BLC_PWM_CTL2, ctl2);
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}
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@ -905,7 +905,7 @@ static void vlv_enable_backlight(struct intel_connector *connector)
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ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
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if (ctl2 & BLM_PWM_ENABLE) {
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WARN(1, "backlight already enabled\n");
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DRM_DEBUG_KMS("backlight already enabled\n");
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ctl2 &= ~BLM_PWM_ENABLE;
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I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
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}
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|
@ -220,6 +220,8 @@ u32_t __attribute__((externally_visible)) drvEntry(int action, char *cmdline)
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return 0;
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}
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|
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dmi_scan_machine();
|
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|
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driver_wq_state = I915_DEV_INIT;
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CreateKernelThread(i915_driver_thread);
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|
@ -5,6 +5,8 @@
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#include "radeon.h"
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#include "bitmap.h"
|
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|
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void __init dmi_scan_machine(void);
|
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|
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#define KMS_DEV_CLOSE 0
|
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#define KMS_DEV_INIT 1
|
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#define KMS_DEV_READY 2
|
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|
@ -1492,7 +1492,7 @@ int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags)
|
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dev->dev_private = (void *)rdev;
|
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|
||||
/* update BUS flag */
|
||||
if (drm_device_is_agp(dev)) {
|
||||
if (drm_pci_device_is_agp(dev)) {
|
||||
flags |= RADEON_IS_AGP;
|
||||
} else if (drm_device_is_pcie(dev)) {
|
||||
flags |= RADEON_IS_PCIE;
|
||||
|
Loading…
Reference in New Issue
Block a user