merge apic code
git-svn-id: svn://kolibrios.org@2231 a494cfbc-eb01-0410-851d-a64ba20cac60
This commit is contained in:
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68cfc90d5b
commit
a61cc1cc58
@ -143,6 +143,8 @@ SSE_FZ equ 0x8000
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SSE_INIT equ (SSE_IM+SSE_DM+SSE_ZM+SSE_OM+SSE_UM+SSE_PM)
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IRQ_PIC equ 0
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IRQ_APIC equ 1
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struc TSS
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{
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@ -5,9 +5,232 @@
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;; ;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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align 4
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rerouteirqs:
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iglobal
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IRQ_COUNT dd 24
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endg
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uglobal
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irq_mode rd 1
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IOAPIC_base rd 1
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LAPIC_BASE rd 1
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endg
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APIC_ID equ 0x20
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APIC_TPR equ 0x80
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APIC_EOI equ 0xb0
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APIC_LDR equ 0xd0
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APIC_DFR equ 0xe0
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APIC_SVR equ 0xf0
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APIC_ISR equ 0x100
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APIC_ESR equ 0x280
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APIC_ICRL equ 0x300
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APIC_ICRH equ 0x310
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APIC_LVT_LINT0 equ 0x350
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APIC_LVT_LINT1 equ 0x360
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APIC_LVT_err equ 0x370
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; APIC timer
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APIC_LVT_timer equ 0x320
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APIC_timer_div equ 0x3e0
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APIC_timer_init equ 0x380
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APIC_timer_cur equ 0x390
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; IOAPIC
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IOAPIC_ID equ 0x0
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IOAPIC_VER equ 0x1
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IOAPIC_ARB equ 0x2
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IOAPIC_REDTBL equ 0x10
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align 4
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APIC_init:
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mov [irq_mode], IRQ_PIC
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cmp [acpi_ioapic_base], 0
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jz .no_apic
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cmp [acpi_lapic_base], 0
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jz .no_apic
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stdcall load_file, dev_data_path
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test eax, eax
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jz .no_apic
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mov [acpi_dev_data], eax
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mov [acpi_dev_size], ebx
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call IRQ_mask_all
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; IOAPIC init
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stdcall map_io_mem, [acpi_ioapic_base], 0x20, PG_SW
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mov [IOAPIC_base], eax
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mov eax, IOAPIC_VER
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call IOAPIC_read
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shr eax, 16
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inc al
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movzx eax, al
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cmp al, IRQ_RESERVED
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jbe @f
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mov al, IRQ_RESERVED
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@@:
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mov [IRQ_COUNT], eax
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; Reroute IOAPIC & mask all interrupts
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xor ecx, ecx
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mov eax, IOAPIC_REDTBL
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@@:
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mov ebx, eax
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call IOAPIC_read
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mov ah, 0x09 ; Delivery Mode: Lowest Priority, Destination Mode: Logical
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mov al, cl
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add al, 0x20 ; vector
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or eax, 0x10000 ; Mask Interrupt
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cmp ecx, 16
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jb .set
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or eax, 0xa000 ;<<< level-triggered active-low for IRQ16+
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.set:
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xchg eax, ebx
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call IOAPIC_write
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inc eax
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mov ebx, eax
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call IOAPIC_read
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or eax, 0xff000000 ; Destination Field
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xchg eax, ebx
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call IOAPIC_write
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inc eax
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inc ecx
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cmp ecx, [IRQ_COUNT]
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jb @b
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call LAPIC_init
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mov [irq_mode], IRQ_APIC
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mov al, 0x70
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out 0x22, al
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mov al, 1
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out 0x23, al
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call pci_irq_fixup
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.no_apic:
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ret
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;===========================================================
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align 4
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LAPIC_init:
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; Check MSR support
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;....
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; Get LAPIC base address
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; mov ecx, 0x1b
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; rdmsr ; it may be replaced to
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; and ax, 0xf000 ; mov eax, 0xfee00000
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stdcall map_io_mem, [acpi_lapic_base], 0x1000, PG_SW
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mov [LAPIC_BASE], eax
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mov esi, eax
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; Program Destination Format Register for Flat mode.
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mov eax, [esi + APIC_DFR]
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or eax, 0xf0000000
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mov [esi + APIC_DFR], eax
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; Program Logical Destination Register.
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mov eax, [esi + APIC_LDR]
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;and eax, 0xff000000
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and eax, 0x00ffffff
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or eax, 0x01000000 ;!!!!!!!!!!!!
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mov [esi + APIC_LDR], eax
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; Task Priority Register initialization.
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mov eax, [esi + APIC_TPR]
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and eax, 0xffffff00
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mov [esi + APIC_TPR], eax
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; Flush the queue
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mov edx, 0
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.nxt2:
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mov ecx, 32
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mov eax, [esi + APIC_ISR + edx]
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.nxt:
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shr eax, 1
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jnc @f
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mov dword [esi + APIC_EOI], 0 ; EOI
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@@:
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loop .nxt
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add edx, 0x10
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cmp edx, 0x170
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jbe .nxt2
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; Spurious-Interrupt Vector Register initialization.
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mov eax, [esi + APIC_SVR]
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or eax, 0x1ff
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and eax, 0xfffffdff
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mov [esi + APIC_SVR], eax
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; Initialize LVT LINT0 register. (INTR)
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mov eax, 0x00700
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; mov eax, 0x10700
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mov [esi + APIC_LVT_LINT0], eax
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; Initialize LVT LINT1 register. (NMI)
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mov eax, 0x00400
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mov [esi + APIC_LVT_LINT1], eax
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; Initialize LVT Error register.
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mov eax, [esi + APIC_LVT_err]
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or eax, 0x10000 ; bit 16
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mov [esi + APIC_LVT_err], eax
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; LAPIC timer
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; pre init
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mov dword[esi + APIC_timer_div], 1011b ; 1
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mov dword[esi + APIC_timer_init], 0xffffffff ; max val
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push esi
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mov esi, 640 ; wait 0.64 sec
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call delay_ms
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pop esi
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mov eax, [esi + APIC_timer_cur] ; read current tick couner
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xor eax, 0xffffffff ; eax = 0xffffffff - eax
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shr eax, 6 ; eax /= 64; APIC ticks per 0.01 sec
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; Start (every 0.01 sec)
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mov dword[esi + APIC_LVT_timer], 0x30020 ; periodic int 0x20
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mov dword[esi + APIC_timer_init], eax
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ret
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;===========================================================
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; IOAPIC implementation
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align 4
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IOAPIC_read:
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; in : EAX - IOAPIC register
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; out: EAX - readed value
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push esi
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mov esi, [IOAPIC_base]
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mov [esi], eax
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mov eax, [esi + 0x10]
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pop esi
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ret
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align 4
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IOAPIC_write:
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; in : EAX - IOAPIC register
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; EBX - value
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; out: none
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push esi
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mov esi, [IOAPIC_base]
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mov [esi], eax
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mov [esi + 0x10], ebx
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pop esi
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ret
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;===========================================================
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; Remap all IRQ to 0x20+ Vectors
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; IRQ0 to vector 0x20, IRQ1 to vector 0x21....
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align 4
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PIC_init:
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cli
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mov al,0x11 ; icw4, edge triggered
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out 0x20,al
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@ -27,39 +250,168 @@ rerouteirqs:
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out 0x21,al
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out 0xA1,al
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mov al,255 ; mask all irq's
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out 0xA1,al
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out 0x21,al
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mov al,255 ; mask all irq's
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out 0xA1,al
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out 0x21,al
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call IRQ_mask_all
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; mov dword[irq_type_to_set], IRQ_TYPE_PIC
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ret
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; -----------------------------------------
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; TIMER SET TO 1/100 S
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align 4
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;proc enable_irq stdcall, irq_line:dword
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enable_irq: ; FIXME make fastcall
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mov ebx, [esp+4] ;irq_line
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PIT_init:
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mov al,0x34 ; set to 100Hz
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out 0x43,al
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mov al,0x9b ; lsb 1193180 / 1193
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out 0x40,al
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mov al,0x2e ; msb
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out 0x40,al
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ret
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; -----------------------------------------
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align 4
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unmask_timer:
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cmp [irq_mode], IRQ_APIC
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je @f
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stdcall enable_irq, 0
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ret
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@@:
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; use PIT
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; in some systems PIT no connected to IOAPIC
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; mov eax, 0x14
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; call IOAPIC_read
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; mov ah, 0x09 ; Delivery Mode: Lowest Priority, Destination Mode: Logical
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; mov al, 0x20
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; or eax, 0x10000 ; Mask Interrupt
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; mov ebx, eax
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; mov eax, 0x14
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; call IOAPIC_write
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; stdcall enable_irq, 2
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; ret
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; use LAPIC timer
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mov esi, [LAPIC_BASE]
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mov eax, [esi + APIC_LVT_timer]
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and eax, 0xfffeffff
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mov [esi + APIC_LVT_timer], eax
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ret
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; -----------------------------------------
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; Disable all IRQ
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align 4
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IRQ_mask_all:
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cmp [irq_mode], IRQ_APIC
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je .APIC
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mov al, 0xFF
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out 0x21, al
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out 0xA1, al
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mov ecx,0x1000
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ret
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.APIC:
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mov ecx, [IRQ_COUNT]
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mov eax, 0x10
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@@:
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mov ebx, eax
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call IOAPIC_read
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or eax, 0x10000 ; bit 16
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xchg eax, ebx
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call IOAPIC_write
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inc eax
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inc eax
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loop @b
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ret
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; -----------------------------------------
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; End Of Interrupt
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; cl - IRQ number
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align 4
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irq_eoi: ; __fastcall
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cmp [irq_mode], IRQ_APIC
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je .APIC
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cmp cl, 8
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mov al, 0x20
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jb @f
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out 0xa0, al
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@@:
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out 0x20, al
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ret
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.APIC:
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mov eax, [LAPIC_BASE]
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mov dword [eax + APIC_EOI], 0 ; EOI
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ret
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; -----------------------------------------
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; from dll.inc
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align 4
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proc enable_irq stdcall, irq_line:dword
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mov ebx, [irq_line]
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cmp [irq_mode], IRQ_APIC
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je .APIC
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mov edx, 0x21
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cmp ebx, 8
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jb @F
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mov edx, 0xA1
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sub ebx,8
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@@:
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in al,dx
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btr eax, ebx
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out dx, al
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ret 4
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ret
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.APIC:
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shl ebx, 1
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add ebx, 0x10
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mov eax, ebx
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call IOAPIC_read
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and eax, 0xfffeffff ; bit 16
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xchg eax, ebx
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call IOAPIC_write
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ret
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endp
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align 4
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;proc irq_eoi fastcall, irq_line:dword
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irq_eoi:
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cmp cl, 8
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mov al, 0x20
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jb @f
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out 0xa0, al
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@@:
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out 0x20, al
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ret
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pci_irq_fixup:
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push ebp
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mov esi, [acpi_dev_data]
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mov ebx, [acpi_dev_size]
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lea edi, [esi+ebx]
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.iterate:
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cmp esi, edi
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jae .done
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mov eax, [esi]
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cmp eax, -1
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je .done
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movzx ebx, al
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movzx ebp, ah
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stdcall pci_read32, ebp, ebx, 0
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cmp eax, [esi+4]
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jne .skip
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mov eax, [esi+8]
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stdcall pci_write8, ebp, ebx, 0x3C, eax
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.skip:
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add esi, 16
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jmp .iterate
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.done:
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.fail:
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pop ebp
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ret
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@ -5,7 +5,7 @@
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;; ;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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IRQ_RESERVED equ 16
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IRQ_RESERVED equ 24
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IRQ_POOL_SIZE equ 48
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@ -45,7 +45,14 @@ iglobal
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dd irq_serv.irq_5, irq_serv.irq_6, irq_serv.irq_7
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dd irq_serv.irq_8, irq_serv.irq_9, irq_serv.irq_10
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dd irq_serv.irq_11, irq_serv.irq_12, irqD, irq_serv.irq_14, irq_serv.irq_15
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dd irq_serv.irq_16
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dd irq_serv.irq_17
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dd irq_serv.irq_18
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dd irq_serv.irq_19
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dd irq_serv.irq_20
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dd irq_serv.irq_21
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dd irq_serv.irq_22
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dd irq_serv.irq_23
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times 32 - IRQ_RESERVED dd unknown_interrupt
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;int_0x40 gate trap (for directly copied)
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@ -78,15 +78,12 @@ else
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boot_tss db 'Setting TSSs',0
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boot_cpuid db 'Reading CPUIDs',0
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boot_devices db 'Detecting devices',0
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boot_timer db 'Setting timer',0
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boot_irqs db 'Reprogramming IRQs',0
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boot_setmouse db 'Setting mouse',0
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boot_windefs db 'Setting window defaults',0
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boot_bgr db 'Calculating background',0
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boot_resirqports db 'Reserving IRQs & ports',0
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boot_setrports db 'Setting addresses for IRQs',0
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boot_setostask db 'Setting OS task',0
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boot_allirqs db 'Unmasking all IRQs',0
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boot_allirqs db 'Unmasking IRQs',0
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boot_tsc db 'Reading TSC',0
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boot_cpufreq db 'CPU frequency is ',' ',' MHz',0
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boot_pal_ega db 'Setting EGA/CGA 320x200 palette',0
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@ -147,6 +144,7 @@ vmode db '/sys/drivers/VMODE.MDR',0
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vrr_m db 'VRR_M',0
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kernel_file db 'KERNEL MNT'
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dev_data_path db '/RD/1/DRIVERS/DEVICES.DAT',0
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align 4
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@ -437,6 +437,9 @@ acpi_rsdp rd 1
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acpi_rsdt rd 1
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acpi_madt rd 1
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acpi_dev_data rd 1
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acpi_dev_size rd 1
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acpi_rsdt_base rd 1
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acpi_madt_base rd 1
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acpi_lapic_base rd 1
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@ -226,7 +226,7 @@ B32:
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mov fs,ax
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mov gs,ax
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mov ss,ax
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mov esp,0x5ec00 ; Set stack
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mov esp,0x006CC00 ; Set stack
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; CLEAR 0x280000 - HEAP_BASE
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@ -236,13 +236,11 @@ B32:
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cld
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rep stosd
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mov edi,0x40000
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mov ecx,(0x90000-0x40000)/4
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rep stosd
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; CLEAR KERNEL UNDEFINED GLOBALS
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mov edi, endofcode-OS_BASE
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mov ecx, (uglobals_size/4)+4
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mov ecx, 0x90000
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sub ecx, edi
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shr ecx, 2
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rep stosd
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; SAVE & CLEAR 0-0xffff
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@ -605,28 +603,25 @@ high_code:
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; REDIRECT ALL IRQ'S TO INT'S 0x20-0x2f
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call init_irqs
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call rerouteirqs
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call PIC_init
|
||||
|
||||
; Initialize system V86 machine
|
||||
call init_sys_v86
|
||||
|
||||
; TIMER SET TO 1/100 S
|
||||
; Initialize system timer (IRQ0)
|
||||
call PIT_init
|
||||
|
||||
mov al,0x34 ; set to 100Hz
|
||||
out 0x43,al
|
||||
mov al,0x9b ; lsb 1193180 / 1193
|
||||
out 0x40,al
|
||||
mov al,0x2e ; msb
|
||||
out 0x40,al
|
||||
; Try to Initialize APIC
|
||||
call APIC_init
|
||||
|
||||
; Enable timer IRQ (IRQ0) and hard drives IRQs (IRQ14, IRQ15)
|
||||
; they are used: when partitions are scanned, hd_read relies on timer
|
||||
; Also enable IRQ2, because in some configurations
|
||||
; IRQs from slave controller are not delivered until IRQ2 on master is enabled
|
||||
mov al, 0xFA
|
||||
out 0x21, al
|
||||
mov al, 0x3F
|
||||
out 0xA1, al
|
||||
call unmask_timer
|
||||
stdcall enable_irq, 2 ; @#$%! PIC
|
||||
stdcall enable_irq, 6 ; FDD
|
||||
stdcall enable_irq, 13 ; co-processor
|
||||
stdcall enable_irq, 14
|
||||
stdcall enable_irq, 15
|
||||
|
||||
; Enable interrupts in IDE controller
|
||||
mov al, 0
|
||||
@ -679,6 +674,13 @@ end if
|
||||
mov esi,boot_fonts
|
||||
call boot_log
|
||||
|
||||
; Display APIC status
|
||||
mov esi, boot_APIC_found
|
||||
cmp [irq_mode], IRQ_APIC
|
||||
je @f
|
||||
mov esi, boot_APIC_nfound
|
||||
@@:
|
||||
|
||||
; PRINT AMOUNT OF MEMORY
|
||||
mov esi, boot_memdetect
|
||||
call boot_log
|
||||
@ -822,17 +824,6 @@ end if
|
||||
|
||||
call set_variables
|
||||
|
||||
; SET MOUSE
|
||||
|
||||
;call detect_devices
|
||||
stdcall load_driver, szPS2MDriver
|
||||
; stdcall load_driver, szCOM_MDriver
|
||||
|
||||
mov esi,boot_setmouse
|
||||
call boot_log
|
||||
call setmouse
|
||||
|
||||
|
||||
; STACK AND FDC
|
||||
|
||||
call stack_init
|
||||
@ -939,7 +930,16 @@ first_app_found:
|
||||
;// mike.dld [
|
||||
call set_lights
|
||||
;// mike.dld ]
|
||||
stdcall attach_int_handler, 1, irq1, 0
|
||||
|
||||
; SET MOUSE
|
||||
|
||||
stdcall load_driver, szPS2MDriver
|
||||
; stdcall load_driver, szCOM_MDriver
|
||||
|
||||
mov esi,boot_setmouse
|
||||
call boot_log
|
||||
call setmouse
|
||||
|
||||
; Setup serial output console (if enabled)
|
||||
|
||||
@ -993,10 +993,6 @@ if preboot_blogesc
|
||||
jne .bll1
|
||||
end if
|
||||
|
||||
|
||||
stdcall attach_int_handler, 1, irq1, 0
|
||||
|
||||
; mov [dma_hdd],1
|
||||
cmp [IDEContrRegsBaseAddr], 0
|
||||
setnz [dma_hdd]
|
||||
mov [timer_ticks_enable],1 ; for cd driver
|
||||
@ -4865,9 +4861,7 @@ end if
|
||||
|
||||
call restorefatchain
|
||||
|
||||
mov al, 0xFF
|
||||
out 0x21, al
|
||||
out 0xA1, al
|
||||
call IRQ_mask_all
|
||||
|
||||
if 0
|
||||
mov word [OS_BASE+0x467+0],pr_mode_exit
|
||||
|
@ -220,8 +220,8 @@ include "core/peload.inc" ;
|
||||
include "core/exports.inc"
|
||||
include "core/string.inc"
|
||||
include "core/v86.inc" ; virtual-8086 manager
|
||||
include "core/apic.inc" ; Interrupt Controller functions
|
||||
include "core/irq.inc" ; irq handling functions
|
||||
include "core/apic.inc" ; Interrupt Controller functions
|
||||
include "core/timers.inc"
|
||||
|
||||
; GUI stuff
|
||||
|
Loading…
Reference in New Issue
Block a user