calculate USB bandwidth
git-svn-id: svn://kolibrios.org@3816 a494cfbc-eb01-0410-851d-a64ba20cac60
This commit is contained in:
CleverMouse
parent
6d879d326e
commit
b9648e30e6
@ -924,7 +924,12 @@ endp
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; esi -> usb_controller, eax -> usb_gtd for the first TD,
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; [ebp+12] = endpoint, [ebp+16] = maxpacket, [ebp+20] = type
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proc ohci_init_pipe
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virtual at ebp+8
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virtual at ebp-12
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.speed db ?
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rb 3
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.bandwidth dd ?
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.target dd ?
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rd 2
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.config_pipe dd ?
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.endpoint dd ?
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.maxpacket dd ?
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@ -944,6 +949,8 @@ end virtual
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shl edx, 7
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or eax, edx
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mov [edi+ohci_pipe.Flags-sizeof.ohci_pipe], eax
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bt eax, 13
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setc [.speed]
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mov eax, [.maxpacket]
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mov word [edi+ohci_pipe.Flags+2-sizeof.ohci_pipe], ax
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cmp [.type], CONTROL_PIPE
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@ -20,7 +20,9 @@ if (sizeof.ohci_static_ep=sizeof.uhci_static_ep)&(ohci_static_ep.SoftwarePart=uh
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; out: edx -> usb_static_ep for the selected list or zero if failed
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proc usb1_select_interrupt_list
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; inherit some variables from usb_open_pipe
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virtual at ebp-8
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virtual at ebp-12
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.speed db ?
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rb 3
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.bandwidth dd ?
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.target dd ?
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dd ?
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@ -116,20 +118,32 @@ end virtual
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add edx, sizeof.ohci_static_ep
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dec ecx
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jnz .varloop
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; 4. Get the pointer to the best list.
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; 4. Calculate bandwidth for the new pipe.
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mov eax, [.maxpacket]
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mov cl, [.speed]
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mov ch, byte [.endpoint]
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and ch, 80h
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call calc_usb1_bandwidth
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; 5. Get the pointer to the best list.
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pop edx ; restore value from step 2
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pop eax ; purge stack var from prolog
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pop ecx ; purge stack var from prolog
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add edx, [.target]
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; 5. Calculate bandwidth for the new pipe.
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mov eax, [.maxpacket] ; TODO: calculate real bandwidth
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and eax, (1 shl 11) - 1
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; 6. TODO: check that bandwidth for the new pipe plus old bandwidth
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; still fits to maximum allowed by the core specification.
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; 6. Check that bandwidth for the new pipe plus old bandwidth
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; still fits to maximum allowed by the core specification, 90% of 12000 bits.
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mov ecx, eax
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add ecx, [.bandwidth]
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cmp ecx, 10800
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ja .no_bandwidth
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; 7. Convert {o|u}hci_static_ep to usb_static_ep, update bandwidth and return.
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add edx, ohci_static_ep.SoftwarePart
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add [edx+usb_static_ep.Bandwidth], eax
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pop edi ebx ; restore used registers to be stdcall
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ret
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.no_bandwidth:
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dbgstr 'Periodic bandwidth limit reached'
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xor edx, edx
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pop edi ebx
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ret
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endp
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; sanity check, part 2
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else
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@ -147,6 +161,10 @@ virtual at esp
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.direction db ?
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rb 2
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end virtual
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; calculate bandwidth on the bus
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mov eax, [.maxpacket]
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mov ecx, dword [.lowspeed]
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call calc_usb1_bandwidth
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; find list header
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mov edx, ebx
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@@:
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@ -154,13 +172,63 @@ end virtual
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cmp [edx+usb_pipe.Controller], esi
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jz @b
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; subtract pipe bandwidth
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; TODO: calculate real bandwidth
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mov eax, [.maxpacket]
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and eax, (1 shl 11) - 1
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sub [edx+usb_static_ep.Bandwidth], eax
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ret 8
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endp
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; Helper procedure for USB1 scheduler: calculate bandwidth on the bus.
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; in: low 11 bits of eax = payload size in bytes
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; in: cl = 0 - full-speed, nonzero - high-speed
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; in: ch = 0 - OUT, nonzero - IN
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; out: eax = maximal bandwidth in FS-bits
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proc calc_usb1_bandwidth
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and eax, (1 shl 11) - 1 ; get payload for one transaction
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add eax, 3 ; add 3 bytes for other fields in data packet, PID+CRC16
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test cl, cl
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jnz .low_speed
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; Multiply by 8 for bytes -> bits, by 7/6 to accomodate bit stuffing
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; and by 401/400 for IN transfers to accomodate timers difference
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; 9+107/300 for IN transfers, 9+1/3 for OUT transfers
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; For 0 <= eax < 09249355h, floor(eax * 107/300) = floor(eax * 5B4E81B5h / 2^32).
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; For 0 <= eax < 80000000h, floor(eax / 3) = floor(eax * 55555556h / 2^32).
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mov edx, 55555556h
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test ch, ch
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jz @f
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mov edx, 5B4E81B5h
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@@:
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lea ecx, [eax*9]
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mul edx
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; Add 93 extra bits: 39 bits for Token packet (8 for SYNC, 24 for token+address,
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; 4 extra bits for possible bit stuffing in token+address, 3 for EOP),
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; 18 bits for bus turn-around, 11 bits for SYNC+EOP in Data packet plus 1 bit
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; for possible timers difference, 2 bits for inter-packet delay, 20 bits for
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; Handshake packet, 2 bits for another inter-packet delay.
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lea eax, [ecx+edx+93]
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ret
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.low_speed:
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; Multiply by 8 for bytes -> bits, by 7/6 to accomodate bit stuffing,
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; by 8 for LS -> FS and by 406/50 for IN transfers to accomodate timers difference.
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; 75+59/75 for IN transfers, 74+2/3 for OUT transfers.
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mov edx, 0AAAAAABh
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test ch, ch
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mov ecx, 74
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jz @f
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mov edx, 0C962FC97h
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inc ecx
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@@:
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imul ecx, eax
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mul edx
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; Add 778 extra bits:
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; 16 bits for PRE packet, 4 bits for hub delay, 8*39 bits for Token packet
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; 8*18 bits for bus turn-around
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; (406/50)*11 bits for SYNC+EOP in Data packet,
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; 8*2 bits for inter-packet delay,
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; 16 bits for PRE packet, 4 bits for hub delay, 8*20 bits for Handshake packet,
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; 8*2 bits for another inter-packet delay.
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lea eax, [ecx+edx+778]
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ret
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endp
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; USB2 scheduler.
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; There are two parts: high-speed pipes and split-transaction pipes.
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; Split-transaction scheduler is currently a stub.
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@ -292,23 +360,26 @@ end virtual
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add edx, sizeof.ehci_static_ep
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dec ebx
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jnz .varloop0
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; 5. Get the pointer to the best list.
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pop edx ; restore value from step 3
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pop edx ; get delta calculated in step 3
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add edx, [.target]
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; 6. Calculate bandwidth for the new pipe.
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; TODO1: calculate real bandwidth
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; 5. Calculate bandwidth for the new pipe.
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mov eax, [.maxpacket]
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mov ecx, eax
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and eax, (1 shl 11) - 1
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call calc_hs_bandwidth
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mov ecx, [.maxpacket]
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shr ecx, 11
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inc ecx
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and ecx, 3
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imul eax, ecx
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; 7. TODO2: check that bandwidth for the new pipe plus old bandwidth
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; 6. Get the pointer to the best list.
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pop edx ; restore value from step 3
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pop edx ; get delta calculated in step 3
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add edx, [.target]
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; 7. Check that bandwidth for the new pipe plus old bandwidth
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; still fits to maximum allowed by the core specification
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; current [.bandwidth] + new bandwidth <= limit;
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; USB2 specification allows maximum 60000*80% bit times for periodic microframe
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mov ecx, [.bandwidth]
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add ecx, eax
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cmp ecx, 48000
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ja .no_bandwidth
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; 8. Convert {o|u}hci_static_ep to usb_static_ep, update bandwidth and return.
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mov ecx, [.targetsmask]
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add [edx+ehci_static_ep.Bandwidths+ecx*2], ax
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@ -317,6 +388,12 @@ end virtual
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shl eax, cl
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pop edi ebx ; restore used registers to be stdcall
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ret
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.no_bandwidth:
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dbgstr 'Periodic bandwidth limit reached'
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xor eax, eax
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xor edx, edx
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pop edi ebx
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ret
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.every_frame:
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; The pipe should be scheduled every frame in two or more microframes.
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; 9. Calculate maximal bandwidth for every microframe: three nested loops.
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@ -400,17 +477,21 @@ end virtual
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add esp, 8*4
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; 12. Get the pointer to the target list (responsible for every microframe).
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lea edx, [esi+ehci_controller.IntEDs.SoftwarePart+62*sizeof.ehci_static_ep-sizeof.ehci_controller]
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; 13. TODO1: calculate real bandwidth.
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; 13. Calculate bandwidth on the bus.
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mov eax, [.maxpacket]
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mov ecx, eax
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and eax, (1 shl 11) - 1
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call calc_hs_bandwidth
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mov ecx, [.maxpacket]
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shr ecx, 11
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inc ecx
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and ecx, 3
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imul eax, ecx
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; 14. TODO2: check that current [.bandwidth] + new bandwidth <= limit;
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; 14. Check that current [.bandwidth] + new bandwidth <= limit;
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; USB2 specification allows maximum 60000*80% bit times for periodic microframe.
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; Update bandwidths including the new pipe.
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mov ecx, [.bandwidth]
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add ecx, eax
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cmp ecx, 48000
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ja .no_bandwidth
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; 15. Update bandwidths including the new pipe.
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mov ecx, [.targetsmask]
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lea edi, [edx+ehci_static_ep.Bandwidths-ehci_static_ep.SoftwarePart]
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.update_bandwidths:
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@ -421,7 +502,7 @@ end virtual
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add edi, 2
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test ecx, ecx
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jnz .update_bandwidths
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; 15. Return target list and target S-Mask.
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; 16. Return target list and target S-Mask.
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mov eax, [.targetsmask]
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pop edi ebx ; restore used registers to be stdcall
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ret
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@ -433,10 +514,10 @@ endp
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proc ehci_hs_interrupt_list_unlink
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; get target list
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mov edx, [ebx+ehci_pipe.BaseList-sizeof.ehci_pipe]
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; TODO: calculate real bandwidth
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movzx eax, word [ebx+ehci_pipe.Token-sizeof.ehci_pipe+2]
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; calculate bandwidth
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call calc_hs_bandwidth
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mov ecx, [ebx+ehci_pipe.Flags-sizeof.ehci_pipe]
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and eax, (1 shl 11) - 1
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shr ecx, 30
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imul eax, ecx
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movzx ecx, byte [ebx+ehci_pipe.Flags-sizeof.ehci_pipe]
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@ -454,6 +535,26 @@ proc ehci_hs_interrupt_list_unlink
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ret
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endp
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; Helper procedure for USB2 scheduler: calculate bandwidth on the bus.
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; in: low 11 bits of eax = payload size in bytes
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; out: eax = maximal bandwidth in HS-bits
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proc calc_hs_bandwidth
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and eax, (1 shl 11) - 1 ; get payload for one transaction
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add eax, 3 ; add 3 bytes for other fields in data packet, PID+CRC16
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; Multiply by 8 for bytes -> bits and then by 7/6 to accomodate bit stuffing;
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; total 28/3 = 9+1/3
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mov edx, 55555556h
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lea ecx, [eax*9]
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mul edx
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; Add 989 extra bits: 68 bits for Token packet (32 for SYNC, 24 for token+address,
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; 4 extra bits for possible bit stuffing in token+address, 8 for EOP),
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; 736 bits for bus turn-around, 40 bits for SYNC+EOP in Data packet,
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; 8 bits for inter-packet delay, 49 bits for Handshake packet,
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; 88 bits for another inter-packet delay.
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lea eax, [ecx+edx+989]
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ret
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endp
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uglobal
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ehci_last_fs_alloc dd ?
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endg
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@ -1375,7 +1375,12 @@ endp
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; [ebp+12] = endpoint, [ebp+16] = maxpacket, [ebp+20] = type
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proc uhci_init_pipe
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; inherit some variables from the parent usb_open_pipe
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virtual at ebp+8
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virtual at ebp-12
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.speed db ?
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rb 3
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.bandwidth dd ?
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.target dd ?
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rd 2
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.config_pipe dd ?
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.endpoint dd ?
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.maxpacket dd ?
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@ -1413,6 +1418,8 @@ end virtual
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mov al, USB_PID_IN
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@@:
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mov [edi+uhci_pipe.Token-sizeof.uhci_pipe], eax
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bt eax, 20
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setc [.speed]
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; 4. Initialize the first TD:
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; copy Token from uhci_pipe.Token zeroing reserved bit 20,
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; set ControlStatus for future transfers, bit make it inactive,
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