Ethernet Cable status detection through new system function 53,10.
output is in al: 255 = driver not loaded/function not supported by driver 1 = cable is connected 0 = cable is not connected THIS FUNCTION IS ONLY IMPLENTED FOR RTL8139 FOR NOW git-svn-id: svn://kolibrios.org@302 a494cfbc-eb01-0410-851d-a64ba20cac60
This commit is contained in:
hidnplayr
parent
b5e0fe41ca
commit
d1b95f89ef
@ -25,148 +25,148 @@
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;; ;;
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;; ;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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ETH_ALEN equ 6
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ETH_HLEN equ (2 * ETH_ALEN + 2)
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ETH_ZLEN equ 60 ; 60 + 4bytes auto payload for
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; mininmum 64bytes frame length
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ETH_ALEN equ 6
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ETH_HLEN equ (2 * ETH_ALEN + 2)
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ETH_ZLEN equ 60 ; 60 + 4bytes auto payload for
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; mininmum 64bytes frame length
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PCI_REG_COMMAND equ 0x04 ; command register
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PCI_BIT_PIO equ 0 ; bit0: io space control
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PCI_BIT_MMIO equ 1 ; bit1: memory space control
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PCI_BIT_MASTER equ 2 ; bit2: device acts as a PCI master
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PCI_REG_COMMAND equ 0x04 ; command register
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PCI_BIT_PIO equ 0 ; bit0: io space control
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PCI_BIT_MMIO equ 1 ; bit1: memory space control
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PCI_BIT_MASTER equ 2 ; bit2: device acts as a PCI master
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RTL8139_REG_MAR0 equ 0x08 ; multicast filter register 0
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RTL8139_REG_MAR4 equ 0x0c ; multicast filter register 4
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RTL8139_REG_TSD0 equ 0x10 ; transmit status of descriptor
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RTL8139_REG_TSAD0 equ 0x20 ; transmit start address of descriptor
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RTL8139_REG_RBSTART equ 0x30 ; RxBuffer start address
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RTL8139_REG_COMMAND equ 0x37 ; command register
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RTL8139_REG_CAPR equ 0x38 ; current address of packet read
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RTL8139_REG_IMR equ 0x3c ; interrupt mask register
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RTL8139_REG_ISR equ 0x3e ; interrupt status register
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RTL8139_REG_TXCONFIG equ 0x40 ; transmit configuration register
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RTL8139_REG_TXCONFIG_0 equ 0x40 ; transmit configuration register 0
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RTL8139_REG_TXCONFIG_1 equ 0x41 ; transmit configuration register 1
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RTL8139_REG_TXCONFIG_2 equ 0x42 ; transmit configuration register 2
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RTL8139_REG_TXCONFIG_3 equ 0x43 ; transmit configuration register 3
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RTL8139_REG_RXCONFIG equ 0x44 ; receive configuration register 0
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RTL8139_REG_RXCONFIG_0 equ 0x44 ; receive configuration register 0
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RTL8139_REG_RXCONFIG_1 equ 0x45 ; receive configuration register 1
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RTL8139_REG_RXCONFIG_2 equ 0x46 ; receive configuration register 2
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RTL8139_REG_RXCONFIG_3 equ 0x47 ; receive configuration register 3
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RTL8139_REG_MPC equ 0x4c ; missed packet counter
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RTL8139_REG_9346CR equ 0x50 ; serial eeprom 93C46 command register
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RTL8139_REG_CONFIG1 equ 0x52 ; configuration register 1
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RTL8139_REG_CONFIG4 equ 0x5a ; configuration register 4
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RTL8139_REG_HLTCLK equ 0x5b ; undocumented halt clock register
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RTL8139_REG_BMCR equ 0x62 ; basic mode control register
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RTL8139_REG_ANAR equ 0x66 ; auto negotiation advertisement register
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RTL8139_REG_MAR0 equ 0x08 ; multicast filter register 0
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RTL8139_REG_MAR4 equ 0x0c ; multicast filter register 4
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RTL8139_REG_TSD0 equ 0x10 ; transmit status of descriptor
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RTL8139_REG_TSAD0 equ 0x20 ; transmit start address of descriptor
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RTL8139_REG_RBSTART equ 0x30 ; RxBuffer start address
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RTL8139_REG_COMMAND equ 0x37 ; command register
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RTL8139_REG_CAPR equ 0x38 ; current address of packet read
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RTL8139_REG_IMR equ 0x3c ; interrupt mask register
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RTL8139_REG_ISR equ 0x3e ; interrupt status register
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RTL8139_REG_TXCONFIG equ 0x40 ; transmit configuration register
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RTL8139_REG_TXCONFIG_0 equ 0x40 ; transmit configuration register 0
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RTL8139_REG_TXCONFIG_1 equ 0x41 ; transmit configuration register 1
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RTL8139_REG_TXCONFIG_2 equ 0x42 ; transmit configuration register 2
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RTL8139_REG_TXCONFIG_3 equ 0x43 ; transmit configuration register 3
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RTL8139_REG_RXCONFIG equ 0x44 ; receive configuration register 0
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RTL8139_REG_RXCONFIG_0 equ 0x44 ; receive configuration register 0
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RTL8139_REG_RXCONFIG_1 equ 0x45 ; receive configuration register 1
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RTL8139_REG_RXCONFIG_2 equ 0x46 ; receive configuration register 2
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RTL8139_REG_RXCONFIG_3 equ 0x47 ; receive configuration register 3
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RTL8139_REG_MPC equ 0x4c ; missed packet counter
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RTL8139_REG_9346CR equ 0x50 ; serial eeprom 93C46 command register
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RTL8139_REG_CONFIG1 equ 0x52 ; configuration register 1
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RTL8139_REG_CONFIG4 equ 0x5a ; configuration register 4
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RTL8139_REG_HLTCLK equ 0x5b ; undocumented halt clock register
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RTL8139_REG_BMCR equ 0x62 ; basic mode control register
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RTL8139_REG_ANAR equ 0x66 ; auto negotiation advertisement register
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; 5.1 packet header
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RTL8139_BIT_RUNT equ 4 ; total packet length < 64 bytes
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RTL8139_BIT_LONG equ 3 ; total packet length > 4k
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RTL8139_BIT_CRC equ 2 ; crc error occured
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RTL8139_BIT_FAE equ 1 ; frame alignment error occured
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RTL8139_BIT_ROK equ 0 ; received packet is ok
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RTL8139_BIT_RUNT equ 4 ; total packet length < 64 bytes
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RTL8139_BIT_LONG equ 3 ; total packet length > 4k
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RTL8139_BIT_CRC equ 2 ; crc error occured
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RTL8139_BIT_FAE equ 1 ; frame alignment error occured
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RTL8139_BIT_ROK equ 0 ; received packet is ok
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; 5.4 command register
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RTL8139_BIT_RST equ 4 ; reset bit
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RTL8139_BIT_RE equ 3 ; receiver enabled
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RTL8139_BIT_TE equ 2 ; transmitter enabled
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RTL8139_BIT_BUFE equ 0 ; rx buffer is empty, no packet stored
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RTL8139_BIT_RST equ 4 ; reset bit
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RTL8139_BIT_RE equ 3 ; receiver enabled
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RTL8139_BIT_TE equ 2 ; transmitter enabled
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RTL8139_BIT_BUFE equ 0 ; rx buffer is empty, no packet stored
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; 5.6 interrupt status register
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RTL8139_BIT_ISR_TOK equ 2 ; transmit ok
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RTL8139_BIT_ISR_RER equ 1 ; receive error interrupt
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RTL8139_BIT_ISR_ROK equ 0 ; receive ok
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RTL8139_BIT_ISR_TOK equ 2 ; transmit ok
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RTL8139_BIT_ISR_RER equ 1 ; receive error interrupt
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RTL8139_BIT_ISR_ROK equ 0 ; receive ok
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; 5.7 transmit configyration register
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RTL8139_BIT_TX_MXDMA equ 8 ; Max DMA burst size per Tx DMA burst
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RTL8139_BIT_TXRR equ 4 ; Tx Retry count 16+(TXRR*16)
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RTL8139_BIT_TX_MXDMA equ 8 ; Max DMA burst size per Tx DMA burst
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RTL8139_BIT_TXRR equ 4 ; Tx Retry count 16+(TXRR*16)
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; 5.8 receive configuration register
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RTL8139_BIT_RXFTH equ 13 ; Rx fifo threshold
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RTL8139_BIT_RBLEN equ 11 ; Ring buffer length indicator
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RTL8139_BIT_RX_MXDMA equ 8 ; Max DMA burst size per Rx DMA burst
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RTL8139_BIT_NOWRAP equ 7 ; transfered data wrapping
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RTL8139_BIT_9356SEL equ 6 ; eeprom selector 9346/9356
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RTL8139_BIT_AER equ 5 ; accept error packets
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RTL8139_BIT_AR equ 4 ; accept runt packets
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RTL8139_BIT_AB equ 3 ; accept broadcast packets
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RTL8139_BIT_AM equ 2 ; accept multicast packets
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RTL8139_BIT_APM equ 1 ; accept physical match packets
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RTL8139_BIT_AAP equ 0 ; accept all packets
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RTL8139_BIT_RXFTH equ 13 ; Rx fifo threshold
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RTL8139_BIT_RBLEN equ 11 ; Ring buffer length indicator
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RTL8139_BIT_RX_MXDMA equ 8 ; Max DMA burst size per Rx DMA burst
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RTL8139_BIT_NOWRAP equ 7 ; transfered data wrapping
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RTL8139_BIT_9356SEL equ 6 ; eeprom selector 9346/9356
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RTL8139_BIT_AER equ 5 ; accept error packets
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RTL8139_BIT_AR equ 4 ; accept runt packets
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RTL8139_BIT_AB equ 3 ; accept broadcast packets
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RTL8139_BIT_AM equ 2 ; accept multicast packets
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RTL8139_BIT_APM equ 1 ; accept physical match packets
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RTL8139_BIT_AAP equ 0 ; accept all packets
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; 5.9 93C46/93C56 command register
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RTL8139_BIT_93C46_EEM1 equ 7 ; RTL8139 eeprom operating mode1
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RTL8139_BIT_93C46_EEM0 equ 6 ; RTL8139 eeprom operating mode0
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RTL8139_BIT_93C46_EECS equ 3 ; chip select
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RTL8139_BIT_93C46_EESK equ 2 ; serial data clock
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RTL8139_BIT_93C46_EEDI equ 1 ; serial data input
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RTL8139_BIT_93C46_EEDO equ 0 ; serial data output
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RTL8139_BIT_93C46_EEM1 equ 7 ; RTL8139 eeprom operating mode1
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RTL8139_BIT_93C46_EEM0 equ 6 ; RTL8139 eeprom operating mode0
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RTL8139_BIT_93C46_EECS equ 3 ; chip select
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RTL8139_BIT_93C46_EESK equ 2 ; serial data clock
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RTL8139_BIT_93C46_EEDI equ 1 ; serial data input
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RTL8139_BIT_93C46_EEDO equ 0 ; serial data output
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; 5.11 configuration register 1
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RTL8139_BIT_LWACT equ 4 ; see RTL8139_REG_CONFIG1
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RTL8139_BIT_SLEEP equ 1 ; sleep bit at older chips
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RTL8139_BIT_PWRDWN equ 0 ; power down bit at older chips
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RTL8139_BIT_PMEn equ 0 ; power management enabled
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RTL8139_BIT_LWACT equ 4 ; see RTL8139_REG_CONFIG1
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RTL8139_BIT_SLEEP equ 1 ; sleep bit at older chips
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RTL8139_BIT_PWRDWN equ 0 ; power down bit at older chips
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RTL8139_BIT_PMEn equ 0 ; power management enabled
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; 5.14 configuration register 4
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RTL8139_BIT_LWPTN equ 2 ; see RTL8139_REG_CONFIG4
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RTL8139_BIT_LWPTN equ 2 ; see RTL8139_REG_CONFIG4
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; 6.2 transmit status register
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RTL8139_BIT_ERTXTH equ 16 ; early TX threshold
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RTL8139_BIT_TOK equ 15 ; transmit ok
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RTL8139_BIT_OWN equ 13 ; tx DMA operation is completed
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RTL8139_BIT_ERTXTH equ 16 ; early TX threshold
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RTL8139_BIT_TOK equ 15 ; transmit ok
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RTL8139_BIT_OWN equ 13 ; tx DMA operation is completed
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; 6.18 basic mode control register
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RTL8139_BIT_ANE equ 12 ; auto negotiation enable
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RTL8139_BIT_ANE equ 12 ; auto negotiation enable
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; 6.20 auto negotiation advertisement register
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RTL8139_BIT_TXFD equ 8 ; 100base-T full duplex
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RTL8139_BIT_TX equ 7 ; 100base-T
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RTL8139_BIT_10FD equ 6 ; 10base-T full duplex
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RTL8139_BIT_10 equ 5 ; 10base-T
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RTL8139_BIT_SELECTOR equ 0 ; binary encoded selector CSMA/CD=00001
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RTL8139_BIT_TXFD equ 8 ; 100base-T full duplex
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RTL8139_BIT_TX equ 7 ; 100base-T
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RTL8139_BIT_10FD equ 6 ; 10base-T full duplex
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RTL8139_BIT_10 equ 5 ; 10base-T
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RTL8139_BIT_SELECTOR equ 0 ; binary encoded selector CSMA/CD=00001
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; RX/TX buffer size
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RTL8139_RBLEN equ 0 ; 0==8K 1==16k 2==32k 3==64k
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RTL8139_RX_BUFFER_SIZE equ (8192 shl RTL8139_RBLEN)
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MAX_ETH_FRAME_SIZE equ 1516 ; exactly 1514 wthout CRC
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RTL8139_NUM_TX_DESC equ 4
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RTL8139_TX_BUFFER_SIZE equ (MAX_ETH_FRAME_SIZE * RTL8139_NUM_TX_DESC)
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RTL8139_TXRR equ 8 ; total retries = 16+(TXRR*16)
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RTL8139_TX_MXDMA equ 6 ; 0==16 1==32 2==64 3==128
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; 4==256 5==512 6==1024 7==2048
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RTL8139_ERTXTH equ 8 ; in unit of 32 bytes e.g:(8*32)=256
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RTL8139_RX_MXDMA equ 7 ; 0==16 1==32 2==64 3==128
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; 4==256 5==512 6==1024 7==unlimited
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RTL8139_RXFTH equ 7 ; 0==16 1==32 2==64 3==128
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; 4==256 5==512 6==1024 7==no threshold
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RTL8139_RX_CONFIG equ ((RTL8139_RBLEN shl RTL8139_BIT_RBLEN) \
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or (RTL8139_RX_MXDMA shl RTL8139_BIT_RX_MXDMA) \
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or (1 shl RTL8139_BIT_NOWRAP) \
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or (RTL8139_RXFTH shl RTL8139_BIT_RXFTH) \
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or (1 shl RTL8139_BIT_AB) or (1 shl RTL8139_BIT_APM) \
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or (1 shl RTL8139_BIT_AER) or (1 shl RTL8139_BIT_AR) \
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or (1 shl RTL8139_BIT_AM))
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RTL8139_TX_TIMEOUT equ 30 ; 300 milliseconds timeout
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RTL8139_RBLEN equ 0 ; 0==8K 1==16k 2==32k 3==64k
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RTL8139_RX_BUFFER_SIZE equ (8192 shl RTL8139_RBLEN)
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MAX_ETH_FRAME_SIZE equ 1516 ; exactly 1514 wthout CRC
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RTL8139_NUM_TX_DESC equ 4
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RTL8139_TX_BUFFER_SIZE equ (MAX_ETH_FRAME_SIZE * RTL8139_NUM_TX_DESC)
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RTL8139_TXRR equ 8 ; total retries = 16+(TXRR*16)
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RTL8139_TX_MXDMA equ 6 ; 0==16 1==32 2==64 3==128
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; 4==256 5==512 6==1024 7==2048
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RTL8139_ERTXTH equ 8 ; in unit of 32 bytes e.g:(8*32)=256
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RTL8139_RX_MXDMA equ 7 ; 0==16 1==32 2==64 3==128
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; 4==256 5==512 6==1024 7==unlimited
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RTL8139_RXFTH equ 7 ; 0==16 1==32 2==64 3==128
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; 4==256 5==512 6==1024 7==no threshold
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RTL8139_RX_CONFIG equ ((RTL8139_RBLEN shl RTL8139_BIT_RBLEN) \
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or (RTL8139_RX_MXDMA shl RTL8139_BIT_RX_MXDMA) \
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or (1 shl RTL8139_BIT_NOWRAP) \
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or (RTL8139_RXFTH shl RTL8139_BIT_RXFTH) \
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or (1 shl RTL8139_BIT_AB) or (1 shl RTL8139_BIT_APM) \
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or (1 shl RTL8139_BIT_AER) or (1 shl RTL8139_BIT_AR) \
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or (1 shl RTL8139_BIT_AM))
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RTL8139_TX_TIMEOUT equ 30 ; 300 milliseconds timeout
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EE_93C46_REG_ETH_ID equ 7 ; MAC offset
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EE_93C46_READ_CMD equ (6 shl 6) ; 110b + 6bit address
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EE_93C56_READ_CMD equ (6 shl 8) ; 110b + 8bit address
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EE_93C46_CMD_LENGTH equ 9 ; start bit + cmd + 6bit address
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EE_93C56_CMD_LENGTH equ 11 ; start bit + cmd + 8bit ddress
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EE_93C46_REG_ETH_ID equ 7 ; MAC offset
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EE_93C46_READ_CMD equ (6 shl 6) ; 110b + 6bit address
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EE_93C56_READ_CMD equ (6 shl 8) ; 110b + 8bit address
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EE_93C46_CMD_LENGTH equ 9 ; start bit + cmd + 6bit address
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EE_93C56_CMD_LENGTH equ 11 ; start bit + cmd + 8bit ddress
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VER_RTL8139 equ 1100000b
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VER_RTL8139A equ 1110000b
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VER_RTL8139 equ 1100000b
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VER_RTL8139A equ 1110000b
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; VER_RTL8139AG equ 1110100b
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VER_RTL8139B equ 1111000b
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VER_RTL8130 equ VER_RTL8139B
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VER_RTL8139C equ 1110100b
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VER_RTL8100 equ 1111010b
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VER_RTL8100B equ 1110101b
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VER_RTL8139D equ VER_RTL8100B
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VER_RTL8139CP equ 1110110b
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VER_RTL8101 equ 1110111b
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VER_RTL8139B equ 1111000b
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VER_RTL8130 equ VER_RTL8139B
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VER_RTL8139C equ 1110100b
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VER_RTL8100 equ 1111010b
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VER_RTL8100B equ 1110101b
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VER_RTL8139D equ VER_RTL8100B
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VER_RTL8139CP equ 1110110b
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VER_RTL8101 equ 1110111b
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IDX_RTL8139 equ 0
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IDX_RTL8139A equ 1
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IDX_RTL8139B equ 2
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IDX_RTL8139C equ 3
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IDX_RTL8100 equ 4
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IDX_RTL8139D equ 5
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IDX_RTL8139D equ 6
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IDX_RTL8101 equ 7
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IDX_RTL8139 equ 0
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IDX_RTL8139A equ 1
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IDX_RTL8139B equ 2
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IDX_RTL8139C equ 3
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IDX_RTL8100 equ 4
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IDX_RTL8139D equ 5
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IDX_RTL8139D equ 6
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IDX_RTL8101 equ 7
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; These two must be 4 byte aligned ( which they are )
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@ -174,14 +174,14 @@ rtl8139_rx_buff equ eth_data_start
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rtl8139_tx_buff equ rtl8139_rx_buff + (RTL8139_RX_BUFFER_SIZE + MAX_ETH_FRAME_SIZE)
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uglobal
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align 4
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align 4
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rtl8139_rx_buff_offset: dd 0
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curr_tx_desc: dd 0
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endg
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iglobal
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hw_ver_array: db VER_RTL8139, VER_RTL8139A, VER_RTL8139B, VER_RTL8139C
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db VER_RTL8100, VER_RTL8139D, VER_RTL8139CP, VER_RTL8101
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db VER_RTL8100, VER_RTL8139D, VER_RTL8139CP, VER_RTL8101
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HW_VER_ARRAY_SIZE = $-hw_ver_array
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endg
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@ -201,71 +201,71 @@ endg
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;***************************************************************************
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rtl8139_probe:
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; enable the device
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mov al, 2
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mov ah, [pci_bus]
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mov bh, [pci_dev]
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mov bl, PCI_REG_COMMAND
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call pci_read_reg
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mov cx, ax
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or cl, (1 shl PCI_BIT_MASTER) or (1 shl PCI_BIT_PIO)
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and cl, not (1 shl PCI_BIT_MMIO)
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mov al, 2
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mov ah, [pci_bus]
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mov bh, [pci_dev]
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mov bl, PCI_REG_COMMAND
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call pci_write_reg
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mov al, 2
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mov ah, [pci_bus]
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mov bh, [pci_dev]
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mov bl, PCI_REG_COMMAND
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call pci_read_reg
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mov cx, ax
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or cl, (1 shl PCI_BIT_MASTER) or (1 shl PCI_BIT_PIO)
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and cl, not (1 shl PCI_BIT_MMIO)
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mov al, 2
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mov ah, [pci_bus]
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mov bh, [pci_dev]
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mov bl, PCI_REG_COMMAND
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call pci_write_reg
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; get chip version
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mov edx, [io_addr]
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add edx, RTL8139_REG_TXCONFIG_2
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in ax, dx
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shr ah, 2
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shr ax, 6
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and al, 01111111b
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mov ecx, HW_VER_ARRAY_SIZE-1
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mov edx, [io_addr]
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add edx, RTL8139_REG_TXCONFIG_2
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in ax, dx
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shr ah, 2
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shr ax, 6
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and al, 01111111b
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mov ecx, HW_VER_ARRAY_SIZE-1
|
||||
.chip_ver_loop:
|
||||
cmp al, [hw_ver_array+ecx]
|
||||
je .chip_ver_found
|
||||
dec ecx
|
||||
jns .chip_ver_loop
|
||||
xor cl, cl ; default RTL8139
|
||||
cmp al, [hw_ver_array+ecx]
|
||||
je .chip_ver_found
|
||||
dec ecx
|
||||
jns .chip_ver_loop
|
||||
xor cl, cl ; default RTL8139
|
||||
.chip_ver_found:
|
||||
mov [hw_ver_id], cl
|
||||
mov [hw_ver_id], cl
|
||||
; wake up the chip
|
||||
mov edx, [io_addr]
|
||||
add edx, RTL8139_REG_HLTCLK
|
||||
mov al, 'R' ; run the clock
|
||||
out dx, al
|
||||
mov edx, [io_addr]
|
||||
add edx, RTL8139_REG_HLTCLK
|
||||
mov al, 'R' ; run the clock
|
||||
out dx, al
|
||||
; unlock config and BMCR registers
|
||||
add edx, RTL8139_REG_9346CR - RTL8139_REG_HLTCLK
|
||||
mov al, (1 shl RTL8139_BIT_93C46_EEM1) or (1 shl RTL8139_BIT_93C46_EEM0)
|
||||
out dx, al
|
||||
add edx, RTL8139_REG_9346CR - RTL8139_REG_HLTCLK
|
||||
mov al, (1 shl RTL8139_BIT_93C46_EEM1) or (1 shl RTL8139_BIT_93C46_EEM0)
|
||||
out dx, al
|
||||
; enable power management
|
||||
add edx, RTL8139_REG_CONFIG1 - RTL8139_REG_9346CR
|
||||
in al, dx
|
||||
cmp byte [hw_ver_id], IDX_RTL8139B
|
||||
jl .old_chip
|
||||
add edx, RTL8139_REG_CONFIG1 - RTL8139_REG_9346CR
|
||||
in al, dx
|
||||
cmp byte [hw_ver_id], IDX_RTL8139B
|
||||
jl .old_chip
|
||||
; set LWAKE pin to active high (default value).
|
||||
; it is for Wake-On-LAN functionality of some motherboards.
|
||||
; this signal is used to inform the motherboard to execute a wake-up process.
|
||||
; only at newer chips.
|
||||
or al, (1 shl RTL8139_BIT_PMEn)
|
||||
and al, not (1 shl RTL8139_BIT_LWACT)
|
||||
out dx, al
|
||||
add edx, RTL8139_REG_CONFIG4 - RTL8139_REG_CONFIG1
|
||||
in al, dx
|
||||
and al, not (1 shl RTL8139_BIT_LWPTN)
|
||||
out dx, al
|
||||
jmp .finish_wake_up
|
||||
or al, (1 shl RTL8139_BIT_PMEn)
|
||||
and al, not (1 shl RTL8139_BIT_LWACT)
|
||||
out dx, al
|
||||
add edx, RTL8139_REG_CONFIG4 - RTL8139_REG_CONFIG1
|
||||
in al, dx
|
||||
and al, not (1 shl RTL8139_BIT_LWPTN)
|
||||
out dx, al
|
||||
jmp .finish_wake_up
|
||||
.old_chip:
|
||||
; wake up older chips
|
||||
and al, not ((1 shl RTL8139_BIT_SLEEP) or (1 shl RTL8139_BIT_PWRDWN))
|
||||
out dx, al
|
||||
and al, not ((1 shl RTL8139_BIT_SLEEP) or (1 shl RTL8139_BIT_PWRDWN))
|
||||
out dx, al
|
||||
.finish_wake_up:
|
||||
; lock config and BMCR registers
|
||||
xor al, al
|
||||
mov edx, [io_addr]
|
||||
add edx, RTL8139_REG_9346CR
|
||||
out dx, al
|
||||
xor al, al
|
||||
mov edx, [io_addr]
|
||||
add edx, RTL8139_REG_9346CR
|
||||
out dx, al
|
||||
;***************************************************************************
|
||||
; Function
|
||||
; rt8139_reset
|
||||
@ -276,86 +276,86 @@ rtl8139_probe:
|
||||
;
|
||||
;***************************************************************************
|
||||
rtl8139_reset:
|
||||
mov edx, [io_addr]
|
||||
add edx, RTL8139_REG_COMMAND
|
||||
mov al, 1 shl RTL8139_BIT_RST
|
||||
out dx, al
|
||||
mov cx, 1000 ; wait no longer for the reset
|
||||
mov edx, [io_addr]
|
||||
add edx, RTL8139_REG_COMMAND
|
||||
mov al, 1 shl RTL8139_BIT_RST
|
||||
out dx, al
|
||||
mov cx, 1000 ; wait no longer for the reset
|
||||
.wait_for_reset:
|
||||
in al, dx
|
||||
test al, 1 shl RTL8139_BIT_RST
|
||||
jz .reset_completed ; RST remains 1 during reset
|
||||
dec cx
|
||||
jns .wait_for_reset
|
||||
in al, dx
|
||||
test al, 1 shl RTL8139_BIT_RST
|
||||
jz .reset_completed ; RST remains 1 during reset
|
||||
dec cx
|
||||
jns .wait_for_reset
|
||||
.reset_completed:
|
||||
; get MAC (hardware address)
|
||||
mov ecx, 2
|
||||
mov ecx, 2
|
||||
.mac_read_loop:
|
||||
lea eax, [EE_93C46_REG_ETH_ID+ecx]
|
||||
push ecx
|
||||
call rtl8139_read_eeprom
|
||||
pop ecx
|
||||
mov [node_addr+ecx*2], ax
|
||||
dec ecx
|
||||
jns .mac_read_loop
|
||||
lea eax, [EE_93C46_REG_ETH_ID+ecx]
|
||||
push ecx
|
||||
call rtl8139_read_eeprom
|
||||
pop ecx
|
||||
mov [node_addr+ecx*2], ax
|
||||
dec ecx
|
||||
jns .mac_read_loop
|
||||
; unlock config and BMCR registers
|
||||
mov edx, [io_addr]
|
||||
add edx, RTL8139_REG_9346CR
|
||||
mov al, (1 shl RTL8139_BIT_93C46_EEM1) or (1 shl RTL8139_BIT_93C46_EEM0)
|
||||
out dx, al
|
||||
mov edx, [io_addr]
|
||||
add edx, RTL8139_REG_9346CR
|
||||
mov al, (1 shl RTL8139_BIT_93C46_EEM1) or (1 shl RTL8139_BIT_93C46_EEM0)
|
||||
out dx, al
|
||||
; initialize multicast registers (no filtering)
|
||||
mov eax, 0xffffffff
|
||||
add edx, RTL8139_REG_MAR0 - RTL8139_REG_9346CR
|
||||
out dx, eax
|
||||
add edx, RTL8139_REG_MAR4 - RTL8139_REG_MAR0
|
||||
out dx, eax
|
||||
mov eax, 0xffffffff
|
||||
add edx, RTL8139_REG_MAR0 - RTL8139_REG_9346CR
|
||||
out dx, eax
|
||||
add edx, RTL8139_REG_MAR4 - RTL8139_REG_MAR0
|
||||
out dx, eax
|
||||
; enable Rx/Tx
|
||||
mov al, (1 shl RTL8139_BIT_RE) or (1 shl RTL8139_BIT_TE)
|
||||
add edx, RTL8139_REG_COMMAND - RTL8139_REG_MAR4
|
||||
out dx, al
|
||||
mov al, (1 shl RTL8139_BIT_RE) or (1 shl RTL8139_BIT_TE)
|
||||
add edx, RTL8139_REG_COMMAND - RTL8139_REG_MAR4
|
||||
out dx, al
|
||||
; 32k Rxbuffer, unlimited dma burst, no wrapping, no rx threshold
|
||||
; accept broadcast packets, accept physical match packets
|
||||
mov ax, RTL8139_RX_CONFIG
|
||||
add edx, RTL8139_REG_RXCONFIG - RTL8139_REG_COMMAND
|
||||
out dx, ax
|
||||
mov ax, RTL8139_RX_CONFIG
|
||||
add edx, RTL8139_REG_RXCONFIG - RTL8139_REG_COMMAND
|
||||
out dx, ax
|
||||
; 1024 bytes DMA burst, total retries = 16 + 8 * 16 = 144
|
||||
mov ax, (RTL8139_TX_MXDMA shl RTL8139_BIT_TX_MXDMA) \
|
||||
or (RTL8139_TXRR shl RTL8139_BIT_TXRR)
|
||||
add edx, RTL8139_REG_TXCONFIG - RTL8139_REG_RXCONFIG
|
||||
out dx, ax
|
||||
mov ax, (RTL8139_TX_MXDMA shl RTL8139_BIT_TX_MXDMA) \
|
||||
or (RTL8139_TXRR shl RTL8139_BIT_TXRR)
|
||||
add edx, RTL8139_REG_TXCONFIG - RTL8139_REG_RXCONFIG
|
||||
out dx, ax
|
||||
; enable auto negotiation
|
||||
add edx, RTL8139_REG_BMCR - RTL8139_REG_TXCONFIG
|
||||
in ax, dx
|
||||
or ax, (1 shl RTL8139_BIT_ANE)
|
||||
out dx, ax
|
||||
add edx, RTL8139_REG_BMCR - RTL8139_REG_TXCONFIG
|
||||
in ax, dx
|
||||
or ax, (1 shl RTL8139_BIT_ANE)
|
||||
out dx, ax
|
||||
; set auto negotiation advertisement
|
||||
add edx, RTL8139_REG_ANAR - RTL8139_REG_BMCR
|
||||
in ax, dx
|
||||
or ax, (1 shl RTL8139_BIT_SELECTOR) or (1 shl RTL8139_BIT_10) \
|
||||
or (1 shl RTL8139_BIT_10FD) or (1 shl RTL8139_BIT_TX) \
|
||||
or (1 shl RTL8139_BIT_TXFD)
|
||||
out dx, ax
|
||||
add edx, RTL8139_REG_ANAR - RTL8139_REG_BMCR
|
||||
in ax, dx
|
||||
or ax, (1 shl RTL8139_BIT_SELECTOR) or (1 shl RTL8139_BIT_10) \
|
||||
or (1 shl RTL8139_BIT_10FD) or (1 shl RTL8139_BIT_TX) \
|
||||
or (1 shl RTL8139_BIT_TXFD)
|
||||
out dx, ax
|
||||
; lock config and BMCR registers
|
||||
xor eax, eax
|
||||
add edx, RTL8139_REG_9346CR - RTL8139_REG_ANAR
|
||||
out dx, al
|
||||
xor eax, eax
|
||||
add edx, RTL8139_REG_9346CR - RTL8139_REG_ANAR
|
||||
out dx, al
|
||||
; init RX/TX pointers
|
||||
mov [rtl8139_rx_buff_offset], eax
|
||||
mov [curr_tx_desc], eax
|
||||
mov [rtl8139_rx_buff_offset], eax
|
||||
mov [curr_tx_desc], eax
|
||||
; clear missing packet counter
|
||||
add edx, RTL8139_REG_MPC - RTL8139_REG_9346CR
|
||||
out dx, eax
|
||||
add edx, RTL8139_REG_MPC - RTL8139_REG_9346CR
|
||||
out dx, eax
|
||||
; disable all interrupts
|
||||
add edx, RTL8139_REG_IMR - RTL8139_REG_MPC
|
||||
out dx, ax
|
||||
add edx, RTL8139_REG_IMR - RTL8139_REG_MPC
|
||||
out dx, ax
|
||||
; set RxBuffer address, init RX buffer offset, init TX ring
|
||||
mov eax, rtl8139_rx_buff
|
||||
add edx, RTL8139_REG_RBSTART - RTL8139_REG_IMR
|
||||
out dx, eax
|
||||
mov eax, rtl8139_rx_buff
|
||||
add edx, RTL8139_REG_RBSTART - RTL8139_REG_IMR
|
||||
out dx, eax
|
||||
; Indicate that we have successfully reset the card
|
||||
mov eax, [pci_data]
|
||||
mov [eth_status], eax
|
||||
ret
|
||||
mov eax, [pci_data]
|
||||
mov [eth_status], eax
|
||||
ret
|
||||
|
||||
;***************************************************************************
|
||||
; Function
|
||||
@ -371,68 +371,68 @@ rtl8139_reset:
|
||||
;
|
||||
;***************************************************************************
|
||||
rtl8139_read_eeprom:
|
||||
movzx ebx, al
|
||||
mov edx, [io_addr]
|
||||
add edx, RTL8139_REG_RXCONFIG
|
||||
in al, dx
|
||||
test al, (1 shl RTL8139_BIT_9356SEL)
|
||||
jz .type_93c46
|
||||
movzx ebx, al
|
||||
mov edx, [io_addr]
|
||||
add edx, RTL8139_REG_RXCONFIG
|
||||
in al, dx
|
||||
test al, (1 shl RTL8139_BIT_9356SEL)
|
||||
jz .type_93c46
|
||||
; and bl, 01111111b ; don't care first bit
|
||||
or bx, EE_93C56_READ_CMD ; it contains start bit
|
||||
mov cx, EE_93C56_CMD_LENGTH-1 ; cmd_loop counter
|
||||
jmp .read_eeprom
|
||||
or bx, EE_93C56_READ_CMD ; it contains start bit
|
||||
mov cx, EE_93C56_CMD_LENGTH-1 ; cmd_loop counter
|
||||
jmp .read_eeprom
|
||||
.type_93c46:
|
||||
and bl, 00111111b
|
||||
or bx, EE_93C46_READ_CMD ; it contains start bit
|
||||
mov cx, EE_93C46_CMD_LENGTH-1 ; cmd_loop counter
|
||||
and bl, 00111111b
|
||||
or bx, EE_93C46_READ_CMD ; it contains start bit
|
||||
mov cx, EE_93C46_CMD_LENGTH-1 ; cmd_loop counter
|
||||
.read_eeprom:
|
||||
add edx, RTL8139_REG_9346CR - RTL8139_REG_RXCONFIG_0
|
||||
add edx, RTL8139_REG_9346CR - RTL8139_REG_RXCONFIG_0
|
||||
; mov al, (1 shl RTL8139_BIT_93C46_EEM1)
|
||||
; out dx, al
|
||||
mov al, (1 shl RTL8139_BIT_93C46_EEM1) \
|
||||
or (1 shl RTL8139_BIT_93C46_EECS) ; wake up the eeprom
|
||||
out dx, al
|
||||
mov al, (1 shl RTL8139_BIT_93C46_EEM1) \
|
||||
or (1 shl RTL8139_BIT_93C46_EECS) ; wake up the eeprom
|
||||
out dx, al
|
||||
.cmd_loop:
|
||||
mov al, (1 shl RTL8139_BIT_93C46_EEM1) or (1 shl RTL8139_BIT_93C46_EECS)
|
||||
bt bx, cx
|
||||
jnc .zero_bit
|
||||
or al, (1 shl RTL8139_BIT_93C46_EEDI)
|
||||
mov al, (1 shl RTL8139_BIT_93C46_EEM1) or (1 shl RTL8139_BIT_93C46_EECS)
|
||||
bt bx, cx
|
||||
jnc .zero_bit
|
||||
or al, (1 shl RTL8139_BIT_93C46_EEDI)
|
||||
.zero_bit:
|
||||
out dx, al
|
||||
out dx, al
|
||||
; push eax
|
||||
; in eax, dx ; eeprom delay
|
||||
; pop eax
|
||||
or al, (1 shl RTL8139_BIT_93C46_EESK)
|
||||
out dx, al
|
||||
or al, (1 shl RTL8139_BIT_93C46_EESK)
|
||||
out dx, al
|
||||
; in eax, dx ; eeprom delay
|
||||
dec cx
|
||||
jns .cmd_loop
|
||||
dec cx
|
||||
jns .cmd_loop
|
||||
; in eax, dx ; eeprom delay
|
||||
mov al, (1 shl RTL8139_BIT_93C46_EEM1) or (1 shl RTL8139_BIT_93C46_EECS)
|
||||
out dx, al
|
||||
mov cl, 0xf
|
||||
mov al, (1 shl RTL8139_BIT_93C46_EEM1) or (1 shl RTL8139_BIT_93C46_EECS)
|
||||
out dx, al
|
||||
mov cl, 0xf
|
||||
.read_loop:
|
||||
shl ebx, 1
|
||||
mov al, (1 shl RTL8139_BIT_93C46_EEM1) \
|
||||
or (1 shl RTL8139_BIT_93C46_EECS) \
|
||||
or (1 shl RTL8139_BIT_93C46_EESK)
|
||||
out dx, al
|
||||
shl ebx, 1
|
||||
mov al, (1 shl RTL8139_BIT_93C46_EEM1) \
|
||||
or (1 shl RTL8139_BIT_93C46_EECS) \
|
||||
or (1 shl RTL8139_BIT_93C46_EESK)
|
||||
out dx, al
|
||||
; in eax, dx ; eeprom delay
|
||||
in al, dx
|
||||
and al, (1 shl RTL8139_BIT_93C46_EEDO)
|
||||
jz .dont_set
|
||||
inc ebx
|
||||
in al, dx
|
||||
and al, (1 shl RTL8139_BIT_93C46_EEDO)
|
||||
jz .dont_set
|
||||
inc ebx
|
||||
.dont_set:
|
||||
mov al, (1 shl RTL8139_BIT_93C46_EEM1) \
|
||||
or (1 shl RTL8139_BIT_93C46_EECS)
|
||||
out dx, al
|
||||
mov al, (1 shl RTL8139_BIT_93C46_EEM1) \
|
||||
or (1 shl RTL8139_BIT_93C46_EECS)
|
||||
out dx, al
|
||||
; in eax, dx ; eeprom delay
|
||||
dec cl
|
||||
jns .read_loop
|
||||
xor al, al
|
||||
out dx, al
|
||||
mov ax, bx
|
||||
ret
|
||||
dec cl
|
||||
jns .read_loop
|
||||
xor al, al
|
||||
out dx, al
|
||||
mov ax, bx
|
||||
ret
|
||||
|
||||
;***************************************************************************
|
||||
; Function
|
||||
@ -451,78 +451,78 @@ rtl8139_read_eeprom:
|
||||
;
|
||||
;***************************************************************************
|
||||
rtl8139_transmit:
|
||||
cmp ecx, MAX_ETH_FRAME_SIZE
|
||||
jg .finish ; packet is too long
|
||||
push ecx
|
||||
cmp ecx, MAX_ETH_FRAME_SIZE
|
||||
jg .finish ; packet is too long
|
||||
push ecx
|
||||
; check descriptor
|
||||
mov ecx, [curr_tx_desc]
|
||||
mov edx, [io_addr]
|
||||
lea edx, [edx+ecx*4+RTL8139_REG_TSD0]
|
||||
push edx ebx
|
||||
in ax, dx
|
||||
and ax, (1 shl RTL8139_BIT_TOK) or (1 shl RTL8139_BIT_OWN)
|
||||
cmp ax, (1 shl RTL8139_BIT_TOK) or (1 shl RTL8139_BIT_OWN)
|
||||
jz .send_packet
|
||||
test ax, 0x1fff ; or no size given
|
||||
jz .send_packet
|
||||
mov ecx, [curr_tx_desc]
|
||||
mov edx, [io_addr]
|
||||
lea edx, [edx+ecx*4+RTL8139_REG_TSD0]
|
||||
push edx ebx
|
||||
in ax, dx
|
||||
and ax, (1 shl RTL8139_BIT_TOK) or (1 shl RTL8139_BIT_OWN)
|
||||
cmp ax, (1 shl RTL8139_BIT_TOK) or (1 shl RTL8139_BIT_OWN)
|
||||
jz .send_packet
|
||||
test ax, 0x1fff ; or no size given
|
||||
jz .send_packet
|
||||
; wait for timeout
|
||||
mov ebx, RTL8139_TX_TIMEOUT
|
||||
mov eax, 0x5 ; delay x/100 secs
|
||||
int 0x40
|
||||
in ax, dx
|
||||
and ax, (1 shl RTL8139_BIT_TOK) or (1 shl RTL8139_BIT_OWN)
|
||||
cmp ax, (1 shl RTL8139_BIT_TOK) or (1 shl RTL8139_BIT_OWN)
|
||||
jz .send_packet
|
||||
mov ebx, RTL8139_TX_TIMEOUT
|
||||
mov eax, 0x5 ; delay x/100 secs
|
||||
int 0x40
|
||||
in ax, dx
|
||||
and ax, (1 shl RTL8139_BIT_TOK) or (1 shl RTL8139_BIT_OWN)
|
||||
cmp ax, (1 shl RTL8139_BIT_TOK) or (1 shl RTL8139_BIT_OWN)
|
||||
jz .send_packet
|
||||
; chip hung, reset it
|
||||
call rtl8139_reset
|
||||
call rtl8139_reset
|
||||
; reset the card
|
||||
.send_packet:
|
||||
; calculate tx_buffer address
|
||||
pop ebx
|
||||
push esi
|
||||
mov eax, MAX_ETH_FRAME_SIZE
|
||||
mul dword [curr_tx_desc]
|
||||
mov esi, edi
|
||||
lea edi, [rtl8139_tx_buff+eax]
|
||||
mov eax, edi
|
||||
cld
|
||||
pop ebx
|
||||
push esi
|
||||
mov eax, MAX_ETH_FRAME_SIZE
|
||||
mul dword [curr_tx_desc]
|
||||
mov esi, edi
|
||||
lea edi, [rtl8139_tx_buff+eax]
|
||||
mov eax, edi
|
||||
cld
|
||||
; copy destination address
|
||||
movsd
|
||||
movsw
|
||||
movsd
|
||||
movsw
|
||||
; copy source address
|
||||
mov esi, node_addr
|
||||
movsd
|
||||
movsw
|
||||
mov esi, node_addr
|
||||
movsd
|
||||
movsw
|
||||
; copy packet type
|
||||
mov [edi], bx
|
||||
add edi, 2
|
||||
mov [edi], bx
|
||||
add edi, 2
|
||||
; copy the packet data
|
||||
pop esi edx ecx
|
||||
push ecx
|
||||
shr ecx, 2
|
||||
rep movsd
|
||||
pop ecx
|
||||
push ecx
|
||||
and ecx, 3
|
||||
rep movsb
|
||||
pop esi edx ecx
|
||||
push ecx
|
||||
shr ecx, 2
|
||||
rep movsd
|
||||
pop ecx
|
||||
push ecx
|
||||
and ecx, 3
|
||||
rep movsb
|
||||
; set address
|
||||
add edx, RTL8139_REG_TSAD0 - RTL8139_REG_TSD0
|
||||
out dx, eax
|
||||
add edx, RTL8139_REG_TSAD0 - RTL8139_REG_TSD0
|
||||
out dx, eax
|
||||
; set size and early threshold
|
||||
pop eax ; pick up the size
|
||||
add eax, ETH_HLEN
|
||||
cmp eax, ETH_ZLEN
|
||||
jnc .no_pad
|
||||
mov eax, ETH_ZLEN
|
||||
pop eax ; pick up the size
|
||||
add eax, ETH_HLEN
|
||||
cmp eax, ETH_ZLEN
|
||||
jnc .no_pad
|
||||
mov eax, ETH_ZLEN
|
||||
.no_pad:
|
||||
or eax, (RTL8139_ERTXTH shl RTL8139_BIT_ERTXTH)
|
||||
add edx, RTL8139_REG_TSD0 - RTL8139_REG_TSAD0
|
||||
out dx, eax
|
||||
or eax, (RTL8139_ERTXTH shl RTL8139_BIT_ERTXTH)
|
||||
add edx, RTL8139_REG_TSD0 - RTL8139_REG_TSAD0
|
||||
out dx, eax
|
||||
; get next descriptor 0, 1, 2, 3, 0, 1, 2, 3, 0, 1, ...
|
||||
inc dword [curr_tx_desc]
|
||||
and dword [curr_tx_desc], 3
|
||||
inc dword [curr_tx_desc]
|
||||
and dword [curr_tx_desc], 3
|
||||
.finish:
|
||||
ret
|
||||
ret
|
||||
|
||||
;***************************************************************************
|
||||
; Function
|
||||
@ -536,60 +536,76 @@ rtl8139_transmit:
|
||||
;
|
||||
;***************************************************************************
|
||||
rtl8139_poll:
|
||||
mov word [eth_rx_data_len], 0
|
||||
mov edx, [io_addr]
|
||||
add edx, RTL8139_REG_COMMAND
|
||||
in al, dx
|
||||
test al, (1 shl RTL8139_BIT_BUFE)
|
||||
jnz .finish
|
||||
mov word [eth_rx_data_len], 0
|
||||
mov edx, [io_addr]
|
||||
add edx, RTL8139_REG_COMMAND
|
||||
in al, dx
|
||||
test al, (1 shl RTL8139_BIT_BUFE)
|
||||
jnz .finish
|
||||
; new packet received copy it from rx_buffer into Ether_buffer
|
||||
mov eax, rtl8139_rx_buff
|
||||
add eax, [rtl8139_rx_buff_offset]
|
||||
mov eax, rtl8139_rx_buff
|
||||
add eax, [rtl8139_rx_buff_offset]
|
||||
; check if packet is ok
|
||||
test byte [eax], (1 shl RTL8139_BIT_ROK)
|
||||
jz .reset_rx
|
||||
test byte [eax], (1 shl RTL8139_BIT_ROK)
|
||||
jz .reset_rx
|
||||
; packet is ok copy it into the Ether_buffer
|
||||
movzx ecx, word [eax+2] ; packet length
|
||||
sub ecx, 4 ; don't copy CRC
|
||||
mov word [eth_rx_data_len], cx
|
||||
push ecx
|
||||
shr ecx, 2 ; first copy dword-wise
|
||||
lea esi, [eax+4] ; don't copy the packet header
|
||||
mov edi, Ether_buffer
|
||||
cld
|
||||
rep movsd ; copy the dwords
|
||||
pop ecx
|
||||
and ecx, 3
|
||||
rep movsb ; copy the rest bytes
|
||||
movzx ecx, word [eax+2] ; packet length
|
||||
sub ecx, 4 ; don't copy CRC
|
||||
mov word [eth_rx_data_len], cx
|
||||
push ecx
|
||||
shr ecx, 2 ; first copy dword-wise
|
||||
lea esi, [eax+4] ; don't copy the packet header
|
||||
mov edi, Ether_buffer
|
||||
cld
|
||||
rep movsd ; copy the dwords
|
||||
pop ecx
|
||||
and ecx, 3
|
||||
rep movsb ; copy the rest bytes
|
||||
; update rtl8139_rx_buff_offset
|
||||
movzx eax, word [eax+2] ; packet length
|
||||
add eax, [rtl8139_rx_buff_offset]
|
||||
add eax, 4+3 ; packet header is 4 bytes long + dword alignment
|
||||
and eax, not 3 ; dword alignment
|
||||
cmp eax, RTL8139_RX_BUFFER_SIZE
|
||||
jl .no_wrap
|
||||
sub eax, RTL8139_RX_BUFFER_SIZE
|
||||
movzx eax, word [eax+2] ; packet length
|
||||
add eax, [rtl8139_rx_buff_offset]
|
||||
add eax, 4+3 ; packet header is 4 bytes long + dword alignment
|
||||
and eax, not 3 ; dword alignment
|
||||
cmp eax, RTL8139_RX_BUFFER_SIZE
|
||||
jl .no_wrap
|
||||
sub eax, RTL8139_RX_BUFFER_SIZE
|
||||
.no_wrap:
|
||||
mov [rtl8139_rx_buff_offset], eax
|
||||
mov [rtl8139_rx_buff_offset], eax
|
||||
; update CAPR register
|
||||
sub eax, 0x10 ; value 0x10 is a constant for CAPR
|
||||
add edx, RTL8139_REG_CAPR - RTL8139_REG_COMMAND
|
||||
out dx, ax
|
||||
sub eax, 0x10 ; value 0x10 is a constant for CAPR
|
||||
add edx, RTL8139_REG_CAPR - RTL8139_REG_COMMAND
|
||||
out dx, ax
|
||||
.finish:
|
||||
; clear active interrupt sources
|
||||
mov edx, [io_addr]
|
||||
add edx, RTL8139_REG_ISR
|
||||
in ax, dx
|
||||
out dx, ax
|
||||
ret
|
||||
mov edx, [io_addr]
|
||||
add edx, RTL8139_REG_ISR
|
||||
in ax, dx
|
||||
out dx, ax
|
||||
ret
|
||||
.reset_rx:
|
||||
in al, dx ; read command register
|
||||
push eax
|
||||
and al, not (1 shl RTL8139_BIT_RE)
|
||||
out dx, al
|
||||
pop eax
|
||||
out dx, al
|
||||
add edx, RTL8139_REG_RXCONFIG - RTL8139_REG_COMMAND
|
||||
mov ax, RTL8139_RX_CONFIG
|
||||
out dx, ax
|
||||
ret
|
||||
in al, dx ; read command register
|
||||
push eax
|
||||
and al, not (1 shl RTL8139_BIT_RE)
|
||||
out dx, al
|
||||
pop eax
|
||||
out dx, al
|
||||
add edx, RTL8139_REG_RXCONFIG - RTL8139_REG_COMMAND
|
||||
mov ax, RTL8139_RX_CONFIG
|
||||
out dx, ax
|
||||
ret
|
||||
|
||||
rtl8139_cable:
|
||||
pusha
|
||||
mov edx, [io_addr]
|
||||
add edx, 0x58
|
||||
in al,dx
|
||||
test al,1 SHL 2
|
||||
jnz .notconnected
|
||||
popa
|
||||
xor al,al
|
||||
inc al
|
||||
ret
|
||||
.notconnected:
|
||||
popa
|
||||
xor al,al
|
||||
ret
|
||||
|
||||
@ -36,15 +36,15 @@
|
||||
;
|
||||
;********************************************************************
|
||||
|
||||
ETHER_IP equ 0x0008 ; Reversed from 0800 for intel
|
||||
ETHER_ARP equ 0x0608 ; Reversed from 0806 for intel
|
||||
ETHER_RARP equ 0x3580
|
||||
ETHER_IP equ 0x0008 ; Reversed from 0800 for intel
|
||||
ETHER_ARP equ 0x0608 ; Reversed from 0806 for intel
|
||||
ETHER_RARP equ 0x3580
|
||||
|
||||
struc ETH_FRAME
|
||||
{ .DstMAC dp ? ;destination MAC-address [6 bytes]
|
||||
.SrcMAC dp ? ;source MAC-address [6 bytes]
|
||||
.Type dw ? ;type of the upper-layer protocol [2 bytes]
|
||||
.Data db ? ;data [46-1500 bytes]
|
||||
{ .DstMAC dp ? ;destination MAC-address [6 bytes]
|
||||
.SrcMAC dp ? ;source MAC-address [6 bytes]
|
||||
.Type dw ? ;type of the upper-layer protocol [2 bytes]
|
||||
.Data db ? ;data [46-1500 bytes]
|
||||
}
|
||||
|
||||
virtual at Ether_buffer
|
||||
@ -110,105 +110,108 @@ include "drivers/pcnet32.inc"
|
||||
; be several lines which refer to the same functions.
|
||||
; The first driver found on the PCI bus will be the one used.
|
||||
|
||||
PCICARDS_ENTRY_SIZE equ 20 ; Size of each PCICARDS entry
|
||||
PCICARDS_ENTRY_SIZE equ 24 ; Size of each PCICARDS entry
|
||||
|
||||
iglobal
|
||||
PCICards:
|
||||
dd 0x12098086, I8255x_probe, I8255x_reset, I8255x_poll, I8255x_transmit
|
||||
dd 0x10298086, I8255x_probe, I8255x_reset, I8255x_poll, I8255x_transmit
|
||||
dd 0x12298086, I8255x_probe, I8255x_reset, I8255x_poll, I8255x_transmit
|
||||
dd 0x10308086, I8255x_probe, I8255x_reset, I8255x_poll, I8255x_transmit
|
||||
dd 0x24498086, I8255x_probe, I8255x_reset, I8255x_poll, I8255x_transmit
|
||||
dd 0x802910ec, rtl8029_probe, rtl8029_reset, rtl8029_poll, rtl8029_transmit
|
||||
dd 0x12111113, rtl8029_probe, rtl8029_reset, rtl8029_poll, rtl8029_transmit
|
||||
dd 0x813910ec, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit
|
||||
; /+/ Íîâûå âåíäîðû ñåòåâûõ êàðò íà áàçå rtl8139
|
||||
dd 0x813810ec, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit
|
||||
dd 0x12111113, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit
|
||||
dd 0x13601500, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit
|
||||
dd 0x13604033, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit
|
||||
dd 0x13001186, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit
|
||||
dd 0x13401186, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit
|
||||
dd 0xab0613d1, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit
|
||||
dd 0xa1171259, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit
|
||||
dd 0xa11e1259, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit
|
||||
dd 0xab0614ea, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit
|
||||
dd 0xab0714ea, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit
|
||||
dd 0x123411db, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit
|
||||
dd 0x91301432, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit
|
||||
dd 0x101202ac, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit
|
||||
dd 0x0106018a, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit
|
||||
dd 0x1211126c, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit
|
||||
dd 0x81391743, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit
|
||||
dd 0x8139021b, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit
|
||||
; /-/
|
||||
dd 0x590010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit
|
||||
dd 0x592010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit
|
||||
dd 0x597010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit
|
||||
dd 0x595010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit
|
||||
dd 0x595110b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit
|
||||
dd 0x595210b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit
|
||||
dd 0x900010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit
|
||||
dd 0x900110b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit
|
||||
dd 0x900410b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit
|
||||
dd 0x900510b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit
|
||||
dd 0x900610b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit
|
||||
dd 0x900A10b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit
|
||||
dd 0x905010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit
|
||||
dd 0x905110b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit
|
||||
dd 0x905510b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit
|
||||
dd 0x905810b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit
|
||||
dd 0x905A10b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit
|
||||
dd 0x920010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit
|
||||
dd 0x980010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit
|
||||
dd 0x980510b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit
|
||||
dd 0x764610b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit
|
||||
dd 0x505510b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit
|
||||
dd 0x605510b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit
|
||||
dd 0x605610b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit
|
||||
dd 0x5b5710b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit
|
||||
dd 0x505710b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit
|
||||
dd 0x515710b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit
|
||||
dd 0x525710b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit
|
||||
dd 0x656010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit
|
||||
dd 0x656210b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit
|
||||
dd 0x656410b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit
|
||||
dd 0x450010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit
|
||||
dd 0x09001039, SIS900_probe, SIS900_reset, SIS900_poll, SIS900_transmit
|
||||
dd 0x20001022, pcnet32_probe, pcnet32_reset, pcnet32_poll, pcnet32_xmit
|
||||
dd 0x26251022, pcnet32_probe, pcnet32_reset, pcnet32_poll, pcnet32_xmit
|
||||
dd 0x20011022, pcnet32_probe, pcnet32_reset, pcnet32_poll, pcnet32_xmit
|
||||
dd 0x12098086, I8255x_probe, I8255x_reset, I8255x_poll, I8255x_transmit, 0
|
||||
dd 0x10298086, I8255x_probe, I8255x_reset, I8255x_poll, I8255x_transmit, 0
|
||||
dd 0x12298086, I8255x_probe, I8255x_reset, I8255x_poll, I8255x_transmit, 0
|
||||
dd 0x10308086, I8255x_probe, I8255x_reset, I8255x_poll, I8255x_transmit, 0
|
||||
dd 0x24498086, I8255x_probe, I8255x_reset, I8255x_poll, I8255x_transmit, 0
|
||||
dd 0x802910ec, rtl8029_probe, rtl8029_reset, rtl8029_poll, rtl8029_transmit, 0
|
||||
dd 0x12111113, rtl8029_probe, rtl8029_reset, rtl8029_poll, rtl8029_transmit, 0
|
||||
|
||||
dd 0x813910ec, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit, rtl8139_cable
|
||||
dd 0x813810ec, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit, rtl8139_cable
|
||||
dd 0x12111113, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit, rtl8139_cable
|
||||
dd 0x13601500, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit, rtl8139_cable
|
||||
dd 0x13604033, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit, rtl8139_cable
|
||||
dd 0x13001186, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit, rtl8139_cable
|
||||
dd 0x13401186, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit, rtl8139_cable
|
||||
dd 0xab0613d1, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit, rtl8139_cable
|
||||
dd 0xa1171259, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit, rtl8139_cable
|
||||
dd 0xa11e1259, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit, rtl8139_cable
|
||||
dd 0xab0614ea, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit, rtl8139_cable
|
||||
dd 0xab0714ea, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit, rtl8139_cable
|
||||
dd 0x123411db, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit, rtl8139_cable
|
||||
dd 0x91301432, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit, rtl8139_cable
|
||||
dd 0x101202ac, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit, rtl8139_cable
|
||||
dd 0x0106018a, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit, rtl8139_cable
|
||||
dd 0x1211126c, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit, rtl8139_cable
|
||||
dd 0x81391743, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit, rtl8139_cable
|
||||
dd 0x8139021b, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit, rtl8139_cable
|
||||
|
||||
dd 0x590010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
|
||||
dd 0x592010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
|
||||
dd 0x597010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
|
||||
dd 0x595010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
|
||||
dd 0x595110b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
|
||||
dd 0x595210b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
|
||||
dd 0x900010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
|
||||
dd 0x900110b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
|
||||
dd 0x900410b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
|
||||
dd 0x900510b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
|
||||
dd 0x900610b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
|
||||
dd 0x900A10b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
|
||||
dd 0x905010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
|
||||
dd 0x905110b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
|
||||
dd 0x905510b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
|
||||
dd 0x905810b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
|
||||
dd 0x905A10b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
|
||||
dd 0x920010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
|
||||
dd 0x980010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
|
||||
dd 0x980510b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
|
||||
dd 0x764610b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
|
||||
dd 0x505510b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
|
||||
dd 0x605510b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
|
||||
dd 0x605610b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
|
||||
dd 0x5b5710b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
|
||||
dd 0x505710b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
|
||||
dd 0x515710b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
|
||||
dd 0x525710b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
|
||||
dd 0x656010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
|
||||
dd 0x656210b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
|
||||
dd 0x656410b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
|
||||
dd 0x450010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
|
||||
|
||||
dd 0x09001039, SIS900_probe, SIS900_reset, SIS900_poll, SIS900_transmit, 0
|
||||
|
||||
dd 0x20001022, pcnet32_probe, pcnet32_reset, pcnet32_poll, pcnet32_xmit, 0
|
||||
dd 0x26251022, pcnet32_probe, pcnet32_reset, pcnet32_poll, pcnet32_xmit, 0
|
||||
dd 0x20011022, pcnet32_probe, pcnet32_reset, pcnet32_poll, pcnet32_xmit, 0
|
||||
; following card is untested
|
||||
dd 0x70161039, SIS900_probe, SIS900_reset, SIS900_poll, SIS900_transmit
|
||||
dd 0,0,0,0,0 ; end of list marker, do not remove
|
||||
dd 0x70161039, SIS900_probe, SIS900_reset, SIS900_poll, SIS900_transmit, 0
|
||||
rb PCICARDS_ENTRY_SIZE ; end of list marker, do not remove
|
||||
endg
|
||||
|
||||
uglobal
|
||||
;Net-stack's interface's settings
|
||||
node_addr: db 0,0,0,0,0,0
|
||||
gateway_ip: db 0, 0, 0, 0
|
||||
dns_ip: dd 0
|
||||
node_addr: db 0,0,0,0,0,0
|
||||
gateway_ip: dd 0
|
||||
dns_ip: dd 0
|
||||
|
||||
eth_rx_data_len: dw 0
|
||||
eth_status: dd 0
|
||||
io_addr: dd 0
|
||||
hdrtype: db 0
|
||||
eth_status: dd 0
|
||||
io_addr: dd 0
|
||||
hdrtype: db 0
|
||||
vendor_device: dd 0
|
||||
pci_data: dd 0
|
||||
pci_dev: dd 0
|
||||
pci_bus: dd 0
|
||||
pci_data: dd 0
|
||||
pci_dev: dd 0
|
||||
pci_bus: dd 0
|
||||
|
||||
; These will hold pointers to the selected driver functions
|
||||
drvr_probe: dd 0
|
||||
drvr_reset: dd 0
|
||||
drvr_poll: dd 0
|
||||
drvr_probe: dd 0
|
||||
drvr_reset: dd 0
|
||||
drvr_poll: dd 0
|
||||
drvr_transmit: dd 0
|
||||
drvr_cable: dd 0
|
||||
|
||||
endg
|
||||
|
||||
iglobal
|
||||
broadcast_add: db 0xff,0xff,0xff,0xff,0xff,0xff
|
||||
subnet_mask: dd 0x00ffffff ; 255.255.255.0
|
||||
subnet_mask: dd 0x00ffffff ; 255.255.255.0
|
||||
endg
|
||||
|
||||
include "arp.inc" ;arp-protocol functions
|
||||
@ -236,7 +239,7 @@ local MACAddress dp ? ;allocate 6 bytes in the stack
|
||||
mov eax, NET1OUT_QUEUE
|
||||
call dequeue
|
||||
cmp ax, NO_BUFFER
|
||||
je .exit ; Exit if no buffer available
|
||||
je .exit ; Exit if no buffer available
|
||||
|
||||
push eax ;save buffer number
|
||||
|
||||
@ -247,8 +250,8 @@ local MACAddress dp ? ;allocate 6 bytes in the stack
|
||||
; Extract the destination IP
|
||||
; find the destination IP in the ARP table, get MAC
|
||||
; store this MAC in 'MACAddress'
|
||||
mov ebx, eax ; Save buffer address
|
||||
mov edx, [ebx + 16] ; get destination address
|
||||
mov ebx, eax ; Save buffer address
|
||||
mov edx, [ebx + 16] ; get destination address
|
||||
|
||||
; If the destination address is 255.255.255.255,
|
||||
; set the MACAddress to all ones ( broadcast )
|
||||
@ -258,31 +261,31 @@ local MACAddress dp ? ;allocate 6 bytes in the stack
|
||||
movsd
|
||||
movsw
|
||||
cmp edx, 0xffffffff
|
||||
je .send ; If it is broadcast, just send
|
||||
je .send ; If it is broadcast, just send
|
||||
|
||||
lea eax, [MACAddress] ;cause this is local variable
|
||||
lea eax, [MACAddress] ;cause this is local variable
|
||||
stdcall arp_table_manager, ARP_TABLE_IP_TO_MAC, edx, eax ;opcode,IP,MAC_ptr - Get the MAC address.
|
||||
|
||||
cmp eax, ARP_VALID_MAPPING
|
||||
je .send
|
||||
je .send
|
||||
|
||||
; No valid entry. Has the request been sent, but timed out?
|
||||
cmp eax, ARP_RESPONSE_TIMEOUT
|
||||
je .freebuf
|
||||
je .freebuf
|
||||
|
||||
.wait_response: ;we wait arp-response
|
||||
; Re-queue the packet, and exit
|
||||
.wait_response: ;we wait arp-response
|
||||
; Re-queue the packet, and exit
|
||||
pop ebx
|
||||
mov eax, NET1OUT_QUEUE
|
||||
call queue ; Get the buffer back
|
||||
call queue ; Get the buffer back
|
||||
jmp .exit
|
||||
|
||||
.send: ;if ARP_VALID_MAPPING then send the packet
|
||||
lea edi, [MACAddress] ; Pointer to 48 bit destination address
|
||||
movzx ecx, word[ebx+2] ; Size of IP packet to send
|
||||
xchg ch, cl ; because mirror byte-order
|
||||
mov esi, ebx ; Pointer to packet data
|
||||
mov bx, ETHER_IP ; Type of packet
|
||||
lea edi, [MACAddress] ; Pointer to 48 bit destination address
|
||||
movzx ecx, word[ebx+2] ; Size of IP packet to send
|
||||
xchg ch, cl ; because mirror byte-order
|
||||
mov esi, ebx ; Pointer to packet data
|
||||
mov bx, ETHER_IP ; Type of packet
|
||||
call dword [drvr_transmit] ; Call the drivers transmit function
|
||||
|
||||
; OK, we have sent a packet, so increment the count
|
||||
@ -315,7 +318,7 @@ ether_IP_handler:
|
||||
mov eax, EMPTY_QUEUE
|
||||
call dequeue
|
||||
cmp ax, NO_BUFFER
|
||||
je eiph00x
|
||||
je eiph00x
|
||||
|
||||
; convert buffer pointer eax to the absolute address
|
||||
push eax
|
||||
@ -330,7 +333,7 @@ ether_IP_handler:
|
||||
|
||||
; Now store it all away
|
||||
mov ecx, IPBUFFSIZE / 4 ; Copy all of the available
|
||||
; data across - worse case
|
||||
; data across - worse case
|
||||
cld
|
||||
rep movsd
|
||||
|
||||
@ -356,14 +359,14 @@ eiph00x:
|
||||
;***************************************************************************
|
||||
eth_probe:
|
||||
; Find a card on the PCI bus, and get it's address
|
||||
call scan_bus ; Find the ethernet cards PIC address
|
||||
call scan_bus ; Find the ethernet cards PIC address
|
||||
xor eax, eax
|
||||
cmp [io_addr], eax
|
||||
je ep_00x ; Return 0 in eax if no cards found
|
||||
je ep_00x ; Return 0 in eax if no cards found
|
||||
|
||||
call dword [drvr_probe] ; Call the drivers probe function
|
||||
call dword [drvr_probe] ; Call the drivers probe function
|
||||
|
||||
mov eax, [io_addr] ; return a non zero value
|
||||
mov eax, [io_addr] ; return a non zero value
|
||||
|
||||
ep_00x:
|
||||
ret
|
||||
@ -380,7 +383,7 @@ ep_00x:
|
||||
ethernet_driver:
|
||||
; Do nothing if the driver is inactive
|
||||
cmp [ethernet_active], byte 0
|
||||
je eth_exit
|
||||
je eth_exit
|
||||
|
||||
call eth_rx
|
||||
call eth_tx
|
||||
@ -403,11 +406,11 @@ eth_exit:
|
||||
eth_rx:
|
||||
xor ax, ax
|
||||
mov [eth_rx_data_len], ax
|
||||
call dword [drvr_poll] ; Call the drivers poll function
|
||||
call dword [drvr_poll] ; Call the drivers poll function
|
||||
|
||||
mov ax, [eth_rx_data_len]
|
||||
cmp ax, 0
|
||||
je .exit
|
||||
je .exit
|
||||
|
||||
|
||||
; Check the protocol. Call appropriate handler
|
||||
@ -415,12 +418,12 @@ eth_rx:
|
||||
mov ax, [ETH_FRAME.Type] ; The address of the protocol word
|
||||
|
||||
cmp ax, ETHER_IP
|
||||
je .is_ip ; It's IP
|
||||
je .is_ip ; It's IP
|
||||
|
||||
cmp ax, ETHER_ARP
|
||||
je .is_arp ; It is ARP
|
||||
je .is_arp ; It is ARP
|
||||
|
||||
jmp .exit ; If not IP or ARP, ignore
|
||||
jmp .exit ; If not IP or ARP, ignore
|
||||
|
||||
.is_ip:
|
||||
inc dword [ip_rx_count]
|
||||
|
||||
@ -8,11 +8,11 @@
|
||||
;***************************************************************************
|
||||
|
||||
; PCI Bus defines
|
||||
PCI_HEADER_TYPE equ 0x0e ;8 bit
|
||||
PCI_BASE_ADDRESS_0 equ 0x10 ;32 bit
|
||||
PCI_BASE_ADDRESS_5 equ 0x24 ;32 bits
|
||||
PCI_HEADER_TYPE equ 0x0e ;8 bit
|
||||
PCI_BASE_ADDRESS_0 equ 0x10 ;32 bit
|
||||
PCI_BASE_ADDRESS_5 equ 0x24 ;32 bits
|
||||
PCI_BASE_ADDRESS_SPACE_IO equ 0x01
|
||||
PCI_VENDOR_ID equ 0x00 ;16 bit
|
||||
PCI_VENDOR_ID equ 0x00 ;16 bit
|
||||
PCI_BASE_ADDRESS_IO_MASK equ 0xFFFFFFFC
|
||||
|
||||
;***************************************************************************
|
||||
@ -32,11 +32,11 @@ config_cmd:
|
||||
push ecx
|
||||
mov eax, ebx
|
||||
shl eax, 16
|
||||
or eax, 0x80000000
|
||||
or eax, 0x80000000
|
||||
shl ecx, 8
|
||||
or eax, ecx
|
||||
or eax, ecx
|
||||
pop ecx
|
||||
or eax, edx
|
||||
or eax, edx
|
||||
and eax, 0xFFFFFFFC
|
||||
ret
|
||||
|
||||
@ -64,7 +64,7 @@ pcibios_read_config_byte:
|
||||
and dx, 0x03
|
||||
add dx, 0xCFC
|
||||
; and dx, 0xFFC
|
||||
in al, dx
|
||||
in al, dx
|
||||
ret
|
||||
|
||||
;***************************************************************************
|
||||
@ -91,7 +91,7 @@ pcibios_read_config_word:
|
||||
and dx, 0x02
|
||||
add dx, 0xCFC
|
||||
; and dx, 0xFFC
|
||||
in ax, dx
|
||||
in ax, dx
|
||||
ret
|
||||
|
||||
;***************************************************************************
|
||||
@ -116,7 +116,7 @@ pcibios_read_config_dword:
|
||||
pop dx
|
||||
xor eax, eax
|
||||
mov dx, 0xCFC
|
||||
in eax, dx
|
||||
in eax, dx
|
||||
pop edx
|
||||
ret
|
||||
|
||||
@ -190,16 +190,16 @@ delay_us:
|
||||
|
||||
mov ecx,2
|
||||
|
||||
in al,0x61
|
||||
in al,0x61
|
||||
and al,0x10
|
||||
mov ah,al
|
||||
cld
|
||||
|
||||
dcnt1:
|
||||
in al,0x61
|
||||
in al,0x61
|
||||
and al,0x10
|
||||
cmp al,ah
|
||||
jz dcnt1
|
||||
jz dcnt1
|
||||
|
||||
mov ah,al
|
||||
loop dcnt1
|
||||
@ -231,10 +231,10 @@ scan_bus:
|
||||
mov [hdrtype], al
|
||||
mov [pci_data], eax
|
||||
|
||||
xor ebx, ebx ; ebx = bus# 0 .. 255
|
||||
xor ebx, ebx ; ebx = bus# 0 .. 255
|
||||
|
||||
sb_bus_loop:
|
||||
xor ecx, ecx ; ecx = devfn# 0 .. 254 ( not 255? )
|
||||
xor ecx, ecx ; ecx = devfn# 0 .. 254 ( not 255? )
|
||||
|
||||
sb_devf_loop:
|
||||
mov eax, ecx
|
||||
@ -259,7 +259,7 @@ sb_002:
|
||||
call pcibios_read_config_dword
|
||||
mov [vendor_device], eax
|
||||
cmp eax, 0xffffffff
|
||||
je sb_empty
|
||||
je sb_empty
|
||||
cmp eax, 0
|
||||
jne sb_check_vendor
|
||||
|
||||
@ -273,9 +273,9 @@ sb_check_vendor:
|
||||
|
||||
sb_check:
|
||||
cmp [esi], dword 0
|
||||
je sb_inc_devf ; Quit if at last entry
|
||||
je sb_inc_devf ; Quit if at last entry
|
||||
cmp eax, [esi]
|
||||
je sb_got_card
|
||||
je sb_got_card
|
||||
add esi, PCICARDS_ENTRY_SIZE
|
||||
jmp sb_check
|
||||
|
||||
@ -295,6 +295,8 @@ sb_got_card:
|
||||
mov [drvr_poll], eax
|
||||
mov eax, [esi+16]
|
||||
mov [drvr_transmit], eax
|
||||
mov eax, [esi+20]
|
||||
mov [drvr_cable], eax
|
||||
pop eax
|
||||
|
||||
mov edx, PCI_BASE_ADDRESS_0
|
||||
@ -304,11 +306,11 @@ sb_reg_check:
|
||||
mov [io_addr], eax
|
||||
and eax, PCI_BASE_ADDRESS_IO_MASK
|
||||
cmp eax, 0
|
||||
je sb_inc_reg
|
||||
je sb_inc_reg
|
||||
mov eax, [io_addr]
|
||||
and eax, PCI_BASE_ADDRESS_SPACE_IO
|
||||
cmp eax, 0
|
||||
je sb_inc_reg
|
||||
je sb_inc_reg
|
||||
|
||||
mov eax, [io_addr]
|
||||
and eax, PCI_BASE_ADDRESS_IO_MASK
|
||||
@ -325,10 +327,10 @@ sb_inc_reg:
|
||||
sb_inc_devf:
|
||||
inc ecx
|
||||
cmp ecx, 255
|
||||
jb sb_devf_loop
|
||||
jb sb_devf_loop
|
||||
inc ebx
|
||||
cmp ebx, 256
|
||||
jb sb_bus_loop
|
||||
jb sb_bus_loop
|
||||
|
||||
; We get here if we didn't find our card
|
||||
; set io_addr to 0 as an indication
|
||||
|
||||
@ -33,34 +33,34 @@ StackCounters:
|
||||
dumped_rx_count: dd 0
|
||||
arp_tx_count: dd 0
|
||||
arp_rx_count: dd 0
|
||||
ip_rx_count: dd 0
|
||||
ip_tx_count: dd 0
|
||||
ip_rx_count: dd 0
|
||||
ip_tx_count: dd 0
|
||||
endg
|
||||
|
||||
; socket buffers
|
||||
SOCKETBUFFSIZE equ 4096 ; state + config + buffer.
|
||||
SOCKETHEADERSIZE equ 76 ; thus 4096 - SOCKETHEADERSIZE bytes data
|
||||
SOCKETBUFFSIZE equ 4096 ; state + config + buffer.
|
||||
SOCKETHEADERSIZE equ 76 ; thus 4096 - SOCKETHEADERSIZE bytes data
|
||||
|
||||
NUM_SOCKETS equ 16 ; Number of open sockets supported. Was 20
|
||||
NUM_SOCKETS equ 16 ; Number of open sockets supported. Was 20
|
||||
|
||||
; IPBUFF status values
|
||||
BUFF_EMPTY equ 0
|
||||
BUFF_RX_FULL equ 1
|
||||
BUFF_ALLOCATED equ 2
|
||||
BUFF_TX_FULL equ 3
|
||||
BUFF_EMPTY equ 0
|
||||
BUFF_RX_FULL equ 1
|
||||
BUFF_ALLOCATED equ 2
|
||||
BUFF_TX_FULL equ 3
|
||||
|
||||
NUM_IPBUFFERS equ 20 ; buffers allocated for TX/RX
|
||||
NUM_IPBUFFERS equ 20 ; buffers allocated for TX/RX
|
||||
|
||||
NUMQUEUES equ 4
|
||||
EMPTY_QUEUE equ 0
|
||||
IPIN_QUEUE equ 1
|
||||
IPOUT_QUEUE equ 2
|
||||
NET1OUT_QUEUE equ 3
|
||||
NUMQUEUES equ 4
|
||||
EMPTY_QUEUE equ 0
|
||||
IPIN_QUEUE equ 1
|
||||
IPOUT_QUEUE equ 2
|
||||
NET1OUT_QUEUE equ 3
|
||||
|
||||
NO_BUFFER equ 0xFFFF
|
||||
IPBUFFSIZE equ 1500 ; MTU of an ethernet packet
|
||||
NUMQUEUEENTRIES equ NUM_IPBUFFERS
|
||||
NUMRESENDENTRIES equ 18 ; Buffers for TCP resend packets
|
||||
NO_BUFFER equ 0xFFFF
|
||||
IPBUFFSIZE equ 1500 ; MTU of an ethernet packet
|
||||
NUMQUEUEENTRIES equ NUM_IPBUFFERS
|
||||
NUMRESENDENTRIES equ 18 ; Buffers for TCP resend packets
|
||||
|
||||
; These are the 0x40 function codes for application access to the stack
|
||||
STACK_DRIVER_STATUS equ 52
|
||||
@ -70,15 +70,15 @@ SOCKET_INTERFACE equ 53
|
||||
; 128KB allocated for the stack and network driver buffers and other
|
||||
; data requirements
|
||||
stack_data_start equ 0x700000
|
||||
eth_data_start equ 0x700000
|
||||
stack_data equ 0x704000
|
||||
stack_data_end equ 0x71ffff
|
||||
eth_data_start equ 0x700000
|
||||
stack_data equ 0x704000
|
||||
stack_data_end equ 0x71ffff
|
||||
|
||||
; 32 bit word
|
||||
stack_config equ stack_data
|
||||
stack_config equ stack_data
|
||||
|
||||
; 32 bit word - IP Address in network format
|
||||
stack_ip equ stack_data + 4
|
||||
stack_ip equ stack_data + 4
|
||||
|
||||
; 1 byte. 0 == inactive, 1 = active
|
||||
ethernet_active equ stack_data + 9
|
||||
@ -87,32 +87,32 @@ ethernet_active equ stack_data + 9
|
||||
; TODO :: empty memory area
|
||||
|
||||
; Address of selected socket
|
||||
sktAddr equ stack_data + 32
|
||||
sktAddr equ stack_data + 32
|
||||
; Parameter to checksum routine - data ptr
|
||||
checkAdd1 equ stack_data + 36
|
||||
checkAdd1 equ stack_data + 36
|
||||
; Parameter to checksum routine - 2nd data ptr
|
||||
checkAdd2 equ stack_data + 40
|
||||
checkAdd2 equ stack_data + 40
|
||||
; Parameter to checksum routine - data size
|
||||
checkSize1 equ stack_data + 44
|
||||
checkSize1 equ stack_data + 44
|
||||
; Parameter to checksum routine - 2nd data size
|
||||
checkSize2 equ stack_data + 46
|
||||
checkSize2 equ stack_data + 46
|
||||
; result of checksum routine
|
||||
checkResult equ stack_data + 48
|
||||
checkResult equ stack_data + 48
|
||||
|
||||
; holds the TCP/UDP pseudo header. SA|DA|0|prot|UDP len|
|
||||
pseudoHeader equ stack_data + 50
|
||||
pseudoHeader equ stack_data + 50
|
||||
|
||||
; receive and transmit IP buffer allocation
|
||||
sockets equ stack_data + 62
|
||||
Next_free2 equ sockets + (SOCKETBUFFSIZE * NUM_SOCKETS)
|
||||
sockets equ stack_data + 62
|
||||
Next_free2 equ sockets + (SOCKETBUFFSIZE * NUM_SOCKETS)
|
||||
; 1560 byte buffer for rx / tx ethernet packets
|
||||
Ether_buffer equ Next_free2
|
||||
Next_free3 equ Ether_buffer + 1518
|
||||
Ether_buffer equ Next_free2
|
||||
Next_free3 equ Ether_buffer + 1518
|
||||
last_1sTick equ Next_free3
|
||||
IPbuffs equ Next_free3 + 1
|
||||
queues equ IPbuffs + ( NUM_IPBUFFERS * IPBUFFSIZE )
|
||||
queueList equ queues + (2 * NUMQUEUES)
|
||||
last_1hsTick equ queueList + ( 2 * NUMQUEUEENTRIES )
|
||||
IPbuffs equ Next_free3 + 1
|
||||
queues equ IPbuffs + ( NUM_IPBUFFERS * IPBUFFSIZE )
|
||||
queueList equ queues + (2 * NUMQUEUES)
|
||||
last_1hsTick equ queueList + ( 2 * NUMQUEUEENTRIES )
|
||||
|
||||
;resendQ equ queueList + ( 2 * NUMQUEUEENTRIES )
|
||||
;resendBuffer equ resendQ + ( 4 * NUMRESENDENTRIES ) ; for TCP
|
||||
@ -120,22 +120,22 @@ last_1hsTick equ queueList + ( 2 * NUMQUEUEENTRIES )
|
||||
|
||||
|
||||
|
||||
resendQ equ 0x770000
|
||||
resendBuffer equ resendQ + ( 4 * NUMRESENDENTRIES ) ; for TCP
|
||||
resendQ equ 0x770000
|
||||
resendBuffer equ resendQ + ( 4 * NUMRESENDENTRIES ) ; for TCP
|
||||
|
||||
|
||||
; simple macro for memory set operation
|
||||
macro _memset_dw adr,value,amount
|
||||
{
|
||||
mov edi, adr
|
||||
mov ecx, amount
|
||||
mov edi, adr
|
||||
mov ecx, amount
|
||||
if value = 0
|
||||
xor eax, eax
|
||||
else
|
||||
mov eax, value
|
||||
end if
|
||||
cld
|
||||
rep stosd
|
||||
rep stosd
|
||||
}
|
||||
|
||||
|
||||
@ -196,7 +196,7 @@ stack_handler:
|
||||
; Test for 10ms tick, call tcp timer
|
||||
mov eax, [timer_ticks] ;[0xfdf0]
|
||||
cmp eax, [last_1hsTick]
|
||||
je sh_001
|
||||
je sh_001
|
||||
|
||||
mov [last_1hsTick], eax
|
||||
call tcp_tx_handler
|
||||
@ -206,9 +206,9 @@ sh_001:
|
||||
; Test for 1 second event, call 1s timer functions
|
||||
mov al, 0x0 ;second
|
||||
out 0x70, al
|
||||
in al, 0x71
|
||||
in al, 0x71
|
||||
cmp al, [last_1sTick]
|
||||
je sh_exit
|
||||
je sh_exit
|
||||
|
||||
mov [last_1sTick], al
|
||||
|
||||
@ -235,7 +235,7 @@ proc checksum_jb stdcall uses ebx esi ecx,\
|
||||
mov esi, dword[buf_ptr]
|
||||
mov ecx, dword[buf_size]
|
||||
shr ecx, 1 ; ecx=ecx/2
|
||||
jnc @f ; if CF==0 then size is even number
|
||||
jnc @f ; if CF==0 then size is even number
|
||||
mov bh, byte[esi + ecx*2]
|
||||
@@:
|
||||
cld
|
||||
@ -270,11 +270,11 @@ endp
|
||||
checksum:
|
||||
pusha
|
||||
|
||||
xor edx, edx ; edx is the accumulative checksum
|
||||
xor edx, edx ; edx is the accumulative checksum
|
||||
xor ebx, ebx
|
||||
mov cx, [checkSize1]
|
||||
shr cx, 1
|
||||
jz cs1_1
|
||||
jz cs1_1
|
||||
|
||||
mov eax, [checkAdd1]
|
||||
|
||||
@ -289,7 +289,7 @@ cs1:
|
||||
|
||||
cs1_1:
|
||||
and word [checkSize1], 0x01
|
||||
jz cs_test2
|
||||
jz cs_test2
|
||||
|
||||
mov bh, [eax]
|
||||
xor bl, bl
|
||||
@ -299,10 +299,10 @@ cs1_1:
|
||||
cs_test2:
|
||||
mov cx, [checkSize2]
|
||||
cmp cx, 0
|
||||
jz cs_exit ; Finished if no 2nd buffer
|
||||
jz cs_exit ; Finished if no 2nd buffer
|
||||
|
||||
shr cx, 1
|
||||
jz cs2_1
|
||||
jz cs2_1
|
||||
|
||||
mov eax, [checkAdd2]
|
||||
|
||||
@ -317,7 +317,7 @@ cs2:
|
||||
|
||||
cs2_1:
|
||||
and word [checkSize2], 0x01
|
||||
jz cs_exit
|
||||
jz cs_exit
|
||||
|
||||
mov bh, [eax]
|
||||
xor bl, bl
|
||||
@ -384,7 +384,7 @@ not1:
|
||||
and bl, 0x7f
|
||||
cmp bl, 3
|
||||
|
||||
je ash_eth_enable
|
||||
je ash_eth_enable
|
||||
; Ethernet isn't enabled, so make sure that the card is disabled
|
||||
mov [ethernet_active], byte 0
|
||||
|
||||
@ -395,7 +395,7 @@ ash_eth_enable:
|
||||
; if found
|
||||
call eth_probe
|
||||
cmp eax, 0
|
||||
je ash_eth_done ; Abort if no hardware found
|
||||
je ash_eth_done ; Abort if no hardware found
|
||||
|
||||
mov [ethernet_active], byte 1
|
||||
|
||||
@ -524,8 +524,8 @@ not15: ; ARP stuff
|
||||
cmp ebx, 1
|
||||
je a_ann ; arp announce
|
||||
|
||||
; cmp ebx,2
|
||||
; jne a_resp ; arp response
|
||||
; cmp ebx,2
|
||||
; jne a_resp ; arp response
|
||||
|
||||
jmp param15_error
|
||||
|
||||
@ -542,7 +542,7 @@ a_probe:
|
||||
call arp_request
|
||||
|
||||
pop dword [stack_ip]
|
||||
jmp @f
|
||||
jmp @f
|
||||
|
||||
; arp announce, sender IP must be set to target IP
|
||||
; ecx: pointer to target MAC
|
||||
@ -658,6 +658,21 @@ nots8:
|
||||
ret
|
||||
|
||||
nots9:
|
||||
cmp eax, 10
|
||||
jnz nots10
|
||||
|
||||
mov eax,dword[drvr_cable]
|
||||
test eax,eax
|
||||
jnz @f ; if function is not implented, return -1
|
||||
mov al,-1
|
||||
ret
|
||||
|
||||
@@:
|
||||
call dword[drvr_cable]
|
||||
ret
|
||||
|
||||
|
||||
nots10:
|
||||
cmp eax, 254
|
||||
jnz notdump
|
||||
|
||||
@ -892,9 +907,9 @@ stack_get_packet:
|
||||
mov eax, NET1OUT_QUEUE
|
||||
call dequeue
|
||||
cmp ax, NO_BUFFER
|
||||
je sgp_non_exit ; Exit if no buffer available
|
||||
je sgp_non_exit ; Exit if no buffer available
|
||||
|
||||
push eax ; Save buffer number for freeing at end
|
||||
push eax ; Save buffer number for freeing at end
|
||||
|
||||
push edx
|
||||
; convert buffer pointer eax to the absolute address
|
||||
@ -903,7 +918,7 @@ stack_get_packet:
|
||||
add eax, IPbuffs
|
||||
pop edx
|
||||
|
||||
push eax ; save address of IP data
|
||||
push eax ; save address of IP data
|
||||
|
||||
; Get the address of the callers data
|
||||
mov edi,[0x3010]
|
||||
@ -913,10 +928,10 @@ stack_get_packet:
|
||||
|
||||
pop eax
|
||||
|
||||
mov ecx, 1500 ; should get the actual number of bytes to write
|
||||
mov ecx, 1500 ; should get the actual number of bytes to write
|
||||
mov esi, eax
|
||||
cld
|
||||
rep movsb ; copy the data across
|
||||
rep movsb ; copy the data across
|
||||
|
||||
; And finally, return the buffer to the free queue
|
||||
pop eax
|
||||
@ -947,7 +962,7 @@ stack_insert_packet:
|
||||
mov eax, EMPTY_QUEUE
|
||||
call dequeue
|
||||
cmp ax, NO_BUFFER
|
||||
je sip_err_exit
|
||||
je sip_err_exit
|
||||
|
||||
push eax
|
||||
|
||||
@ -964,9 +979,9 @@ stack_insert_packet:
|
||||
|
||||
; So, edx holds the IPbuffer ptr
|
||||
|
||||
pop ecx ; count of bytes to send
|
||||
mov ebx, ecx ; need the length later
|
||||
pop eax ; get callers ptr to data to send
|
||||
pop ecx ; count of bytes to send
|
||||
mov ebx, ecx ; need the length later
|
||||
pop eax ; get callers ptr to data to send
|
||||
|
||||
; Get the address of the callers data
|
||||
mov edi,[0x3010]
|
||||
@ -976,7 +991,7 @@ stack_insert_packet:
|
||||
|
||||
mov edi, edx
|
||||
cld
|
||||
rep movsb ; copy the data across
|
||||
rep movsb ; copy the data across
|
||||
|
||||
pop ebx
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user