65 lines
1.3 KiB
C
Executable File
65 lines
1.3 KiB
C
Executable File
#ifndef _PXA255_IC_H_
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#define _PXA255_IC_H_
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#include "mem.h"
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#include "CPU.h"
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#include <stdio.h>
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/*
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PXA255 interrupt controller
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PURRPOSE: raises IRQ, FIQ as needed
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*/
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#define PXA255_IC_BASE 0x40D00000UL
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#define PXA255_IC_SIZE 0x00010000UL
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#define PXA255_I_RTC_ALM 31
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#define PXA255_I_RTC_HZ 30
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#define PXA255_I_TIMR3 29
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#define PXA255_I_TIMR2 28
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#define PXA255_I_TIMR1 27
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#define PXA255_I_TIMR0 26
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#define PXA255_I_DMA 25
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#define PXA255_I_SSP 24
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#define PXA255_I_MMC 23
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#define PXA255_I_FFUART 22
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#define PXA255_I_BTUART 21
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#define PXA255_I_STUART 20
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#define PXA255_I_ICP 19
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#define PXA255_I_I2C 18
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#define PXA255_I_LCD 17
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#define PXA255_I_NET_SSP 16
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#define PXA255_I_AC97 14
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#define PXA255_I_I2S 13
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#define PXA255_I_PMU 12
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#define PXA255_I_USB 11
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#define PXA255_I_GPIO_all 10
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#define PXA255_I_GPIO_1 9
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#define PXA255_I_GPIO_0 8
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#define PXA255_I_HWUART 7
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typedef struct{
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ArmCpu* cpu;
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UInt32 ICMR; //Mask Register
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UInt32 ICLR; //Level Register
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UInt32 ICCR; //Control Register
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UInt32 ICPR; //Pending register
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Boolean wasIrq, wasFiq;
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}Pxa255ic;
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Boolean pxa255icInit(Pxa255ic* ic, ArmCpu* cpu, ArmMem* physMem);
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void pxa255icInt(Pxa255ic* ic, UInt8 intNum, Boolean raise); //interrupt caused by emulated hardware/ interrupt handled by guest
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#endif
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