2ff588abea
git-svn-id: svn://kolibrios.org@405 a494cfbc-eb01-0410-851d-a64ba20cac60
569 lines
11 KiB
NASM
569 lines
11 KiB
NASM
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;OS_BASE equ 0x80000000
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;new_app_base equ 0x60400000
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;PROC_BASE equ OS_BASE+0x0080000
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struc IOCTL
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{ .handle dd ?
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.io_code dd ?
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.input dd ?
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.inp_size dd ?
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.output dd ?
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.out_size dd ?
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}
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;public START
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;public service_proc
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;public version
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DEBUG equ 1
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DRV_ENTRY equ 1
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DRV_EXIT equ -1
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LCR_5BIT equ 0x00
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LCR_6BIT equ 0x01
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LCR_7BIT equ 0x02
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LCR_8BIT equ 0x03
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LCR_STOP_1 equ 0x00
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LCR_STOP_2 equ 0x04
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LCR_PARITY equ 0x08
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LCR_EVEN equ 0x10
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LCR_STICK equ 0x20
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LCR_BREAK equ 0x40
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LCR_DLAB equ 0x80
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LSR_DR equ 0x01 ;data ready
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LSR_OE equ 0x02 ;overrun error
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LSR_PE equ 0x04 ;parity error
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LSR_FE equ 0x08 ;framing error
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LSR_BI equ 0x10 ;break interrupt
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LSR_THRE equ 0x20 ;transmitter holding empty
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LSR_TEMT equ 0x40 ;transmitter empty
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LSR_FER equ 0x80 ;FIFO error
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FCR_EFIFO equ 0x01 ;enable FIFO
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FCR_CRB equ 0x02 ;clear reciever FIFO
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FCR_CXMIT equ 0x04 ;clear transmitter FIFO
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FCR_RDY equ 0x08 ;set RXRDY and TXRDY pins
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FCR_FIFO_1 equ 0x00 ;1 byte trigger
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FCR_FIFO_4 equ 0x40 ;4 bytes trigger
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FCR_FIFO_8 equ 0x80 ;8 bytes trigger
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FCR_FIFO_14 equ 0xC0 ;14 bytes trigger
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IIR_INTR equ 0x01 ;1= no interrupts
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IER_RDAI equ 0x01 ;reciever data interrupt
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IER_THRI equ 0x02 ;transmitter empty interrupt
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IER_LSI equ 0x04 ;line status interrupt
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IER_MSI equ 0x08 ;modem status interrupt
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MCR_DTR equ 0x01 ;0-> DTR=1, 1-> DTR=0
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MCR_RTS equ 0x02 ;0-> RTS=1, 1-> RTS=0
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MCR_OUT_1 equ 0x04 ;0-> OUT1=1, 1-> OUT1=0
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MCR_OUT_2 equ 0x08 ;0-> OUT2=1, 1-> OUT2=0
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MCR_LOOP equ 0x10 ;lopback mode
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MSR_DCTS equ 0x01 ;delta clear to send
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MSR_DDSR equ 0x02 ;delta data set redy
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MSR_TERI equ 0x04 ;trailinh edge of ring
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MSR_DDCD equ 0x08 ;delta carrier detect
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COM_THR equ 0x3f8 ;transtitter/reciever
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COM_IER equ 0x3f9 ;interrupt enable
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COM_IIR equ 0x3fA ;interrupt info
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COM_LCR equ 0x3FB ;line control
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COM_MCR equ 0x3FC ;modem control
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COM_LSR equ 0x3FD ;line status
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COM_MSR equ 0x3FE ;modem status
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RATE_50 equ 0
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RATE_75 equ 1
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RATE_110 equ 2
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RATE_134 equ 3
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RATE_150 equ 4
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RATE_300 equ 5
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RATE_600 equ 6
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RATE_1200 equ 7
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RATE_1800 equ 8
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RATE_2000 equ 9
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RATE_2400 equ 10
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RATE_3600 equ 11
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RATE_4800 equ 12
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RATE_7200 equ 13
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RATE_9600 equ 14
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RATE_19200 equ 15
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RATE_38400 equ 16
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RATE_57600 equ 17
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RATE_115200 equ 18
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COM_1 equ 0
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COM_2 equ 1
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COM_3 equ 2
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COM_4 equ 3
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COM_1_IRQ equ 4
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COM_2_IRQ equ 3
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TRANSMIT equ 1
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struc COMPORT
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{
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.base dd ?
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.lcr_reg dd ?
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.mcr_reg dd ?
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.rate dd ?
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.mode dd ?
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.state dd ?
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.connection dd ?
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.rcvr_rp dd ?
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.rcvr_wp dd ?
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.rcvr_free dd ?
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.rcvr_count dd ?
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.xmit_rp dd ?
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.xmit_wp dd ?
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.xmit_free dd ?
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.xmit_count dd ?
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.xmit_buffer rb 128
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.rcvr_buffer rb 128
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}
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virtual at 0
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COMPORT COMPORT
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end virtual
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COMPORT_SIZE equ 256+15*4
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UART_VERSION equ 0x00000000
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init_com:
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mov eax, COMPORT_SIZE
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call malloc
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test eax, eax
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jz .fail
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mov [com1], eax
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mov edi, eax
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mov ecx, COMPORT_SIZE/4
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xor eax, eax
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cld
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rep stosd
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call reset
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stdcall attach_int_handler, COM_1_IRQ, com_isr
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stdcall reg_service, sz_uart_srv, uart_proc
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ret
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.fail:
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xor eax, eax
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ret
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handle equ IOCTL.handle
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io_code equ IOCTL.io_code
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input equ IOCTL.input
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inp_size equ IOCTL.inp_size
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output equ IOCTL.output
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out_size equ IOCTL.out_size
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SRV_GETVERSION equ 0
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PORT_OPEN equ 1
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PORT_CLOSE equ 2
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PORT_RESET equ 3
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PORT_SETMODE equ 4
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PORT_GETMODE equ 5
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PORT_SETMCR equ 6
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PORT_GETMCR equ 7
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PORT_READ equ 8
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PORT_WRITE equ 9
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align 4
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proc uart_proc stdcall, ioctl:dword
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mov ebx, [ioctl]
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mov eax, [ebx+io_code]
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cmp eax, PORT_WRITE
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ja .fail
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cmp eax, SRV_GETVERSION
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jne @F
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mov eax, [ebx+output]
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mov eax, [eax]
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mov [eax], dword UART_VERSION
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xor eax, eax
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ret
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@@:
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cmp eax, PORT_OPEN
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jne @F
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call open_port
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ret
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mov esi, [ebx+input]
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mov ecx, [esi]
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mov edx, [com1]
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cmp [edx+COMPORT.connection], ecx
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je @F
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mov edx, [com2]
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cmp [edx+COMPORT.connection], ecx
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jne .fail
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mov edi, [ebx+output]
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call [uart_func+eax*4] ;edx, esi, edi
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ret
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.fail:
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or eax, -1
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ret
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endp
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restore handle
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restore io_code
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restore input
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restore inp_size
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restore output
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restore out_size
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open_port:
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ret
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; param
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; edx= port
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; esi= input data
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; edi= output data
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;
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; retval
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; eax=0 success
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; eax <>0 error
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align 4
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close_port:
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call reset
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mov [edx+COMPORT.connection], 0
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xor eax, eax
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ret
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; set mode 2400 bod 8-bit
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; clear FIFO
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; clear pending interrupts
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align 4
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reset:
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mov eax, RATE_2400
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mov ebx, LCR_8BIT+LCR_STOP_1
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call set_mode
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mov eax,FCR_EFIFO+FCR_CRB+FCR_CXMIT+FCR_FIFO_14
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mov edx, COM_IIR
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out dx, al
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.clear_RB:
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mov edx, COM_LSR
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in al, dx
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test eax, LSR_DR
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jz @F
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mov edx, COM_THR
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in al, dx
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jmp .clear_RB
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@@:
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mov eax,IER_RDAI+IER_THRI+IER_LSI
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mov edx, COM_IER
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out dx, al
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.clear_IIR:
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mov edx, COM_IIR
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in al, dx
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test al, IIR_INTR
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jnz .done
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shr eax, 1
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and eax, 3
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jnz @F
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mov edx, COM_MSR
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in al, dx
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jmp .clear_IIR
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@@:
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cmp eax, 1
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je .clear_IIR
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cmp eax, 2
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jne @F
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mov edx, COM_THR
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in al, dx
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jmp .clear_IIR
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@@:
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mov edx, COM_LSR
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in al, dx
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jmp .clear_IIR
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.done:
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mov edi, rcvr_buff
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xor eax, eax
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mov ecx, 256/4
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mov [rcvr_rp], edi
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mov [rcvr_wp], edi
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mov [rcvr_free], 128
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;; mov [rcvr_count], 16
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mov [xmit_rp], xmit_buff
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mov [xmit_wp], xmit_buff
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mov [xmit_free], 128
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mov [xmit_count], 16 ;FIFO free
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cld
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rep stosd
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ret
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; param
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; eax= rate constant
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; ebx= mode bits
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align 4
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set_mode:
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cmp eax, RATE_115200
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ja .fail
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cmp ebx, LCR_BREAK
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jae .fail
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mov [rate], eax
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mov [mode], ebx
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mov cx, [divisor+eax*2]
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mov dx, COM_LCR
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in al, dx
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or al, 0x80
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out dx, al
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mov dx, COM_THR
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mov al, cl
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out dx, al
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inc dx
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mov al, ch
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out dx, al
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mov dx, COM_LCR
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mov eax, ebx
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out dx, al
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.fail:
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ret
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; param
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; eax= rate constant
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align 4
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set_rate:
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cmp eax, RATE_115200
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ja .fail
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mov [rate], eax
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mov bx, [divisor+eax*2]
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mov dx, COM_LCR
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in al, dx
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or al, 0x80
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out dx, al
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mov dx, COM_THR
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mov al, bl
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out dx, al
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inc dx
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mov al, bh
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out dx, al
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mov dx, COM_LCR
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mov eax, [lcr_reg]
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out dx, al
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.fail:
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ret
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align 4
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transmit:
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push esi
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mov edx, COM_THR
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mov [xmit_count], 16
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pushfd
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cli
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mov esi, [xmit_rp]
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mov ecx, [xmit_free]
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cmp ecx, 128
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je .exit
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@@:
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and esi, 127
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mov al, [xmit_buff+esi]
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inc esi
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out dx, al
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inc ecx
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dec [xmit_count]
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jz .done
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cmp ecx, 128
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jne @B
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.done:
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add esi, xmit_buff
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mov [xmit_rp], esi
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mov [xmit_free], ecx
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mov [com_state], TRANSMIT
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.exit:
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popfd
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pop esi
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ret
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; eax= src
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; ebx= count
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align 4
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comm_send:
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mov edi, [xmit_wp]
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mov esi, eax
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.write:
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test ebx, ebx
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jz .done
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.wait:
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cmp [xmit_free], 0
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jne .fill
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cmp [com_state], TRANSMIT
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je .wait
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call transmit
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jmp .write
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.fill:
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mov ecx, xmit_buff+128
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sub ecx, edi
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cmp ecx, [xmit_free]
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jb @F
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mov ecx, [xmit_free]
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@@:
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cmp ecx, ebx
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jb @F
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mov ecx, ebx
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@@:
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sub [xmit_free], ecx
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sub ebx, ecx
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cld
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rep movsb
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cmp edi, xmit_buff+128
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jb .write
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sub edi, 128
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jmp .write
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.done:
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cmp [com_state], TRANSMIT
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je @F
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call transmit
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@@:
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ret
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align 4
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com_isr:
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.get_info:
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mov dx, COM_IIR
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in al, dx
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test al, IIR_INTR
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jnz .done
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shr eax, 1
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and eax, 3
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call [isr_action+eax*4]
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jmp .get_info
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.done:
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ret
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align 4
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isr_line:
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mov edx, COM_LSR
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in al, dx
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ret
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align 4
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isr_recieve:
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mov edx, COM_THR
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in al, dx
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ret
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align 4
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isr_modem:
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mov edx, COM_MSR
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in al, dx
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ret
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align 4
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uart_func dd 0 ;get version
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dd 0 ;open port
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dd close_port
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isr_action dd isr_modem
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dd transmit
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dd isr_recieve
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dd isr_line
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divisor dw 2304, 1536, 1047, 857, 768, 384
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dw 192, 96, 64, 58, 48, 32
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dw 24, 16, 12, 6, 3, 2, 1
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sz_uart_srv db 'UART',0
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;version dd 0x00040000
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align 4
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com1 dd ?
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com2 dd ?
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rcvr_rp dd ?
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rcvr_wp dd ?
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rcvr_free dd ?
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rcvr_count dd ?
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xmit_rp dd ?
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xmit_wp dd ?
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xmit_free dd ?
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xmit_count dd ?
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lcr_reg dd ?
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mcr_reg dd ?
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rate dd ?
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mode dd ?
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com_state dd ?
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connection dd ?
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align 128
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rcvr_buff rb 128
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xmit_buff rb 128
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