506 lines
14 KiB
C++
506 lines
14 KiB
C++
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// This file is part of the Cyclone 68000 Emulator
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// Copyright (c) 2004,2011 FinalDave (emudave (at) gmail.com)
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// Copyright (c) 2005-2011 Gražvydas "notaz" Ignotas (notasas (at) gmail.com)
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// This code is licensed under the GNU General Public License version 2.0 and the MAME License.
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// You can choose the license that has the most advantages for you.
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// SVN repository can be found at http://code.google.com/p/cyclone68000/
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#include "app.h"
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int earead_check_addrerr = 1, eawrite_check_addrerr = 0;
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// some ops use non-standard cycle counts for EAs, so are listed here.
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// all constants borrowed from the MUSASHI core by Karl Stenerud.
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/* Extra cycles for JMP instruction (000, 010) */
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int g_jmp_cycle_table[8] =
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{
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4, /* EA_MODE_AI */
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6, /* EA_MODE_DI */
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10, /* EA_MODE_IX */
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6, /* EA_MODE_AW */
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8, /* EA_MODE_AL */
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6, /* EA_MODE_PCDI */
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10, /* EA_MODE_PCIX */
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0, /* EA_MODE_I */
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};
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/* Extra cycles for JSR instruction (000, 010) */
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int g_jsr_cycle_table[8] =
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{
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4, /* EA_MODE_AI */
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6, /* EA_MODE_DI */
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10, /* EA_MODE_IX */
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6, /* EA_MODE_AW */
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8, /* EA_MODE_AL */
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6, /* EA_MODE_PCDI */
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10, /* EA_MODE_PCIX */
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0, /* EA_MODE_I */
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};
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/* Extra cycles for LEA instruction (000, 010) */
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int g_lea_cycle_table[8] =
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{
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4, /* EA_MODE_AI */
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8, /* EA_MODE_DI */
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12, /* EA_MODE_IX */
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8, /* EA_MODE_AW */
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12, /* EA_MODE_AL */
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8, /* EA_MODE_PCDI */
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12, /* EA_MODE_PCIX */
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0, /* EA_MODE_I */
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};
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/* Extra cycles for PEA instruction (000, 010) */
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int g_pea_cycle_table[8] =
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{
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6, /* EA_MODE_AI */
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10, /* EA_MODE_DI */
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14, /* EA_MODE_IX */
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10, /* EA_MODE_AW */
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14, /* EA_MODE_AL */
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10, /* EA_MODE_PCDI */
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14, /* EA_MODE_PCIX */
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0, /* EA_MODE_I */
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};
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/* Extra cycles for MOVEM instruction (000, 010) */
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int g_movem_cycle_table[8] =
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{
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0, /* EA_MODE_AI */
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4, /* EA_MODE_DI */
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6, /* EA_MODE_IX */
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4, /* EA_MODE_AW */
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8, /* EA_MODE_AL */
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0, /* EA_MODE_PCDI */
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0, /* EA_MODE_PCIX */
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0, /* EA_MODE_I */
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};
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// add nonstandard EA
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int Ea_add_ns(int *tab, int ea)
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{
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if(ea<0x10) return 0;
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if((ea&0x38)==0x10) return tab[0]; // (An) (ai)
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if(ea<0x28) return 0;
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if(ea<0x30) return tab[1]; // ($nn,An) (di)
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if(ea<0x38) return tab[2]; // ($nn,An,Rn) (ix)
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if(ea==0x38) return tab[3]; // (aw)
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if(ea==0x39) return tab[4]; // (al)
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if(ea==0x3a) return tab[5]; // ($nn,PC) (pcdi)
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if(ea==0x3b) return tab[6]; // ($nn,pc,Rn) (pcix)
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if(ea==0x3c) return tab[7]; // #$nnnn (i)
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return 0;
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}
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// ---------------------------------------------------------------------------
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// Gets the offset of a register for an ea, and puts it in 'r'
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// Shifted left by 'shift'
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// Doesn't trash anything
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static int EaCalcReg(int r,int ea,int mask,int forceor,int shift,int noshift=0)
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{
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int i=0,low=0,needor=0;
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int lsl=0;
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for (i=mask|0x8000; (i&1)==0; i>>=1) low++; // Find out how high up the EA mask is
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mask&=0xf<<low; // This is the max we can do
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if (ea>=8)
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{
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needor=1; // Need to OR to access A0-7
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if ((g_op>>low)&8) { needor=0; mask|=8<<low; } // Ah - no we don't actually need to or, since the bit is high in r8
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if (forceor) needor=1; // Special case for 0x30-0x38 EAs ;)
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}
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ot(" and r%d,r8,#0x%.4x\n",r,mask);
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if (needor) ot(" orr r%d,r%d,#0x%x ;@ A0-7\n",r,r,8<<low);
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// Find out amount to shift left:
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lsl=shift-low;
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if (lsl&&!noshift)
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{
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ot(" mov r%d,r%d,",r,r);
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if (lsl>0) ot("lsl #%d\n", lsl);
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else ot("lsr #%d\n",-lsl);
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}
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return 0;
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}
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// EaCalc - ARM Register 'a' = Effective Address
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// If ea>=0x10, trashes r0,r2 and r3, else nothing
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// size values 0, 1, 2 ~ byte, word, long
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// mask shows usable bits in r8
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int EaCalc(int a,int mask,int ea,int size,int top,int sign_extend)
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{
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char text[32]="";
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int func=0;
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DisaPc=2; DisaGetEa(text,ea,size); // Get text version of the effective address
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func=0x68+(size<<2); // Get correct read handler
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(void)func;
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if (ea<0x10)
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{
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int noshift=0;
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if (size>=2||(size==0&&(top||!sign_extend))) noshift=1; // Saves one opcode
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ot(";@ EaCalc : Get register index into r%d:\n",a);
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EaCalcReg(a,ea,mask,0,2,noshift);
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return 0;
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}
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ot(";@ EaCalc : Get '%s' into r%d:\n",text,a);
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// (An), (An)+, -(An)
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if (ea<0x28)
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{
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int step=1<<size, strr=a;
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int low=0,lsl=0,i;
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if ((ea&7)==7 && step<2) step=2; // move.b (a7)+ or -(a7) steps by 2 not 1
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if (ea==0x1f||ea==0x27) // A7 handlers are always separate
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{
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ot(" ldr r%d,[r7,#0x3c] ;@ A7\n",a);
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}
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else
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{
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EaCalcReg(2,ea,mask,0,0,1);
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if(mask)
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for (i=mask|0x8000; (i&1)==0; i>>=1) low++; // Find out how high up the EA mask is
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lsl=2-low; // Having a lsl #x here saves one opcode
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if (lsl>=0) ot(" ldr r%d,[r7,r2,lsl #%i]\n",a,lsl);
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else if (lsl<0) ot(" ldr r%d,[r7,r2,lsr #%i]\n",a,-lsl);
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}
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if ((ea&0x38)==0x18) // (An)+
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{
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ot(" add r3,r%d,#%d ;@ Post-increment An\n",a,step);
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strr=3;
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}
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if ((ea&0x38)==0x20) // -(An)
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ot(" sub r%d,r%d,#%d ;@ Pre-decrement An\n",a,a,step);
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if ((ea&0x38)==0x18||(ea&0x38)==0x20)
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{
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if (ea==0x1f||ea==0x27)
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{
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ot(" str r%d,[r7,#0x3c] ;@ A7\n",strr);
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}
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else
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{
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if (lsl>=0) ot(" str r%d,[r7,r2,lsl #%i]\n",strr,lsl);
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else if (lsl<0) ot(" str r%d,[r7,r2,lsr #%i]\n",strr,-lsl);
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}
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}
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if ((ea&0x38)==0x20) Cycles+=size<2 ? 6:10; // -(An) Extra cycles
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else Cycles+=size<2 ? 4:8; // (An),(An)+ Extra cycles
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return 0;
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}
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if (ea<0x30) // ($nn,An) (di)
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{
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ot(" ldrsh r0,[r4],#2 ;@ Fetch offset\n"); pc_dirty=1;
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EaCalcReg(2,8,mask,0,0);
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ot(" ldr r2,[r7,r2,lsl #2]\n");
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ot(" add r%d,r0,r2 ;@ Add on offset\n",a);
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Cycles+=size<2 ? 8:12; // Extra cycles
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return 0;
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}
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if (ea<0x38) // ($nn,An,Rn) (ix)
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{
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ot(";@ Get extension word into r3:\n");
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ot(" ldrh r3,[r4],#2 ;@ ($Disp,PC,Rn)\n"); pc_dirty=1;
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ot(" mov r2,r3,lsr #10\n");
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ot(" tst r3,#0x0800 ;@ Is Rn Word or Long\n");
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ot(" and r2,r2,#0x3c ;@ r2=Index of Rn\n");
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ot(" ldreqsh r2,[r7,r2] ;@ r2=Rn.w\n");
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ot(" ldrne r2,[r7,r2] ;@ r2=Rn.l\n");
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ot(" mov r0,r3,asl #24 ;@ r0=Get 8-bit signed Disp\n");
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ot(" add r3,r2,r0,asr #24 ;@ r3=Disp+Rn\n");
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EaCalcReg(2,8,mask,1,0);
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ot(" ldr r2,[r7,r2,lsl #2]\n");
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ot(" add r%d,r2,r3 ;@ r%d=Disp+An+Rn\n",a,a);
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Cycles+=size<2 ? 10:14; // Extra cycles
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return 0;
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}
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if (ea==0x38) // (aw)
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{
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ot(" ldrsh r%d,[r4],#2 ;@ Fetch Absolute Short address\n",a); pc_dirty=1;
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Cycles+=size<2 ? 8:12; // Extra cycles
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return 0;
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}
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if (ea==0x39) // (al)
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{
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ot(" ldrh r2,[r4],#2 ;@ Fetch Absolute Long address\n");
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ot(" ldrh r0,[r4],#2\n"); pc_dirty=1;
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ot(" orr r%d,r0,r2,lsl #16\n",a);
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Cycles+=size<2 ? 12:16; // Extra cycles
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return 0;
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}
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if (ea==0x3a) // ($nn,PC) (pcdi)
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{
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ot(" ldr r0,[r7,#0x60] ;@ Get Memory base\n");
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ot(" sub r0,r4,r0 ;@ Real PC\n");
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ot(" ldrsh r2,[r4],#2 ;@ Fetch extension\n"); pc_dirty=1;
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ot(" mov r0,r0,lsl #8\n");
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ot(" add r%d,r2,r0,asr #8 ;@ ($nn,PC)\n",a);
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Cycles+=size<2 ? 8:12; // Extra cycles
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return 0;
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}
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if (ea==0x3b) // ($nn,pc,Rn) (pcix)
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{
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ot(" ldr r0,[r7,#0x60] ;@ Get Memory base\n");
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ot(" ldrh r3,[r4] ;@ Get extension word\n");
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ot(" sub r0,r4,r0 ;@ r0=PC\n");
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ot(" add r4,r4,#2\n"); pc_dirty=1;
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ot(" mov r0,r0,asl #8 ;@ use only 24bits of PC\n");
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ot(" mov r2,r3,lsr #10\n");
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ot(" tst r3,#0x0800 ;@ Is Rn Word or Long\n");
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ot(" and r2,r2,#0x3c ;@ r2=Index of Rn\n");
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ot(" ldreqsh r2,[r7,r2] ;@ r2=Rn.w\n");
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ot(" ldrne r2,[r7,r2] ;@ r2=Rn.l\n");
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ot(" mov r3,r3,asl #24 ;@ r3=Get 8-bit signed Disp\n");
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ot(" add r2,r2,r3,asr #24 ;@ r2=Disp+Rn\n");
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ot(" add r%d,r2,r0,asr #8 ;@ r%d=Disp+PC+Rn\n",a,a);
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Cycles+=size<2 ? 10:14; // Extra cycles
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return 0;
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}
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if (ea==0x3c) // #$nnnn (i)
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{
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if (size<2)
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{
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ot(" ldr%s r%d,[r4],#2 ;@ Fetch immediate value\n",Sarm[size&3],a); pc_dirty=1;
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Cycles+=4; // Extra cycles
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return 0;
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}
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ot(" ldrh r2,[r4],#2 ;@ Fetch immediate value\n");
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ot(" ldrh r3,[r4],#2\n"); pc_dirty=1;
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ot(" orr r%d,r3,r2,lsl #16\n",a);
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Cycles+=8; // Extra cycles
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return 0;
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}
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return 1;
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}
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// ---------------------------------------------------------------------------
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// Read effective address in (ARM Register 'a') to ARM register 'v'
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// 'a' and 'v' can be anything but 0 is generally best (for both)
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// If (ea<0x10) nothing is trashed, else r0-r3 is trashed
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// If 'top' is given, the ARM register v shifted to the top, e.g. 0xc000 -> 0xc0000000
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// If top is 0 and sign_extend is not, then ARM register v is sign extended,
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// e.g. 0xc000 -> 0xffffc000 (else it may or may not be sign extended)
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int EaRead(int a,int v,int ea,int size,int mask,int top,int sign_extend)
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{
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char text[32]="";
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int shift=0;
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shift=32-(8<<size);
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DisaPc=2; DisaGetEa(text,ea,size); // Get text version of the effective address
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if (ea<0x10)
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{
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int lsl=0,low=0,nsarm=size&3,i;
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if (size>=2||(size==0&&(top||!sign_extend))) {
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if(mask)
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for (i=mask|0x8000; (i&1)==0; i>>=1) low++; // Find out how high up the EA mask is
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lsl=2-low; // Having a lsl #2 here saves one opcode
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}
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if (top||!sign_extend) nsarm=3;
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ot(";@ EaRead : Read register[r%d] into r%d:\n",a,v);
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if (lsl>0) ot(" ldr%s r%d,[r7,r%d,lsl #%i]\n",Narm[nsarm],v,a,lsl);
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else if (lsl<0) ot(" ldr%s r%d,[r7,r%d,lsr #%i]\n",Narm[nsarm],v,a,-lsl);
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else ot(" ldr%s r%d,[r7,r%d]\n",Sarm[nsarm],v,a);
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if (top&&shift) ot(" mov r%d,r%d,asl #%d\n",v,v,shift);
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ot("\n"); return 0;
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}
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ot(";@ EaRead : Read '%s' (address in r%d) into r%d:\n",text,a,v);
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if (ea==0x3c)
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{
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int asl=0;
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if (top) asl=shift;
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if (asl) ot(" mov r%d,r%d,asl #%d\n",v,a,asl);
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else if (v!=a) ot(" mov r%d,r%d\n",v,a);
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ot("\n"); return 0;
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}
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if (ea>=0x3a && ea<=0x3b) MemHandler(2,size,a,earead_check_addrerr); // Fetch
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else MemHandler(0,size,a,earead_check_addrerr); // Read
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// defaults to 1, as most things begins with a read
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earead_check_addrerr=1;
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if (sign_extend)
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{
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int d_reg=0;
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if (shift) {
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ot(" mov r%d,r%d,asl #%d\n",v,d_reg,shift);
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d_reg=v;
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}
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if (!top && shift) {
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ot(" mov r%d,r%d,asr #%d\n",v,d_reg,shift);
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d_reg=v;
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}
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if (d_reg != v)
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ot(" mov r%d,r%d\n",v,d_reg);
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}
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else
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{
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if (top && shift)
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ot(" mov r%d,r0,asl #%d\n",v,shift);
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else if (v!=0)
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ot(" mov r%d,r0\n",v);
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}
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ot("\n"); return 0;
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}
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// calculate EA and read
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// if (ea < 0x10) nothing is trashed
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// if (ea == 0x3c) r2 and r3 are trashed
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// else r0-r3 are trashed
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// size values 0, 1, 2 ~ byte, word, long
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// r_ea is reg to store ea in (-1 means ea is not needed), r is dst reg
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// if sign_extend is 0, non-32bit values will have MS bits undefined
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int EaCalcRead(int r_ea,int r,int ea,int size,int mask,int sign_extend)
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{
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if (ea<0x10)
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{
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if (r_ea==-1)
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{
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r_ea=r;
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if (!sign_extend) size=2;
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}
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}
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else if (ea==0x3c) // #imm
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{
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r_ea=r;
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}
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else
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{
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if (r_ea==-1) r_ea=0;
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}
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EaCalc (r_ea,mask,ea,size,0,sign_extend);
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EaRead (r_ea, r,ea,size,mask,0,sign_extend);
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return 0;
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}
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int EaCalcReadNoSE(int r_ea,int r,int ea,int size,int mask)
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{
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return EaCalcRead(r_ea,r,ea,size,mask,0);
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}
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// Return 1 if we can read this ea
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int EaCanRead(int ea,int size)
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{
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if (size<0)
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{
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// LEA:
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// These don't make sense?:
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if (ea< 0x10) return 0; // Register
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if (ea==0x3c) return 0; // Immediate
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if (ea>=0x18 && ea<0x28) return 0; // Pre/Post inc/dec An
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}
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if (ea<=0x3c) return 1;
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return 0;
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}
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// ---------------------------------------------------------------------------
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// Write effective address (ARM Register 'a') with ARM register 'v'
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// Trashes r0-r3,r12,lr; 'a' can be 0 or 2+, 'v' can be 1 or higher
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// If a==0 and v==1 it's faster though.
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int EaWrite(int a,int v,int ea,int size,int mask,int top,int sign_extend_ea)
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{
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char text[32]="";
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int shift=0;
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if(a == 1) { printf("Error! EaWrite a==1 !\n"); return 1; }
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if (top) shift=32-(8<<size);
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DisaPc=2; DisaGetEa(text,ea,size); // Get text version of the effective address
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if (ea<0x10)
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{
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int lsl=0,low=0,i;
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if (size>=2||(size==0&&(top||!sign_extend_ea))) {
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if(mask)
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for (i=mask|0x8000; (i&1)==0; i>>=1) low++; // Find out how high up the EA mask is
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lsl=2-low; // Having a lsl #x here saves one opcode
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}
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ot(";@ EaWrite: r%d into register[r%d]:\n",v,a);
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if (shift) ot(" mov r%d,r%d,asr #%d\n",v,v,shift);
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if (lsl>0) ot(" str%s r%d,[r7,r%d,lsl #%i]\n",Narm[size&3],v,a,lsl);
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else if (lsl<0) ot(" str%s r%d,[r7,r%d,lsr #%i]\n",Narm[size&3],v,a,-lsl);
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else ot(" str%s r%d,[r7,r%d]\n",Narm[size&3],v,a);
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ot("\n"); return 0;
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}
|
|
|
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ot(";@ EaWrite: Write r%d into '%s' (address in r%d):\n",v,text,a);
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|
|
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if (ea==0x3c) { ot("Error! Write EA=0x%x\n\n",ea); return 1; }
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|
|
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if (shift) ot(" mov r1,r%d,asr #%d\n",v,shift);
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else if (v!=1) ot(" mov r1,r%d\n",v);
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|
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MemHandler(1,size,a,eawrite_check_addrerr); // Call write handler
|
|
|
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// not check by default, because most cases are rmw and
|
|
// address was already checked before reading
|
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eawrite_check_addrerr = 0;
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|
|
|
ot("\n"); return 0;
|
|
}
|
|
|
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// Return 1 if we can write this ea
|
|
int EaCanWrite(int ea)
|
|
{
|
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if (ea<=0x39) return 1; // 3b?
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|
return 0;
|
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}
|
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// ---------------------------------------------------------------------------
|
|
|
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// Return 1 if EA is An reg
|
|
int EaAn(int ea)
|
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{
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if((ea&0x38)==8) return 1;
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return 0;
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|
}
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