293 lines
9.4 KiB
C
293 lines
9.4 KiB
C
/*
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* Copyright © 2008 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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* Authors:
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* Eric Anholt <eric@anholt.net>
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*
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*/
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/**
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* @file intel_bufmgr_priv.h
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*
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* Private definitions of Intel-specific bufmgr functions and structures.
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*/
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#ifndef INTEL_BUFMGR_PRIV_H
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#define INTEL_BUFMGR_PRIV_H
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/**
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* Context for a buffer manager instance.
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*
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* Contains public methods followed by private storage for the buffer manager.
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*/
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struct _drm_intel_bufmgr {
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/**
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* Allocate a buffer object.
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*
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* Buffer objects are not necessarily initially mapped into CPU virtual
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* address space or graphics device aperture. They must be mapped
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* using bo_map() or drm_intel_gem_bo_map_gtt() to be used by the CPU.
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*/
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drm_intel_bo *(*bo_alloc) (drm_intel_bufmgr *bufmgr, const char *name,
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unsigned long size, unsigned int alignment);
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/**
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* Allocate a buffer object, hinting that it will be used as a
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* render target.
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*
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* This is otherwise the same as bo_alloc.
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*/
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drm_intel_bo *(*bo_alloc_for_render) (drm_intel_bufmgr *bufmgr,
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const char *name,
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unsigned long size,
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unsigned int alignment);
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/**
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* Allocate a tiled buffer object.
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*
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* Alignment for tiled objects is set automatically; the 'flags'
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* argument provides a hint about how the object will be used initially.
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*
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* Valid tiling formats are:
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* I915_TILING_NONE
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* I915_TILING_X
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* I915_TILING_Y
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*
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* Note the tiling format may be rejected; callers should check the
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* 'tiling_mode' field on return, as well as the pitch value, which
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* may have been rounded up to accommodate for tiling restrictions.
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*/
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drm_intel_bo *(*bo_alloc_tiled) (drm_intel_bufmgr *bufmgr,
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const char *name,
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int x, int y, int cpp,
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uint32_t *tiling_mode,
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unsigned long *pitch,
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unsigned long flags);
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/** Takes a reference on a buffer object */
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void (*bo_reference) (drm_intel_bo *bo);
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/**
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* Releases a reference on a buffer object, freeing the data if
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* no references remain.
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*/
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void (*bo_unreference) (drm_intel_bo *bo);
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/**
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* Maps the buffer into userspace.
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*
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* This function will block waiting for any existing execution on the
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* buffer to complete, first. The resulting mapping is available at
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* buf->virtual.
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*/
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int (*bo_map) (drm_intel_bo *bo, int write_enable);
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/**
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* Reduces the refcount on the userspace mapping of the buffer
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* object.
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*/
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int (*bo_unmap) (drm_intel_bo *bo);
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/**
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* Write data into an object.
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*
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* This is an optional function, if missing,
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* drm_intel_bo will map/memcpy/unmap.
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*/
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int (*bo_subdata) (drm_intel_bo *bo, unsigned long offset,
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unsigned long size, const void *data);
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/**
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* Read data from an object
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*
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* This is an optional function, if missing,
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* drm_intel_bo will map/memcpy/unmap.
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*/
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// int (*bo_get_subdata) (drm_intel_bo *bo, unsigned long offset,
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// unsigned long size, void *data);
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/**
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* Waits for rendering to an object by the GPU to have completed.
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*
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* This is not required for any access to the BO by bo_map,
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* bo_subdata, etc. It is merely a way for the driver to implement
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* glFinish.
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*/
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void (*bo_wait_rendering) (drm_intel_bo *bo);
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/**
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* Tears down the buffer manager instance.
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*/
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void (*destroy) (drm_intel_bufmgr *bufmgr);
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/**
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* Add relocation entry in reloc_buf, which will be updated with the
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* target buffer's real offset on on command submission.
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*
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* Relocations remain in place for the lifetime of the buffer object.
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*
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* \param bo Buffer to write the relocation into.
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* \param offset Byte offset within reloc_bo of the pointer to
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* target_bo.
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* \param target_bo Buffer whose offset should be written into the
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* relocation entry.
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* \param target_offset Constant value to be added to target_bo's
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* offset in relocation entry.
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* \param read_domains GEM read domains which the buffer will be
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* read into by the command that this relocation
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* is part of.
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* \param write_domains GEM read domains which the buffer will be
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* dirtied in by the command that this
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* relocation is part of.
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*/
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int (*bo_emit_reloc) (drm_intel_bo *bo, uint32_t offset,
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drm_intel_bo *target_bo, uint32_t target_offset,
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uint32_t read_domains, uint32_t write_domain);
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int (*bo_emit_reloc_fence)(drm_intel_bo *bo, uint32_t offset,
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drm_intel_bo *target_bo,
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uint32_t target_offset,
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uint32_t read_domains,
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uint32_t write_domain);
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/** Executes the command buffer pointed to by bo. */
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int (*bo_exec) (drm_intel_bo *bo, int used,
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drm_clip_rect_t *cliprects, int num_cliprects,
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int DR4);
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/** Executes the command buffer pointed to by bo on the selected
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* ring buffer
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*/
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int (*bo_mrb_exec) (drm_intel_bo *bo, int used,
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drm_clip_rect_t *cliprects, int num_cliprects,
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int DR4, unsigned flags);
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/**
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* Pin a buffer to the aperture and fix the offset until unpinned
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*
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* \param buf Buffer to pin
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* \param alignment Required alignment for aperture, in bytes
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*/
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int (*bo_pin) (drm_intel_bo *bo, uint32_t alignment);
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/**
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* Unpin a buffer from the aperture, allowing it to be removed
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*
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* \param buf Buffer to unpin
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*/
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int (*bo_unpin) (drm_intel_bo *bo);
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/**
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* Ask that the buffer be placed in tiling mode
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*
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* \param buf Buffer to set tiling mode for
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* \param tiling_mode desired, and returned tiling mode
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*/
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int (*bo_set_tiling) (drm_intel_bo *bo, uint32_t * tiling_mode,
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uint32_t stride);
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/**
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* Get the current tiling (and resulting swizzling) mode for the bo.
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*
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* \param buf Buffer to get tiling mode for
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* \param tiling_mode returned tiling mode
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* \param swizzle_mode returned swizzling mode
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*/
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int (*bo_get_tiling) (drm_intel_bo *bo, uint32_t * tiling_mode,
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uint32_t * swizzle_mode);
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/**
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* Create a visible name for a buffer which can be used by other apps
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*
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* \param buf Buffer to create a name for
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* \param name Returned name
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*/
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int (*bo_flink) (drm_intel_bo *bo, uint32_t * name);
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/**
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* Returns 1 if mapping the buffer for write could cause the process
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* to block, due to the object being active in the GPU.
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*/
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int (*bo_busy) (drm_intel_bo *bo);
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/**
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* Specify the volatility of the buffer.
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* \param bo Buffer to create a name for
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* \param madv The purgeable status
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*
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* Use I915_MADV_DONTNEED to mark the buffer as purgeable, and it will be
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* reclaimed under memory pressure. If you subsequently require the buffer,
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* then you must pass I915_MADV_WILLNEED to mark the buffer as required.
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*
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* Returns 1 if the buffer was retained, or 0 if it was discarded whilst
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* marked as I915_MADV_DONTNEED.
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*/
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int (*bo_madvise) (drm_intel_bo *bo, int madv);
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int (*check_aperture_space) (drm_intel_bo ** bo_array, int count);
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/**
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* Disable buffer reuse for buffers which will be shared in some way,
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* as with scanout buffers. When the buffer reference count goes to
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* zero, it will be freed and not placed in the reuse list.
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*
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* \param bo Buffer to disable reuse for
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*/
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int (*bo_disable_reuse) (drm_intel_bo *bo);
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/**
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* Query whether a buffer is reusable.
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*
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* \param bo Buffer to query
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*/
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int (*bo_is_reusable) (drm_intel_bo *bo);
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/**
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*
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* Return the pipe associated with a crtc_id so that vblank
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* synchronization can use the correct data in the request.
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* This is only supported for KMS and gem at this point, when
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* unsupported, this function returns -1 and leaves the decision
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* of what to do in that case to the caller
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*
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* \param bufmgr the associated buffer manager
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* \param crtc_id the crtc identifier
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*/
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// int (*get_pipe_from_crtc_id) (drm_intel_bufmgr *bufmgr, int crtc_id);
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/** Returns true if target_bo is in the relocation tree rooted at bo. */
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int (*bo_references) (drm_intel_bo *bo, drm_intel_bo *target_bo);
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/**< Enables verbose debugging printouts */
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int debug;
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};
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struct _drm_intel_context {
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unsigned int ctx_id;
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struct _drm_intel_bufmgr *bufmgr;
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};
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#define ALIGN(value, alignment) ((value + alignment - 1) & ~(alignment - 1))
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#define ROUND_UP_TO(x, y) (((x) + (y) - 1) / (y) * (y))
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#define ROUND_UP_TO_MB(x) ROUND_UP_TO((x), 1024*1024)
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#endif /* INTEL_BUFMGR_PRIV_H */
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