123 lines
3.8 KiB
NASM
123 lines
3.8 KiB
NASM
;*****************************************************************************
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;*
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;* Open Watcom Project
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;*
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;* Portions Copyright (c) 1983-2002 Sybase, Inc. All Rights Reserved.
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;*
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;* ========================================================================
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;*
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;* This file contains Original Code and/or Modifications of Original
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;* Code as defined in and that are subject to the Sybase Open Watcom
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;* Public License version 1.0 (the 'License'). You may not use this file
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;* except in compliance with the License. BY USING THIS FILE YOU AGREE TO
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;* ALL TERMS AND CONDITIONS OF THE LICENSE. A copy of the License is
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;* provided with the Original Code and Modifications, and is also
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;* available at www.sybase.com/developer/opensource.
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;*
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;* The Original Code and all software distributed under the License are
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;* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
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;* EXPRESS OR IMPLIED, AND SYBASE AND ALL CONTRIBUTORS HEREBY DISCLAIM
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;* ALL SUCH WARRANTIES, INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF
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;* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR
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;* NON-INFRINGEMENT. Please see the License for the specific language
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;* governing rights and limitations under the License.
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;*
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;* ========================================================================
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;*
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;* Description: WHEN YOU FIGURE OUT WHAT THIS FILE DOES, PLEASE
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;* DESCRIBE IT HERE!
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;*
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;*****************************************************************************
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; static char sccs_id[] = "@(#)wrap32.asm 1.1 12/15/94 15:56:32";
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;
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; This code is being published by Intel to users of the Pentium(tm)
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; processor. Recipients are authorized to copy, modify, compile, use and
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; distribute the code.
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;
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; Intel makes no warranty of any kind with regard to this code, including
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; but not limited to, implied warranties or merchantability and fitness for
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; a particular purpose. Intel assumes no responsibility for any errors that
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; may appear in this code.
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;
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; No patent licenses are granted, express or implied.
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;
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;
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; The following code is a PRELIMINARY IMPLEMENTATION of a
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; software patch for the FPATAN instruction replacement.
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;
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;
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include mdef.inc
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.386
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.387
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DATA32 SEGMENT DWORD USE32 PUBLIC 'DATA'
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FPU_STATE STRUC
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CONTROL_WORD DW ?
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reserved_1 DW ?
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STATUS_WORD DW ?
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reserved_2 DW ?
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TAG_WORD DW ?
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reserved_3 DW ?
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IP_OFFSET DD ?
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CS_SLCT DW ?
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OPCODE DW ?
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DATA_OFFSET DD ?
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OPERAND_SLCT DW ?
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reserved_4 DW ?
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REGISTER_0 DT ?
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REGISTER_1 DT ?
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REGISTER_2 DT ?
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REGISTER_3 DT ?
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REGISTER_4 DT ?
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REGISTER_5 DT ?
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REGISTER_6 DT ?
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REGISTER_7 DT ?
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SAVE_REG_0 DT ?
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FPU_STATE ENDS
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ENV_SIZE EQU 118
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DATA32 ENDS
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DGROUP GROUP DATA32
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_TEXT SEGMENT DWORD USE32 PUBLIC 'CODE'
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assume cs:_TEXT, ds:DGROUP, es:DGROUP, ss:nothing
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public __fpatan_wrap
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;
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; PRELIMINARY VERSION for FPATAN instruction replacement
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;
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EXTRN __fpatan_chk:NEAR
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defpe __fpatan_wrap
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push eax
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sub esp, ENV_SIZE
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fstp tbyte ptr [esp].SAVE_REG_0
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fnsave [esp]
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fld tbyte ptr [esp].REGISTER_0
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fld tbyte ptr [esp].SAVE_REG_0
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call __fpatan_chk
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fstsw ax
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fstp tbyte ptr [esp].REGISTER_0
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and ax, 0ffh
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or ax, [esp].STATUS_WORD
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mov [esp].STATUS_WORD, ax
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frstor [esp]
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add esp, ENV_SIZE
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pop eax
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ret
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__fpatan_wrap ENDP
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_TEXT ENDS
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end
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