170 lines
4.8 KiB
C
170 lines
4.8 KiB
C
/*
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* Copyright 2008 Advanced Micro Devices, Inc.
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* Copyright 2008 Red Hat Inc.
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* Copyright 2009 Jerome Glisse.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Dave Airlie
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* Alex Deucher
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* Jerome Glisse
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*/
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#include "drmP.h"
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#include "radeon_reg.h"
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#include "radeon.h"
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/* r600,rv610,rv630,rv620,rv635,rv670 depends on : */
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void rs600_mc_disable_clients(struct radeon_device *rdev);
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/* This files gather functions specifics to:
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* r600,rv610,rv630,rv620,rv635,rv670
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*
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* Some of these functions might be used by newer ASICs.
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*/
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int r600_mc_wait_for_idle(struct radeon_device *rdev);
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void r600_gpu_init(struct radeon_device *rdev);
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/*
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* MC
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*/
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int r600_mc_init(struct radeon_device *rdev)
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{
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uint32_t tmp;
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r600_gpu_init(rdev);
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/* setup the gart before changing location so we can ask to
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* discard unmapped mc request
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*/
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/* FIXME: disable out of gart access */
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tmp = rdev->mc.gtt_location / 4096;
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tmp = REG_SET(R600_LOGICAL_PAGE_NUMBER, tmp);
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WREG32(R600_MC_VM_SYSTEM_APERTURE_LOW_ADDR, tmp);
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tmp = (rdev->mc.gtt_location + rdev->mc.gtt_size) / 4096;
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tmp = REG_SET(R600_LOGICAL_PAGE_NUMBER, tmp);
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WREG32(R600_MC_VM_SYSTEM_APERTURE_HIGH_ADDR, tmp);
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rs600_mc_disable_clients(rdev);
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if (r600_mc_wait_for_idle(rdev)) {
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printk(KERN_WARNING "Failed to wait MC idle while "
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"programming pipes. Bad things might happen.\n");
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}
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tmp = rdev->mc.vram_location + rdev->mc.vram_size - 1;
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tmp = REG_SET(R600_MC_FB_TOP, tmp >> 24);
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tmp |= REG_SET(R600_MC_FB_BASE, rdev->mc.vram_location >> 24);
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WREG32(R600_MC_VM_FB_LOCATION, tmp);
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tmp = rdev->mc.gtt_location + rdev->mc.gtt_size - 1;
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tmp = REG_SET(R600_MC_AGP_TOP, tmp >> 22);
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WREG32(R600_MC_VM_AGP_TOP, tmp);
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tmp = REG_SET(R600_MC_AGP_BOT, rdev->mc.gtt_location >> 22);
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WREG32(R600_MC_VM_AGP_BOT, tmp);
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return 0;
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}
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void r600_mc_fini(struct radeon_device *rdev)
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{
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/* FIXME: implement */
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}
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/*
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* Global GPU functions
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*/
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void r600_errata(struct radeon_device *rdev)
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{
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rdev->pll_errata = 0;
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}
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int r600_mc_wait_for_idle(struct radeon_device *rdev)
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{
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/* FIXME: implement */
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return 0;
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}
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void r600_gpu_init(struct radeon_device *rdev)
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{
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/* FIXME: implement */
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}
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/*
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* VRAM info
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*/
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void r600_vram_get_type(struct radeon_device *rdev)
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{
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uint32_t tmp;
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int chansize;
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rdev->mc.vram_width = 128;
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rdev->mc.vram_is_ddr = true;
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tmp = RREG32(R600_RAMCFG);
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if (tmp & R600_CHANSIZE_OVERRIDE) {
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chansize = 16;
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} else if (tmp & R600_CHANSIZE) {
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chansize = 64;
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} else {
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chansize = 32;
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}
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if (rdev->family == CHIP_R600) {
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rdev->mc.vram_width = 8 * chansize;
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} else if (rdev->family == CHIP_RV670) {
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rdev->mc.vram_width = 4 * chansize;
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} else if ((rdev->family == CHIP_RV610) ||
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(rdev->family == CHIP_RV620)) {
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rdev->mc.vram_width = chansize;
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} else if ((rdev->family == CHIP_RV630) ||
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(rdev->family == CHIP_RV635)) {
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rdev->mc.vram_width = 2 * chansize;
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}
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}
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void r600_vram_info(struct radeon_device *rdev)
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{
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r600_vram_get_type(rdev);
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rdev->mc.vram_size = RREG32(R600_CONFIG_MEMSIZE);
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/* Could aper size report 0 ? */
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rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0);
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rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0);
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}
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/*
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* Indirect registers accessor
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*/
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uint32_t r600_pciep_rreg(struct radeon_device *rdev, uint32_t reg)
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{
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uint32_t r;
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WREG32(R600_PCIE_PORT_INDEX, ((reg) & 0xff));
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(void)RREG32(R600_PCIE_PORT_INDEX);
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r = RREG32(R600_PCIE_PORT_DATA);
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return r;
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}
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void r600_pciep_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v)
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{
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WREG32(R600_PCIE_PORT_INDEX, ((reg) & 0xff));
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(void)RREG32(R600_PCIE_PORT_INDEX);
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WREG32(R600_PCIE_PORT_DATA, (v));
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(void)RREG32(R600_PCIE_PORT_DATA);
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}
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