233 lines
8.7 KiB
PHP
233 lines
8.7 KiB
PHP
; Implementation of periodic transaction scheduler for USB.
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; Bandwidth dedicated to periodic transactions is limited, so
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; different pipes should be scheduled as uniformly as possible.
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; USB1 scheduler.
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; Algorithm is simple:
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; when adding a pipe, optimize the following quantity:
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; * for every millisecond, take all bandwidth scheduled to periodic transfers,
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; * calculate maximum over all milliseconds,
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; * select a variant which minimizes that maximum;
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; when removing a pipe, do nothing (except for bookkeeping).
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; The caller must provide CONTROLLER_NAME define.
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macro define_controller_name name
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{
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_hci_static_ep.SoftwarePart = name # _static_ep.SoftwarePart
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_hci_static_ep.NextList = name # _static_ep.NextList
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sizeof._hci_static_ep = sizeof. # name # _static_ep
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}
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; Select a list for a new pipe.
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; in: esi -> usb_controller, maxpacket, type, interval can be found in the stack
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; in: ecx = 2 * maximal interval = total number of periodic lists + 1
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; in: edx -> {u|o}hci_static_ep for the first list
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; in: eax -> byte past {u|o}hci_static_ep for the last list in the first group
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; out: edx -> usb_static_ep for the selected list or zero if failed
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proc usb1_select_interrupt_list
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; inherit some variables from usb_open_pipe
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virtual at ebp-12
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.speed db ?
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rb 3
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.bandwidth dd ?
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.target dd ?
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dd ?
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dd ?
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.config_pipe dd ?
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.endpoint dd ?
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.maxpacket dd ?
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.type dd ?
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.interval dd ?
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end virtual
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push ebx edi ; save used registers to be stdcall
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push eax ; save eax for checks in step 3
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; 1. Only intervals 2^k ms can be supported.
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; The core specification says that the real interval should not be greater
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; than the interval given by the endpoint descriptor, but can be less.
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; Determine the actual interval as 2^k ms.
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mov eax, ecx
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; 1a. Set [.interval] to 1 if it was zero; leave it as is otherwise
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cmp [.interval], 1
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adc [.interval], 0
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; 1b. Divide ecx by two while it is strictly greater than [.interval].
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@@:
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shr ecx, 1
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cmp [.interval], ecx
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jb @b
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; ecx = the actual interval
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;
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; For example, let ecx = 8, eax = 64.
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; The scheduler space is 32 milliseconds,
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; we need to schedule something every 8 ms;
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; there are 8 variants: schedule at times 0,8,16,24,
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; schedule at times 1,9,17,25,..., schedule at times 7,15,23,31.
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; Now concentrate: there are three nested loops,
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; * the innermost loop calculates the total periodic bandwidth scheduled
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; in the given millisecond,
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; * the intermediate loop calculates the maximum over all milliseconds
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; in the given variant, that is the quantity we're trying to minimize,
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; * the outermost loop checks all variants.
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; 2. Calculate offset between the first list and the first list for the
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; selected interval, in bytes; save in the stack for step 4.
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sub eax, ecx
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sub eax, ecx
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imul eax, sizeof._hci_static_ep
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push eax
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imul ebx, ecx, sizeof._hci_static_ep
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; 3. Select the best variant.
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; 3a. The outermost loop.
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; Prepare for the loop: set the current optimal bandwidth to maximum
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; possible value (so that any variant will pass the first comparison),
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; calculate delta for the intermediate loop.
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or [.bandwidth], -1
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.varloop:
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; 3b. The intermediate loop.
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; Prepare for the loop: set the maximum to be calculated to zero,
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; save counter of the outermost loop.
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xor edi, edi
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push edx
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virtual at esp
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.cur_variant dd ? ; step 3b
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.result_delta dd ? ; step 2
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.group1_limit dd ? ; function prolog
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end virtual
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.calc_max_bandwidth:
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; 3c. The innermost loop. Sum over all lists.
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xor eax, eax
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push edx
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.calc_bandwidth:
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add eax, [edx+_hci_static_ep.SoftwarePart+usb_static_ep.Bandwidth]
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mov edx, [edx+_hci_static_ep.NextList]
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test edx, edx
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jnz .calc_bandwidth
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pop edx
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; 3d. The intermediate loop continued: update maximum.
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cmp eax, edi
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jb @f
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mov edi, eax
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@@:
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; 3e. The intermediate loop continued: advance counter.
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add edx, ebx
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cmp edx, [.group1_limit]
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jb .calc_max_bandwidth
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; 3e. The intermediate loop done: restore counter of the outermost loop.
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pop edx
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; 3f. The outermost loop continued: if the current variant is
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; better (maybe not strictly) then the previous optimum, update
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; the optimal bandwidth and resulting list.
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cmp edi, [.bandwidth]
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ja @f
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mov [.bandwidth], edi
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mov [.target], edx
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@@:
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; 3g. The outermost loop continued: advance counter.
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add edx, sizeof._hci_static_ep
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dec ecx
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jnz .varloop
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; 4. Calculate bandwidth for the new pipe.
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mov eax, [.maxpacket]
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mov cl, [.speed]
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mov ch, byte [.endpoint]
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and ch, 80h
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call calc_usb1_bandwidth
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; 5. Get the pointer to the best list.
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pop edx ; restore value from step 2
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pop ecx ; purge stack var from prolog
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add edx, [.target]
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; 6. Check that bandwidth for the new pipe plus old bandwidth
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; still fits to maximum allowed by the core specification, 90% of 12000 bits.
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mov ecx, eax
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add ecx, [.bandwidth]
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cmp ecx, 10800
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ja .no_bandwidth
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; 7. Convert {o|u}hci_static_ep to usb_static_ep, update bandwidth and return.
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add edx, _hci_static_ep.SoftwarePart
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add [edx+usb_static_ep.Bandwidth], eax
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pop edi ebx ; restore used registers to be stdcall
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ret
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.no_bandwidth:
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dbgstr 'Periodic bandwidth limit reached'
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xor edx, edx
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pop edi ebx
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ret
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endp
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; Pipe is removing, update the corresponding lists.
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; We do not reorder anything, so just update book-keeping variable
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; in the list header.
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proc usb1_interrupt_list_unlink
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virtual at esp
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dd ? ; return address
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.maxpacket dd ?
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.lowspeed db ?
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.direction db ?
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rb 2
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end virtual
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; calculate bandwidth on the bus
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mov eax, [.maxpacket]
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mov ecx, dword [.lowspeed]
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call calc_usb1_bandwidth
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; find list header
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mov edx, ebx
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@@:
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mov edx, [edx+usb_pipe.NextVirt]
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cmp [edx+usb_pipe.Controller], esi
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jz @b
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; subtract pipe bandwidth
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sub [edx+usb_static_ep.Bandwidth], eax
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ret 8
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endp
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; Helper procedure for USB1 scheduler: calculate bandwidth on the bus.
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; in: low 11 bits of eax = payload size in bytes
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; in: cl = 0 - full-speed, nonzero - high-speed
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; in: ch = 0 - OUT, nonzero - IN
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; out: eax = maximal bandwidth in FS-bits
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proc calc_usb1_bandwidth
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and eax, (1 shl 11) - 1 ; get payload for one transaction
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add eax, 3 ; add 3 bytes for other fields in data packet, PID+CRC16
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test cl, cl
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jnz .low_speed
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; Multiply by 8 for bytes -> bits, by 7/6 to accomodate bit stuffing
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; and by 401/400 for IN transfers to accomodate timers difference
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; 9+107/300 for IN transfers, 9+1/3 for OUT transfers
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; For 0 <= eax < 09249355h, floor(eax * 107/300) = floor(eax * 5B4E81B5h / 2^32).
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; For 0 <= eax < 80000000h, floor(eax / 3) = floor(eax * 55555556h / 2^32).
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mov edx, 55555556h
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test ch, ch
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jz @f
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mov edx, 5B4E81B5h
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@@:
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lea ecx, [eax*9]
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mul edx
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; Add 93 extra bits: 39 bits for Token packet (8 for SYNC, 24 for token+address,
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; 4 extra bits for possible bit stuffing in token+address, 3 for EOP),
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; 18 bits for bus turn-around, 11 bits for SYNC+EOP in Data packet plus 1 bit
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; for possible timers difference, 2 bits for inter-packet delay, 20 bits for
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; Handshake packet, 2 bits for another inter-packet delay.
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lea eax, [ecx+edx+93]
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ret
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.low_speed:
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; Multiply by 8 for bytes -> bits, by 7/6 to accomodate bit stuffing,
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; by 8 for LS -> FS and by 406/50 for IN transfers to accomodate timers difference.
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; 75+59/75 for IN transfers, 74+2/3 for OUT transfers.
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mov edx, 0AAAAAABh
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test ch, ch
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mov ecx, 74
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jz @f
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mov edx, 0C962FC97h
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inc ecx
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@@:
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imul ecx, eax
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mul edx
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; Add 778 extra bits:
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; 16 bits for PRE packet, 4 bits for hub delay, 8*39 bits for Token packet
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; 8*18 bits for bus turn-around
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; (406/50)*11 bits for SYNC+EOP in Data packet,
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; 8*2 bits for inter-packet delay,
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; 16 bits for PRE packet, 4 bits for hub delay, 8*20 bits for Handshake packet,
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; 8*2 bits for another inter-packet delay.
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lea eax, [ecx+edx+778]
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ret
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endp
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