126 lines
3.0 KiB
C
126 lines
3.0 KiB
C
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#define FALSE 0
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#define TRUE 1
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#define DBG(x)
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//#define DBG(x) dbgprintf x
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#define assert(x)
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#include "compiler.h"
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#include <linux/kernel.h>
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struct pixman_box16
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{
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int16_t x1, y1, x2, y2;
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};
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typedef struct pixman_box16 BoxRec;
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typedef unsigned int CARD32;
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#include "sna_render.h"
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#include "kgem.h"
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#define PictOpClear 0
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#define PictOpSrc 1
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#define PictOpDst 2
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#define PictOpOver 3
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#define PictOpOverReverse 4
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#define PictOpIn 5
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#define PictOpInReverse 6
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#define PictOpOut 7
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#define PictOpOutReverse 8
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#define PictOpAtop 9
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#define PictOpAtopReverse 10
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#define PictOpXor 11
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#define PictOpAdd 12
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#define PictOpSaturate 13
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#define PictOpMaximum 13
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struct sna {
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unsigned flags;
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#define SNA_NO_THROTTLE 0x1
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#define SNA_NO_DELAYED_FLUSH 0x2
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// int timer[NUM_TIMERS];
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// uint16_t timer_active;
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// uint16_t timer_ready;
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// int vblank_interval;
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// struct list deferred_free;
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// struct list dirty_pixmaps;
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// struct list active_pixmaps;
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// struct list inactive_clock[2];
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unsigned int tiling;
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#define SNA_TILING_DISABLE 0x0
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#define SNA_TILING_FB 0x1
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#define SNA_TILING_2D 0x2
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#define SNA_TILING_3D 0x4
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#define SNA_TILING_ALL (~0)
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int Chipset;
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// EntityInfoPtr pEnt;
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// struct pci_device *PciInfo;
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// struct intel_chipset chipset;
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// PicturePtr clear;
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struct {
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uint32_t fill_bo;
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uint32_t fill_pixel;
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uint32_t fill_alu;
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} blt_state;
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union {
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// struct gen2_render_state gen2;
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// struct gen3_render_state gen3;
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// struct gen4_render_state gen4;
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// struct gen5_render_state gen5;
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struct gen6_render_state gen6;
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// struct gen7_render_state gen7;
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} render_state;
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uint32_t have_render;
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uint32_t default_tiling;
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// Bool directRenderingOpen;
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// char *deviceName;
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/* Broken-out options. */
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// OptionInfoPtr Options;
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/* Driver phase/state information */
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// Bool suspended;
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struct kgem kgem;
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struct sna_render render;
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};
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static inline int vertex_space(struct sna *sna)
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{
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return sna->render.vertex_size - sna->render.vertex_used;
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}
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static inline void vertex_emit(struct sna *sna, float v)
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{
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assert(sna->render.vertex_used < sna->render.vertex_size);
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sna->render.vertices[sna->render.vertex_used++] = v;
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}
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static inline void vertex_emit_2s(struct sna *sna, int16_t x, int16_t y)
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{
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int16_t *v = (int16_t *)&sna->render.vertices[sna->render.vertex_used++];
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assert(sna->render.vertex_used <= sna->render.vertex_size);
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v[0] = x;
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v[1] = y;
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}
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static inline void batch_emit(struct sna *sna, uint32_t dword)
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{
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assert(sna->kgem.mode != KGEM_NONE);
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assert(sna->kgem.nbatch + KGEM_BATCH_RESERVED < sna->kgem.surface);
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sna->kgem.batch[sna->kgem.nbatch++] = dword;
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}
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