127 lines
3.3 KiB
C
127 lines
3.3 KiB
C
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static Bool
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rhdMapMMIO(RHDPtr rhdPtr)
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{
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rhdPtr->MMIOMapSize = 1 << rhdPtr->memsize[RHD_MMIO_BAR];
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rhdPtr->MMIOBase = MapIoMem(rhdPtr->memBase[RHD_MMIO_BAR],
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rhdPtr->MMIOMapSize,PG_SW+PG_NOCACHE);
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if( rhdPtr->MMIOBase==0)
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return 0;
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DBG(dbgprintf("Mapped IO at %x (size %x)\n", rhdPtr->MMIOBase, rhdPtr->MMIOMapSize));
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return 1;
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}
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#define RADEON_NB_TOM 0x15c
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static CARD32
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rhdGetVideoRamSize(RHDPtr rhdPtr)
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{
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CARD32 RamSize, BARSize;
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if (rhdPtr->ChipSet == RHD_RS690)
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RamSize = (_RHDRegRead(rhdPtr, R5XX_CONFIG_MEMSIZE))>>10;
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else
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if (rhdPtr->IsIGP)
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{
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CARD32 tom = _RHDRegRead(rhdPtr, RADEON_NB_TOM);
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RamSize = (((tom >> 16) - (tom & 0xffff) + 1) << 6);
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_RHDRegWrite(rhdPtr,R5XX_CONFIG_MEMSIZE, RamSize<<10);
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}
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else
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{
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if (rhdPtr->ChipSet < RHD_R600)
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{
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RamSize = (_RHDRegRead(rhdPtr, R5XX_CONFIG_MEMSIZE)) >> 10;
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if(RamSize==0) RamSize=8192;
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}
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else
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RamSize = (_RHDRegRead(rhdPtr, R6XX_CONFIG_MEMSIZE)) >> 10;
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};
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BARSize = 1 << (rhdPtr->memsize[RHD_FB_BAR] - 10);
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if(BARSize==0)
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BARSize = 0x20000;
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if (RamSize > BARSize) {
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DBG(dbgprintf("The detected amount of videoram"
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" exceeds the PCI BAR aperture.\n"));
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DBG(dbgprintf("Using only %dkB of the total "
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"%dkB.\n", (int) BARSize, (int) RamSize));
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return BARSize;
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}
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else return RamSize;
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}
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static Bool
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rhdMapFB(RHDPtr rhdPtr)
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{
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rhdPtr->FbMapSize = 1 << rhdPtr->memsize[RHD_FB_BAR];
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rhdPtr->PhisBase = rhdPtr->memBase[RHD_FB_BAR];
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// rhdPtr->FbBase = MapIoMem(rhdPtr->PhisBase, rhdPtr->FbMapSize,PG_SW+PG_NOCACHE);
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// if (!rhdPtr->FbBase)
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// return FALSE;
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/* These devices have an internal address reference, which some other
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* address registers in there also use. This can be different from the
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* address in the BAR */
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if (rhdPtr->ChipSet < RHD_R600)
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rhdPtr->FbIntAddress = _RHDRegRead(rhdPtr, HDP_FB_LOCATION)<< 16;
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else
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rhdPtr->FbIntAddress = _RHDRegRead(rhdPtr, R6XX_CONFIG_FB_BASE);
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// rhdPtr->FbIntAddress = _RHDRegRead(rhdPtr, 0x6110);
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// dbgprintf("rhdPtr->FbIntAddress %x\n",rhdPtr->FbIntAddress);
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if (rhdPtr->FbIntAddress != rhdPtr->PhisBase)
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dbgprintf("PCI FB Address (BAR) is at "
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"0x%08X while card Internal Address is 0x%08X\n",
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(unsigned int) rhdPtr->PhisBase,rhdPtr->FbIntAddress);
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// dbgprintf("Mapped FB at %p (size 0x%08X)\n",rhdPtr->FbBase, rhdPtr->FbMapSize);
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return TRUE;
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}
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Bool RHDPreInit()
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{
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/* We need access to IO space already */
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if (!rhdMapMMIO(&rhd)) {
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dbgprintf("Failed to map MMIO.\n");
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return FALSE;
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};
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rhd.videoRam = rhdGetVideoRamSize(&rhd);
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if (!rhd.videoRam)
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{
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dbgprintf("No Video RAM detected.\n");
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goto error1;
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}
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dbgprintf("VideoRAM: %d kByte\n",rhd.videoRam);
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rhd.FbFreeStart = 0;
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rhd.FbFreeSize = rhd.videoRam << 10;
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if( !rhdMapFB(&rhd))
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return FALSE;
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rhd.FbScanoutStart = 0;
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rhd.FbScanoutSize = 8*1024*1024;
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rhd.FbFreeStart = 10*1024*1024;
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rhd.FbFreeSize = rhd.FbMapSize - 10*1024*1024;
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rhdInitHeap(&rhd);
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return TRUE;
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error1:
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return FALSE;
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};
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int KernelFree(void *p)
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{
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return 0;
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}
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