9437f5ae47
git-svn-id: svn://kolibrios.org@2005 a494cfbc-eb01-0410-851d-a64ba20cac60
429 lines
12 KiB
C
429 lines
12 KiB
C
/*
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* Copyright 2009 Jerome Glisse.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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*/
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/*
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* Authors:
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* Jerome Glisse <glisse@freedesktop.org>
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* Dave Airlie
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*/
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#include <linux/seq_file.h>
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#include <asm/atomic.h>
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//#include <linux/wait.h>
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#include <linux/list.h>
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#include <linux/kref.h>
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#include <linux/slab.h>
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#include "drmP.h"
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#include "drm.h"
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#include "radeon_reg.h"
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#include "radeon.h"
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static void radeon_fence_write(struct radeon_device *rdev, u32 seq)
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{
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if (rdev->wb.enabled) {
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u32 scratch_index;
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if (rdev->wb.use_event)
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scratch_index = R600_WB_EVENT_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base;
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else
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scratch_index = RADEON_WB_SCRATCH_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base;
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rdev->wb.wb[scratch_index/4] = cpu_to_le32(seq);;
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} else
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WREG32(rdev->fence_drv.scratch_reg, seq);
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}
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static u32 radeon_fence_read(struct radeon_device *rdev)
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{
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u32 seq;
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if (rdev->wb.enabled) {
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u32 scratch_index;
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if (rdev->wb.use_event)
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scratch_index = R600_WB_EVENT_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base;
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else
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scratch_index = RADEON_WB_SCRATCH_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base;
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seq = le32_to_cpu(rdev->wb.wb[scratch_index/4]);
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} else
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seq = RREG32(rdev->fence_drv.scratch_reg);
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return seq;
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}
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int radeon_fence_emit(struct radeon_device *rdev, struct radeon_fence *fence)
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{
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unsigned long irq_flags;
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write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
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if (fence->emited) {
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write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
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return 0;
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}
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fence->seq = atomic_add_return(1, &rdev->fence_drv.seq);
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if (!rdev->cp.ready)
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/* FIXME: cp is not running assume everythings is done right
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* away
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*/
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radeon_fence_write(rdev, fence->seq);
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else
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radeon_fence_ring_emit(rdev, fence);
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// trace_radeon_fence_emit(rdev->ddev, fence->seq);
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fence->emited = true;
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list_move_tail(&fence->list, &rdev->fence_drv.emited);
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write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
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return 0;
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}
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static bool radeon_fence_poll_locked(struct radeon_device *rdev)
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{
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struct radeon_fence *fence;
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struct list_head *i, *n;
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uint32_t seq;
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bool wake = false;
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unsigned long cjiffies;
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seq = radeon_fence_read(rdev);
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if (seq != rdev->fence_drv.last_seq) {
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rdev->fence_drv.last_seq = seq;
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rdev->fence_drv.last_jiffies = GetTimerTicks();
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rdev->fence_drv.last_timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
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} else {
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cjiffies = GetTimerTicks();
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if (time_after(cjiffies, rdev->fence_drv.last_jiffies)) {
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cjiffies -= rdev->fence_drv.last_jiffies;
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if (time_after(rdev->fence_drv.last_timeout, cjiffies)) {
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/* update the timeout */
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rdev->fence_drv.last_timeout -= cjiffies;
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} else {
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/* the 500ms timeout is elapsed we should test
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* for GPU lockup
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*/
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rdev->fence_drv.last_timeout = 1;
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}
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} else {
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/* wrap around update last jiffies, we will just wait
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* a little longer
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*/
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rdev->fence_drv.last_jiffies = cjiffies;
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}
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return false;
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}
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n = NULL;
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list_for_each(i, &rdev->fence_drv.emited) {
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fence = list_entry(i, struct radeon_fence, list);
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if (fence->seq == seq) {
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n = i;
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break;
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}
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}
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/* all fence previous to this one are considered as signaled */
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if (n) {
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kevent_t event;
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event.code = -1;
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i = n;
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do {
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n = i->prev;
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list_move_tail(i, &rdev->fence_drv.signaled);
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fence = list_entry(i, struct radeon_fence, list);
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fence->signaled = true;
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// dbgprintf("fence %x done\n", fence);
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RaiseEvent(fence->evnt, 0, &event);
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i = n;
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} while (i != &rdev->fence_drv.emited);
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wake = true;
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}
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return wake;
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}
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int radeon_fence_create(struct radeon_device *rdev, struct radeon_fence **fence)
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{
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unsigned long irq_flags;
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*fence = kmalloc(sizeof(struct radeon_fence), GFP_KERNEL);
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if ((*fence) == NULL) {
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return -ENOMEM;
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}
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(*fence)->evnt = CreateEvent(NULL, MANUAL_DESTROY);
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// kref_init(&((*fence)->kref));
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(*fence)->rdev = rdev;
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(*fence)->emited = false;
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(*fence)->signaled = false;
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(*fence)->seq = 0;
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INIT_LIST_HEAD(&(*fence)->list);
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write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
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list_add_tail(&(*fence)->list, &rdev->fence_drv.created);
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write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
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return 0;
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}
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bool radeon_fence_signaled(struct radeon_fence *fence)
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{
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unsigned long irq_flags;
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bool signaled = false;
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if (!fence)
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return true;
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if (fence->rdev->gpu_lockup)
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return true;
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write_lock_irqsave(&fence->rdev->fence_drv.lock, irq_flags);
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signaled = fence->signaled;
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/* if we are shuting down report all fence as signaled */
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if (fence->rdev->shutdown) {
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signaled = true;
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}
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if (!fence->emited) {
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WARN(1, "Querying an unemited fence : %p !\n", fence);
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signaled = true;
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}
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if (!signaled) {
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radeon_fence_poll_locked(fence->rdev);
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signaled = fence->signaled;
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}
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write_unlock_irqrestore(&fence->rdev->fence_drv.lock, irq_flags);
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return signaled;
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}
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int radeon_fence_wait(struct radeon_fence *fence, bool intr)
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{
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struct radeon_device *rdev;
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unsigned long irq_flags, timeout;
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u32 seq;
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int r;
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if (fence == NULL) {
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WARN(1, "Querying an invalid fence : %p !\n", fence);
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return 0;
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}
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rdev = fence->rdev;
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if (radeon_fence_signaled(fence)) {
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return 0;
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}
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timeout = rdev->fence_drv.last_timeout;
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retry:
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/* save current sequence used to check for GPU lockup */
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seq = rdev->fence_drv.last_seq;
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// trace_radeon_fence_wait_begin(rdev->ddev, seq);
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if (intr) {
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radeon_irq_kms_sw_irq_get(rdev);
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// r = wait_event_interruptible_timeout(rdev->fence_drv.queue,
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// radeon_fence_signaled(fence), timeout);
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WaitEvent(fence->evnt);
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radeon_irq_kms_sw_irq_put(rdev);
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if (unlikely(r < 0)) {
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return r;
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}
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} else {
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radeon_irq_kms_sw_irq_get(rdev);
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// r = wait_event_timeout(rdev->fence_drv.queue,
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// radeon_fence_signaled(fence), timeout);
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WaitEvent(fence->evnt);
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radeon_irq_kms_sw_irq_put(rdev);
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}
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// trace_radeon_fence_wait_end(rdev->ddev, seq);
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if (unlikely(!radeon_fence_signaled(fence))) {
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/* we were interrupted for some reason and fence isn't
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* isn't signaled yet, resume wait
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*/
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if (r) {
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timeout = r;
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goto retry;
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}
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/* don't protect read access to rdev->fence_drv.last_seq
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* if we experiencing a lockup the value doesn't change
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*/
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if (seq == rdev->fence_drv.last_seq && radeon_gpu_is_lockup(rdev)) {
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/* good news we believe it's a lockup */
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WARN(1, "GPU lockup (waiting for 0x%08X last fence id 0x%08X)\n",
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fence->seq, seq);
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/* FIXME: what should we do ? marking everyone
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* as signaled for now
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*/
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rdev->gpu_lockup = true;
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// r = radeon_gpu_reset(rdev);
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// if (r)
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// return r;
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return true;
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// radeon_fence_write(rdev, fence->seq);
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// rdev->gpu_lockup = false;
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}
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timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
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write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
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rdev->fence_drv.last_timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
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rdev->fence_drv.last_jiffies = GetTimerTicks();
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write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
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goto retry;
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}
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return 0;
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}
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#if 0
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int radeon_fence_wait_next(struct radeon_device *rdev)
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{
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unsigned long irq_flags;
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struct radeon_fence *fence;
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int r;
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if (rdev->gpu_lockup) {
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return 0;
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}
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write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
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if (list_empty(&rdev->fence_drv.emited)) {
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write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
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return 0;
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}
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fence = list_entry(rdev->fence_drv.emited.next,
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struct radeon_fence, list);
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radeon_fence_ref(fence);
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write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
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r = radeon_fence_wait(fence, false);
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radeon_fence_unref(&fence);
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return r;
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}
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int radeon_fence_wait_last(struct radeon_device *rdev)
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{
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unsigned long irq_flags;
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struct radeon_fence *fence;
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int r;
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if (rdev->gpu_lockup) {
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return 0;
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}
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write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
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if (list_empty(&rdev->fence_drv.emited)) {
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write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
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return 0;
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}
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fence = list_entry(rdev->fence_drv.emited.prev,
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struct radeon_fence, list);
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radeon_fence_ref(fence);
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write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
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r = radeon_fence_wait(fence, false);
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radeon_fence_unref(&fence);
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return r;
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}
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struct radeon_fence *radeon_fence_ref(struct radeon_fence *fence)
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{
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kref_get(&fence->kref);
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return fence;
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}
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#endif
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void radeon_fence_unref(struct radeon_fence **fence)
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{
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unsigned long irq_flags;
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struct radeon_fence *tmp = *fence;
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*fence = NULL;
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if(tmp)
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{
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write_lock_irqsave(&tmp->rdev->fence_drv.lock, irq_flags);
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list_del(&tmp->list);
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tmp->emited = false;
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write_unlock_irqrestore(&tmp->rdev->fence_drv.lock, irq_flags);
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};
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}
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void radeon_fence_process(struct radeon_device *rdev)
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{
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unsigned long irq_flags;
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bool wake;
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write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
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wake = radeon_fence_poll_locked(rdev);
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write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
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}
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int radeon_fence_driver_init(struct radeon_device *rdev)
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{
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unsigned long irq_flags;
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int r;
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write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
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r = radeon_scratch_get(rdev, &rdev->fence_drv.scratch_reg);
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if (r) {
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dev_err(rdev->dev, "fence failed to get scratch register\n");
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write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
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return r;
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}
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radeon_fence_write(rdev, 0);
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atomic_set(&rdev->fence_drv.seq, 0);
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INIT_LIST_HEAD(&rdev->fence_drv.created);
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INIT_LIST_HEAD(&rdev->fence_drv.emited);
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INIT_LIST_HEAD(&rdev->fence_drv.signaled);
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// init_waitqueue_head(&rdev->fence_drv.queue);
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rdev->fence_drv.initialized = true;
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write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
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return 0;
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}
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/*
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* Fence debugfs
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*/
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#if defined(CONFIG_DEBUG_FS)
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static int radeon_debugfs_fence_info(struct seq_file *m, void *data)
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{
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struct drm_info_node *node = (struct drm_info_node *)m->private;
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struct drm_device *dev = node->minor->dev;
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struct radeon_device *rdev = dev->dev_private;
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struct radeon_fence *fence;
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seq_printf(m, "Last signaled fence 0x%08X\n",
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radeon_fence_read(rdev));
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if (!list_empty(&rdev->fence_drv.emited)) {
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fence = list_entry(rdev->fence_drv.emited.prev,
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struct radeon_fence, list);
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seq_printf(m, "Last emited fence %p with 0x%08X\n",
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fence, fence->seq);
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}
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return 0;
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}
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static struct drm_info_list radeon_debugfs_fence_list[] = {
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{"radeon_fence_info", &radeon_debugfs_fence_info, 0, NULL},
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};
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#endif
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int radeon_debugfs_fence_init(struct radeon_device *rdev)
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{
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#if defined(CONFIG_DEBUG_FS)
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return radeon_debugfs_add_files(rdev, radeon_debugfs_fence_list, 1);
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#else
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return 0;
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#endif
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}
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