153 lines
4.1 KiB
C
153 lines
4.1 KiB
C
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/** enumeration of 3d consumers so some can maintain invariant state. */
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enum last_3d {
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LAST_3D_OTHER,
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LAST_3D_VIDEO,
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LAST_3D_RENDER,
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LAST_3D_ROTATION
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};
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typedef struct intel_screen_private {
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int cpp;
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#define RENDER_BATCH I915_EXEC_RENDER
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#define BLT_BATCH I915_EXEC_BLT
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unsigned int current_batch;
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dri_bufmgr *bufmgr;
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uint32_t batch_ptr[4096];
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/** Byte offset in batch_ptr for the next dword to be emitted. */
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unsigned int batch_used;
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/** Position in batch_ptr at the start of the current BEGIN_BATCH */
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unsigned int batch_emit_start;
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/** Number of bytes to be emitted in the current BEGIN_BATCH. */
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uint32_t batch_emitting;
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dri_bo *batch_bo, *last_batch_bo[2];
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/** Whether we're in a section of code that can't tolerate flushing */
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Bool in_batch_atomic;
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/** Ending batch_used that was verified by intel_start_batch_atomic() */
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int batch_atomic_limit;
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struct list batch_pixmaps;
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drm_intel_bo *wa_scratch_bo;
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unsigned int tiling;
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#define INTEL_TILING_FB 0x1
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#define INTEL_TILING_2D 0x2
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#define INTEL_TILING_3D 0x4
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#define INTEL_TILING_ALL (~0)
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Bool has_relaxed_fencing;
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int Chipset;
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unsigned int BR[20];
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void (*vertex_flush) (struct intel_screen_private *intel);
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void (*batch_flush) (struct intel_screen_private *intel);
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void (*batch_commit_notify) (struct intel_screen_private *intel);
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Bool need_sync;
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int accel_pixmap_offset_alignment;
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int accel_max_x;
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int accel_max_y;
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int max_bo_size;
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int max_gtt_map_size;
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int max_tiling_size;
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struct {
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drm_intel_bo *gen4_vs_bo;
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drm_intel_bo *gen4_sf_bo;
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drm_intel_bo *gen4_wm_packed_bo;
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drm_intel_bo *gen4_wm_planar_bo;
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drm_intel_bo *gen4_cc_bo;
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drm_intel_bo *gen4_cc_vp_bo;
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drm_intel_bo *gen4_sampler_bo;
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drm_intel_bo *gen4_sip_kernel_bo;
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drm_intel_bo *wm_prog_packed_bo;
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drm_intel_bo *wm_prog_planar_bo;
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drm_intel_bo *gen6_blend_bo;
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drm_intel_bo *gen6_depth_stencil_bo;
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} video;
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/* Render accel state */
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float scale_units[2][2];
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/** Transform pointers for src/mask, or NULL if identity */
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PictTransform *transform[2];
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PixmapPtr render_source, render_mask, render_dest;
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PicturePtr render_source_picture, render_mask_picture, render_dest_picture;
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Bool needs_3d_invariant;
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Bool needs_render_state_emit;
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Bool needs_render_vertex_emit;
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/* i830 render accel state */
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uint32_t render_dest_format;
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uint32_t cblend, ablend, s8_blendctl;
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/* i915 render accel state */
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PixmapPtr texture[2];
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uint32_t mapstate[6];
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uint32_t samplerstate[6];
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struct {
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int op;
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uint32_t dst_format;
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} i915_render_state;
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struct {
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int num_sf_outputs;
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int drawrect;
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uint32_t blend;
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dri_bo *samplers;
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dri_bo *kernel;
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} gen6_render_state;
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uint32_t prim_offset;
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void (*prim_emit)(struct intel_screen_private *intel,
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int srcX, int srcY,
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int maskX, int maskY,
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int dstX, int dstY,
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int w, int h);
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int floats_per_vertex;
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int last_floats_per_vertex;
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uint16_t vertex_offset;
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uint16_t vertex_count;
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uint16_t vertex_index;
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uint16_t vertex_used;
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uint32_t vertex_id;
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float vertex_ptr[4*1024];
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dri_bo *vertex_bo;
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uint8_t surface_data[16*1024];
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uint16_t surface_used;
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uint16_t surface_table;
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uint32_t surface_reloc;
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dri_bo *surface_bo;
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/* 965 render acceleration state */
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struct gen4_render_state *gen4_render_state;
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Bool use_pageflipping;
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Bool use_triple_buffer;
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Bool force_fallback;
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Bool has_kernel_flush;
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Bool needs_flush;
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enum last_3d last_3d;
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/**
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* User option to print acceleration fallback info to the server log.
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*/
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Bool fallback_debug;
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unsigned debug_flush;
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Bool has_prime_vmap_flush;
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} intel_screen_private;
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