174 lines
4.9 KiB
C
Executable File
174 lines
4.9 KiB
C
Executable File
#ifndef _CPU_H_
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#define _CPU_H_
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//#define ARM_V6 //define to allow v6 instructions
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//#define THUMB_2 //define to allow Thumb2
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#include "types.h"
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struct ArmCpu;
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#define ARM_SR_N 0x80000000UL
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#define ARM_SR_Z 0x40000000UL
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#define ARM_SR_C 0x20000000UL
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#define ARM_SR_V 0x10000000UL
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#define ARM_SR_Q 0x08000000UL
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#ifdef ARM_V6 //V6KT2, but without T2 to be exact (we implement things like MLS, but not Thumb2 or ThumbEE)
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#define ARM_SR_J 0x01000000UL
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#define ARM_SR_E 0x00000200UL
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#define ARM_SR_A 0x00000100UL
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#define ARM_SR_GE_0 0x00010000UL
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#define ARM_SR_GE_1 0x00020000UL
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#define ARM_SR_GE_2 0x00040000UL
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#define ARM_SR_GE_3 0x00080000UL
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#define ARM_SR_GE_MASK 0x000F0000UL
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#define ARM_SR_GE_SHIFT 16
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#endif
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#define ARM_SR_I 0x00000080UL
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#define ARM_SR_F 0x00000040UL
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#define ARM_SR_T 0x00000020UL
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#define ARM_SR_M 0x0000001FUL
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#define ARM_SR_MODE_USR 0x00000010UL
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#define ARM_SR_MODE_FIQ 0x00000011UL
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#define ARM_SR_MODE_IRQ 0x00000012UL
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#define ARM_SR_MODE_SVC 0x00000013UL
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#define ARM_SR_MODE_ABT 0x00000017UL
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#define ARM_SR_MODE_UND 0x0000001BUL
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#define ARM_SR_MODE_SYS 0x0000001FUL
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#define ARV_VECTOR_OFFT_RST 0x00000000UL
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#define ARM_VECTOR_OFFT_UND 0x00000004UL
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#define ARM_VECTOR_OFFT_SWI 0x00000008UL
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#define ARM_VECTOR_OFFT_P_ABT 0x0000000CUL
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#define ARM_VECTOR_OFFT_D_ABT 0x00000010UL
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#define ARM_VECTOR_OFFT_UNUSED 0x00000014UL
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#define ARM_VECTOR_OFFT_IRQ 0x00000018UL
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#define ARM_VECTOR_OFFT_FIQ 0x0000001CUL
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#define HYPERCALL_ARM 0xF7BBBBBBUL
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#define HYPERCALL_THUMB 0xBBBBUL
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//the following are for cpuGetRegExternal() and are generally used for debugging purposes
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#define ARM_REG_NUM_CPSR 16
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#define ARM_REG_NUM_SPSR 17
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struct ArmCpu;
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typedef Boolean (*ArmCoprocRegXferF) (struct ArmCpu* cpu, void* userData, Boolean two/* MCR2/MRC2 ? */, Boolean MRC, UInt8 op1, UInt8 Rx, UInt8 CRn, UInt8 CRm, UInt8 op2);
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typedef Boolean (*ArmCoprocDatProcF) (struct ArmCpu* cpu, void* userData, Boolean two/* CDP2 ? */, UInt8 op1, UInt8 CRd, UInt8 CRn, UInt8 CRm, UInt8 op2);
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typedef Boolean (*ArmCoprocMemAccsF) (struct ArmCpu* cpu, void* userData, Boolean two /* LDC2/STC2 ? */, Boolean N, Boolean store, UInt8 CRd, UInt32 addr, UInt8* option /* NULL if none */);
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typedef Boolean (*ArmCoprocTwoRegF) (struct ArmCpu* cpu, void* userData, Boolean MRRC, UInt8 op, UInt8 Rd, UInt8 Rn, UInt8 CRm);
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typedef Boolean (*ArmCpuMemF) (struct ArmCpu* cpu, void* buf, UInt32 vaddr, UInt8 size, Boolean write, Boolean priviledged, UInt8* fsr); //read/write
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typedef Boolean (*ArmCpuHypercall) (struct ArmCpu* cpu); //return true if handled
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typedef void (*ArmCpuEmulErr) (struct ArmCpu* cpu, const char* err_str);
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typedef void (*ArmSetFaultAdrF) (struct ArmCpu* cpu, UInt32 adr, UInt8 faultStatus);
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#include "icache.h"
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/*
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coprocessors:
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0 - DSP (pxa only)
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0, 1 - WMMX (pxa only)
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11 - VFP (arm standard)
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15 - system control (arm standard)
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*/
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typedef struct{
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ArmCoprocRegXferF regXfer;
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ArmCoprocDatProcF dataProcessing;
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ArmCoprocMemAccsF memAccess;
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ArmCoprocTwoRegF twoRegF;
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void* userData;
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}ArmCoprocessor;
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typedef struct{
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UInt32 R13, R14;
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UInt32 SPSR; //usr mode doesn't have an SPSR
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}ArmBankedRegs;
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typedef struct ArmCpu{
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UInt32 regs[16]; //current active regs as per current mode
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UInt32 CPSR, SPSR;
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ArmBankedRegs bank_usr; //usr regs when in another mode
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ArmBankedRegs bank_svc; //svc regs when in another mode
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ArmBankedRegs bank_abt; //abt regs when in another mode
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ArmBankedRegs bank_und; //und regs when in another mode
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ArmBankedRegs bank_irq; //irq regs when in another mode
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ArmBankedRegs bank_fiq; //fiq regs when in another mode
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UInt32 extra_regs[5]; //fiq regs when not in fiq mode, usr regs when in fiq mode. R8-12
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UInt16 waitingIrqs;
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UInt16 waitingFiqs;
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UInt16 CPAR;
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ArmCoprocessor coproc[16]; //coprocessors
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// various other cpu config options
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UInt32 vectorBase; //address of vector base
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#ifdef ARM_V6
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Boolean EEE; //endianness one exception entry
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Boolean impreciseAbtWaiting;
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#endif
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ArmCpuMemF memF;
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ArmCpuEmulErr emulErrF;
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ArmCpuHypercall hypercallF;
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ArmSetFaultAdrF setFaultAdrF;
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icache ic;
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void* userData; //shared by all callbacks
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}ArmCpu;
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Err cpuInit(ArmCpu* cpu, UInt32 pc, ArmCpuMemF memF, ArmCpuEmulErr emulErrF, ArmCpuHypercall hypercallF, ArmSetFaultAdrF setFaultAdrF);
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Err cpuDeinit(ArmCpu* cp);
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void cpuCycle(ArmCpu* cpu);
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void cpuIrq(ArmCpu* cpu, Boolean fiq, Boolean raise); //unraise when acknowledged
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#ifdef ARM_V6
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void cpuSignalImpreciseAbt(ArmCpu* cpu, Boolean raise);
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#endif
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UInt32 cpuGetRegExternal(ArmCpu* cpu, UInt8 reg);
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void cpuSetReg(ArmCpu* cpu, UInt8 reg, UInt32 val);
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void cpuCoprocessorRegister(ArmCpu* cpu, UInt8 cpNum, ArmCoprocessor* coproc);
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void cpuCoprocessorUnregister(ArmCpu* cpu, UInt8 cpNum);
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void cpuSetVectorAddr(ArmCpu* cpu, UInt32 adr);
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UInt16 cpuGetCPAR(ArmCpu* cpu);
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void cpuSetCPAR(ArmCpu* cpu, UInt16 cpar);
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void cpuIcacheInval(ArmCpu* cpu);
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void cpuIcacheInvalAddr(ArmCpu* cpu, UInt32 addr);
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#endif
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