148 lines
3.7 KiB
C
148 lines
3.7 KiB
C
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/* Chipset independant registers (from AGP Spec) */
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#define AGP_APBASE 0x10
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#define AGPSTAT 0x4
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#define AGPCMD 0x8
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#define AGPNISTAT 0xc
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#define AGPCTRL 0x10
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#define AGPAPSIZE 0x14
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#define AGPNEPG 0x16
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#define AGPGARTLO 0x18
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#define AGPGARTHI 0x1c
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#define AGPNICMD 0x20
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#define AGP_MAJOR_VERSION_SHIFT (20)
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#define AGP_MINOR_VERSION_SHIFT (16)
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#define AGPSTAT_RQ_DEPTH (0xff000000)
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#define AGPSTAT_RQ_DEPTH_SHIFT 24
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#define AGPSTAT_CAL_MASK (1<<12|1<<11|1<<10)
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#define AGPSTAT_ARQSZ (1<<15|1<<14|1<<13)
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#define AGPSTAT_ARQSZ_SHIFT 13
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#define AGPSTAT_SBA (1<<9)
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#define AGPSTAT_AGP_ENABLE (1<<8)
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#define AGPSTAT_FW (1<<4)
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#define AGPSTAT_MODE_3_0 (1<<3)
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#define AGPSTAT2_1X (1<<0)
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#define AGPSTAT2_2X (1<<1)
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#define AGPSTAT2_4X (1<<2)
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#define AGPSTAT3_RSVD (1<<2)
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#define AGPSTAT3_8X (1<<1)
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#define AGPSTAT3_4X (1)
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#define AGPCTRL_APERENB (1<<8)
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#define AGPCTRL_GTLBEN (1<<7)
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#define AGP2_RESERVED_MASK 0x00fffcc8
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#define AGP3_RESERVED_MASK 0x00ff00c4
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#define AGP_ERRATA_FASTWRITES 1<<0
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#define AGP_ERRATA_SBA 1<<1
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#define AGP_ERRATA_1X 1<<2
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/* Intel registers */
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#define INTEL_APSIZE 0xb4
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#define INTEL_ATTBASE 0xb8
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#define INTEL_AGPCTRL 0xb0
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#define INTEL_NBXCFG 0x50
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#define INTEL_ERRSTS 0x91
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/* Intel i845 registers */
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#define INTEL_I845_AGPM 0x51
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#define INTEL_I845_ERRSTS 0xc8
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/* Chipset independant registers (from AGP Spec) */
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#define AGP_APBASE 0x10
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typedef struct
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{
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size_t size;
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count_t num_entries;
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count_t pages_count;
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u32_t size_value;
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}aper_size_t;
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typedef struct
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{
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PCITAG PciTag;
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aper_size_t *aperture_sizes;
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aper_size_t *current_size;
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aper_size_t *previous_size;
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int aperture_size_idx;
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u32_t volatile *gatt_table;
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addr_t gatt_dma;
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addr_t apbase_config;
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addr_t gart_addr;
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u32_t flags;
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u32_t mode;
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int capndx;
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char major_version;
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char minor_version;
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// int num_aperture_sizes;
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// enum aper_size_type size_type;
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// int cant_use_aperture;
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// int needs_scratch_page;
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// struct gatt_mask *masks;
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int (*fetch_size)();
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int (*configure)();
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// void (*agp_enable)(struct agp_bridge_data *, u32);
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// void (*cleanup)(void);
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void (*tlb_flush)();
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// u32_t (*mask_memory)(struct agp_bridge_data *,u32_t, int);
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// void (*cache_flush)(void);
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int (*create_gatt_table)();
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// int (*free_gatt_table)(struct agp_bridge_data *);
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// int (*insert_memory)(struct agp_memory *, off_t, int);
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// int (*remove_memory)(struct agp_memory *, off_t, int);
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// struct agp_memory *(*alloc_by_type) (size_t, int);
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// void (*free_by_type)(struct agp_memory *);
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// void *(*agp_alloc_page)(struct agp_bridge_data *);
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// void (*agp_destroy_page)(void *);
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}agp_t;
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/*
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* min()/max() macros that also do
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* strict type-checking.. See the
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* "unnecessary" pointer comparison.
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*/
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#define min(x,y) ({ \
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typeof(x) _x = (x); \
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typeof(y) _y = (y); \
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(void) (&_x == &_y); \
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_x < _y ? _x : _y; })
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#define max(x,y) ({ \
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typeof(x) _x = (x); \
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typeof(y) _y = (y); \
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(void) (&_x == &_y); \
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_x > _y ? _x : _y; })
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#define min_t(type,x,y) \
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({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
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#define max_t(type,x,y) \
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({ type __x = (x); type __y = (y); __x > __y ? __x: __y; })
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#define PCI_ANY_ID (~0)
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#define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d))!=-1)
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