46c3e64a46
git-svn-id: svn://kolibrios.org@6321 a494cfbc-eb01-0410-851d-a64ba20cac60
329 lines
8.4 KiB
C
329 lines
8.4 KiB
C
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#include <drm/drmP.h>
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#include <drm/radeon_drm.h>
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#include "radeon.h"
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#include "radeon_object.h"
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#include <display.h>
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#include "r100d.h"
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display_t *os_display;
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static cursor_t* __stdcall select_cursor(cursor_t *cursor);
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static void __stdcall move_cursor(cursor_t *cursor, int x, int y);
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extern void __attribute__((regparm(1))) destroy_cursor(cursor_t *cursor);
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void disable_mouse(void)
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{};
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int init_cursor(cursor_t *cursor)
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{
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struct radeon_device *rdev;
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uint32_t *bits;
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uint32_t *src;
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int i,j;
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int r;
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rdev = (struct radeon_device *)os_display->ddev->dev_private;
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r = radeon_bo_create(rdev, CURSOR_WIDTH*CURSOR_HEIGHT*4,
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4096, false, RADEON_GEM_DOMAIN_VRAM, 0, NULL, NULL, (struct radeon_bo**)&cursor->cobj);
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if (unlikely(r != 0))
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return r;
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r = radeon_bo_reserve(cursor->cobj, false);
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if (unlikely(r != 0))
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return r;
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r = radeon_bo_pin(cursor->cobj, RADEON_GEM_DOMAIN_VRAM, NULL);
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if (unlikely(r != 0))
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return r;
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r = radeon_bo_kmap(cursor->cobj, (void**)&bits);
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if (r) {
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DRM_ERROR("radeon: failed to map cursor (%d).\n", r);
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return r;
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};
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src = cursor->data;
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for(i = 0; i < 32; i++)
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{
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for(j = 0; j < 32; j++)
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*bits++ = *src++;
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for(j = 32; j < CURSOR_WIDTH; j++)
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*bits++ = 0;
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}
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for(i = 0; i < CURSOR_WIDTH*(CURSOR_HEIGHT-32); i++)
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*bits++ = 0;
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radeon_bo_kunmap(cursor->cobj);
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// cursor->header.destroy = destroy_cursor;
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return 0;
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};
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void __attribute__((regparm(1))) destroy_cursor(cursor_t *cursor)
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{
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list_del(&cursor->list);
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radeon_bo_unpin(cursor->cobj);
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KernelFree(cursor->data);
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__DestroyObject(cursor);
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};
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static void radeon_show_cursor()
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{
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struct radeon_device *rdev = (struct radeon_device *)os_display->ddev->dev_private;
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if (ASIC_IS_DCE4(rdev)) {
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WREG32(RADEON_MM_INDEX, EVERGREEN_CUR_CONTROL);
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WREG32(RADEON_MM_DATA, EVERGREEN_CURSOR_EN |
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EVERGREEN_CURSOR_MODE(EVERGREEN_CURSOR_24_8_PRE_MULT));
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} else if (ASIC_IS_AVIVO(rdev)) {
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WREG32(RADEON_MM_INDEX, AVIVO_D1CUR_CONTROL);
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WREG32(RADEON_MM_DATA, AVIVO_D1CURSOR_EN |
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(AVIVO_D1CURSOR_MODE_24BPP << AVIVO_D1CURSOR_MODE_SHIFT));
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} else {
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WREG32(RADEON_MM_INDEX, RADEON_CRTC_GEN_CNTL);
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WREG32_P(RADEON_MM_DATA, (RADEON_CRTC_CUR_EN |
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(RADEON_CRTC_CUR_MODE_24BPP << RADEON_CRTC_CUR_MODE_SHIFT)),
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~(RADEON_CRTC_CUR_EN | RADEON_CRTC_CUR_MODE_MASK));
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}
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}
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cursor_t* __stdcall select_cursor(cursor_t *cursor)
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{
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struct radeon_device *rdev;
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cursor_t *old;
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uint32_t gpu_addr;
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rdev = (struct radeon_device *)os_display->ddev->dev_private;
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old = os_display->cursor;
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os_display->cursor = cursor;
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gpu_addr = radeon_bo_gpu_offset(cursor->cobj);
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if (ASIC_IS_DCE4(rdev))
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{
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WREG32(EVERGREEN_CUR_SURFACE_ADDRESS_HIGH, 0);
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WREG32(EVERGREEN_CUR_SURFACE_ADDRESS, gpu_addr);
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}
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else if (ASIC_IS_AVIVO(rdev))
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{
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if (rdev->family >= CHIP_RV770)
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WREG32(R700_D1CUR_SURFACE_ADDRESS_HIGH, 0);
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WREG32(AVIVO_D1CUR_SURFACE_ADDRESS, gpu_addr);
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}
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else {
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WREG32(RADEON_CUR_OFFSET, gpu_addr - rdev->mc.vram_start);
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}
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return old;
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};
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static void radeon_lock_cursor(bool lock)
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{
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struct radeon_device *rdev;
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rdev = (struct radeon_device *)os_display->ddev->dev_private;
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uint32_t cur_lock;
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if (ASIC_IS_DCE4(rdev)) {
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cur_lock = RREG32(EVERGREEN_CUR_UPDATE);
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if (lock)
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cur_lock |= EVERGREEN_CURSOR_UPDATE_LOCK;
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else
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cur_lock &= ~EVERGREEN_CURSOR_UPDATE_LOCK;
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WREG32(EVERGREEN_CUR_UPDATE, cur_lock);
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} else if (ASIC_IS_AVIVO(rdev)) {
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cur_lock = RREG32(AVIVO_D1CUR_UPDATE);
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if (lock)
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cur_lock |= AVIVO_D1CURSOR_UPDATE_LOCK;
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else
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cur_lock &= ~AVIVO_D1CURSOR_UPDATE_LOCK;
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WREG32(AVIVO_D1CUR_UPDATE, cur_lock);
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} else {
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cur_lock = RREG32(RADEON_CUR_OFFSET);
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if (lock)
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cur_lock |= RADEON_CUR_LOCK;
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else
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cur_lock &= ~RADEON_CUR_LOCK;
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WREG32(RADEON_CUR_OFFSET, cur_lock);
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}
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}
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void __stdcall move_cursor(cursor_t *cursor, int x, int y)
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{
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struct radeon_device *rdev;
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rdev = (struct radeon_device *)os_display->ddev->dev_private;
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int hot_x = cursor->hot_x;
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int hot_y = cursor->hot_y;
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int w = 32;
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radeon_lock_cursor(true);
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if (ASIC_IS_DCE4(rdev)) {
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WREG32(EVERGREEN_CUR_POSITION,(x << 16) | y);
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WREG32(EVERGREEN_CUR_HOT_SPOT, (hot_x << 16) | hot_y);
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WREG32(EVERGREEN_CUR_SIZE, ((w - 1) << 16) | 31);
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} else if (ASIC_IS_AVIVO(rdev)) {
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WREG32(AVIVO_D1CUR_POSITION, (x << 16) | y);
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WREG32(AVIVO_D1CUR_HOT_SPOT, (hot_x << 16) | hot_y);
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WREG32(AVIVO_D1CUR_SIZE, ((w - 1) << 16) | 31);
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} else {
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uint32_t gpu_addr;
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int xorg =0, yorg=0;
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x = x - hot_x;
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y = y - hot_y;
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if( x < 0 )
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{
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xorg = -x + 1;
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x = 0;
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}
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if( y < 0 )
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{
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yorg = -hot_y + 1;
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y = 0;
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};
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WREG32(RADEON_CUR_HORZ_VERT_OFF,
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(RADEON_CUR_LOCK | (xorg << 16) | yorg ));
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WREG32(RADEON_CUR_HORZ_VERT_POSN,
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(RADEON_CUR_LOCK | (x << 16) | y));
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gpu_addr = radeon_bo_gpu_offset(cursor->cobj);
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/* offset is from DISP(2)_BASE_ADDRESS */
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WREG32(RADEON_CUR_OFFSET,
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(gpu_addr - rdev->mc.vram_start + (yorg * 256)));
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}
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radeon_lock_cursor(false);
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}
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void __stdcall restore_cursor(int x, int y)
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{
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};
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bool init_display(struct radeon_device *rdev, videomode_t *usermode)
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{
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struct drm_device *dev;
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cursor_t *cursor;
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bool retval = true;
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u32 ifl;
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ENTER();
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os_display = GetDisplay();
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dev = os_display->ddev = rdev->ddev;
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ifl = safe_cli();
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{
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list_for_each_entry(cursor, &os_display->cursors, list)
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{
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init_cursor(cursor);
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};
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os_display->restore_cursor(0,0);
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os_display->init_cursor = init_cursor;
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os_display->select_cursor = select_cursor;
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os_display->show_cursor = NULL;
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os_display->move_cursor = move_cursor;
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os_display->restore_cursor = restore_cursor;
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os_display->disable_mouse = disable_mouse;
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select_cursor(os_display->cursor);
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radeon_show_cursor();
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};
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safe_sti(ifl);
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// init_bitmaps();
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LEAVE();
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return retval;
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};
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struct fb_info *framebuffer_alloc(size_t size, struct device *dev)
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{
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#define BYTES_PER_LONG (BITS_PER_LONG/8)
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#define PADDING (BYTES_PER_LONG - (sizeof(struct fb_info) % BYTES_PER_LONG))
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int fb_info_size = sizeof(struct fb_info);
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struct fb_info *info;
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char *p;
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if (size)
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fb_info_size += PADDING;
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p = kzalloc(fb_info_size + size, GFP_KERNEL);
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if (!p)
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return NULL;
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info = (struct fb_info *) p;
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if (size)
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info->par = p + fb_info_size;
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return info;
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#undef PADDING
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#undef BYTES_PER_LONG
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}
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void framebuffer_release(struct fb_info *info)
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{
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kfree(info);
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}
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/* 23 bits of float fractional data */
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#define I2F_FRAC_BITS 23
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#define I2F_MASK ((1 << I2F_FRAC_BITS) - 1)
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/*
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* Converts unsigned integer into 32-bit IEEE floating point representation.
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* Will be exact from 0 to 2^24. Above that, we round towards zero
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* as the fractional bits will not fit in a float. (It would be better to
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* round towards even as the fpu does, but that is slower.)
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*/
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__pure uint32_t int2float(uint32_t x)
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{
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uint32_t msb, exponent, fraction;
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/* Zero is special */
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if (!x) return 0;
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/* Get location of the most significant bit */
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msb = __fls(x);
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/*
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* Use a rotate instead of a shift because that works both leftwards
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* and rightwards due to the mod(32) behaviour. This means we don't
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* need to check to see if we are above 2^24 or not.
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*/
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fraction = ror32(x, (msb - I2F_FRAC_BITS) & 0x1f) & I2F_MASK;
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exponent = (127 + msb) << I2F_FRAC_BITS;
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return fraction + exponent;
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}
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