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https://github.com/AntKrotov/oberon-07-compiler.git
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RVM32I: мелкие правки + описание
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@@ -201,7 +201,7 @@ BEGIN
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C.Ln;
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C.String("Akron Oberon Compiler v"); C.Int(UTILS.vMajor); C.String("."); C.Int2(UTILS.vMinor);
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C.String(" ("); C.Int(UTILS.bit_depth); C.StringLn("-bit) 2021-01-27");
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C.String(" ("); C.Int(UTILS.bit_depth); C.StringLn("-bit) 2021-01-29");
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C.StringLn("Copyright (c) 2018-2021, Anton Krotov");
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IF inname = "" THEN
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+24
-24
@@ -30,23 +30,23 @@ CONST
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GPRs = {0 .. 2} + {5 .. numGPRs + 1};
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opSTOP = 0; opRET = 1; opENTER = 2; opNEG = 3; opNOT = 4; opABS = 5;
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opXCHG = 6; opLDR8 = 7; opLDR16 = 8; opLDR32 = 9; opPUSH = 10; opPUSHC = 11;
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opPOP = 12; opJGZ = 13; opJZ = 14; opJNZ = 15; opLLA = 16; opJGA = 17;
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opXCHG = 6; opLDB = 7; opLDH = 8; opLDW = 9; opPUSH = 10; opPUSHC = 11;
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opPOP = 12; opJGZ = 13; opJZ = 14; opJNZ = 15; opJNA = 16; opJGA = 17;
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opJLA = 18; opJMP = 19; opCALL = 20; opCALLI = 21;
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opMOV = 22; opMUL = 24; opADD = 26; opSUB = 28; opDIV = 30; opMOD = 32;
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opSTR8 = 34; opSTR16 = 36; opSTR32 = 38; opINCL = 40; opEXCL = 42;
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opSTB = 34; opSTH = 36; opSTW = 38; opINCL = 40; opEXCL = 42;
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opIN = 44; opAND = 46; opOR = 48; opXOR = 50; opASR = 52; opLSR = 54;
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opLSL = 56; opROR = 58; opMIN = 60; opMAX = 62; opEQ = 64; opNE = 66;
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opLT = 68; opLE = 70; opGT = 72; opGE = 74; opBT = 76;
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opMOVC = 23; opMULC = 25; opADDC = 27; opSUBC = 29; opDIVC = 31; opMODC = 33;
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opSTR8C = 35; opSTR16C = 37; opSTR32C = 39; opINCLC = 41; opEXCLC = 43;
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opSTBC = 35; opSTHC = 37; opSTWC = 39; opINCLC = 41; opEXCLC = 43;
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opINC = 45; opANDC = 47; opORC = 49; opXORC = 51; opASRC = 53; opLSRC = 55;
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opLSLC = 57; opRORC = 59; opMINC = 61; opMAXC = 63; opEQC = 65; opNEC = 67;
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opLTC = 69; opLEC = 71; opGTC = 73; opGEC = 75; opBTC = 77;
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opLEA = 78; opLABEL = 79; opSYSCALL = 80; opADDRC = 81; opJNA = 82;
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opLEA = 78; opLABEL = 79; opSYSCALL = 80; opADDRC = 81; opLLA = 82;
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inf = 7F800000H;
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@@ -176,37 +176,37 @@ END sub;
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PROCEDURE ldr32 (r1, r2: INTEGER);
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BEGIN
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Emit(opLDR32, r2 * 256 + r1, 0)
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Emit(opLDW, r2 * 256 + r1, 0)
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END ldr32;
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PROCEDURE ldr16 (r1, r2: INTEGER);
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BEGIN
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Emit(opLDR16, r2 * 256 + r1, 0)
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Emit(opLDH, r2 * 256 + r1, 0)
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END ldr16;
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PROCEDURE ldr8 (r1, r2: INTEGER);
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BEGIN
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Emit(opLDR8, r2 * 256 + r1, 0)
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Emit(opLDB, r2 * 256 + r1, 0)
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END ldr8;
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PROCEDURE str32 (r1, r2: INTEGER);
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BEGIN
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Emit(opSTR32, r1 * 256 + r2, 0)
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Emit(opSTW, r1 * 256 + r2, 0)
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END str32;
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PROCEDURE str16 (r1, r2: INTEGER);
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BEGIN
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Emit(opSTR16, r1 * 256 + r2, 0)
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Emit(opSTH, r1 * 256 + r2, 0)
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END str16;
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PROCEDURE str8 (r1, r2: INTEGER);
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BEGIN
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Emit(opSTR8, r1 * 256 + r2, 0)
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Emit(opSTB, r1 * 256 + r2, 0)
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END str8;
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@@ -293,17 +293,17 @@ BEGIN
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next := cmd.next(IL.COMMAND);
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IF (next.opcode = IL.opSAVE) OR (next.opcode = IL.opSAVE32) OR (next.opcode = IL.opSAVEF) THEN
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UnOp(r1);
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Emit(opSTR32, BP * 256 + r1, param2 * 4);
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Emit(opSTW, BP * 256 + r1, param2 * 4);
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drop;
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cmd := next
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ELSIF next.opcode = IL.opSAVE16 THEN
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UnOp(r1);
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Emit(opSTR16, BP * 256 + r1, param2 * 4);
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Emit(opSTH, BP * 256 + r1, param2 * 4);
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drop;
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cmd := next
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ELSIF next.opcode = IL.opSAVE8 THEN
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UnOp(r1);
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Emit(opSTR8, BP * 256 + r1, param2 * 4);
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Emit(opSTB, BP * 256 + r1, param2 * 4);
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drop;
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cmd := next
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ELSE
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@@ -367,17 +367,17 @@ BEGIN
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|IL.opSAVEC:
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UnOp(r1);
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Emit(opSTR32C, r1, param2);
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Emit(opSTWC, r1, param2);
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drop
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|IL.opSAVE8C:
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UnOp(r1);
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Emit(opSTR8C, r1, param2 MOD 256);
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Emit(opSTBC, r1, param2 MOD 256);
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drop
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|IL.opSAVE16C:
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UnOp(r1);
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Emit(opSTR16C, r1, param2 MOD 65536);
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Emit(opSTHC, r1, param2 MOD 65536);
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drop
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|IL.opSAVE, IL.opSAVE32, IL.opSAVEF:
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@@ -410,11 +410,11 @@ BEGIN
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ldr32(r1, r1)
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|IL.opVADR, IL.opLLOAD32:
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Emit(opLDR32, BP * 256 + GetAnyReg(), param2 * 4)
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Emit(opLDW, BP * 256 + GetAnyReg(), param2 * 4)
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|IL.opVLOAD32:
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r1 := GetAnyReg();
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Emit(opLDR32, BP * 256 + r1, param2 * 4);
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Emit(opLDW, BP * 256 + r1, param2 * 4);
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ldr32(r1, r1)
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|IL.opGLOAD16:
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@@ -423,11 +423,11 @@ BEGIN
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ldr16(r1, r1)
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|IL.opLLOAD16:
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Emit(opLDR16, BP * 256 + GetAnyReg(), param2 * 4)
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Emit(opLDH, BP * 256 + GetAnyReg(), param2 * 4)
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|IL.opVLOAD16:
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r1 := GetAnyReg();
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Emit(opLDR32, BP * 256 + r1, param2 * 4);
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Emit(opLDW, BP * 256 + r1, param2 * 4);
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ldr16(r1, r1)
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|IL.opGLOAD8:
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@@ -436,11 +436,11 @@ BEGIN
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ldr8(r1, r1)
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|IL.opLLOAD8:
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Emit(opLDR8, BP * 256 + GetAnyReg(), param2 * 4)
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Emit(opLDB, BP * 256 + GetAnyReg(), param2 * 4)
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|IL.opVLOAD8:
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r1 := GetAnyReg();
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Emit(opLDR32, BP * 256 + r1, param2 * 4);
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Emit(opLDW, BP * 256 + r1, param2 * 4);
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ldr8(r1, r1)
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|IL.opLOAD8:
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@@ -778,7 +778,7 @@ BEGIN
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|IL.opSBOOLC:
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UnOp(r1);
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Emit(opSTR8C, r1, ORD(param2 # 0));
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Emit(opSTBC, r1, ORD(param2 # 0));
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drop
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|IL.opINCC:
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