forked from KolibriOS/kolibrios
Andrew Dent
4165acdf83
- To better support git, remove SVN dependant `$Revision$` from file headers. This does *not* remove: the use of `__REV__` macro in `boostr.inc` and `kernel.asm` - Header Copyright notices updated to 2024. - Minimal white space cleanup (trailing spaces automatically removed). - Note: `asmxygen.py` has a *large* amount of whitespace cleanup, due to incorrect line endings. git-svn-id: svn://kolibrios.org@10051 a494cfbc-eb01-0410-851d-a64ba20cac60
208 lines
5.8 KiB
NASM
208 lines
5.8 KiB
NASM
; Simple test for ring-3 debugging of mtrr.inc.
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; Contains some inputs taken from real-life MTRRs and expected outputs.
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format PE console
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;include 'win32a.inc'
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include '../proc32.inc'
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include '../struct.inc'
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entry start
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; one test has 8, another test has 10
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; this is the maximal value for storing/copying, real value is in MTRRCAP
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MAX_VARIABLE_MTRR = 10
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start:
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; Copy test inputs, run init_pat_mtrr, compare with test outputs. Repeat.
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mov esi, test1_in_data
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mov edi, mtrrdata
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mov ecx, mtrrdata_size / 4
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rep movsd
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call init_pat_mtrr
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mov esi, test1_out_data
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mov edi, mtrrdata
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mov ecx, mtrrdata_size / 4
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repz cmpsd
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jnz .fail
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mov esi, test2_in_data
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mov edi, mtrrdata
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mov ecx, mtrrdata_size / 4
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rep movsd
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call init_pat_mtrr
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mov esi, test2_out_data
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mov edi, mtrrdata
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mov ecx, mtrrdata_size / 4
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repz cmpsd
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jnz .fail
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ret
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.fail:
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int3
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jmp $
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; Helper procedure for _rdmsr/_wrmsr, replacements of rdmsr/wrmsr.
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; Returns pointer to memory containing the given MSR.
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; in: ecx = MSR
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; out: esi -> MSR data
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proc get_msr_ptr
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mov esi, mtrrcap
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cmp ecx, 0xFE
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jz .ok
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mov esi, mtrr_def_type
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cmp ecx, 0x2FF
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jz .ok
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lea esi, [ecx-0x200]
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cmp esi, MAX_VARIABLE_MTRR*2
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jae .fail
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lea esi, [mtrr+esi*8]
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.ok:
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ret
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.fail:
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int3
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ret
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endp
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; Emulates rdmsr.
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proc _rdmsr
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push esi
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call get_msr_ptr
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mov eax, [esi]
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mov edx, [esi+4]
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pop esi
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ret
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endp
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; Emulates wrmsr.
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proc _wrmsr
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push esi
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call get_msr_ptr
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mov [esi], eax
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mov [esi+4], edx
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pop esi
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ret
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endp
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; Macro to substitute rdmsr/wrmsr with emulating code.
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macro rdmsr
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{
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call _rdmsr
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}
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macro wrmsr
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{
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call _wrmsr
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}
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; Our emulation of rdmsr/wrmsr has nothing to do with real cache
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; and system-wide settings,
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; remove all attempts to wbinvd and disable/enable cache in cr0.
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macro wbinvd
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{
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}
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macro mov a,b
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{
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if ~(a eq cr0) & ~(b eq cr0)
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mov a, b
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end if
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}
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macro movi r,i
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{
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push i
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pop r
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}
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include '../kglobals.inc'
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CAPS_MTRR = 12
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MSR_MTRR_DEF_TYPE = 0x2FF
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CAPS_PGE = 13
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CAPS_PAT = 16
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MSR_CR_PAT = 0x277
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PAT_VALUE = 0x00070106 ; (UC<<24)|(UCM<<16)|(WC<<8)|WB
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MEM_WB = 6 ;write-back memory
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MEM_WC = 1 ;write combined memory
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MEM_UC = 0 ;uncached memory
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include 'mtrr.inc'
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BOOT_VARS = 0
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BOOT.mtrr db 1
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align 4
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cpu_caps dd 1 shl CAPS_MTRR
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LFBAddress dd 0xE0000000
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LFBSize dd 0x10000000
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MEM_AMOUNT dd 0 ; not used, needed for compilation
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align 4
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; Test 1: input
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test1_in_data:
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test1_phys_addr_width db 36
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rb 3
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test1_in_mtrrcap dq 0xD08
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test1_in_mtrr_def_type dq 0xC00
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test1_in_mtrrs:
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dq 0x000000006, 0xF00000800
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dq 0x100000006, 0xFC0000800
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dq 0x0BC000000, 0xFFC000800
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dq 0x0C0000000, 0xFC0000800
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dq 0x138000000, 0xFF8000800
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dq 0, 0
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dq 0, 0
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dq 0, 0
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dq -1, -1 ; not used
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dq -1, -1 ; not used
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; Test 1: output
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test1_out_data:
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dd 36 ; phys_addr_width, readonly
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dq 0xD08 ; MTRRCAP, readonly
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dq 0xC00 ; MTRR_DEF_TYPE, should be the same
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dq 0x000000006, 0xF80000800
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dq 0x080000006, 0xFC0000800
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dq 0x0BC000000, 0xFFC000800
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dq 0x100000006, 0xFC0000800
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dq 0x138000000, 0xFF8000800
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dq 0x0E0000001, 0xFFF000800 ; added for [LFBAddress]
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dq 0, 0
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dq 0, 0
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dq -1, -1 ; not used
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dq -1, -1 ; not used
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; Test 2: input
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test2_in_data:
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test2_phys_addr_width db 39
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rb 3
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test2_in_mtrrcap dq 0xD0A
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test2_in_mtrr_def_type dq 0xC00
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test2_in_mtrrs:
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dq 0x0000000006, 0x7F00000800
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dq 0x0100000006, 0x7FE0000800
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dq 0x00E0000000, 0x7FE0000800
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dq 0x00DC000000, 0x7FFC000800
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dq 0x00DBC00000, 0x7FFFC00800
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dq 0x011F800000, 0x7FFF800800
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dq 0x011F400000, 0x7FFFC00800
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dq 0x011F200000, 0x7FFFE00800
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dq 0, 0
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dq 0, 0
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; Test 2: output
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test2_out_data:
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dd 39 ; phys_addr_width, readonly
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dq 0xD0A ; MTRRCAP, readonly
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dq 0xC00 ; MTRR_DEF_TYPE, should be the same
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dq 0x0000000006, 0x7F80000800
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dq 0x0080000006, 0x7FC0000800
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dq 0x00C0000006, 0x7FE0000800
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dq 0x00DC000000, 0x7FFC000800
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dq 0x00DBC00000, 0x7FFFC00800
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dq 0x0100000006, 0x7FE0000800
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dq 0x011F800000, 0x7FFF800800
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dq 0x011F400000, 0x7FFFC00800
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dq 0x011F200000, 0x7FFFE00800
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dq 0x00E0000001, 0x7FFF000800 ; added for [LFBAddress]
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IncludeIGlobals
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align 4
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mtrrdata:
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cpu_phys_addr_width db ?
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rb 3
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mtrrcap dq ?
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mtrr_def_type dq ?
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mtrr rq MAX_VARIABLE_MTRR*2
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mtrrdata_size = $ - mtrrdata
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IncludeUGlobals
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