init.inc optimized for AMD chipsets

git-svn-id: svn://kolibrios.org@1683 a494cfbc-eb01-0410-851d-a64ba20cac60
This commit is contained in:
Artem Jerdev (art_zh) 2010-11-01 11:30:29 +00:00
parent 3c2f9c9b90
commit 74c5e79c92
9 changed files with 3262 additions and 3446 deletions

File diff suppressed because it is too large Load Diff

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@ -3,6 +3,7 @@
;; Copyright (C) 2010 KolibriOS team. All rights reserved. ;; ;; Copyright (C) 2010 KolibriOS team. All rights reserved. ;;
;; Distributed under terms of the GNU General Public License ;; ;; Distributed under terms of the GNU General Public License ;;
;; ;; ;; ;;
;; HT.inc ;; ;;
;; ;; ;; ;;
;; AMD HyperTransport bus control ;; ;; AMD HyperTransport bus control ;;
;; ;; ;; ;;
@ -22,6 +23,9 @@ HTIU_NB_INDEX equ 0xF0000094 ; HyperTransport indirect config space access
; This code is a part of Kolibri-A and will only work with AMD RS760+ chipsets ; This code is a part of Kolibri-A and will only work with AMD RS760+ chipsets
; ;
;============================================================================= ;=============================================================================
org $-OS_BASE ; physical addresses needed at initial stage
align 4 align 4
;------------------------------------------ ;------------------------------------------
@ -71,7 +75,7 @@ rs7xx_nbconfig_write_pci:
align 4 align 4
rs7xx_unlock_bar3: rs7xx_unlock_bar3:
mov eax, NB_MISC_INDEX mov eax, NB_MISC_INDEX
mov ebx, 0x080 ; reg#0; write-enable mov ebx, 0x080 ; NBMISCIND:0x0; write-enable
call rs7xx_nbconfig_write_pci ; set index call rs7xx_nbconfig_write_pci ; set index
mov eax, NB_MISC_DATA mov eax, NB_MISC_DATA
call rs7xx_nbconfig_read_pci ; read data call rs7xx_nbconfig_read_pci ; read data
@ -84,6 +88,90 @@ rs7xx_unlock_bar3:
call rs7xx_nbconfig_write_pci ; set index call rs7xx_nbconfig_write_pci ; set index
ret ret
;***************************************************************************
; Function
; rs7xx_pcie_init:
;
; Description
; PCIe extended (memory-mapped) config space detection
;
;***************************************************************************
align 4
rs7xx_pcie_init:
call rs7xx_unlock_bar3
mov al, 0x7C ; NB_IOC_CFG_CNTL
call rs7xx_nbconfig_read_pci
mov ebx, eax
; call rs7xx_nbconfig_flush_pci
test ebx, 0x20000000 ; BAR3 locked?
jz $
mov al, 0x84 ; NB_PCI_ARB
call rs7xx_nbconfig_read_pci
shr eax,16
and ax, 7 ; the Bus range lays here:
jnz @f
mov ax, 8 ; 1=2Mb, 2=4MB, 3=8MB, 4=16MB
@@:
mov word[PCIe_bus_range-OS_BASE], ax ; 5=32Mb, 6=64MB, 7=128Mb, 8=256Mb
mov cl, al
call rs7xx_nbconfig_flush_pci
dec cl ; <4M ?
jz @f
dec cl ; one PDE needed anyway
@@:
mov ebx, 1
shl ebx, cl
mov word[mmio_pcie_cfg_pdes-OS_BASE], bx ; 1..64 PDE(s) needed,
shl ebx, 22
mov dword[mmio_pcie_cfg_lim-OS_BASE], ebx ; or 4..256Mb space to map
dec dword[mmio_pcie_cfg_lim-OS_BASE]
mov al, 0x1C ; NB_BAR3_PCIEXP_MMCFG
call rs7xx_nbconfig_read_pci
mov ebx, eax
call rs7xx_nbconfig_flush_pci
mov eax, ebx
and eax, 0xFFE00000 ; valid bits [31..21]
jz $ ; NB BAR3 may be invisible!
.addr_found:
mov dword[mmio_pcie_cfg_addr-OS_BASE], eax ; physical address (lower 32 bits)
add dword[mmio_pcie_cfg_lim-OS_BASE], eax
or eax, (PG_NOCACHE + PG_SHARED + PG_LARGE + PG_UW) ; by the way, UW is unsafe!
mov ecx, PCIe_CONFIG_SPACE ; linear address
mov ebx, ecx
shr ebx, 20
add ebx, (sys_pgdir - OS_BASE) ; PgDir entry @
mov dl, byte[mmio_pcie_cfg_pdes-OS_BASE] ; 1 page = 4M in address space
cmp dl, 0x34 ; =(USER_DMA_BUFFER - PCIe_CONFIG_SPACE) / 4M
jb @f
mov dl, 0x33
mov byte[mmio_pcie_cfg_pdes-OS_BASE], dl
@@:
xor dx, dx ; PDEs counter
.write_pde:
mov dword[ebx], eax ; map 4 buses
add bx, 4 ; new PDE
add eax, 0x400000 ; +4M phys.
add ecx, 0x400000 ; +4M lin.
cmp dl, byte[mmio_pcie_cfg_pdes-OS_BASE]
jae .pcie_cfg_mapped
inc dl
jmp .write_pde
; mov eax, cr3
; mov cr3, eax ; flush TLB
.pcie_cfg_mapped:
ret ; <<< OK >>>
; ================================================================================
org OS_BASE+$ ; back to the linear address space
;-------------------------------------------------------------- ;--------------------------------------------------------------
align 4 align 4
rs780_read_misc: rs780_read_misc:
@ -192,96 +280,4 @@ rs780_write_htiu:
;***************************************************************************
; Function
; rs7xx_pcie_init:
;
; Description
; PCIe extended (memory-mapped) config space detection
;
;***************************************************************************
align 4
rs7xx_pcie_init:
call rs7xx_unlock_bar3
mov al, 0x7C ; NB_IOC_CFG_CNTL
call rs7xx_nbconfig_read_pci
mov ebx, eax
call rs7xx_nbconfig_flush_pci
test ebx, 0x20000000 ; BAR3 locked?
jz .rs7xx_pcie_blocked
mov al, 0x84 ; NB_PCI_ARB
call rs7xx_nbconfig_read_pci
shr eax,16
and ax, 7 ; the Bus range lays here:
jnz @f
mov ax, 8 ; 1=2Mb, 2=4MB, 3=8MB, 4=16MB
@@:
mov [PCIe_bus_range], ax ; 5=32Mb, 6=64MB, 7=128Mb, 8=256Mb
mov cl, al
call rs7xx_nbconfig_flush_pci
dec cl ; <4M ?
jnz @f
inc cl ; one PDE needed anyway
@@:
dec cl
mov ebx, 1
shl ebx, cl
mov [mmio_pcie_cfg_pdes], bx ; 1..64 PDE(s) needed,
shl ebx, 22
mov [mmio_pcie_cfg_lim], ebx ; or 4..256Mb space to map
dec [mmio_pcie_cfg_lim]
mov al, 0x1C ; NB_BAR3_PCIEXP_MMCFG
call rs7xx_nbconfig_read_pci
mov ebx, eax
call rs7xx_nbconfig_flush_pci
mov eax, ebx
and eax, 0xFFE00000 ; valid bits [31..21]
jz .rs7xx_pcie_blocked ; NB BAR3 may be invisible!
; try to get pcie ecfg address indirectly
.addr_found:
mov [mmio_pcie_cfg_addr], eax ; physical address (lower 32 bits)
add [mmio_pcie_cfg_lim], eax
or eax, (PG_SHARED + PG_LARGE + PG_UW) ; by the way, UW is unsafe!
mov ecx, PCIe_CONFIG_SPACE ; linear address
mov ebx, ecx
shr ebx, 20
add ebx, sys_pgdir ; PgDir entry @
mov dl, byte[mmio_pcie_cfg_pdes] ; 1 page = 4M in address space
cmp dl, (USER_DMA_BUFFER - PCIe_CONFIG_SPACE) / 4194304
jb @f
mov dl, ((USER_DMA_BUFFER - PCIe_CONFIG_SPACE) / 4194304) - 1
mov byte[mmio_pcie_cfg_pdes], dl
@@:
xor dx, dx ; PDEs counter
@@:
mov dword[ebx], eax ; map 4 buses
add bx, 4 ; new PDE
add eax, 0x400000 ; +4M phys.
add ecx, 0x400000 ; +4M lin.
cmp dl, byte[mmio_pcie_cfg_pdes]
jnc .pcie_cfg_mapped
inc dl
jmp @b
mov eax, cr3
mov cr3, eax ; flush TLB
.pcie_cfg_mapped:
mov esi, boot_pcie_ok
call boot_log
ret ; <<< OK >>>
.rs7xx_pcie_fail:
mov esi, boot_rs7xx_fail
call boot_log
jmp $
.rs7xx_pcie_blocked:
mov esi, boot_rs7xx_blkd
call boot_log
jmp $

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@ -87,10 +87,9 @@ pci_ext_config:
jb .check_HT_mmio jb .check_HT_mmio
.pcie_failed: .pcie_failed:
mov esi, boot_pcie_fail jmp $
call boot_log ; xor eax, eax
xor eax, eax ; ret ; <<<<<<<<< FAILURE >>>>>>>>>
ret ; <<<<<<<<< FAILURE >>>>>>>>>
;-------------------------------------------------------------------------- ;--------------------------------------------------------------------------

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@ -252,8 +252,13 @@ Screen_Max_Y equ (OS_BASE+0x000FE04)
BytesPerScanLine equ (OS_BASE+0x000FE08) BytesPerScanLine equ (OS_BASE+0x000FE08)
SCR_MODE equ (OS_BASE+0x000FE0C) SCR_MODE equ (OS_BASE+0x000FE0C)
LFBAddress equ (OS_BASE+0x000FE80) mmio_pcie_cfg_addr equ (OS_BASE+0x000FE74)
UserDMAaddr equ (OS_BASE+0x000FE84) mmio_pcie_cfg_lim equ (OS_BASE+0x000FE78)
mmio_pcie_cfg_pdes equ (OS_BASE+0x000FE7C)
PCIe_bus_range equ (OS_BASE+0x000FE7E)
UserDMAaddr equ (OS_BASE+0x000FE80)
LFBAddress equ (OS_BASE+0x000FE84)
BTN_ADDR equ (OS_BASE+0x000FE88) BTN_ADDR equ (OS_BASE+0x000FE88)
MEM_AMOUNT equ (OS_BASE+0x000FE8C) MEM_AMOUNT equ (OS_BASE+0x000FE8C)

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@ -57,21 +57,15 @@ keymap_alt:
boot_setmouse db 'Setting mouse',0 boot_setmouse db 'Setting mouse',0
boot_windefs db 'Setting window defaults',0 boot_windefs db 'Setting window defaults',0
boot_bgr db 'Calculating background',0 boot_bgr db 'Calculating background',0
boot_resirqports db 'Reserving IRQs & ports',0 ; boot_resirqports db 'Reserving IRQs & ports',0
; boot_setrports db 'Setting addresses for IRQs',0 ; boot_setrports db 'Setting addresses for IRQs',0
boot_setostask db 'Setting OS task',0 boot_setostask db 'Setting OS task',0
boot_allirqs db 'Unmasking all IRQs',0 boot_allirqs db 'Unmasking all IRQs',0
boot_tsc db 'Reading TSC',0 boot_tsc db 'Reading TSC',0
boot_cpufreq db 'CPU frequency is ',' ',' MHz',0 boot_cpufreq db 'CPU frequency is ',' ',' MHz',0
; boot_pal_ega db 'Setting EGA/CGA 320x200 palette',0
; boot_pal_vga db 'Setting VGA 640x480 palette',0
boot_failed db 'Failed to start first app',0 boot_failed db 'Failed to start first app',0
boot_mtrr db 'Setting MTRR',0 boot_mtrr db 'Setting MTRR',0
boot_uDMA_ok db 'Set user DMA OK',0 boot_uDMA_ok db 'Set user DMA OK',0
boot_pcie_ok db 'PCIe config set OK',0
boot_pcie_fail db 'PCIe config XXX failed XXX',0
boot_rs7xx_fail db 'RS7xx config XXX failed XXX',0
boot_rs7xx_blkd db 'RS7xx config ---------- FAILED -----------',0
if preboot_blogesc if preboot_blogesc
boot_tasking db 'All set - press ESC to start',0 boot_tasking db 'All set - press ESC to start',0
end if end if
@ -87,7 +81,7 @@ msg_www db 'please visit www.kolibrios.org',13,10,0
msg_CR db 13,10,0 msg_CR db 13,10,0
aSis db 'SIS',0 aSis db 'SIS',0
intel_str db "GenuineIntel",0 ;intel_str db "GenuineIntel",0
AMD_str db "AuthenticAMD",0 AMD_str db "AuthenticAMD",0
;szSound db 'SOUND',0 ;szSound db 'SOUND',0
@ -469,4 +463,6 @@ BiosDisksData rb 200h
BiosDiskCaches rb 80h*(cache_ide1-cache_ide0) BiosDiskCaches rb 80h*(cache_ide1-cache_ide0)
BiosDiskPartitions rd 80h BiosDiskPartitions rd 80h
diff16 "UGlobals start ",0,$
IncludeUGlobals IncludeUGlobals

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@ -8,380 +8,316 @@
$Revision$ $Revision$
MEM_WB equ 6 ;write-back memory MEM_WB equ 6 ;write-back memory
MEM_WC equ 1 ;write combined memory MEM_WC equ 1 ;write combined memory
MEM_UC equ 0 ;uncached memory MEM_UC equ 0 ;uncached memory
; ======================================================================
align 4
preinit_mem:
; clear [0x280000..HEAP_BASE]
xor eax,eax
mov edi,0x280000 ; 0x280000 = ramdisk FAT ?
mov ecx,(HEAP_BASE-OS_BASE-0x280000) / 4
cld
rep stosd
; clear [0x40000..0x90000]
mov edi,0x50000 ; 0x50000 is somewhere inside kernel code?
mov ecx,(0x90000-0x50000)/4
rep stosd
; clear undefined kernel globals
mov edi, endofcode-OS_BASE
mov ecx, (uglobals_size/4)+4
rep stosd
; save [0..0xffff]
xor esi, esi
mov edi,0x2F0000 ; low mem storage area
mov ecx, 0x10000 / 4
rep movsd
; clear [0x1000..0x0ffff]
mov edi,0x1000
mov ecx,0xf000 / 4
rep stosd
; clear <sys_pgdir> table
mov edi, sys_pgdir-OS_BASE
mov ecx, 4096/4
rep stosd
ret
; ======================================================================
align 4 align 4
proc init_mem proc init_mem
; calculate maximum allocatable address and number of allocatable pages
mov edi, BOOT_VAR-OS_BASE + 0x9104
mov ecx, [edi-4]
xor esi, esi ; esi will hold total amount of memory
xor edx, edx ; edx will hold maximum allocatable address
.calcmax:
; round all to pages
mov eax, [edi]
test eax, 0xFFF
jz @f
neg eax
and eax, 0xFFF
add [edi], eax
adc dword [edi+4], 0
sub [edi+8], eax
sbb dword [edi+12], 0
jc .unusable
@@:
and dword [edi+8], not 0xFFF
jz .unusable
; ignore memory after 4 Gb
cmp dword [edi+4], 0
jnz .unusable
mov eax, [edi]
cmp dword [edi+12], 0
jnz .overflow
add eax, [edi+8]
jnc @f
.overflow:
mov eax, 0xFFFFF000
@@:
cmp edx, eax
jae @f
mov edx, eax
@@:
sub eax, [edi]
mov [edi+8], eax
add esi, eax
jmp .usable
.unusable:
and dword [edi+8], 0
.usable:
add edi, 20
loop .calcmax
.calculated:
mov [MEM_AMOUNT-OS_BASE], esi
mov [pg_data.mem_amount-OS_BASE], esi
shr esi, 12
mov [pg_data.pages_count-OS_BASE], esi
shr edx, 12 mov esi, (PCIe_CONFIG_SPACE-OS_BASE) ; esi will hold total amount of memory
add edx, 31 mov edx, esi ; edx will hold maximum allocatable address
and edx, not 31
shr edx, 3
mov [pg_data.pagemap_size-OS_BASE], edx
add edx, (sys_pgmap-OS_BASE)+4095 mov [MEM_AMOUNT-OS_BASE], esi
and edx, not 4095 mov [pg_data.mem_amount-OS_BASE], esi
mov [tmp_page_tabs], edx shr esi, 12
mov [pg_data.pages_count-OS_BASE], esi ; max number of PTEs ?
mov edx, esi shr edx, 12
and edx, -1024 add edx, 31
cmp edx, (OS_BASE/4096) and edx, not 31
jbe @F shr edx, 3
mov edx, (OS_BASE/4096) mov [pg_data.pagemap_size-OS_BASE], edx ; size of sys_pgmap structure
jmp .set
@@:
cmp edx, (HEAP_BASE-OS_BASE+HEAP_MIN_SIZE)/4096
jae .set
mov edx, (HEAP_BASE-OS_BASE+HEAP_MIN_SIZE)/4096
.set:
mov [pg_data.kernel_pages-OS_BASE], edx
shr edx, 10
mov [pg_data.kernel_tables-OS_BASE], edx
xor eax, eax add edx, (sys_pgmap-OS_BASE)+4095
mov edi, sys_pgdir-OS_BASE and edx, not 4095
mov ecx, 4096/4 mov [tmp_page_tabs], edx ; free zone to build PTEs
cld
rep stosd
mov edx, (sys_pgdir-OS_BASE)+ 0x800; (OS_BASE shr 20) mov edx, (HEAP_BASE-OS_BASE+HEAP_MIN_SIZE)/4096
mov [pg_data.kernel_pages -OS_BASE], edx
shr edx, 10
mov [pg_data.kernel_tables-OS_BASE], edx
mov ebx, cr4 mov edx, (sys_pgdir-OS_BASE)+ 0x800 ; (0x800 = OS_BASE shr 20)
or ebx, CR4_PSE
mov eax, PG_LARGE+PG_SW
mov cr4, ebx
dec [pg_data.kernel_tables-OS_BASE]
mov [edx], eax mov ebx, cr4
add edx, 4 or ebx, CR4_PSE
mov eax, PG_LARGE+PG_SW
mov cr4, ebx
dec [pg_data.kernel_tables-OS_BASE]
mov edi, [tmp_page_tabs] mov [edx], eax ; map first (physical) 4M bytes
mov ecx, [pg_data.kernel_tables-OS_BASE] add edx, 4
shl ecx, 10
xor eax, eax
rep stosd
mov ecx, [pg_data.kernel_tables-OS_BASE] mov edi, [tmp_page_tabs]
mov eax, [tmp_page_tabs] mov ecx, [pg_data.kernel_pages -OS_BASE] ; safety cleaning of already-zeroed space
or eax, PG_SW xor eax, eax
mov edi, edx rep stosd
mov ecx, [pg_data.kernel_tables-OS_BASE] ; build some PDEs to hold empty PTEs
mov eax, [tmp_page_tabs]
or eax, PG_SW
mov edi, edx ; edi = sys_pgdir+0x804
.map_kernel_tabs: .map_kernel_tabs:
stosd stosd
add eax, 0x1000 add eax, 0x1000
dec ecx dec ecx
jnz .map_kernel_tabs jnz .map_kernel_tabs
mov dword [sys_pgdir-OS_BASE+(page_tabs shr 20)], sys_pgdir+PG_SW-OS_BASE ; map pagetables to linear space
mov dword [sys_pgdir-OS_BASE+(page_tabs shr 20)], sys_pgdir+PG_SW-OS_BASE
mov edi, (sys_pgdir-OS_BASE) mov edi, (sys_pgdir-OS_BASE)
lea esi, [edi+(OS_BASE shr 20)] lea esi, [edi+(OS_BASE shr 20)]
movsd movsd
movsd movsd
ret ret
endp endp
align 4 align 4
proc init_page_map proc init_page_map
; mark all memory as unavailable ; mark all memory as unavailable
mov edi, sys_pgmap-OS_BASE mov edi, sys_pgmap-OS_BASE
mov ecx, [pg_data.pagemap_size-OS_BASE] mov ecx, [pg_data.pagemap_size-OS_BASE]
shr ecx, 2 shr ecx, 2
xor eax, eax xor eax, eax
cld cld
rep stosd rep stosd
; scan through memory map and mark free areas as available ; scan through memory map and mark free areas as available
mov ebx, BOOT_VAR-OS_BASE + 0x9104 mov ebx, BOOT_VAR-OS_BASE + 0x9104
mov edx, [ebx-4] mov edx, [ebx-4]
.scanmap: .scanmap:
mov ecx, [ebx+8] mov ecx, [ebx+8]
shr ecx, 12 ; ecx = number of pages shr ecx, 12 ; ecx = number of pages
jz .next jz .next
mov edi, [ebx] mov edi, [ebx]
shr edi, 12 ; edi = first page shr edi, 12 ; edi = first page
mov eax, edi mov eax, edi
shr edi, 5 shr edi, 5
shl edi, 2 shl edi, 2
add edi, sys_pgmap-OS_BASE add edi, sys_pgmap-OS_BASE
and eax, 31 and eax, 31
jz .startok jz .startok
add ecx, eax add ecx, eax
sub ecx, 32 sub ecx, 32
jbe .onedword jbe .onedword
push ecx push ecx
mov ecx, eax mov ecx, eax
or eax, -1 or eax, -1
shl eax, cl shl eax, cl
or [edi], eax or [edi], eax
add edi, 4 add edi, 4
pop ecx pop ecx
.startok: .startok:
push ecx push ecx
shr ecx, 5 shr ecx, 5
or eax, -1 or eax, -1
rep stosd rep stosd
pop ecx pop ecx
and ecx, 31 and ecx, 31
neg eax neg eax
shl eax, cl shl eax, cl
dec eax dec eax
or [edi], eax or [edi], eax
jmp .next jmp .next
.onedword: .onedword:
add ecx, 32 add ecx, 32
sub ecx, eax sub ecx, eax
@@: @@:
bts [edi], eax bts [edi], eax
inc eax inc eax
loop @b loop @b
.next: .next:
add ebx, 20 add ebx, 20
dec edx dec edx
jnz .scanmap jnz .scanmap
; mark kernel memory as allocated (unavailable) ; mark kernel memory as allocated (unavailable)
mov ecx, [tmp_page_tabs] mov ecx, [tmp_page_tabs]
mov edx, [pg_data.pages_count-OS_BASE] mov edx, [pg_data.pages_count-OS_BASE]
shr ecx, 12 shr ecx, 12
add ecx, [pg_data.kernel_tables-OS_BASE] add ecx, [pg_data.kernel_tables-OS_BASE]
sub edx, ecx sub edx, ecx
mov [pg_data.pages_free-OS_BASE], edx mov [pg_data.pages_free-OS_BASE], edx
mov edi, sys_pgmap-OS_BASE mov edi, sys_pgmap-OS_BASE
mov ebx, ecx mov ebx, ecx
shr ecx, 5 shr ecx, 5
xor eax, eax xor eax, eax
rep stosd rep stosd
not eax not eax
mov ecx, ebx mov ecx, ebx
and ecx, 31 and ecx, 31
shl eax, cl shl eax, cl
and [edi], eax and [edi], eax
add edi, OS_BASE add edi, OS_BASE
mov [page_start-OS_BASE], edi; mov [page_start-OS_BASE], edi;
mov ebx, sys_pgmap mov ebx, sys_pgmap
add ebx, [pg_data.pagemap_size-OS_BASE] add ebx, [pg_data.pagemap_size-OS_BASE]
mov [page_end-OS_BASE], ebx mov [page_end-OS_BASE], ebx
mov [pg_data.pg_mutex-OS_BASE], 0 mov [pg_data.pg_mutex-OS_BASE], 0
ret ret
endp endp
align 4 align 4
init_BIOS32: init_BIOS32:
mov edi, 0xE0000 mov edi, 0xE0000
.pcibios_nxt: .pcibios_nxt:
cmp dword[edi], '_32_' ; "magic" word cmp dword[edi], '_32_' ; "magic" word
je .BIOS32_found je .BIOS32_found
.pcibios_nxt2: .pcibios_nxt2:
add edi, 0x10 add edi, 0x10
cmp edi, 0xFFFF0 cmp edi, 0xFFFF0
je .BIOS32_not_found je .BIOS32_not_found
jmp .pcibios_nxt jmp .pcibios_nxt
.BIOS32_found: ; magic word found, check control summ .BIOS32_found: ; magic word found, check control summ
movzx ecx, byte[edi + 9] movzx ecx, byte[edi + 9]
shl ecx, 4 shl ecx, 4
mov esi, edi mov esi, edi
xor eax, eax xor eax, eax
cld ; paranoia cld ; paranoia
@@: lodsb @@: lodsb
add ah, al add ah, al
loop @b loop @b
jnz .pcibios_nxt2 ; control summ must be zero jnz .pcibios_nxt2 ; control summ must be zero
; BIOS32 service found ! ; BIOS32 service found !
mov ebp, [edi + 4] mov ebp, [edi + 4]
mov [bios32_entry], ebp mov [bios32_entry], ebp
; check PCI BIOS present ; check PCI BIOS present
mov eax, '$PCI' mov eax, '$PCI'
xor ebx, ebx xor ebx, ebx
push cs ; special for 'ret far' from BIOS push cs ; special for 'ret far' from BIOS
call ebp call ebp
test al, al test al, al
jnz .PCI_BIOS32_not_found jnz .PCI_BIOS32_not_found
; çäåñü ñîçäàþòñÿ äèñêðèïòîðû äëÿ PCI BIOS ; çäåñü ñîçäàþòñÿ äèñêðèïòîðû äëÿ PCI BIOS
add ebx, OS_BASE add ebx, OS_BASE
dec ecx dec ecx
mov [(pci_code_32-OS_BASE)], cx ;limit 0-15 mov [(pci_code_32-OS_BASE)], cx ;limit 0-15
mov [(pci_data_32-OS_BASE)], cx ;limit 0-15 mov [(pci_data_32-OS_BASE)], cx ;limit 0-15
mov [(pci_code_32-OS_BASE)+2], bx ;base 0-15 mov [(pci_code_32-OS_BASE)+2], bx ;base 0-15
mov [(pci_data_32-OS_BASE)+2], bx ;base 0-15 mov [(pci_data_32-OS_BASE)+2], bx ;base 0-15
shr ebx, 16 shr ebx, 16
mov [(pci_code_32-OS_BASE)+4], bl ;base 16-23 mov [(pci_code_32-OS_BASE)+4], bl ;base 16-23
mov [(pci_data_32-OS_BASE)+4], bl ;base 16-23 mov [(pci_data_32-OS_BASE)+4], bl ;base 16-23
shr ecx, 16 shr ecx, 16
and cl, 0x0F and cl, 0x0F
mov ch, bh mov ch, bh
add cx, D32 add cx, D32
mov [(pci_code_32-OS_BASE)+6], cx ;lim 16-19 & mov [(pci_code_32-OS_BASE)+6], cx ;lim 16-19 &
mov [(pci_data_32-OS_BASE)+6], cx ;base 24-31 mov [(pci_data_32-OS_BASE)+6], cx ;base 24-31
mov [(pci_bios_entry-OS_BASE)], edx mov [(pci_bios_entry-OS_BASE)], edx
; jmp .end ; jmp .end
.PCI_BIOS32_not_found: .PCI_BIOS32_not_found:
; çäåñü äîëæíà çàïîëíÿòñÿ pci_emu_dat ; çäåñü äîëæíà çàïîëíÿòñÿ pci_emu_dat
.BIOS32_not_found: .BIOS32_not_found:
.end: .end:
ret ret
align 4 align 4
proc test_cpu test_cpu: ; only AMD machines supported
locals
cpu_type dd ?
cpu_id dd ?
cpu_Intel dd ?
cpu_AMD dd ?
endl
xor eax, eax xor eax, eax
mov [cpu_type], eax mov [cpu_caps-OS_BASE], eax
mov [cpu_caps-OS_BASE], eax mov [cpu_caps+4-OS_BASE], eax
mov [cpu_caps+4-OS_BASE], eax
pushfd pushfd
pop eax pop eax
mov ecx, eax mov ecx, eax
xor eax, 0x40000 xor eax, 0x40000
push eax push eax
popfd popfd
pushfd pushfd
pop eax pop eax
xor eax, ecx xor eax, ecx
mov [cpu_type], CPU_386 jz $ ; 386
jz .end_cpuid push ecx
push ecx popfd
popfd
mov [cpu_type], CPU_486 mov eax, ecx
mov eax, ecx xor eax, 0x200000
xor eax, 0x200000 push eax
push eax popfd
popfd pushfd
pushfd pop eax
pop eax xor eax, ecx
xor eax, ecx je $ ; 486
je .end_cpuid
mov [cpu_id], 1
xor eax, eax xor eax, eax
cpuid cpuid
mov [cpu_vendor-OS_BASE], ebx mov [cpu_vendor-OS_BASE], ebx
mov [cpu_vendor+4-OS_BASE], edx mov [cpu_vendor+4-OS_BASE], edx
mov [cpu_vendor+8-OS_BASE], ecx mov [cpu_vendor+8-OS_BASE], ecx
cmp ebx, dword [intel_str-OS_BASE]
jne .check_AMD cmp ebx, dword [AMD_str-OS_BASE]
cmp edx, dword [intel_str+4-OS_BASE] jne $
jne .check_AMD cmp edx, dword [AMD_str+4-OS_BASE]
cmp ecx, dword [intel_str+8-OS_BASE] jne $
jne .check_AMD cmp ecx, dword [AMD_str+8-OS_BASE]
mov [cpu_Intel], 1 jne $
cmp eax, 1 cmp eax, 1
jl .end_cpuid jl $
mov eax, 1 mov eax, 1
cpuid cpuid
mov [cpu_sign-OS_BASE], eax mov [cpu_sign-OS_BASE], eax
mov [cpu_info-OS_BASE], ebx mov [cpu_info-OS_BASE], ebx
mov [cpu_caps-OS_BASE], edx mov [cpu_caps-OS_BASE], edx
mov [cpu_caps+4-OS_BASE],ecx mov [cpu_caps+4-OS_BASE],ecx
shr eax, 8
and eax, 0x0f
ret
shr eax, 8
and eax, 0x0f
ret
.end_cpuid:
mov eax, [cpu_type]
ret
.check_AMD:
cmp ebx, dword [AMD_str-OS_BASE]
jne .unknown
cmp edx, dword [AMD_str+4-OS_BASE]
jne .unknown
cmp ecx, dword [AMD_str+8-OS_BASE]
jne .unknown
mov [cpu_AMD], 1
cmp eax, 1
jl .unknown
mov eax, 1
cpuid
mov [cpu_sign-OS_BASE], eax
mov [cpu_info-OS_BASE], ebx
mov [cpu_caps-OS_BASE], edx
mov [cpu_caps+4-OS_BASE],ecx
shr eax, 8
and eax, 0x0f
ret
.unknown:
mov eax, 1
cpuid
mov [cpu_sign-OS_BASE], eax
mov [cpu_info-OS_BASE], ebx
mov [cpu_caps-OS_BASE], edx
mov [cpu_caps+4-OS_BASE],ecx
shr eax, 8
and eax, 0x0f
ret
endp

File diff suppressed because it is too large Load Diff

View File

@ -246,7 +246,7 @@ include "gui/skincode.inc"
; Pci functions ; Pci functions
include "bus/pci/pci32.inc" include "bus/pci/pci32.inc"
include "bus/pci/PCIe.inc" ;include "bus/pci/PCIe.inc"
include "bus/HT.inc" ; AMD HyperTransport bus control include "bus/HT.inc" ; AMD HyperTransport bus control
; Floppy drive controller ; Floppy drive controller

View File

@ -122,9 +122,13 @@
; FE04 dword screen y size ; FE04 dword screen y size
; FE08 dword screen y multiplier ; FE08 dword screen y multiplier
; FE0C dword screen mode ; FE0C dword screen mode
; FE10 -> FE7F free (112) ; FE10 -> FE73 free (100)
; FE80 dword physical address of LFB ; FE74 dword PCIe extended (memory-mappable) config space - physical address
; FE84 dword physical address of user-accessible static system buffer ; FE78 dword PCIe extended config space limit
; FE7C word number of 4M-pages needed to map PCIe config space
; FE7E word PCIe bus range (power-ow-two Mbytes)
; FE80 dword physical address of user-accessible static system buffer
; FE84 dword physical address of LFB
; FE88 dword address of button list ; FE88 dword address of button list
; FE8C dword memory to use ; FE8C dword memory to use
; FE90 -> FEFF free (112) ; FE90 -> FEFF free (112)
@ -138,7 +142,16 @@
; FFFF byte do not change task for 1/100 sec. ; FFFF byte do not change task for 1/100 sec.
; ;
; 0x80010000 -> 6CBFF kernel, 32-bit run-time code (up to 371 Kb) ; 0x80010000 -> 6CBFF kernel, 32-bit run-time code (up to 371 Kb)
; in the current version:
; -> 01726 16-bit code end
; -> 01828 16-bit data end
; -> 11828 32-bit code start
; -> 2E19E 32-bit code end
; -> 314F8..end_of_kernel zero-filled zone after preinit_mem
; -> 34DFB uninitialized globals start
; -> 3CFEA end_of_kernel
; -> 3D000 not used (190k)
; 0x80050000 -> 090000 zero-filled zone after preinit_mem
; 0x8006CC00 -> 6DBFF stack at boot time (4Kb) ; 0x8006CC00 -> 6DBFF stack at boot time (4Kb)
; ;
; 0x8006DC00 -> 6E5FF basic text font II ; 0x8006DC00 -> 6E5FF basic text font II
@ -192,6 +205,8 @@
; 0x800A0000 -> AFFFF screen access area ; 0x800A0000 -> AFFFF screen access area
; 0x800B0000 -> FFFFF bios rest in peace -area (320k) ? ; 0x800B0000 -> FFFFF bios rest in peace -area (320k) ?
; 0x80100000 -> 27FFFF diskette image (1m5) ; 0x80100000 -> 27FFFF diskette image (1m5)
; 0x80280000 -> HEAP_BASE zero-filled zone after preinit_mem
; 0x80280000 -> 281FFF ramdisk fat (8k) ; 0x80280000 -> 281FFF ramdisk fat (8k)
; 0x80282000 -> 283FFF floppy fat (8k) ; 0x80282000 -> 283FFF floppy fat (8k)
; ;
@ -225,8 +240,8 @@
; dword end port ; dword end port
; dword 0 ; dword 0
; ;
; 0x802E0000 -> 2EFFFF irq data area (64k) ; 0x802E0000 -> 2EFFFF irq data area (64k)
; 0x802F0000 -> 2FFFFF low memory save (64k) ; 0x802F0000 -> 2FFFFF low memory save (64k)
; ;
; 0x80300000 -> 31FFFF tcp memory (128k) ; 0x80300000 -> 31FFFF tcp memory (128k)
; 0x80320000 -> 327FFF tcp memory (32k) ; 0x80320000 -> 327FFF tcp memory (32k)