From a3a6f17e0be0dfec2afcdfe76f9cf10447ca6653 Mon Sep 17 00:00:00 2001 From: esevece Date: Tue, 26 Mar 2013 02:12:02 +0000 Subject: [PATCH] Translating desktop to spanish git-svn-id: svn://kolibrios.org@3415 a494cfbc-eb01-0410-851d-a64ba20cac60 --- data/sp/3d/cubeline | Bin 0 -> 16726 bytes data/sp/3d/cubetext | Bin 0 -> 18137 bytes data/sp/3d/gears | Bin 0 -> 17690 bytes data/sp/3d/house.3ds | Bin 0 -> 11977 bytes data/sp/3d/logio.bmp | Bin 0 -> 39774 bytes data/sp/File Managers/eolite.ini | 59 + data/sp/File Managers/icons.ini | 143 + data/sp/File Managers/kfar.ini | 79 + data/sp/File Managers/kfm.ini | 209 ++ data/sp/Makefile | 668 ++++ data/sp/Makefile.cmm | 15 + data/sp/Makefile.copy | 6 + data/sp/Makefile.fasm | 60 + data/sp/Makefile.gcc | 8 + data/sp/Makefile.msvc | 13 + data/sp/Makefile.nasm | 16 + data/sp/autorun.dat | 18 + data/sp/background.png | Bin 0 -> 365 bytes data/sp/default.skn | Bin 0 -> 889 bytes data/sp/demos/ak47.lif | 71 + data/sp/demos/barge.lif | 406 ++ data/sp/demos/life2 | Bin 0 -> 18001 bytes data/sp/demos/relay.lif | 12 + data/sp/demos/rpento.lif | 13 + data/sp/demos/use_mb | Bin 0 -> 1194 bytes data/sp/distr_data/KolibriOS_icon.ico | Bin 0 -> 26070 bytes data/sp/distr_data/autorun.inf | 3 + data/sp/distr_data/readme.txt | 12 + data/sp/distr_data/readme_distr.txt | 9 + data/sp/docs/CONFIG.TXT | 98 + data/sp/docs/COPYING.TXT | 347 ++ data/sp/docs/FARA.TXT | 48 + data/sp/docs/FASM.TXT | 4723 ++++++++++++++++++++++++ data/sp/docs/HOT_KEYS.TXT | 16 + data/sp/docs/INI.TXT | 25 + data/sp/docs/INSTALL.TXT | 109 + data/sp/docs/KFAR_KEYS.TXT | 94 + data/sp/docs/MTDBG.TXT | 212 ++ data/sp/docs/README.TXT | 268 ++ data/sp/docs/STACK.TXT | 387 ++ data/sp/doexe2.asm | 68 + data/sp/games/checkers | Bin 0 -> 24758 bytes data/sp/games/fara | Bin 0 -> 9058 bytes data/sp/games/megamaze | Bin 0 -> 17326 bytes data/sp/games/reversi | Bin 0 -> 3294 bytes data/sp/games/rforces | Bin 0 -> 4857 bytes data/sp/games/soko | Bin 0 -> 1943 bytes data/sp/games/xonix | Bin 0 -> 6481 bytes data/sp/hdread | Bin 0 -> 1287 bytes data/sp/icons.dat | 28 + data/sp/iconstrp.png | Bin 0 -> 15303 bytes data/sp/index_htm | 30 + data/sp/kerpack | Bin 0 -> 6421 bytes data/sp/keymap.key | Bin 0 -> 2688 bytes data/sp/kuzkina.mid | Bin 0 -> 456 bytes data/sp/lang.inc | 1 + data/sp/lang.ini | 28 + data/sp/lib/msgbox.obj | Bin 0 -> 981 bytes data/sp/lib/pixlib.obj | Bin 0 -> 4620 bytes data/sp/lib/sort.obj | Bin 0 -> 851 bytes data/sp/media/ImgF/ImgF | Bin 0 -> 6038 bytes data/sp/media/ImgF/cEdg.obj | Bin 0 -> 908 bytes data/sp/media/ImgF/dither.obj | Bin 0 -> 1006 bytes data/sp/media/ImgF/invSol.obj | Bin 0 -> 217 bytes data/sp/menu.dat | 166 + data/sp/network/jmail | Bin 0 -> 1976 bytes data/sp/network/zeroconf.ini | 19 + data/sp/panel.ini | 40 + data/sp/setup.dat | Bin 0 -> 28 bytes data/sp/vmode | Bin 0 -> 8628 bytes kernel/trunk/gui/char2_sp.mt | Bin 0 -> 2560 bytes kernel/trunk/gui/char_sp.mt | Bin 0 -> 2304 bytes kernel/trunk/gui/font.inc | 12 +- programs/other/font_conv/char.txt | 2 +- programs/other/font_conv/char2_sp.txt | 2560 +++++++++++++ programs/other/font_conv/char_sp.txt | 2560 +++++++++++++ programs/other/font_conv/convert_sp.c | 57 + programs/system/panel/trunk/i_data.inc | 6 +- 78 files changed, 13720 insertions(+), 4 deletions(-) create mode 100644 data/sp/3d/cubeline create mode 100644 data/sp/3d/cubetext create mode 100644 data/sp/3d/gears create mode 100644 data/sp/3d/house.3ds create mode 100644 data/sp/3d/logio.bmp create mode 100644 data/sp/File Managers/eolite.ini create mode 100644 data/sp/File Managers/icons.ini create mode 100644 data/sp/File Managers/kfar.ini create mode 100644 data/sp/File Managers/kfm.ini create mode 100644 data/sp/Makefile create mode 100644 data/sp/Makefile.cmm create mode 100644 data/sp/Makefile.copy create mode 100644 data/sp/Makefile.fasm create mode 100644 data/sp/Makefile.gcc create mode 100644 data/sp/Makefile.msvc create mode 100644 data/sp/Makefile.nasm create mode 100644 data/sp/autorun.dat create mode 100644 data/sp/background.png create mode 100644 data/sp/default.skn create mode 100644 data/sp/demos/ak47.lif create mode 100644 data/sp/demos/barge.lif create mode 100644 data/sp/demos/life2 create mode 100644 data/sp/demos/relay.lif create mode 100644 data/sp/demos/rpento.lif create mode 100644 data/sp/demos/use_mb create mode 100644 data/sp/distr_data/KolibriOS_icon.ico create mode 100644 data/sp/distr_data/autorun.inf create mode 100644 data/sp/distr_data/readme.txt create mode 100644 data/sp/distr_data/readme_distr.txt create mode 100644 data/sp/docs/CONFIG.TXT create mode 100644 data/sp/docs/COPYING.TXT create mode 100644 data/sp/docs/FARA.TXT create mode 100644 data/sp/docs/FASM.TXT create mode 100644 data/sp/docs/HOT_KEYS.TXT create mode 100644 data/sp/docs/INI.TXT create mode 100644 data/sp/docs/INSTALL.TXT create mode 100644 data/sp/docs/KFAR_KEYS.TXT create mode 100644 data/sp/docs/MTDBG.TXT create mode 100644 data/sp/docs/README.TXT create mode 100644 data/sp/docs/STACK.TXT create mode 100644 data/sp/doexe2.asm create mode 100644 data/sp/games/checkers create mode 100644 data/sp/games/fara create mode 100644 data/sp/games/megamaze create mode 100644 data/sp/games/reversi create mode 100644 data/sp/games/rforces create mode 100644 data/sp/games/soko create mode 100644 data/sp/games/xonix create mode 100644 data/sp/hdread create mode 100644 data/sp/icons.dat create mode 100644 data/sp/iconstrp.png create mode 100644 data/sp/index_htm create mode 100644 data/sp/kerpack create mode 100644 data/sp/keymap.key create mode 100644 data/sp/kuzkina.mid create mode 100644 data/sp/lang.inc create mode 100644 data/sp/lang.ini create mode 100644 data/sp/lib/msgbox.obj create mode 100644 data/sp/lib/pixlib.obj create mode 100644 data/sp/lib/sort.obj create mode 100644 data/sp/media/ImgF/ImgF create mode 100644 data/sp/media/ImgF/cEdg.obj create mode 100644 data/sp/media/ImgF/dither.obj create mode 100644 data/sp/media/ImgF/invSol.obj create mode 100644 data/sp/menu.dat create mode 100644 data/sp/network/jmail create mode 100644 data/sp/network/zeroconf.ini create mode 100644 data/sp/panel.ini create mode 100644 data/sp/setup.dat create mode 100644 data/sp/vmode create mode 100644 kernel/trunk/gui/char2_sp.mt create mode 100644 kernel/trunk/gui/char_sp.mt create mode 100644 programs/other/font_conv/char2_sp.txt create mode 100644 programs/other/font_conv/char_sp.txt create mode 100644 programs/other/font_conv/convert_sp.c diff --git a/data/sp/3d/cubeline b/data/sp/3d/cubeline new file mode 100644 index 0000000000000000000000000000000000000000..49e6bb14e0fc512adbd93a7b1f11694f3547cf64 GIT binary patch literal 16726 zcmV(pK=8jyP(w>{l>h*N00001Mv*2LLXK;4&&M{-d3BxdRUbq3cRgSgDSmEMrkDcv zToFiM0ZqG%uc}~M4BYPDHqT-wiu!ZS0CmeI*(j_iAEckWrQgiSLMw$yxuZG4A)0#e%A3mEd`YxUHAm*`DW~-a z{eDrM;78w)TmaKqhqOG2UKdh|uYgr<_#k#oz>xae+Lx3C0E{;Ur99S>%aN*8PTTTW z?q8;*Ht+;li6x^%#zv-w8KRsjX(PWX^IV&?C1|1%geq5;1BQ_0nD(x;jUJ42?xmOo zheb!f&IG%GpDe#iJ{i|Q6edMbwWB4ywp~xK@@sm1R(Thc`3Z4?^w`=!?quSRQ`q9| zt|r#tu$Q-!rPdC?wco&Xj|TSG6^d}gj}1yC_1GLgfK5la%sY6H6PYFXzd+Dc?T0X* z`CA7dKWoOEOt1zHOK&1LwxEQ*WcOVfGzr5(N8jy63QAnNe4N|Ga`9rL(AWNh#oL}o zR)*_J;{gR7lttlujdNc>w`~p`xUK1DeF$9Gw^k0%{jUz+k==kW$uXfNQ4es~9~Uu0 zF-riivm$b4a)sACVkpJ`cLSdbW98Xg@Ii`b&&39Uft%dG5*na}odW)#t2TeFCR3v? zP>fPDifdFOsvqbs-I0qZTwXmvMY4@GQaph0(1sVBg7%GUj6Q0=-J zP!^6qmnZE{D@zd+=oH~~f_yBaDdRbhrbxk^NO+SP{|a@T>IEwyFKeh`F4G-~)k^9Yd^EJUWhKl}8VZIRNnz z09=0N_2n>K|51x72bZO)?~MKDq`<5-Tp9QL4_P^Epu`AQxsDzN#foGC*ifDJq+tUK z@bn;MR{Fu(|5guUtuS#2ioZjLCtd{co{V@0!)4efoOXrvc(w6wl3>jg-Dt218mWQD zm^J6@T*Zaq28FJTU`J}Vw%V25kUxrVaFp5}Pi`FtgWjD(x*=`GFmouPGhrP9QUk>` zSu&dCOw(MT7A1LuUfXBS(GRiSvMg~%U*=6OtifzV$oh08_F9ZA_FW*|)~TN%PCf6!3YAQOV@D-^X63imElF<%EA;Z3@2 z?_g=nnVNn-9D|+dOvHNBFstWGHfnbj1Fgac zm^kiR@H(u%tjGE03dz_PTaWt`Qz||(mr`>)`lg&KR7CV#1#ek`zE2A#OX0CYwK~>P zW-6tD9A<4>e0mPy|CE^FajMp3S-QW;g1PZKUdYgPfg|nB$DnGB%ih=219GLN>-FyjlZDP`Hmpv*Mw(I8d>Ry|RMm;3%O}1sapg z6n^Q_V_#8@jTUxA7}b+8b)oAN^jPUpf{StkD_PI`bjV5Piogl%%7Tb!8FN@>jFo`* zF+cB33($H>EO69Ktf&eia{=1xlc=|-S0H4cZqmn~B=fUkB%RL*jrOblVcr~TbxY;B z8>^L(KJ@W4ebi`d2JWvnZyTZSIXp7eMWZEaai#_LPw}E|)GzG0(eLPErtsWRxNq6Q z{=>Zr%FuF}pO`neN~Qa_Olq+?S4^tF6vFJVr}}=%$K3l9<{sbUj0|ZO!A?!z)hN4O z*PhrJM@vVC(I&w`e}P+cEXIp!n@818 zMb{whi~F2_hhyvgT6yc+mi~>X30$1t-axAlUqGcEn!kB|pZSo}u~<#}e7L|rw%vh= z+xyv%T!~J%RJ7$=PtYTyFgiic+(Nb%qxkIwQ{?LhsQp7>p{uELihY-u0q~-kpgt-^ z4ZT=g3BWWfOLTA6YEKkZqc0(ol4PS+H6 zO(RorbjgGGP(|iww;ro2ZAK<~C4#jZ&JDs0$N zXt>|AJG-%ZXacyfX%3+P1642Sz4y4O6$%HiVf?L2%&y| z7Rb4aUFKa^OE8_s5mfVN;{sEZ%BlP{44`AdeDmbLwulTJ zezR-smx(w^)}R%HQ#4&Q{eG!rHGl@ZMIakNRO$h7$AJmXDLvk$0*mjf`4xFG=XO zug=ubV8l81G}n>Sy4H0|(Apq}+O2NHAphk|hE!ecc4)9mpMmu0Kn*`OHe+1c6*)ty z#7Gy#hsOGR%QZUmcUax%Ptnw%?R@TU46>^^byU;4XZ>{+sH&2O2(^4l*G3FwYw>l@ z4&~uLYm48=ozl|;tZ#O^)P){<%)(fK4{uVe@jmI3<|hSCBx!fT{Hb}VK<5>ftSoHt z*PeS5@cAzKbW3{Q$DU|s4~Fyi`zOEq|Al*>TGR<=hqG^7sM&iG|H3sQV*MJy{tpN9 zrNAf$-2hj@OE2(|${=8D;>_8lKtqRSsQ?jhHfXWx9H1iw#TT_^bvsMI`J};AYm-xR zJ`BTRT)|3sgENyNF^SsktRn3?Jeb1aX&iBZ!kMo}fRi#p6$|EkjW^(Om=E9BbR$If zen3!P>xj6BlW0OiKor7QBI~Lq2U{Sht%)*Z*CAlJ#qr`GUOhiojfhNj4bd%%;K)*M z$XuIw63j;34x!%gN;+iH)+5OK^uVncKFcIiA5NQ7X(8{~R2}F6EaPm2d z!%rCzk#Se+=DK8>8=u030E+2|iqMiMDD%BNRU(Xv4Yib#G=7Q5*;_bd69Sxjj6K1& zWQp*~!>?yIja3=*F?H>(cr1~{+Gs+OzfH$9tofQ13k48u!?vasN7Tgbuv7tlQb|G2 z>3YftQMWbW`t6k;r5wtMr)(iBSRKy?X!I{Ow}-2}^_RH#4C7kJrXnqb`IsGY9sJH! zdd+d-6+;=`!-53ej5!R(HV6SF_lFhfP^dJ~D;;$?--dl1Px{1Vr}TgksrUip|5SU^ zsZY%8b^uQ;Y%aFp`GpY^%Ual{)~4V4W9P?&VMPVVsXvIVxmr=7;eK3(nCgK5Hj?0OAtWX3W6~&tZW8z_g;*aYx$Wz2aU?-Vurk_Z8 z=00AY1NHgN_O#uB?=^1u8sH{RD8{Y{{&14yu8=>))#I5={s{0R`6K~j20h2dSNXa2 z^ZOCa)uy?QfK$0&0)q!2kG0~uRF^|p$?Je=c1{7-Y@(mUlvDGDLUMYl<_0yv8l_hf zK`rjoM$CTh5FB|*aIC_(@a$ppk9euc3$H(XcZ9R6tN2Tedy{0L#Cw~B}4@s_56tdC<`RDdqp|A`48;qWjrdom6d^*TC*ZDk!!fAl8$@qX0GT$k}i! zV2+U|!bHncs#h4=@f?~=)<O5Afm$HMFk1FP07DLj%K>A^c(f340-S0l zK%b&nL46_j=+?ZnZx>C=`Ipb}HpO*0)p^jj2c0#{+IV5Nif3UC+41U~OL#T8yVshL z^9s>+?)svFf^fz49xXBK7Zv?m(ej$Rd#jVp|9WJ!Pue;d4Y@IQDD!F-0#E6RYL?T9 z601`)Q%6QklpkhkY#y-dIV}iAY%-HCC^JGK-VVSP;BGd88SNBmDLKrc=&DC81H?6q zUuzETVD&Y@=!*-#@LR71z3nM7`DXzYbsNh~!85UwP8E_b`XdI>(13XCHn>yL_oKqd zSAA;WUUV^GGx6x`_g6mt<9$mj^s#F4!JcIn#871XU48#>(DPxG58+V6j`3CLn|h+@ zUu476O!z=ek~|_`RF~gJK6U&zfe-XnHbbwMVt;R9&Lta}6NmWlmmVhMrfN@Z!wo-y zT=0J#mRCB(sRwwomSlK(fCjRx7}Y2@r;59DoD7sF+IL+xlZaS@C>|6l z#0|d1DZW1=9igk>edv7b(UZ=C2>Z7dzTuyz50XC4%+CvvJtCUSzq^X*BYq0-*?tdO zr1LO~c0!^H9?_rb1HHexi)0j7n}*C7>JMa?kh%``PI$;_t2Y<&OY4|G;QE5oBC-0~ z%B3Z$E}4``qE%=t-@`iaOo+%$N|VHUnLNQH(wqd9kVM^rqq@iKq}rtafmRS=#bDo^ z32SY4{A2@fNJIiM1nMq@tvwjf1)=}k`sRGo-qN^+>phz+D{c((vz}apAtMr_+BzV6 z7xe=Z{EHS?L!;_|LO? z9gySymYm^gSo-6}4OQTZ#@gv_3}&4sqXhiuVqS=gAd(QjQ>Dk$qd!dgVm=GV_#EjA zz|?svUe4v+8e&cotQC`U1!@%W#KqW0-tT*G=CFBIs;4AYYhB{L4EjYfY~$w0T9=q9 z^5-2tR#On`MYfBK%y$?nq#KYl#`%HlYB&@Z5;%dn_eTleDsyn z-oGVH*YulscWrsVSE>on)E#0^(lYkhijYn%NE|}-;vL^R$OFyK39VA=>SYpJRq$cI zeE!mt_%BbNxX0kXBBkvcDs-X~cLFMrxw2Mt^4`w;0mm$MMejmm&4IkB)5D9C@&N8- zRJ|@fsZSOG<*#I%+5({#`%3)L*3#O?m9@1oPqWTqZ-mf~5EnLh)r(X{c;Uk0=YYdw zFsxkQ>PlPwRY4=lZ@0_pm9L$c!DKY$Ocp6HIoU$;a-i}~TJ?hKSYHtf_rSLq8(P4N zW{KTGU)L&6hZCx6^oe_2xe{=7jrguTp+~4YUdlMFb%Iwdd(GC=Ug3VBs|?Ed0hMk0 z(w0^Eg0z4{a@728L3ie*1nDmq#E}M+IO2mlA+t}%qh!O3v0J+h(?8#bBsMZKZ`r(q z<*F#)3xHlur@>W&OzWwXsfzQ=9SqR;)R!Gmr~DEaNnc^!AJ5Rprfbv&+;}78;yu*9 zhKT-P=f8F`Y&2S7t!CzfE!FS2rGrick}4@q`P5=M#)0#cBFXL}OC00G4*Me_#2^;I z<-?tg(o=@TPE0G_@O7jl^-4_r(TwW0b0z${qd#7F+XuxWUikFYlV^)(6lsBpS-rCO z^<9NTtE3!1|Gdpz^&_!NhmYIh&b12(9eijbu}MJ!H6=QL?*kD4U0j7yBC2T$JvWh0 zqm(!`%-1lxy+M(wtq|Ri9}rh+8pd9i{SlldO9>EVK3ZiZ3-wB5t&{RP`3YLS(9_Lf z7GuWkYayF0W%-8>^VVNVOvt5dChENNU8u_6riXSG~%m@s?!mRT&D|f7Meygvi76{ z$M~w!F6=Wt_Ckz{tk(eX5zG^un4I#FOxOqqCC{9pvHQiY<9v0r>XbrUsU`B_Y4VIngAM&Q`8}T{V&KDw#~> zl;l@f^f$!L*8A6XP&f<<`D0r%v%6T5<;t7NCgb8u;Jwxl>-J`?$&<-p;E;*$6ZHjnRQk* zB-F)E@(Z!EsG`-$YV)?}_>mAP@*Fhhu+CVK3OIiPDj3{Vr(%eUV5|9i4mOL>dQ=elH&f6{f68@Z@Z z{|F$|_LkeZ0i7vo9L#sG@3!LAjYH$Tg;Q)7xJ(8UqZ3fqla?znmr2Cc|4e}e*J-@ zfk8Z8>`HGT(H-naWAf!K*v13VI#s6?cK9Q0$>^RxRk@Q)@)`1i)~691P7muQrk3^j&Xil4t(N|qv>yC5 zYK~1wORY#{3=oozlu&Vf1s)Z!VU zsN5n-J0aKp-`GoKB z7b>m-)uO@8iOg<)Me1(NHz~6~IbRL~S^|-S*svc`qoNAn=DwfG%t@kO7Hr5C%04}4 z8hx|C6GJEd%6#1guN6^~^NnPR542&cyqfp#lt{$;h;}Rg&{SJp7ob-UMI{f^o}O3W zMnNfj%wPPzNjM`RXUX{0Ly7Rthp{ZXx5*&EmsVSt zeU;wiawtVHOQ9IZg2g+Iz{EXSvtlL`uRXg8-Hd!2&>v^x|Ie`n=TJtkxwCC5R)N%M z3@<@lTDw#E5WCFXg;lv+UEYGWjI$Az%qeqLE=_p|9ETWHp5e`v+E)?na7b>AOu)V& zZKHV8n)*84aG|W$mN4FCGm=;|^nAFeoZkNS!!PMiNU;yDX{4JMyQI%`OOBYzZrUge4Ndl6Y-*H1bGt&+SNiAL`g2Z30 zLZ{lyT&-%eF<-1)V%<#z8yMN{S+~w(pup6tK}HNZTKAOXK~~Cj5iaHDU*I_BvhabyBar)|-*)hjQ;ZSxV$rGgOiOBtuiz$PS4=b2ME`>j zU@wmFa~-pIn6&6?X*~nNLu6?h?@;9_oxmgC89Le7W_!InCGwUcPhrayPw1j%+@h=; zI{q1e>ENqk_(6MSni7e8#&fC0F7`6d?;hTWj8nd* z>^oibP~XfK!SPgRxJybKB`5o4i_ND=Fjg)uGY6KTP37&aNT-saAHT{9mL5t>mn(O* zJ5DOHne+*_(%ryXBYR3tc97jy9RJej8v~{kOf5x2EQNw&|Kl}Qz9%@%K4vz9yEGE< z(zVV!rBAVqTpR*}S;tW7WDKB_&7hH33Id&^A)_~?OsN3^hiwc_l_P1mv)RI>@y`Yr z9vuFnI&lS<7NsTj_A<)al*^fDZO!^EjQlh?+BhTJMni?B&3cx{!vK}c3=z$B56www?DmuGm?^H}*qR_Yh-@-{ zDp{e4CZhuB9$V}g6BtR0O3?~7vLp-~Z3kK^#__G+_#D(q3CM$7`E=l&wO%X=yKwWl z3c(7Rc*8;jls9zCSStNLv6d68_d@BqqWsHfaUZ0GLaMYp4pkg0^h?++v@;ttQ!V!{ z=c!Gk;ww-8n1GXUe`OI zMCT$$pK?NdNe5||F{0}U{tYSu^s6Yg${S3k2gt1bv|zBYTtPEA((#nQF3AKmJOp6r z%`U`&dzJHnH;P4(vb}~naM@RaAOH*5>7Ou<(B;g!l;;1hvE;slw{V60WeIIZd$2b0g!gn5bRseB)4~D!E$+sgr z)LY0RaYAn)MnC|PKcwfaVIhLXaq4?5TWmYTG@hIjFKTdLsX+ZkC`@nej2mhwX4(sN zdV@?rgGf_~;U8{!7|v4pz%K5brQ=+ZX583uitjc3N)2_+EjDJ=UY9WO)T&dz%o*Zj zghe;8M}UDYoC&BSrphLN@gmcX21vjOvelSPC3%-Qk?QaQ3q zBWNCl5gp#UihZihYHgIMYOE%Y{EC6S!C@l&6C$9b?)-kIhjz@P0iZV1 z4|*Wq0tWkR&et8e0#Ody?5&CbWn`q%_#1d1(ZOa~UZgwAN4T6(WRYXsZ@ZD^qWl9b zX2N#%*oIVV(D48}>`!469KXnS6&bVEsdXV$^!vVcL?eFb11XO9ca}Q&ji7J2Ek2fG zP<(o0J-Ro?4MR1?V$-7iZf8zZyQm2Hg2~#Qp`h#=Dg}t+Uyw-C=KCWk+7=?85jS^QT+}F@p>p` zLT18$!{35=#A;vJPh1AW#rbQ~5Ner~o&2801O69W)~6e`^)!N_K|kIg?O`6k4z6YV zEpb6o=#6y%(j@R$c;fr$nzsYeX$HwR8Zd0FT}>{%>}Sa{Ri$ zRYvJXM^kX7;6SGteI~4Pq$hjllpXjL*?_ei^IID(Dr|ieyX+-`?j0_q0 zlk{&I9z4SO7duL6HvSXTnwcy{UE6I=WI2K6Aj1fhx(Enzmv8X7r`?WO?POW1!U<+@ zvPli11J&B<>j28@4NuHpy;R;;DYtSfitw1J|&ReIQ%Nt0h7 zs=}dg8Q~&V-~zVAUu_P(?0EwK#&LV0{bo1qlB{7Uj{OBVy)PWiL5({v;fZgb0>zyj z!OXp70|upB&P2brM7@t>kfVQ3i_zo%1>TPbkJI2U@Cx7yUeUlUmnw3ViKcU(g%2~# zk(yzlVx{-T?_x{2{?*kFjStr23Us zqoc8C%~}wKu+)%(|8^vKZS5OF&VH4n0g%-oHzu2xae?mquBk`@OZWQc2MnxNBnddy zR~*R8YqF4#G{+qE8}aUo-t-064|L11KR5#hu<0j7Kz3%7l18uzCaU&1C1tbv3+!)M zcprTyPmW9d#DcS(#p8!@Va^wq8_ps4M9oy0ZS1wBmK ziT_3XlUY?@5eP6e=py->{Jddpk+zE;v%TmS?hMfkm7`;XmKtN>T?WiPG8Pn&OA zV{&`na%kim9%vVv=uX#HFm=^ub!d=RHoxslXQ>+83p;RgfhF1#$Dh_!=3j^4wwcBz z+hjb8dTI%JSf5rn1&9k)q;vW%QlRm_`+^yQ6d|o$|8LjNk!ExN#KT(c{K_DMCz)|K z+l{&7e@Pz_8JgSYE?*LQ3gEEr8#>AQu#BEMC=)TUDU@6?gcz8ibzNb;Nrz%A_@R+L zy2FeyA4uFrVyWbZRH~^`J$SKLhQ->}O@_2ogwX7jkl%D0>QMF*u!1=nhq>2{uO%wr zf@}tL%x3{TQg{AOx`2u|S!&`&bYo;OgB~Ae$TY*M$oC2XnJnT$lsCQoajpQv0m zV&!mTR{atTN@q@w#8YB9CiUZ4s=^R~LH#HtXLkf_fFkMj5jAxW>PJF*aOG=LfTtlb zN>C@0i3#9Xi67-tZP8$#TIlOslgZcs<%x{Y(p9c?!WVxEKY$MigHSy=hSS=#Rwe+Q zmuHFkxS9L@HZj-q@T!GBQ`k{7^toq0NQf$_JugkqoPMgFfoQ%HfMw;f^$S1Rv^lVEaO~S z44XcsK02V=bVueVa(IT-7G+$|Fz%T-ae6cn&bI><9iti&dtn+~J*G^=10?@&t9v+U zHse$RD6td{VlNZzfLTK2)(L21*^^KFf_;DYiR>NKMhTzl1n%aaMq=s4QEVAor8#x| z^_UUy6%{5G`EuDCDoQVCV6oimRM2PVII5z&xo26Z`3#<-#D?SWm{BIu^9giY`vb>K zgbKv5>2B~~2LoGZVL)(9#htW0BdKK(6Rf@HDhtsCEiN|7OG2)le^=X!#ko_rI6Yl- zF*h@GyH(GNM`ai$kGe-&OmWDkJ{GCO0jCfrxZeT31d&e4t=oI1p6up$jp9#FlK_-) z5fR)&K!+o4_4#-?h6V0kS#K?!%9ozGaUIUmk*GU7qn{R}$*k9hA28RtFEF-`K}1l7 zQJA$4BP+VF==8C2Em-p-inBvC5c6K=^+7EejJXR&!a;-L&U=NUgYWzbNcEqR%aQTm z1VZASlkfzdqBiym4H@U^s(_*!k5ITh(^M$%gI%O<-Tki(Ghr<_9M&8UUM>H%LXXse zS#gA=Kek>H!;XNMph5pnFXj3*>q(IGE!b+4=W$HG$!)B}cZdMgF&CVss@CbzeLT)) zS5bln-c+wh{*l@g*zTT#7j4V>n9Y^B8G(KpfxaKiqIc1K57n%pu)#1Y*h)=mW%%hq z3V_venTT0@QT8m9BQ~A zN6+L>n4$Q`le&?ZQldB-;3Cm$bkM-DT4`E{;lehO+lnpTe(w5^@aK*vtMkbfdZDD; z8K|#sZ4A=7A8l$bV(#2#Ww-EJs+ z*O{A0YU>o6bZ+dbK)he0(TdFgX`k>5JGeLi6A%_lYSy+tP4lTG#1AiLm!YVPoP&K6 zzTJiRaWKqZ>W?oZ8M2)(wjP-h_+l(=e>%WPn>h;)knpLY*rq#x1Rh|6jY}{#&MD z-l3^PgskRh;|E;W!)gX6uk<*u1a&$tNjhl!%&yWD)=@B9(w0d_O#qJ_Ll5^1qFYoq zMw*nvhco1jZTaIZ>aXUVUn!r89FlJiZtvGPPB7E$sKiy_5k!crTp^cgjbun^^53wzzE8dsZRprob#N{EyVxq*s6HnJOxSaXXy3DiE0Ia#NiVqLLDZ zsw}dQ)?~h0gdV(#91G{eXlCP^Ns~vhrkwGvr{cd8m;#~G#-?d-4L>+QGbZq6%4Ate z2e#J3xRFDH{zd(2>y>Zjfw>fFG~JqwH>8)K@JSENR!J7s7*S$enO@0$AuhBA(OU)g zKJAL&#N34-n_|v4%E*j*?5eU}NOmJ=V;58FreZyGdLDAqKrjQ7n_fOy%w|mifzjM8 zGaJ8Jj)|k0$mtZr0SLYt#rKGsd(0|X1c94BbQmoG>?mNEyl1*2jZ6GRgUB5!T0ZdU z+l>@azxLFq{$#!+q(zgE4tz*?<-;@{Pgf-~A#dhw$y>$hDGKj20-78*FlBdaiZ4Po z(GRE$)`+v>+BZ>YRRX#@t&Vj;1P5`HTYn}=l8(bP)}hTAMgyWQgCLh+e3xrJH*lmz z=W}tjo)ae3LT}dLkdYU=B7H2zLu-OnE(_|YM>Sg~e@GSZYz(HiP0e$dj(_=vpkf|~ zeGRdeuR{#5=HSOSS4IvmhM#yK5*g5`5Rh3@I#)TD3mKBq7nHrmq7g;c%gjLL_hGjf z;fo)oH#h&L`EZV@l$xX#(ya7m!NUrw+6?hycXsJhU0QA!bv%TTUF8=U3EO*<=;C~Z zf)6d!0i#A8cdqPEDx&|9*MQ`>(svXV89cqm9@z2(LqsSde= zoQ!|mT{}HQCQ(D}lQ4XY9KI=8`OTMu;XF190mgracBX@~X;0JZI!S;O2Ct(#SQYDM z^|s%D4t{3L_9#sN9B^&SdFIi;fnA`4y*U;d(jOOInb9D|1D9J=$8jb!H@$3DN3LZmfh5GC;m;_GGe-)DfR@XI1{o(}Y$co}W4h5a#PL!(FDE=5XK??RyjZqR{BIHG=w^VxDSD>Px`lFJ z$jE9&1m9WB2O+kRN5~J<8kbUT*?bNkWsgJlrjSSPiI1oeMf;FlIp}0wesxpPO_L?VLr5vy#m&&L0WvMtCKiG^B|k@wRY7#g_<8 z6cbwszl+5ivRo!JbWS@=JEhJ<4JE~#ex|dtO*bdZK){=sr~ApCKQtbseD{N+xcDuO z5xe6Iq`m+}{q#67U?kHOEPT70xZ&9ej($rJ_8GR= z=J*T7^DOr6&l1@5z3rjDhm5uu%oSC(2@Ln@SD?i=pS?GL=u&1Op~AAMw;DWG173W6 zi^P4Oa>SBrKBY&)LJ&Kd=7KzH{;_o@#Wx3=j$TWf4m<(5Y@5UG71X+iDVP=&iSVb0mLRMz^d-Bk3FX1uo;pK(~6C30*%8e%5j=iToaWWdcKObWi(GD+>b_w2MJVHg&$n=_DngI<_68 zyC-9SQYq8ct**Oqq;IE8CXB!DZL@xE#G<=_%>U|=mW=!){OFw_o(?H3I@JgVLC*QHHrF zfWx~zj`I_+&uOMd(9Wb@Zbq$Pjk1Z+ldaV!G=Y?}xgHmT&l zxRQhFdEx=ULx9+75%TW^UYl^$+JWKRkrZNA*QqnH@f|A`&Tb5fV()jW9O^!7EzE_R zsI>w2Y7eC>0*c19ya6xcSoOEyszP~;4oZdrLbBM3L%a+GPZ`VnwS~G0aTO6orx*No zu`iavoSo@7=j^%!!{O>I3!8Hpw2VH-`l4Du3ZjU!^ao&bdszaS2(cQWiz5s0Z%q%R^}xz^FfRL_+H7|2!64W%(54p^-S^>IDr^;4q3KeO;riP(4* zwSxjH*#2v9d296$!?H0WO&H!02flfJ2V;QKT9lq!RaRY2l;h^5Jd?Q69S_cFWvVrj zXixi`mLV|dhkj4uHg55!JZn?HT&E_cFZPCSK%8BYppn04^M(U;_qSGLKgnDB@Lnc3 zYMSVkv@Wc2RDIeKc9XyoZ1EnQ!Q_cjeF4d=b`*!vh+{i=92lPE(y$cTpim_(R&_&y z;%Edrk(mI#fz-+PB(hQP_e;H+Y(7Vs>}q0KZ1h!>S}?SO@03^BBp)zkghlfNGE>9? zT2qsq=>aPvji~rXB@|iIECdf(Pn3vr#3NQv93p0cBzzeM*A|_oD{9X?gNd+tamMvZ z0jF5c4!x8cpa=C78SoOsy9}$o*a|>uX4F(eyT!h0FP8d~Y%#gqSM`6B|u33iC<=BS|}iV!}?DJE9#V4d51@8BrAsGC7{)?F`M!d-|Bceo$F; z2J;Pj%pRWM{sgi$=b^xY%}#KP=Y`e$qWoEc9RI9%-t!B_-IPX&>VFRS*$K1g%%iq; z3z)J(ItS#H59GIdr=qORhs^UY@tGYaXVIB}_&#pj4rBUvQ|nOVs4OsCfV|QhY>)t> zCh3WtoB&<6v5>U5kB-_~I(K%>IibPDBhF67K0S^#;TmWz^GD1H-6uk2KGta1C427| zKzT%K;jq@IUMQ0T9Z`G7QslZtE_&3>!B4hKL<^aFKFjGm4}8My!JoC!8K;l`1;VMf zu~%hzvT2Qvsfg-`vtV_M^-Vpc{h%b)Uk|)lKI_ZaA2WrNr~(GJ5h&K=Uk3J_34u!t z_TG@S;N|m#H(<|feu!+Tg=DXfk-)hsv!e548OS)G^mOvjZ89;y0+ul18nS2UNu-@M zwt;oBu=R@ENPtKz?UR?}s(?^Nt$oRZTQd%-nFR!8>F7)L0m3&TnDV6MNb6w=q}Bkn z-YmkW`Lqj>H^iY^?^D_hPm}~RR>-D>RO90E2V1E4Ah9t)rQ^Nh3)CaNnEb6v$Ku_4 zW$eC85P7&VpzUk5{7A9%0~BT6{ig!O$4ArGbb!{0>_5r|L#+pzfHW}Sv%OI|00;mn zBbW7&oJ?az(RNu?i<@?PijAHyi%q>Es{91Oi5 z!Wf7`_MZl_;s8Ta5s|UFJ#m$RzJVo8U{9$<5DR85d(5$Q?8(;yL4?Ox79086Mr^o# zelLqld%c(Lw^$agj8r3(&9or zw_{%NE>sP=BQqG9_Tze%R!r7C3kJ1QSkbrzXqHF9aWT&8>Xkb@iAIllz;He299HLm zqSCae;;~dMLZsgXzb@3j8|YR-i>IjBup0UYnG~AiyM|h^uq-&R2_cz;=!g1AS&if1B9*^*kfOV2Z*+sI%`(NMB50|OyX8jpQY~41{vNmk=;XkNte+dwFx(5|}I0dIXZ2RW8i!8_KQI6(?fAB&k!AT93cvNhAx zOVKD=Vz8D+ECRQ^mlKX2G?UjDZoO9*F-E7{GqmrXgs;=i%q1m*>(_+V*LeI+@=#yC ze-U4@7?14R(EdKNW1$NF=fe4}l6i)Nk{U9--#sZgAUrCqW2iK12f`Q{DxUn7vm_ik z%;;#>93ZUXi05m}!0mP{n)0Jo3S<7Y>w`wMSg31I6<-H?6OgRr{pJWG+)k8*SxOl)N96PtBF${T@on2R#Xa*3*Ru{3pg9LPF!3IFe>(!1GW&LE_-6tIoyXRx z*uB0Ea(UVXxUd2UK$@&>8}4aRuLt3g5?u|=@Dvm@XWh62Y86BvkaA)50cB6SpOAIm zuBPC05JQKnPO8@rECHx3+-7l0;Q#+D-vd1L`WXN-ph;e=6(;qG^xJh#)zVHx1B3I3 z*12=73s{G?QX}4Bb*z%ce{vfw=P_hYu!ow$w^%Hab*lr$sP)L2ugwp-S0BYxWB)4y z%?KXbOB&Wsbkvas=-QNKO-3WH;vA6+Tk_>e^o(wP&@q!OUf5j7Ok5WemRilKFc^u7 z3Ews}!#JzkuP^@zcc1N8wzJAS#E~+b)mUCuDT_t)=grk6&54}c`%AtUno}5aQUbmq zq{g0DLq@ZiZj!Vf?hxF~lT&qsHeTPRl+?!96)gPnhZFwFiVji63@ly~TjQM=xy;U2 z)omZ)9WpgS87fTu882&n)kDpN zv~H5r3xjT+bW$%>H}e;wV)KQm*;Vmp=?{__zQ*B}bG^Eg!&h9Rce9MD1mQZ*jlimZ z{-mx)zIY*3&%+hUiaT7_@S`K*1Fq(iKEl6}d$fq}uaceWhX3%y+f9_!m2 zJuavpURurbmiZR^U^-#0KN+pl4EZOHXqf>=0l5BL?f>%wI)QplE3OVkFuHOxOJxyh zG@MLKkm9*JV5-CSx!Pyt{}xS5m$r}hyD@ve2sFR)@H5do{4XfYD4PTsA*j8eJzx@D z8tAJhZoYb2?pS;8|0x!um0`&6d06sA@#!W7GU!~E=s%$l$y$9eIv>lFHS-a zek(Px7qc^M^Yq6QR0UyCfLr1FDz)`is=|`fkKtFAD`Xwti*n5(7`l<$jfOO|Vxs$) zBxT)3Ah_T?{=Y&rTpx=K4pUs)9dj5Qcup=WO>6^$_X9ZS6eb_K$p22 zZ8E=S9Z>J(2Ioc6K;$Ba`!(bK0MLidI97M;eS06?gxrtA?FQVPjQKo_B5u0`sJCs; z13z`Zt|0=sDG|Z|7hhr<&7F8a20?lLKCdiR)1XByZl<2uUD)2y<;V*v8UElgrTLe( zEFR|{%j>I%s*8}q(psBN{q^kWD#EZhy-F@N2>kBKIMVrR`DT{gm*VF;^P~!-I63mR z&rnSq8PmHO(p4_%c!YU$rVf!YY4}3rVzh&2K&Pg%Mt6ZE=y`MH*sE1&_iPlKxZ<{9 zgA#;X+5a6oV@p3O5Pa#nk^6UkB8KHqQz_zO`g!1i6~m3~2}%`pnG@dx%yPU~tQ=Wm7w(P7J#O^@)>&m-KJ+xd z@+ASU?JM;*5WT;9%a*QvYpaK>tDW1lSr4>hz)chqiEI0B`Jc~2D|g(BOIojhj?(FU z&R0?fsXK30f1pxK$3oVLX(*H(VW3wAFPJtf(&;V!dpnlo13Gip4f{%c&XCK4;Xp%( z^-w^As25I8wve^}@&q6`JOCXHV&5c4Y$m+KhWp=1Y{>M*kp@uJ4Q7(Yj$&DdG zU!O=62mBYo|0l%Y@&7IY#}&PHsq8f8&Z><(&U=v2`6b;~G%IWYI;D{y<<|q76`3>+ zMGn7>Z(Sv(Y(>l@%P|zL*}quDR6dfRO{YVnafjd9-btpL-r-$v^J#3>%U|X?4jsns zb&T?uyA}61Tn%OR>l;VC2~lrZqZvJzdvqA2?C~Nel#IOXBnlid+yHMN(;y{J<9T?6qQ|{1zA}lgp1c?-B->|_?>3*Jjh)E0 z3)Kg3>hDt5qTM!2>!QQNS?A_YN9ZD}Myepr8Dh>$x7N(B>whwqS7T=vduYp+rUlsP z_Z&4ahX|NvbsZ)6$H*;48-W>gZDgxGY)N&=V!%9r8{>?rut z9T&evZpp8&DxfOI4#T@LDf+&w{0o*-!oBK3+} zOtqmIN~E5?@^cr9pjW0bTK_J&3hkEugKDT7bq0#2@Lrk^imV*nBO z5U8NXz`M-5;U1xqrIseV6C!RH4*%4le?E=|bdTl?ivnR6>oCI}Tmn{>DaIoLZ?S{o zNCkNm&(OXQolQ-ZlV?#(j0B%DLg~xtRm>pFqRpQB=`5Mi7~z_fad73S8HASpB>eO_oYGdQen84P z5nR}RkG?L@Ed^?H9^({*HALNQPIsc4zyksy!7NP$d6oKJhUV`o4l5Q|x~mF^$4YHv zh7YwWO|$7l|oY)O6s+01t%)PDhRWSN#sZ`3^NBrqWBY7?4D z+$y3lQYw@A>rWzm>VI)vJO&KV6=^(`+;VCX(UVy0GmJfm^Ey}K-Y)4aJTQ-Xdt41v zZS~TOJtTBaRMr%#PVZsrv6+NE@i^@dNAY@vaU@5IoNy2<{|k`wg$NXZ_CsZt$`<^% zN>Iw^<6KTn0%)XR&3?J|!XgOAMUM*Mpk7?GgGxp&K$!6$(xuT6Aj#H!j(k^g^xg=ng#CccB z8tgIi5OPY=^I2q_0z@~+A^mHO0!p&UA?N0b-*!^OT<>bQqE%o2FwH{hiZXu_85Lx1ulFbFa_N!vSsy0a;JV@F`?&d?O+U6cYitc=!`L zMP0jB`b6w!YWy~hp#&NrDnt%o_Bp=|NCsRKbt>$*Z$MpLP^K}@w1SA5X-Z-WY%AZB z9Ish7?nn0o2qjNA*yJ5C4@>$S)q&J9ppKLspwuGkFh5XqCtaz|)bI9NVZLiC&t4+H z47k{+m5<;uz-6@Zw|pTBMoePv{&K*Mh@AP%0MB>M(vFm0cu<=gWMmTJKpyRJ1(oPaC2d(G^*hrV?%TWbvkIx+n=45F72<7^#hI~oxstswd7fn zA-p&|1V8vvjR8mcT*?l-Ex|hws^LbzVV=Op%J}A z^1NRc-Z97~OS3b~JAubgYVpbeNMYeISQ* zKpYG{97ot|MLjsH9fJd>_L`%}+oW_&;+_|efe8|A``L>$`-uRZ1@;x*314_D;DFy7 zwBCJgu@)Dat{B_$xHwB(U=?Iiq@3WHQ6nnqm`f88?cx)myhH1n5XW9dap4sF*phjt%ic+Hz z6_yICK>Yw)gAeI!%|S$M6(D`{*+&|REoY@V^R~j*)DckM!ZEAC4IRrj7em+tcO086r7|h26R*7xiNqFQ(@-%OqdWS9W2e~0}O_n(Bm=D@QWjy!z5JG%Jp z62@ux5xh$xqjEQow;AfDYB=Fp-D=mT$t zJSxZ6-!D~?5`&l=vV}brMgeE|@`mRa#NF<7iwkF{I&(23Xh4u3`;&?>3Q-=JSY6H5 z@yOJ9n1W0%_W6R*!pxo=-02s0upAR{4^sDV9;;iV`^DM!f~zM4TN-2pQk3Fjfn<{H zKlhgBqcytnLU{f5pJ9SIs1?4twa#Ij^^^89;1sn=(DwCUd^M+7R4XD1UsEq>K>}jV z?qFngQt69CW~|Yk_T;E*YReTv|8dmik9=;Sd~y);7XA+-BR~HsZ3O;DXRpNiw!&+{3V}WU07(;Mri-@jtG(~eAqNaSqXt?A- zIbHys6H6)qb@4B1n0?0uV2C9)VxAVRNngrOBF_W!nkYsx+Obv0tBDan<zC-a*fy36H$N9J0T(#*`oIC~gvLb?)LG|Cb z?7NV$jVlk5dQK$S_A28@{S45T6<}wA4Wo#!-gU}(?hD_AI~vnbHYaSH<@ zy1pLA`N^_dAu0Vh#sE#v&)Ojer1B||#%(Wt1!}cHNse9Ep-N@CcBvg1E_mfFYrV67 zUBrn@QrDE0G8MRsMD{_8fHhBpqAxA2FC``SS_I_jX~hDOvbQ`RoXL~Pe&?ZEJ!Jiw zAS0~OU{IbE*dX%>E5o0S>o{K6_9?Wm{6A|9gvRY>5;oIQE04Ik+`85TfnMRi z80EBH`SJC;g|CJi28spKQXk06jKH5gA8#mEp|P^DA}dcNpjVD4*kKoEa7B_XU$)2K z^VWl7&bw#s#Eo#hfbC09U|MNgEBBpn*L{r3R|udENfIBziz{5nP{Q`BfoG_3tF0hP zQcx@(^#Dd*O_Lx=T;Bbc7*k_#<_l(7qiK!mB-xX3Uks8wH61jxvk1?j692en*fk zo*LB@t+f+mQ#(Uhnu7m z-L>lkpHtKiqUh7mE47Gy9=)#&F*2XiElob1-Xf*G&MFrS{X1Bs1)gFX&e=PGS}B-CH+3Grb*HYT zBAzfEryEbZ57i%0F(2gFIL+#x9N+D0kyy6JDmxRf7%#2YiV@|a<>=d37XPtvfxXKY z8}!Dj3R?`mvx#b=%%Ilz&S#ZF=R39E9qk!Av#+LgSN|>8VpKNcuZcYV4kY+hg;v9s z997vOXmt=E-M1;nHs#n+#WoK+Vkoa(y4Ak#5C0L=i0&QXGfdfq>!7~d?F%$ER%r1bwmCSV z^969x`1!gfOsobwyGiz$Usf;y=AYS9AzFX%h34kXjC=n z$KxviAROb2uC`t9!Uq#|hIGp)Vn2;PoEYW40g4X+3!Y8-vx`~?eKrYW^p$8WDbTLr6vutMA zHI8V`X|*@Mq1!}Cm@sx0$4az2+%Oc8gT?@c`P4>D_m0Wjx{ zlz@4Ti|;LJMVvS;bQK>y4cPNA4^P54F*k4(#JO6nK8^Y1r(ZnBI9B$s_+U=6BuarWre@4d4mJx%!wB$bmPSgMsW+w@HsuU04 zq4423EIFQO`C}NlY=n;Jzai`_fl=+29C9VY;3x_>HH^b%h`wNTl%*Sn0#~reKdr)I zXMQ64V-{p7@s;ZEx?~g~V3k@I)z?=aZkM>0N0UZbPpx#$G^w|syK>_NVgp;KM0!9t zaK?KoA)8fXLv@Ca=I{nN4TWbZa1M|K;H0?#Sz=@Hi{tR+PDo+y|aJOA%axqfK9M zgFx8><*bLgu}VoHUlVkf{teD4p*Q~~^iYq{%8`>8z!!=q1)Zvm|?;#vA|qEK60L zO}h?-gJ+n|!=Cd-^f|5az#eqN;nM0n*DtaDMUPTp$ z_%%SFt*RAO@|DH`m%CQRMQdth2pRkw_qW^lh{hRyOiRoyQ8xd;XlC(!s_lkd!R3I~ z@jg|DRY-o89IteI?}(}X!xJNw2$$+IBl%j(DJ)@N6Ds&~-vom6XtWOD`M2HwRLO`2 z_^I2~floTCVtF%l;MYgo;o_2NuaB>@bdBbY%&Pw3W+Em@{GK*4ZTCO^rjAZ$pnLo^ z9aZbul)Y972)ViX65NR-6+Rnr_!JVP4*o3}e1mwb^oit=oxCv9-+*TYhCD3z4qopK z;nGkWVn$y09ZEMbaPOXqg6r!Kah-k~9Mtt5)roZ~U)8yoAH~W(=qy91TvHX3FSDSE-B_vvK=7z_j!YCvOd%>+#6g+^$wddOziak%E z%BBMqFQx=Jc?TJZ#-*%}G1-s&dY9`U`ZAaLa7?pkMNJz1L~GJ1(P_H3qTsmgdbL2O zb;zw@F>4VB^rB2qIl^AgKC;VS?Y{XJHvGV??Z>Z3@opF=Tfoa&30`S=9I6~&9N6wWRX@@R_$tRj^+*`!%iz#* zZ{E25nn71T(Jg{8O`ZB&*SCc8MI<|HMxYW+T>YT%#-gSHRcMffTDzoj^l*AzgN`q# z`ht~oN{8^B(BBap;|~?JwENObMIqIxz{&EhQh$X&Ipg@gHwaSza7h?*!}D9?R@0BO z3sk;tPX_^@R!E>{Z1e?eKedFw{t{`^HH4kb9 z(dw+vTEYVZ5T|6MfLHB9xlD-3$9XF$kn+3?fM~$iolEfX>Ji~6of_pfZfU0U>>dMB z&OB6$PM8Z7qD#DbHcG}AE#oW~w($0YRY^3pr}Z}qjh1Qpi`c8zt4o+|Y{Q{?+uHa1 z&(ReQx0J{ybz*+SS%9KCL+766X(C8860eHUMD64_Q=F`VkZA}IG8Z#g(a-}V_ig`t!^j^bC+`dVtVX>n*P+>bB=YFzGD7)`Dhkj8uXh_0A+9U z9BB{f^tPnk_T`2CSs9oO$0ME_6Ur44zv0}*tSoNm0+Tj;g(Wf5Se@snt(j$}xMgV< zptke+@N^+LHqDagvMgBo9=65n8D{8vsfI6~dwJByVw}Cr2(-x5m1Smr= zVN4Cdj+N}qI}kxZLX)FgVbibY`YI%MeNS=8J?gE;d)Ar|-^(@HeHyWK?Pcrrr+YE@ zgbVgVsW^;LUZz$D&lABWI5yK;f2#lkez$3MrH*`^{p|LakIqX_QSEz0i`Y^Ge#wd~ za||-Sx+Ph26YAB#=a~nl(meogE+MyykgSa=gOx2ZP)I0ca}h|veJ9(KS^EcNW?3UA zVKSpqz2>{R=^GZDJYmDbtTHdIxO6`CVd^V8n+txJyJfauy>!ilf+WVNUqzm5(n(G9 z&QPnFbAeVQUNsCo!Q8*1ut+k7^~I_a$4%r9WZ)CEBoUOrkmsT4#ULMv1NfsutcXI2 zLC^>n+Eh)hc|nVKx=d6%j+jY*hmq`YMb+Gu`yrj0zbf*jb-!SHr9 zY#!G(#>&IM@!Avltg+}~?Cr=qFEgAl+%Qvy-Q&I@JjaWjwX0lGVk9$VMLH+X9ppMD zw>18C1Ao}urBhsLPW8dmO84U2u@oJPz$ZixB6(cJe59l(EW4rin1Y4I(APOhT9D(E zErlS>y|}dOWx0n*>7$T`5qd{2DiIp603LO-$YJfH8S>y~lVbj)J2EfdA5 zWfZ2F;wd?HZ%qxdPSUDIeW^I8G~5>YwVBpzAh!)z{cYTy(y=*!QcXE%J`U{ntJjVS zDrXq_=`Kz;u4XFUy^|uT$~c>6(>st!c?})mvDFEaC{$&wm8xHt_q4$^)Ocj7@NM6U zT_RjV$`rIZL^Xs1uVh#UVytCzU4}11%!E$=tR$(}PcX`gs93zqU<(iq6pjONvz)`w zrwn+eclvI|ddqW!cEU=Vp>iJrLjIL^`lo|SB($&y?b8R%A)+}MezwH%Pml~OK#pjPThI_iKN*ZE1B){BAK)YKZS0xCzQ;vu2jRV$Z z0qGQVkZiSc(Pq879i*;*-OI!ubg3aL(UkQ5?4>Lb64AW6=QXj=>z`V-fWlft{kd*j zvf!!~QVct_y3$@^qtv3saLnd6{s+ke0tVN7X_o&u**Ava;!K1D!`3w2HjoY^H6Oa~Z zo4!65`{0p+WJs4e_sEimiFY@=LQ?q<41qgP=S1S!8-s98dOtG@2xIKPB9Pq zNp%a+-Le%Zv;C;js2PhHT?k_&{GAq5xGbJe;mpB_Nn||F$pU|3nXyb`Sim1 zW{sNRtf0RK`P;0vGST{o!gH}3&S@b?MLnM2kPYUP>lhR>NMbO6v3I;~n|EVEj<0`? zNV!$c-LCC9L|jKF2#6#UX{)>izN60D%(uGAo+F!F3qK)p>aW7up3HIeIkIAX7WEO{*o~@o(f15eRb}HK%};q7e>x z;{VqrJdmCF%o7R2SYI&sdgKlMGcDRrbgl5oreIwS8!8iJ^4@eN;qU(rgyL7CIzyvW zSK|7gGrztQIIm~qlkq}{whU+7Ige=F6(=0WNSAxJhov|O*VoG~t)*<%z`uEAD@U|G zHlO`(bHZ*g@V5lRORmlxuq;fmy(<_WfXzkcW*lCgljmVhy)OJS&`BVnolWyhAmpBe zJ~0RFlhB^(Cv#P`rDl>S(io{SLSQU>P*Yr3uUUFvM?jcq-wi^4ob$b`>k^U5v206a zLVrbCAVf5gSb0|f32q)>%hU2Qi11r#=o%2SUp!;N$~`8q@a#P_N?ow5bKrD(lNt1t zRsOkYfVK1ylK|DE+#lG%;o~p7kpuBM%$UpL{lgA_GPqBN2dX@P<820|Wjf`4=u)4NvD+GIxIEhDh%V6kZ_xe;yX6lcA~x2Mm3mhq{fm-h zN3l!lYC5L9;{tB3$?Wr(JG+xYBIpKV%4%I#2;;7poQRXeUCAkVgVVxb|_|78_!TyR|2gU_rq=E?|lv(cam8)+m3dgm1d~3K3 zkr>H+coNy$CIeubZVJ7v|N3#|gs-#j)k=t;9TW_oC?{KJ3caAs`*MKXKLX%{XSA6= zPst~Jkubg|m>#y+oAh!rMA8$H`J@2JbT`FWPo}2p%6y-(L$(uyCb3%|K6N4q2Qya> zS{HIwUrJ;J10IXVQ-l%c&M=fCp#7R={y4tj+r9PchWj`=v6|Y^+RW7#k`{I`s|cY& zLMV^a(1u;+0%IMW@c|J!;((;0_ma+RWmLK~pjVnDtb!w7*8~j|h1P1-nL>BGee4*D zz!aLdQ(?ZD+MoMV-nzE&W(N*9Ke%S#i>^k%d1D!001NCKX^ree1^3U*kmxSl%Ook| zRG`wPF&daCmh}a=dULvdE!fHe$uqD{*E_;FJGx~d^h{twijT(bQodiCrWm_WhYXm4 z{uutTskv=)>kAA~PF@8I+%Z~Oc+L<-&d0-xLVB;9kqIu;^>LhdsLp7w^}T34mf8p& z{~cxFF7~PO33ScO!y|tVBJnfN=a&d`=8U+YgOIf#*cuSf)F63i2`tmXy^8Tqq_Rdt zLue@vczxTfEPyQH{!-s{b~8T9$Khc>m4K97E3KlG?Rar$gjX)!8i^iS>wOz2z99NM zDTKfh+M{4*CNuYH+JG559Ub-F64i2AP^K(!j3b|dH{&m@_{6O#U%hb*1PU4K>l;(6 z`@2(reB63d`-rEP620F=#%$6xUz_tAxUo|*Elb$ z>GYGI7Lg0{N8}>q6;t(&Fyt<7``Z`UBKalMNr$@)hPI4^0ak4`?+rPy02+WPs{(rw zADzGp>z+7Z6`Eb$QbAY=(p!!-oc|n!a(hY#uT=p#dcq8=EvKVPSS+8K)+PZ?Y z);>ihrRl>qV*0DZ!@w&bqRj?n#I)`Gv4My}a6)`$$yiFhxGY>;*%+OCs6X4>R4cHI z;4@xg`LZ5iJSs0@M4uxh+bjS%%D_>zVLm2%UA;xFbr${k~yG68dL|5c{%K0l`R#@7pG@aQ*D#zIFwmhSfmXff_ixJS3m z5p-n{KY2!QvJOE<@P@NKIkXtGW|qXiUt?JxI^?%O5n%Chptx4b2|}jyi{?NR07Z^J zihCFRsargW#$pTxf3EViv#`;juOE&awyW9oOud?LtrCP0MP7By zZv!!T)vvQ@@24fiKmbZ)y|0Iwa-r2kZ`0Ej)C827EOqf|5g!l&aq~h2(Cx}1hboXZ zNygNY02X=2qkqW~RUo^e<9~_`$+ed5r3=74r!SiJzSC2bg-lu$ISwBeyFkQrh#*V3 zX;1fyS-IIrnC5~KNW<+pUDIL>3>%{+Dxyi*Ge+$qS8&oWjkEXm8h+%orELjb9~`+$r2?bGa}%- zZ-A4~pRQ+|U^4cXV`NTGpd~L6M|dCFP(*hKN-pxB$)6QEFR;&q%aa&t=kq*Do_ z5lPa)w-WPri{*u=k4E;{&X2$omFLqxP@i|v?BWEFCt9PP@Y1tZv)|C-sEJ5Bt_D<1 zM1&P6Q^tI{z20yUpnOSRM!9~@$W*tkOIyS(F$8YO+kuxsr8NgNMgC z%uYuNWnsI6ODP1_)V#%wUV{4fd}Gs`%f+x2`a1=_rO~e*sHeafyQDfsrrte=z&rwT zYK+!zr{m2cwjtbFabA5X+~B*5_lMU9Roqpm9zO07!oj zD!l#uyD`p1omWGEVkL>sJ9~50!hwvLM8y>|;{8zWe<`!rVOk#1-oO9$+LZ3h2=uEp z*pA|Rr3kAI`lu+r{^w=!aY{&4@$oz5HX$nj zvh@XA6@OG#X(zfH=HkUoC)_w(whT1E_%8u3A)y}H2sK3k<^>$B=o2+fSI4oMeTdzd z=EzlxFzK2ZcRhUWxl1S2v?!5%_N4&>rZHEGgW!l=Fpqbjq(D5Y zOT%R)Sy0>Wl8-5GmJ2^~pP6!Sf>$5?tHZ7V%+(jA#g5dWI4t30C`YwOMx$(nuMGm^ z$lbWb*+NWagdutk5bsVALCfdus}SZ^a)yVUu^7G+U!L~yFvQ^>d>h-_ZnH)xNV9-O zzHQM|9a}~BwuK17WJwwQrQJPiJA(~|Q8%s9uDPZ=PPk@H@jM zL@2|#PuzIw8g0&7DcBu3=l<=&$KSn{d#WVZhJ)KcNIc2PFP&o!N9xNM+@P$c=z~d= zJZfWeJH@|Ra*SNT4dbOtS350!{Qs1A`FEoniPsnntJGI8g>2jBL2rpmQREfLA*~Jn zQ=KdHc_n1b&uAOS{YR8K>Do6ZTalQ$T2@jtK+o=nnSEWsn|1ifv! z&{+)QK;{FDs<5fs)nh{IVZ?Bvacxv6v#Y_$%qY1kk{ZJ3;O8AOfgFi?uqt^Wkta$R{8jcedHivBJ@>P>VT8429d8eEIkaNiXwRaxPZ-jX-XMVa-i+pe=K z!cG0Om=EH5j*!W|>IgEI(sp8s@%5~oRp{hyagGVMep$fA5}pB0AI`*c@K~=edb@0+ ztA4rJE--7e_%-koqSvB;MRMM@tR|+$r~oo8CglyyNfW1$8<;D2d==a z@D^dkT#iEKCIE;ODky?(XLzAMmX=fMQ?%z@>mdsV@(>fX$ynA`lfa~kHX#2k&UKn^ zXIRYJbs)2ir)#2*8018tXhUDrB83CxSi*Ul+3N=SSNn+Tujh@J?CQ9ff!B6beeB7p zHhRM~4eP^c_uvFJ*d0xe`13^lyUsykE2`^XuaZK{1loQ1%+9UT_Tv)x%_6}0Ku3VC zN{YvT2DPtdHE?DFJAt9uY1~l)5&fD35H)cbH%XJ(nZ1KsOfurhzPCmrA%R+Q>{3gO z2u8#QKfjHe%T)zofC=A@ad%=xOsrVow5s`2R%!+o)zlesH%Z>fZQLJZAbNKaO{OB- zUY7agKYj4~SsF)HV46qCs3=M5!el(&s@VM*j)Npe=&b3Bk=8v;VPKXc)GYLn{Z4NU z0BB#l;R%URVAa!fOerNVXOmwypGyD6Hfo<9cfP`?VNNb zG578KjM>A*$Cp1{Iy`1o!hc_Q=CisSO#9P+t2`Z^X)!v>o5+u^XTg;tY1Lrwv+MA@ z+x~N|F}=N2ZB)B!J~4eJeEnk${|I~`XlPoMXY#$Q9G;@Dm=FSqV1-|kK|k3gOvZGdN5{8PA~Y2iX* zXKD-z(JvLElNqT<>|Vt(ULox^Jf0aaT>J_UU3vRnY-T5{i6QoVwS%8sH+S#^nb$?} zGk6G>(fx_mW?1wL5J^ezF5TJf?p|V?lps1mSI^X#;qbJAf`_Y@#pzq$G<`33|5o!H zU(K3Ve%ZPkt?NPW8UiHAsyC=CBQ--P211a}-1A<~8psbXo7Z$(^?XDBU9 zI0uO_Zd5z0Na`h%w0GE^-F&Bt6L%mC@kez#ij9QZVWo&g%SF=qS>E$G77FiWp%CHRMbJ z`}WzgEz?gaQoO?4La=DIC1c92C;#bSf*rdnI#aYKy~#V0Vi0~TyYL&=W-6#<+hD!+ zt)I93)y2dGNu_Kv{74WJ0$A%mS5HE$B3jv!X}G#dA{%27B6P^6ugB?XYiWstjQjo^d-LH{4D3CIU8LD+`d?pY+vovtpzBg6PO^Ix;L1TI}&Arlo$wuGCsaxz4XQi3g?wb14X_GD3E64!zFd%;!=f7+RI&IJr znBXiZjREotRgMy+BrDOHX~6%P3q|)ipDlSEq5KpB0)ZC(_UY8}B}opLv+9tj zI9K*5WyC@TNBLdWb{FSY_H15=KkncO;momM#-=Lg*Q5*FYxukOlew@5RRan0sw*nt z&TcQTGpxF6bV?^pl2vJoSQN?>Dm8w!tkxI@faNWQDIf$?SkIzd_Q&7pD0d!dZrRj# zw_u&}EFRf$ydu0g`#ecG7{cGpgc|-Yt1x;i(U`B`Kl-1n)(EC{vmzaX(?avBtU?ug zD*&CjaO)1M1Xyp={lEOQ(XYuXPCiGr55^R*JI|k6dp+Es*Od5N^!|2wL^c(;w8qjKB);$W?wj&l<6t|mnEMOa@DDsD zZ))#{TrKsT9Q;F8rEC|SuO|nOw9(pmaw*7beUu`Yk3F;%fWe!kPJim}F`Ue#tq6HQ zDE(<0J*xBfh9MEOqq9D_o9@pKNj7}XNQ$P7WKmVR^M(-ePg^;dPL2=m_lq2&GD4Wb zc^g&Z#X1)`q(Re(9w|s z$ltgYjyVmAsFf%+47neJbJ=-g)KJ)yYp~RJynNLLYMaX^6-)6eM%0Lv2UzIGHev+q zC|hm5M^|0zXQG5|MrVYAzv9+Cs!<6OX)TQQIr9E~*0j9c9&tc?vq+q7K);BZPXYz@ z(=+PKu&^zwQgBWa+`Pwe@5}ozAE)c2hNdIwTfkZOP=2eyW#l)q!6PAqSqdU%0@8+MMYULy6IV5`#o2g8X#2QNWLT9|9wivJ2@DZWN2163ppMDg1 zB|43B`&MtGF#tXn#cU-{Ere%{vyZ)Xe`@!4hLI1R9YB}-4acR(yUqxu9l#BWKj(CI zkxduo3s_?Fv^9hybWh&u_{4GEF`JG6JPR1T8XYXuN&@sz)ht81WdrvVr%owFvWi?>OZvndf5&Yf z+ks#nAU~nLBV6<(Q8m`a*PcGirX|J#w%6$^sP%4urRobqIcSd|tMdZexfLyVTG$rY zD?0L#p104bcO-o~#r4d}B*EsGY9-z|K69LIy%h<#w z<_M?&BD**k710q7(~2W%-@lnO?F@aj+_;tv$0UO}1X2v!y`Wi4Wj$9l*bc9tuC4*% zo!uZ+pFqFq@=3yl?-d8n^fzKT*0ts&;d6C`uT4sE=;wE_BJv3*QCfz|J-T^fmZ_xR z#S;wUihBq3<6t5eUG(FaX{D8k*Xu(&T|A*+6^6XKJt$)cJl`mRxb0Y%nh+=Th-yfY zpQHN?rX*Mt)U-3Z#Tq(=$&I^hhntG$GGeA(Cp^kwz@nUIE0gf3`LRXkBXfoaaMe;6?G&0+8J^4 z)yey1?KQRE$9MAHzig;d*DZFZ&5A5Udr*RZ7K-wryAJX-XTi|H2NWHnwWCfreBcyT z->z&CC60n;=9K|F8bQpmhW88_vKn=_6fHU7>@)0idpXk(Pj|FWIm^@p>WPcp$PYLF zHEjE${|9tf27v@LY<%fEq;=cBV>o8^c6|$_U91NM?(x}3IR{`d1v{EJ*_O!M?E4#u zOMV)$V@yFXk;9WTuKGC8AG(4Yfxi-gt_V9WAkf!?JA$9Mu%lm#LR3%{I%`RU0gg27 zM~DN@cpoGox=T&|GsfWa6|}uQqt$zT@K+&GIHf%jukMDeR<;6MrfHarh4Su|gU&oe zsm$%u7{OQXL@#?a=1Y3GGLj0BZD^DgWMw=U^MMr7GbPgGMGhSx0~8ureVp7T#lS}Q zGERU5EASX+zuCIskhmUfR7s?g`KGX|Iva?@Z=A!FKu{aVmsI*Rm@c# z)CcQ4dXqGER3LYi1QW1-H;lL>uUd+rBe^Kr20_(U-SFFzD4m9rs`7?38m^QrIeE0c z)&1TpWKLqjlujW#Y42_SJfmprci>v4(4sSQk8Z@-d`@RPSKwSZCG>Yx+Lc-tggHPq zUl#*tktL@nliOj#=nNyQ-5(y!t;306z>2+aC6EvGJvYbV$fF*LIA9#n8v2A?%zTb9 z?sd9WxI-r5p(&+bm}^^S#A?XUtit(CZ!+biCJ@#*O5Cr|E@s$AwZZ58!qv0aR-&2P z$C`-&(sxPChBQ|1*DT@nUzYkbDbKS_spJU+ZgEHRq}ezv20^mz%!)4c2$bj15p#0l z>mJ58gy+JnFw+-86^;~0^DjF2rn&!l{%iz)y&Yec*s(!;&RO4t1+!^wT)8X~;Hajw z82Y-D$}pnFQ>`T?_;PGju+IIHiRY8{u(=NPAxXr2ksrGElhHD&-2hH-oxYdC;4=WP zL*k!7g7jDsQX}x_V~}%}Y`D!4Lf<+>|KIgn)E!+}j&UXza^zWH0Fr~qF7PrXd&$j8 zeNg{V!d4p%yKha6n`akrl`=rkFlyEhhAtS)(*FbWa9=i$i(L;3BXcsG!;GlGEFOqE zf&2avnC_R^sl4*uZy~!!3nIdcKR20i&g6Z~o*iZR1_e&3;U zg~b?@GEEv``!_(C&YMJw-DKYM3s=Wc`vr+*Q2066fA{QqdRFRH!7=7rwp&A!Y|9_s zEA5*At@FM~D1TE)sqJ09gl1$3mXP6-+e4;4WkgcLo=cC&b^LeddxI)}AiOvSH2%Ry zz0t;#I!(tKJ4U2VsfFNg^z-wqGr%|>o&sj$0lU{hHFQ#>5glh$4u^?D9l)rDWGEwk zEADqYCp-XUPmb6UrA4ofED{Rei1OC7N8l{4dqG#WcNdjNsFu1CEw9 zX=dyPZ!n>?j>Zm^4mBRRj_W${KJ&%wF>9K3IvN<1dGv= zNd8FM+oT)EI3IkLO$ zon-SpHSTqyj2VY$bnQSgOr8jIUd`Swvr_U^|ZOyF)?3ELJXoBKt`pFeS2Hlq*9rM zRRFxD_&{R~g!gl$((9l)i-2ZS!io<+GIqs|_APaUJWhf+EJSM7snABCg^9it`qoTB zV%FJ~`)-ir_tD6P(#bZ3yGTfQ|FY^Qfc^bdE7wTaK@z2*<$n#aBROOVT^lz%0S1Nd z7-ee70VpNk)Rc@?(h#*IS>?P&CsbBI5VBmZXZ3>o3oJ<^EQLro@7d2cXf65K%}ozG zkAxLbRzF!-81ZSuGWc5STHv6Ybe~pHT1s6Q!){7v^}2Hm8*+DWR+1TR?l17z`)f2q zXAtE3yMZwRTGoTUJZ5}q2nG_BeT~Inc{vbW1L}jhj@Mr^hM6c=bC`}h zW`8Y8#lodEEN4f48YxR5G4Iz~#%972lq6i(?2FYD^>nseGZw4*iWw+)xQGy6_)Y)F zTplY!Gc>hLzbznb{G8QBQI{pJZDu%pAk##4$X0CmlIRJ*$j+f8N{rX4(wPPQmHQ`u zxRT2Q(-4<~N31VRsR$(3&8$dHLrIwaY=sc0^1_rR45*aV4F9!M#^=H_fp^rj@AI#z zt(Hk26Qd3UU}_snD5FG5+Pd|Q&MSjy?!{r)R4TKB0_rgkef=Pe*jpLDtx>c5zA&GP zvb|sJ{y45uv#6HZ)%&~aH(FB7j1&+Hg}|blS^rlIpye<<7T@|5qkD2D5t}ZleDZwi zl;{Xf;D`H~<47n~D?oo0izM@)mHu%7;%a!TRA0n61UK^6DW+w+wGl~wxcHwV?; zkC~tPTKm1j=j~g_T3IX{lwYKF5L%$r;gFj#H+TbR+$$(Tf z*$ObL^`t<4jqxoB2s}#AwEIsh5{|J$5Z2E1J` zsAbWBE-y@F?dDLYx!N2C5^qspLyn~s6<*|4yCN*h`oMw3rtVpF$tFy*FbLTzZa7e{ z0>k+TZqV@(-x#y5GRS-(EnNry2_PC4P*sO3!nyeKPzhioqx|ggxHq0A3^c7(_1X`P zdSor=3Drii$3i(sC7C)fha;%5bQ@?l@MQKiccPEKIu%b4N=k7y0zsRYDp%LZ=%aUs zYl7fxz)>e6oz07lvXuCv=_eTInSoHCQ2b(Ffi~<~2lYvAS#f$t)$%OLHSACJncbnB zQK9V1)1g{Uny8jGf7d)O!mC4elI`4S$0+9~sb>>K-`IQ-oc0qRC10tx>kw@C`r#C! ze+38AnKp}lYm^1qy9ua*&sQofj8Z>LuI-pmH`-lr{&Z}~N%{}X5xhU2 zlu`La0oniR+_I|V=i^(qoRQ_SJ9I7xIP_AK@6$^H2NQoi{etqf9>wC=j-$-3X9WFi z>Rtz9Ft3b)aHMFZ0<_T~e}<1-SIlHzVg4A!iTVI}e5mcKQ<_YhZvTf$33>>0kP#IE zNA*~U#*%pGCn^JCiTQ4Kk_lJc*oD_rQ3!SNUZk?F@CodkzXx<2`slifCR@T+V^89H z8LH~DA4pV96?5Rv8+hGQW*ta}DI$93XxY`o@)0B|jE| z&+T@aQya_b@xvMFE+z`r@MstUGrGxU(u!9}L&4)A(Bf{Ayks$_=j0x&MCS zYy%CO`Kiamg;6tL|6-GIx(&PJLIVeu4A$tpnNGT~N7W3fzWmyS)b5i$R>Qvy_@t-E zw+{8{V?KgrGhV!IRD(f52*GBCqK*H#+F;=BU0^}|typK^;6iQZzH#Ykk5Ra?acMcy zV=l85ivbA;B{J0+qj~F*EeqsN6oZ^?)!PpbTg&>XcT_>*4sKN5NTVSUZq!t?#uGs} z20+=~%W&r)8!j~+Ts;T1b?8GIx-a*+>H6)!yF9VEM1N^VTRuBX7P5wed-X2Dl z#i+*Gth<1Kdz(T^=vWPMlQh3TA1JL}>pwNlTj|;AW=>US0RBt+k;pA<|A~%vhQFY4 zl`cMfgTKk^IpoHP1VfpU+f^H_QJf^hy_EZ^&HF000-F7Jrbq1JA&1{7iz&IC?ePfq zK8YjXCei&pU%;e7FRuQqCgTCo&^zaBf_QQ$L~2r|Wk2RpfY?)$$^hwwhCtnxGLA?0 z^8j3)?#`h40h--cPX7K6;53!CcD_%?E>1uv45HFh%Y<4Ia_($dbX|>AoZTuF;mAJr zSYUdQ{Q+Kq0FO_hWp%s-JIXKJesu=C-j> z#5Hc7i@X%RIEh;0GPxwY#nKllO}3|_-31fQC|6%`sNJk?I^rcyoK9r<@}eOKzg0{m zubflx`_eLFmw;MuRb_VcoT{I9CmMQKEP%URUH--ISS=fO2PZ#UwP&2GeqxXs<6^6r(dFDVhR+02a+u3oC zyO*BWO#5^|F_>w7)*4-5+*JObE$+tSJi;729-s7Pd(+(A8|`K5@d4BL8a4}GoqE2p z-L>)W;&YX)DxhfH_J#9)a90ZNNSnd$W`!$^wAq3BN`?p0%ri6Ba%*JtHAQs@a}o*M z;IDV-z01_0K&_0kW&ihrKZ?I#W@W&FdBDV0+^LfT+=W(I7wn-*8m)fsZUm-r*pSV& z&qKf`=L!`yTd$$@rh-?MUDJVJOu19!|bk&K{%lylDi?PF$n2RQot$InY19MpXfN1yTUQ2BaJ65vuSs}8UhWGqr zS)=wf!7A<4;;~3@t%1ZBxXwg^&D@(b9Pj&uJUJx3Ns3SvmzF=Q2w4Zyj3iG0G)+3g z|NbR5Ff^@-F&Ty=(l>XW(0}J#jOZ{9?Ze|7Fv(jXGi~#UgA;I!sX*yw-qX) zLl%!=?y(7-yve_i07i>_bYys7B7qx{+q05THDl-}7AV-)-HMA5p8$5qV+xa7!2Jq+ zy-;RC6%nQAnIo3@n6~9lYWvLEJiF<;x*6O816D1BbU(iRAAo6a!z3*HEpR~L>e?aX z_jW3;-OVLB6#**#lLQOfYS-uPV9A&)t&Dj(BK;OeG*YVt{g(&BeOGt2e7b0E-q z*5^3(1W9hJt8bw?N>1CdqQ1L-9_@A!qRP3AC`Kmg6>#A(CsKRlwQ7O#ia9zt3ktG# zAxZ%ZKxnZ#2MwEN>EMm4pcg?dea=0W*kVny26&_z<4J%;x4rQb48uDsJ1z6c3N@*> z%Dg$o|G=|}svtd*sqEatT6yp;btT8)IRdIG!eEmJbGkYBAPs=*9$hs1wEC*1YTBJT z`JctZ5!;pAODEiGS|{>*$VL?s`Uv(mEWcr72P%NH4BFhPlQ4WE>V4M16 z>uN-@tzx%)GasYj{=m}X*=8cJ4%mv`Zqg$e`cQ@6IwjWGlh2J7#kfA-(`IK%N$TGEml?z@al-Fwix%STbEz2%+}A}QMcD~e z+f83HP&;PZ7po6s)JlWhdX3Qr9BKH)%gM{&lGs)9tiJT_jyBw<%FP1%CWW4RLf|Ls-@Hz_3>n#c@MeEruaJN zk>_|qkk^;)C?lG@%Lr70iBH|jSf|;@w-KER=(k*v+9k>^jVt(x;yM{j??OvE3%KHT zM&NwOq6>s$zTkd4Jn_Q7!(Fr^yFOIw82ps2?#32XHIFx`<_483d! z_p=LH=iIoHcep?hvW=}>{4uv-UYMNm`*|9~h0h135u-cIC~eyeskw0isfo;5E=`_# zlKUWKqA>BqNq%&r$wJiT3ud-bJ4Pfz`u8eG?o9l5SEM}o5fHLhZ3V;gm1O$;$o zruG8d4er0W8B^LaBA!mv`(gt%ON?QG?lP(^d^1Fg3~T z6v(fWa;2UCT~25U945`?{GVfae;kxJu-(z~Y)Uvb zpP=+e>?P{TY6HzpYOk-+5xxmDF<8~hbGeYWF0Z&sNHJ-dSl5gk! zM=4D=u*|0$U#v+$-z!ZQuhkCES5hQ!(*tE!!N-q#CE%ye&5F!JPf-5G7K zF9W}F6%1G=4oo*IIxk-Ryba;pk9Sew^%rmKUxU@{63m-RFM?omh~N;Y%EmIm)I|=T zZo6d}R0H#G!08(a3wnFSBnb6@P7D~fs~bw9?Q_#zKjJx0D9hsmi8PdK)W)Y2aDZm1 z7IHJnV|<-_T5vaR0#bVqKW_gTPEXr_Y?FJkuKAHG9cO|I^9Hx7Mm?(D&jlZe-|2c{ z9v|hMgVra#Ql$L2edCFDbD9+@(vtFXfTi}44-~?Q$%yFelk0MljoX0B1|-}0aB5Wn zl$H^nhqJ~kO16sMW=2?jVhN|08)3XM^zMZo9wp?@?dH-A{z@I7^PhHYvlrNKpO!?> zCe-I}jAwS<;DVTBcHBVT#AFi-6stOOqM5v23JN}M5dbX}*5OPkf>f!hwD()g`oE#z zo}D?&(Vme~4iBfV0VOF-L83WaE|yD^8lyclVn}O^=>nLi&B)tG*Apb?d6S8SF#k4J zJi=jFGOENOApcPu?TS!kJVN)#kTCRke=?*F??HZmUxT z@3G2V(+@Zas+n1JeXD{826ozS2WMsX>SIMtv7eG;4AGrqUTnwhqO!Wz$H?W0k3@!Z zusso#g}S(QExuE~i1YEg@;QQ|XNo{otr2+DMJ2c{udUZ;Y;|j zFjF4}k1Tf1&E*#pBlRG%p%F}Y?>}7qV%ui(E{Dz5O|j@Mo+!Mtw{wF;Ip~H;PM~oK zev2t#sZztbj2#*X9L8jEIhF3%%(J^^qG_$0pbda}Dj$yde7x#MohXpebBM0L<3o|~ zYW1StgtO_;LX;m^%8O&a@y8x#uwh4rgVy6|bne1k5RzN3pUePj{zyl$@Y{niMg%YU3x(~3HUqEf@on3!9+J~u_E_J}d) zdBZ~gQx5q=0a8o1FNuvZUCsxBQEAcEppkUgtW&$2doY$8aW%&h<0AH3!{iEi-8n=% z3#$-82kMFCX0tVCPTy^tM`;mCG=BO-Io)@Wiu#+!J&~aM!|Cph%OQ9%!8_J(;2Aj$ zr7IQQN^O_Zut(_!T-ZwB=zMVu2p!A&4k~aM466`0^?{$x*qikk$j}0BL3s(toCR-P zv6Q{kkmkvX7W;RSOgd{WKA~gEvH?>-00&`ehE$SSZ`N{5i4`0x(ipv+S$_Z6E$$Q5 z-il?Q8?v`%FN*5roy0pChMdouUtWwE{PAu`{NDCo>;M1_4JKBzT1(MYcn?VW=9{2pmY z`<>ybV=&b1_4sP|E_u1&0OjF^vNvV?)48vp{ll_s)6nkpI~p2RW33O&i7CN^g`FZH z00$qsm`00Y=4Vk`5o@vbR*I#cBQ;vd>|s#saao7F5IGRv$y^9F08a^(3A#c87*cV1D_5kZx3nt6ldX?;W*O?QioP5_A5U_UyI44Qt-dfpwgKuSLP{_ zbt^4I92c0vUi{--UmI~{f-vj9lj}lr%0oa=k+in#mZ(0+KuSALzkXquMCQP60JDH2 zbuBu`LOo_IEcBU;`&*cPj@8Vs1HnM=^xr@h)xW%jW5a={f8j0d`DaPY9u}`n*I!WS zTzgfyZYJXf<34v0W17$5A0&8Cz`qqYyOkJjSe61kX1n-z3>39%>H_F6WU^{k1v?rK z7fTNF^s~9^=la`@Mu$@06F3t{j0KHP%%m|yU4Bk+oS8@706(&|cM;nlEKhRrY`mBo zu*Y%FMxS&Gu}tu@#jCRpiboFP^9K({MGN@JG1JD`rMsz3NS;HicRZHZAYWNK(T7+o4X zu%{aTS4k_15hU>Ne7t}!_r7Tp8R9Mkz(HtR>`$m10xmm;;ndvvN~fzn?1PQr>ulH7 z*miWBIt&Q1oU7v#4WN@qyrj=Uc^T8JNE=gOnRL3h7mm1xtZ_puf(Y@_7!P9i4WXG* zS81YE^eg)okG1_t;bnQiKM2V-r5OA-goeR_W}7!jIJq2=aVDELU|;DGb?fV>W9^<6 zITnz20z0c)Hre!wW01abo+l}n(eqJ_R3U%z=JL&XG=rJtz8x{!+6Z5t7HfPdq!)k9 zy`XvK8K^rO(fsJeI9Zd~Q;fPO#&Y~eL`}L~@bX_;bWemw1%fuph(Fy1Y)XYz(raF| zlf8UaJuoNwgVWl_t}TSGI|7*-5K(1Z`qdJb71#NEDtqgH_Tqt?(pg67=Fn{OxP+IG`CEASFtol_mEdje>0js& zArXjdsR?OmRTZQPVL|?w{BSD5ZdQs4BQ1zz-LHg!lZ`)x)GAhL`n|B>)ZT*8>zE>Z+@G|3`pUv@7?)*CJ9O;+FzCS^Mw?fAS@Nw4?by zvBg*ykn6UTwU;_&x+roAb8Hi zdP^;L4(0XxMn9MVBZj~Gtlx#rk{$7Mf2@zv_e@NL*fH(`y4#%_b^mc?5+^(5 zNIYwQt1ACl;f!bv^jbBGYH8vgWQuAk1g+6+D0of%F{%Z8?eRLM8yB5?b& zgGnBahH(H(5VijkZVw$&G+5F34jJs(w^Gq=Ik;Astu3!o0l^_!h{I0#=mWAYn(!AK z35zZM(}HuQb66*5Td!*97SI0hfljzY>lx600}E+|HrDcEVg`_(@4W8n2(jTg#k@&%6DETbBlKjf3zBLP&ZCP9GAzce=OlhJKA7i}~b zVYewSVJCzY;>;HkJ30|A_2j`)i~#@gf#21}`bFh%6-c}H=ip(gIeqrGoFPvxlKiZO zm0)coOT$8EW|XX}qbnNl>^X<;E^@J+y!2&;Zo58OERU`ED-0Hw)Sw|R{Uzxw7*GGC z7TQYT_;7ES+fgwE^2cv2cNGG0#7yMm5Qzn3m>Ju?FUwuG3$MTqquzJZTr)zq`V%@Q z5PJ8dirlIt6sTFYBcq8jFX?guRG1+>-ZgDj0O(_~=^!qgh_bhmacIA-Ut>uRr)GLM zMv^-aFyCl6O)~Xt(}j-z$2?mU!)XmSvfjB*m`kMVLPs0E=)JA>nAOJcrc>|XjIVaOt{lX#Z_GYOB0#GG=| zHzoH+!uQ|7mv8zs>q6s15nb6B-=!Re?p0Q9M1t)_PQy3H92Xjx`LKadjGbd%g*t2= zQ!kx5mMxG%iOh3BX4CCrxxlZZ&&5p?&_dK(fg4ChOWFGhbdKete)XiaRyX!qHgr%f zkQ(r|D(790^WEHsD0O@_=8f5&tu2{q>Q2>1IH%f{ zv0oHo5o7YJ2#|cw3~x)iP6N=^uP0r1&9I+W(PQM#*s?Y zl2}o0jG#oMdtJx4|5&`z8c&feIqfQj(09houma@iEomg1s4ViAO*?S18$tUSH2$IV z83B>@;GUg?#YHcTFZ{nrRa!VBx}CBu8;4ms6grFJd-dBhdg4IT1|xj^tL$HfeHV5h$VwBeAAq$5({!~%|Pe6>(5 zQ-FL!Jrh{vk7t#KRf2FKZpb17;M9t@cIH_$gxrs`I;Ni^$~|3A_6rqrrL}{hvJP1T1qos;*f2C?5zXtve4S&HJxwWA0bkqSY z#4%l2?ow+H^ol$vlD_pxNWR&v=HpcbwfX9J{s?kP3t#6(cQvqI2;O{!l?q1v^)%yoH zgKVt6*4)TzZxRF8lTl2DzoKkDy?))+@?QTKi#A)Vs5ixs60)eH?ueLX;tB}eoYGV* zz5zIb6zqJ=EBa!AUcGgO<980u2qr$W@tYc%&IFUEY4ZjI9b_JQiAQi%G#Uo{@3bE3 z8k5!04irwZL>0bIBmUu{>t>h$tnWXKPl$(TWtkG{(e#HTeBt{rhx(B?MFiCoJ7kwt zj!Va-U>QbWW)VV5-d;L5`mK<__hO9WIsE*-_H;F`Aq8QicxR# zORy(`p&``Z}W>A!(|TIa61aNU(~VL|)>55>Leuampgo2H<#Wz=qkD97S*^UW*JC0}~# z(PgQHvarU;=~-*y2Tu&6P?r2!zi}BLNHqoikWuT~QMV+HF7b2<$_4Spm(yFznULg^&d;cYfgm&4@tr%%F+}g6=x!$U zEoL1GWt85BXTkxCM0BI8hbsv&(2nL2{RvBh5toCGOuy<0k_8xN*>1r56ZFZGWb--E z>^rI;N(zOfZOs#Wu$e?_yn&Fu+E&nCv+`pK2wIs*|tekxD z#v>Bz<4UZZr=c+!|C`h%S?_#!1Yss!9R$e=n0nrBXj4X}M-+4G^B)bxwl}7`snf(e z3smKxh^7i*O+r(6(A8dQDGVk3@b8FkP}t6K{FWIwFP(f*wz2;PP=%s?#=$ho8&G&P17~mgZc12q zMHDiQunsVvKE;sP4ceWHJN zD$8pc38${1Mg(zdnZn`ld>Cm|3sJ?=-|WzM$aPZ+lTw9ghtkTpLi1XnAAtu z77l>lEc|}{melzg--leUEiFv_7LOlI0hyg)BL$U_`zrHd2?9Wo5&@p1F6+;*>JkLs z6$ZSElCsgn>Ip*r{+|8hA-_XhvPozH&YDZHxCRjmi5pQ_@hS!X}xt^0V7XT|YZSXwU`L<2++d$dBv2Ah3z zSA^TVW|qVKsC7-lf)j5zjK^bUtd%v#9MTXK2&{1fk*5HGL4jA}=lWtvSt36! z`!852AydI{zE~^1PJyvknsU9J_pn?OK|N{nwl8!9yZabel%|%FRhpagPE_S~ci!*Q zV!0lmr>%VdHQ9{5N=WQpHgWYzmYo;Sdwq4{#Yj*YWHynrDo8O z4zYp`z^+<$Dndk3mLhY@CRD%+8|ybnN?$>U*jVQhJ@BR<5-n*b_vqSfx*dsjO@3dKIk})X ztJsGhYRU_k4+5>^DtqsP+{=PyfyH>-;>dB!ReXW)ga|z6ye7a-Gl;mvD_5z?;uuX3 zz>0+UnWnZ~8r}LX#r)kH$XzFS@xQ3aV+(rebQEXrGyu*W3P1_jB-sW-5KhlZ{&&~< zrTM@6^SO|9&!^pUeUpP9ScoF2vLH1x$pfxwg2b8+)pdB;pV4=j_|70~1sZ85Zp@){ z8LDRR-lB9}1dDa^>I#2o;w$#<91drf#_O1pohuCF{btU9ibUJaH=_Rp9tk~=F3rr~f1(rl1hP$4xVbW(fmng=1+V38O*`8}I24&raFl$<{X#mU&iGF=y=b87>FB=_ zedknBeT7N1i6(g$>hLct16LZ6ZbYIxI1u!?|C6n|8i>k%4I~L(-DeX8lHB=9SsjeY zs1)r`doM2R%EOSD1WyQ)|GYA0U~q4>uf#U3{1jidP4bj!0!=h1(;asX~LngE716lK~7DWNL(rMJIfchdwDW%9eEEw5qN z9Jsd92V0PjpS zaB6*0B#dF#XBYb%#ZJW6Y@oxh1-r8>Ssww`Z>p68kpOOZV1dWXpz@!r?LB@-v+1&%Z&;{>(T_P@&)XZ$6pm{Mk-s1q(K*^H1Y~s$!T6hK$MTivNL z%mr~{F{~DfejDaH%Gz>~lU;gjq_TQj3ZA>nQF*nx_J4=iAF6L5_ZbBWaPMxDvIDS2 zaWgin`x^GGGPLemS&%;$^NwHQBg8dy^e{dIc$Y5S`KqaywSkIq&Gg6(AD9_FJ}3xs zSC06$gXp;|thw-b1PkX2qd)ugtGnyWr zZA^Vzy0^x63=+rA33%Qjee>SR1e(aO>eFdB5LqZFH$JY@!~bbShe^WAe3ZBM&BFcTs|Nm3X<4>^MaGyQIs=hOO*d=dNpm;(*UWwQCyh}hgJdJP1jqHwoL(Q@pjmhb zvG_bxk@j(;VgEcqVLUj8nYRnNm47oLiWCc@A=V?Yfn7bUOcpicDlz13{lSiQ-j*F`NbK|=dYa?q)@%Dw5tfzOVdDpB!yCui5RneQ5 zx?s&w$Qm%=4$Z#dwHK82_DUiHqI)|9ByLSVDi06D*8`crU`oR#@8LSfq~fb;K8&^m zeio%P>~`UbdBFRpfhf+d9tdjx^Ar{;OQ3cgN9A$d$%4>_+OKf16^CV9)&f^evuaL~ z(mgj~Q}P>A*Env2o(1`>&9<>2%j@fab%*rldWWjI2m(?NX?3x-&XQHH9aDB&aOq}0 z%T@WSIs1bVeC+{p3bxPtN6h!3Q%fW6W~va1D1tcvGee}3I@hBLrWwXTxPa@kAY$7e zhcimC-s8kh&F`PUcQ-u%y^)lG4!+vd&nQD$%NXV7UcbIB7!BGrBoRA-%v4s&W5Uc#A3da0{Acy}XbQi^~^C`l37fZofvU=57Y2eGn==4bH+gVv6KVC)sg=C`12rT4CrX3PjV zfo(*`rx@9^D-E;@F^*!fqrhd!FaE3Uk{NPCbEJSCJ}#=alifQ9{#(B7-mE&H)h1@e zq<(JRqd4;1eiP{%Pe{am*P1mxAe#gE0lgEGu}RI@;6E!_&EM!$HaJgP*Av@Q9fmiZ zngP~2Li1{EMw;Z1?qMU+7E@z)mp=b(3@V!O(!u(K#VQVA$6%Nlg1HZMmvXKr0!xY? zt!I_-TSfd-u^e3B%}8yz*fIv;a(8Jc9Gbp&QUpEPcke1e6jTsHp_2PuCKPt1Qc*i> zgZi%O7i^GATszo%jQz}~%MW8~Gi3gpOI0&3a^HgjT{l8O%|o|e1|TG^Q{t51e{?-A77#^XW$cjV zvNoB$03JFxo|KVMRPCL@i@CRPHhdl!t&sotolUN>W%a2 znF7VOYq5sqZ4c;VjH^*F{Hl4C3W~ML@7u#>^H70EDt4b)6Me$B zGS+-6@uHV%0|N*(hhB^vgk^J2R^jh-$J#&por|lQt6?I_ zU`T(SYcMd5K@PI%BtKf~j1g?j@i~%|vJtQvi$@#gH@kZC0^r-mF@NvL)xO|(r_tF* zSo5YC?hZ$vk^M>r+<|!b>)@DwZ1t)Nco^wTJ|%b?MQu6Am$G!5mCyKT%LvpnqF@A- zl)lc2AIWQ1EwrpS1I(b}Qp+LJS{-dj#t^54-kjPH6PtsIZe49B!V7c68~=!L9c3%` zOKk6ZcPZ#onu}GO3XV|`&HVY8-rkfXoeA9%IHPD6=@*T_V$X5k9G=cUs5XeRqDZHI zA0?&iSX36K%5t|V(OhiC9OiRvokDs(C(%Xr@?+l!sv|@2cfckw{9f*$@nrL?$#P6E zRC(77gNSQ)b|NvTu$wSxyx7Sk_TnTM$YW(9tm&vI5q+Y#=;qY&AETokW;5YPz0$0XC~ekOr&$Fpt)kc5^YYz?*^j!HAwPu|mN3 z9nD4X_pJ$Q*?HiE#%xo|yW8z=m8OhxgVlQz!qS> zc}t%pMg|$?C0x(!99)%^xb>8(qK@1Fm+C?z$4mkdHTbKBH5&NMJe4 zn~bS2zU{+~0JSj2h1ikjaAElm5(v(UKp`kA-fif<3ce~g>!m7+E4m3>RQ;;^1OcfH zQ82+ZE`Ov+xHj{Bcea|0@B8@*P6`72(E$dnDt}G%6Dly4cc|~OX(3X5aeM1m!jNlf zFZ7O|4nS~0PRX`G5IH@RIE9sg&5$|T84;7#RJ7$^)Ug4=-#2hvKi4=g_eR9sF<18uGM`$M?Fy|C_-2C1qfd`4I&k{o7GhwqB4z-lBbZEaXq z1)?o7D8cTQmDO9o=q zcOtXIkFK8}2d;M=mKSDQ+y)<*jp|Dp;Z7{S5=Eg zoNcD@O7Xhtd6&>bS^r}L2w*S|NAo zmdU_yvgoelyj@&+mren8`>vZ+Gs7w3LOf*As7xOE?;TjIL5muNkZ_t zui4v3{f~P4WB3EkPv`h)u%~y7-k+TI(rsT5onb|0hJ`5`_}?zbXDpk1i@L{YporMQ zoCDl`J^oJ>u^Wr0mQ#Pz&(1&X)x>Q?r12mbz-3K+e|p-0>};a7sdJl3cH>=lH!sjQq0d9rN$qJ#7I z*Zn*1c#0y@F84>?mQxSxvwoSf%Ln#2Ml7mwO7B}6Q$_UNnzi^;45xUJT8y!wDtGr@ zrR2pUIl0k%y$YpxzhK0Ugq{RtFoJlmiif_!PJo4$n#6orG z_nJTTi3XeENXj}SV;9#XcB;41*| zNJM+8TRbPayh7L$$bP%K{CBSj{sW>SMc`#m^xczM`3snaF{{0KQtKy+50{ud?XNW?1Wgl6kS~;xaX`*udu|)_;3ReOKhs{s zx`MX$9wd8^LtbwJT}>BZztWjQ4y||H>m|b%prMuk1ftg>m*Am`yo#tRNZfBtlSxb+ z;~H}p=NCi6`EMo^1WN{azlLYIS*iC|>qM_Cvvp(ah{_*!uUzBSEydQ{7p%f|*6Yrc zP7YJa1J|~PirLRj_{bkQ;?)BE6*a~@9qW0QNV{3p8pW{ZMyfrGM^rG2;G0h~r zZS)6OCc|zrh6kg>v*>vjV-CzK;Rw+l0RmQNJVz078KgWaCN(N|Y$%aXl(d0A2MVDMXy8L8d}lI?=rhT* zff|Pn`&Wp2J=o!<{$1!z9qXk#;ILDE~g`w)oQT`{&kd%a55;aonMP_l>1WR!DQ6 zPeKVBF3aukux3KL?c;rZ<%%XfWldQJbypR<*c%K~EU?&;eQcp>u1c~I`w5=h%`+7> z@0WT*4v14OjiK;wt-YP4R>wIzEve3|3AQjA^1KLLj=CL;kPHeqVLLpYa2Z^m=T?nK zUaVihON`@^2o;jG0+$yW!eV`9&N=k{QF2n?#;ca!0ahhy031yO6z2|MnI)o(PPh(- zLcK)wu&hZ)JCt?oj-VQf9fH$99IhuYj@-qp#8aW`JO1=oHZm25a|4Q(?~fJe_)4P) znk4pq-fmb@EM<<1D(a{OP+}f7wWe)zM=6O&RO&E4pzXYcOr%}{w^&Bmd?vNf_#AXq z0UX6i<*e`~C(SWF!YV?oU@U@Ov!g;#ZurGQ#;srp_W4jy|H3(gx?G&doiel#S#r5= zn2ad4{?7&~QN4zt&dDGF`FVcheT#I$;TBLmXI?Je!C7#9u0MH9;6f~jF}RoGyW8^p zZi?DEprI(2ZY8u#0SJ8LWYm`_Qfp)w%Ws3Ox?kD-f?v)1n)%941_Q%!4gKTK*V+_e ze80@F8!TDnoV!H`QNdwrP7!k+Se!=`P&P3XN}K^O0k+F6yF{i z1ffHFEFs3n|3PD&=^_SuL{`@sS3racN~qggXO!V`e>P=$;@}Lo{V2zyhymr?E<*np z->=OMLr#moTWYcGW=qegC%T-W9Kx zc9rK^Jh=Z`lBX^jzmOpf-C<9_XNhf%k_~vs#j?0qFdh7~7W>-cXv_y~ zr5W(0JZ6LL5DN*=bwih=z7hEZfAqC5je)R(u^3+pWYV$_xuGFdH^9`1_Fp9{<#8|u z;bm2v4|cl!i0psQfR^yi&Z%K53f>v{Gx`AwUqtGF^elm;9oTc|mlEMwj}=gU^F=4D zz-AF5XtDf6+9b9oASRvQN8(SI7&Gq%W{Ucl%9%LfHiuFgUE$t9-<$iWQ2te>ZIh}q!?MW1 zsox5!p5xpFeKd|WBueQsYutw`|7eEnhCg;+G#vW?I1fH1#={)LFSf~9WAB>rrr6k4 z-{IOqRPwFh0=^;z6H(Gp&X~&U|oah*#u5< zZf@bPsSHtr_20gXTfX|s=$ISgcTt5YLgd!vE#GO>(55&}r%Vid?pGWkr0Rh)gOOE0 zNFu@g)6B)MiK_b4LB9nQtQ(no86!;)Cq73(bcz zE3#ZbaL(DQ&moQ77XPOfH~Dz*vJN-}F5U#YA`?|5>O^a5t?YY6{vv&-G)N_jPcs1C zFix}8X|UVLq*F7`hb{T($ky0Ab@3Qc_cPnRc_EWEbS5<;9vzPN!pb4>c}%#7hT6)% z*-4|0wnmj$Z@YO^`_+BZ!)TQpQ#2@vdiKh!WFdal%or(2;Yn*_$RX*jcAoDVI;US? zw)Pfd>4>#~?hjV4?kK0qU?gsCrz8$Lt+2tvpySYKu*iEzl<$ht7>-TweauX!gzn0b z_==`Wm5qsq6;Clo3KSV^64QAhqyBe{iBvV^I_H%5=(SMW9?=?Q8W6bz3+ogZsL6KY z{f!?SuQb9-{EIN;-uCrp`#2rpPkVEQgE#^Fps?I*>Ceb524CXdsQc#{s7{L$h|r0< zibeX0govCmdI{l)=}e6>e6OXPWkf=G6g)u7r6m;DS=7z_#9*yvuqS~g_iUg1-cb*O zS!W1jP4{l!K31L? zl#mMWr-KuFdNtM$-lJuKE^CqFngvFO)cgD|uN(6)A|8l2+?kyV;jOLTeI|9C|MRJ+ zIpP3Ofi2d9g@8gJdrajP&}()DZmTP%C8hKSLlRpi_d_v-j1gfoZ$IRG=*+=nmCX)$ z|0)RnOiC_R6mxFH{+I zY9`6D8r+Gv3cv4uPUVM0>;{lMm1trR!Q};c$@NaY2(D|uCtWT`Uei0(W>iB>KGMC( z-IUB-*EosfZc{ewUbU7F8a5qkHEKA6U!+2Tin<$e`1~9Y^WX8aq2>IN7EcKiPls6F zH!MN0O@tQeE{7se)LL*Wh|+nwhi7C`dY2RUJ@^pO_$>v$zrry zev)Wj!_TkOkb2)j@mPl7d})#1QA4a{v1a!NMs3a<5eZB&$gjO^2fgzHKBO=~U`9LB zfpT>amqWJel|{3BPqu%%v;i$~XqYO|3+`s_|4#0l14CMi$VtNQz40nEvd)_EP?Dla zh8kXc%nj;Z5(uot9|337;>K*D0}2e5Z*2&^b7tShrDaleR_K4ftxT*#h#IP3vJ@(@ zdIaqMW7cdbrqx<#&D&GPA@~;)W=LwNaE#X{DXtlHGnX?0O-{updDcXju8I!h?ndId zN#Q0tEmp`<`|dKb9FGGF(YGgAbDijQ%qjtbX1D`#Z-BXiij>yRQ*aWq%{Ii%sInAf z$3ST8mnO;@t`}v5AM}ryK^-iW*;N&o3*2Cq*$YXEo}f_4eTo^jcLVN?O5yV#^cJjAB@|v7! zjDpX)B|DvG;o?8I!Tu&F#uqL3(4Zt0YagivD7vu?LoL80D$?EehBy5)mhnT56ned8 z{7&-l@y;K`j;3_IS~D38)H^x;mIMmz3OBA^QBr+0zKYP(&*f7ZZv-Vmd}E)Ohx&sjzC*5bnJ==TNcXd>z;pDw4D-ouuRCXuHuA}lhL;hi`uJ7EI~;#&YchVemWwY z>#CXQ`je)CsWqIQ*KS;hXul$ z`*EeVV~f#n>J-aAKl$blrDOg0H(FVcZO~HKLBeaEL%kA0f*0=BYE-Wv+556yA`^32 zm5}j{>3AFLoW_HX{frqHe518QYvfCAi+pHC-2l*S@tg@3M4Yn+t#Q0C7uONojscic zWol5;;fEb_VG#@*`?Zv>mR5pjS;iwWx>;KJ-Qo+039f;Mnh>59Y?!Rw6W{*W&&h{{xZ+I1Y2It z9F}HRd%lN2Pg=wP?()q_FcXMhldjIO#K0|p0VO<-9Ax(h(o(j%y1m>5*~4 zle+5k@h52{{LxW7{@p2sKadIT$^zAFjR^bCPgk}+-ikluf9Reg`I7HPl{ufm5|%@t zt>+R*^4_K2nOW7s8Q?TNs?0^jNGI;D(awr{?6pl?C8o~xVZg}wVzCk91l?P~X?|Ej zqn6Lqn2E%)#$jrSL}jFt4)&gjc|<(Im&F1o)IOmEfV@EB1Rq%1S#q!@oxyL$446In zj?#k02CtR#nypc2p!D{z{b~|={Wv>pa?VCJl~J6^izbi!cvAPm>Jx4y#Vo921P+J< z8v_^su)(`KT1n4*$xN9u3s5IUK|4YJznIJmJPJKT;v=J*%LlS zq)o)r`CGtOSTYLD{Lt<=3#oGwBG+ogy~t@0d0>ohHtSl3$+yFr^n80vJ8z8oeT8l* zwl%>B-foz*GXb>^v3`x_n3Arn@nYv}@FD4Ra|4eRzCS!Mf?!TWXlJ=3G@|v2_zCe2 z*GTw6o6eSMP}~$EpJjo6WBZrb_!E(?CkZNDsbc(#$3eL)4@yveXaJlM<850!p6ry@ z(cbAd*FQZERjlzkhY}MJhtTSNBegH!Y>q>O^63XXZjQUFd&*)I8xg!^=>BL(W}wWR zUmyRD20xJg7|MxCFei{H-`o3GiF`jDziTCR=kQEWV5}~wi)18mBzwV0bI)S$yVryH zy~%-wYS$YRf3&TxZpD{5-k?%yxF5{ZpP4C0F*-73>t)?!4ginGfk;RFXnM`=&{Jgh zIC%7cRPUBIuUT6xJrSF_xuZ-MwBg(0-wZ=b-nQ6wjpCgVF2P~ryLSTQt-D?bYL Zk{r@~%JAM4!%&N-WjoLd0K)+Q00G8+ewP3M literal 0 HcmV?d00001 diff --git a/data/sp/3d/house.3ds b/data/sp/3d/house.3ds new file mode 100644 index 0000000000000000000000000000000000000000..5cd6911c4085d93f66518889f3304743e51b721f GIT binary patch literal 11977 zcmeI2d6XB`mB;UeAN~ZQEV2YtY(ZIM6%bhh&94DhP!<)57(rGAWS4!DEeaY}6hv&1 zFbso&iV6w{Eh1op;D)=1#Bt3qnGBO;k}#ipt6p`rIWwL)XL8Q`LFY7|`~B9f`(C|z z_3D+K9zFIn6DcDVM5HXg9XoDDcj_4QiS?^-rLa2xvlkL@V&k{G`*xXSwS2ZMcUgiADy%pVtn(0pTzjqhu|kMzV#vaNsMnl!53Ln=lIsppExdx zw4D>i$7A#P4ZhU~eiBo^Fy$vPzU7AeB*wR&;EVLHc3#q-IHpbOM_w+~AB)ZBH~8L% z*iT~4E3|fFKZ&hg%1>f^?@yfX{plFDTR?v-rcLY5G0TCbJvKkY_|}KuCo#VDA^1s* zZ+!@U664!X@cn)z{o#J4`r~~eKlIO86!#I|`jGTD#Q4^S;3qM@^&$94jBh`|_xao@ z);6ClE-E=5`fd41%<*tP%uizTtxf2Dh|%8n*iT~fb0yc6#Q0V-TyGMaPtC*+vDFE2 zK`J(%I)xky{rA}Fr2Hf{pWKk2#8xNeCvjZg@Ger*kYWjD1^wR#897Kj*j|vv_x|&hf&|QCy~=T%%BDacNcD ze@DoV=cV_7np;Cn>TFNdiSxZq9B+!-v^m%3%h;@E13`o@s&aXKfC7jj(-3!;1FG1~5%^?7aVdmQ`LX7D`@ zelF!(9Q)R8$oDw*t<9uei(}u;vpnmAotMODyO!W5vH3eveu(j{-yuK5;d<>phU>LB zTyGNNSsbo6iGxpHtbguX9Q)yVy-vyx*K5AVaela7^TYLej1KqC{3JG?>k9cvjBnQv z{1DqZVq;*>L?QjLSR}okq}PZ4ZVgGV3F);Wy*{MZvGiI|(!Te@`Wg4b?+N`1ez>Qm z!#%aw^I*vPq35}Ao%DHLFZgkrey+u_ANu08@e*yv;~ZnsH;Z?~eIZWz7IKR^=Nj_0 zV&4sa`?IgOJMTY{5*Eig;Vcqyq-Qq#QBzs0eRXm#y)AhGMf zlDbyEbl*%zwbQh?o5*KuEV%Q^!}yB?Zj<(XPkp2H)7a zRVzPkjPI=dZ0zx-*{nz?V+W#=thy40TqV{~3|C(F0%ShloZeuYC%dY%u< z$$w6cz~65KeBOq69OieJzkfTgqj{U2$6@~3ytesk^Z4)A-T#})RdSWf_&y;kC;xYH z1hNBiZG2*dH&K{n|Fa&F%UWVyu3b%$)q1+{->fB@DI@mZ&9j-xunf#dWoK2GL7yU3 zoz>te=u@Sdvj#jBT|sI%Ys*imn9ZCnwVh|d)6tdXEN2~98C_NCIP+jtbT!Fy)`iv3 zHKeYyzMMzJY^Ju=SdT1Gnj|2E6toO`P;yG==##q z*&5bIH|Vmq|}&Z+IE{3hC{<23~>gF4s7(gWb_r$#u@M z@G7)&wZ`k2bv7S+%Jt6v@^dO=GuKFeXF2%=XJj*F84cqAW~I&7>t%p*u-wcU*-U>K z?99qg&d6pML+5a2tD}9~$(h(<{>C62z_M=WG*jf5HZ{)l_=o{olXO6tS z=$p9T#)0H@h6OUvIfT3$(1T=%vkQ4Qp@%UajJJ?i0K3X9&Ji*Q$NUk_QJgmjJwiq~ zN6RprY-W^CNlbuuG81y)q;+zV{p(n^x=QKD0eY;F^)`YjCD@sl0bk?aF=*cqO zIRj2cPmvkUnQ#hvs?2oGf>Y7cWR`O_>r!3xbeZj(1E-^B$QI-AqqS@?HJb7wud%Xv4)8{@Z= zyPX%ao|x_+zap~w9h}{$Z@L4m%!T*h8=K2L&U>l*8}uT%*ST00Iq#$Xm-zR~ea^4s zpNUL=<@}oSzHo1)(c`jLTGY@e8jn(A==Yy=jtj(EoA9nq% zv!48m{1*Ki&ND9N>WxpyuVpEGRGxA^E&qUH{?pF&@{c&#%+s>oxk3I3C!1L>8=T8! z8BR8{L6$q8q0Xb|$K)C3v($MC{fs>8e2zL#qo0-MoExdL9{rqbbgrPz2J}W*;e4Jt zkD(uz=bbN5=Na_#@`Ce4>O6~nL0)ujqRw;Z7iE*PkUAUDo21aWnL3Z7pODSYm#FhR zdb7Obe3?2gpkI=gom;5$BKl?7;#^6cP3SGM(z%*CPoSTa)y_54*^FK-Yn*GT^AdWE ztaYxV&dcbvvd+1RI$O}|WR-J|{Hq*8ZF?hx>0ki{y{Akj-qDBIi3)U4ed&dJ&6g+1h*0xr3^ILchw{#zV|1o3HQ6p_n`5 zRrlX@?v($eg>0rsb~@jqY9ac4>P6g1%hule&R41WXY^~FZTx^)X7l%ud=T?hdCmPp z&Ry~sTF7R0$}Z>oR9%Vwka`h!(XzGoq4RY)A%8{hmDio0GLN4`e* z_M?nPcy8AC@gp&dWk31|=NtEvRffC+DC1F{tF?aoXw3a`0DV-BICo1~{R?`R>}I5F zTvqbrWiuZ$9uapla^`>RJV4d5)ZNY5#*fKb$MK^ak9dGe<{x#o$PFsX*Hh{Lhtg{0 zs@R^EWy@L4wvlZ8%Co(w$S2TgeD+l0Q>O}_H)rrkQ=M%>O+IC6@%eHlpDbtdnQ{)F zCg<|{ug53J`Fw^n;M1cKpBs(&#AwQEy*Zy27xFpLicg4(_-weCPla~8t~;bda<;jY#HXWEm+9Q>P}wpi)1mc^?P`g-^oC3+oXUuVp--%Xx@a zFwqN{Tq~Jst5~j9vjnYSSy{_cv5uFDy_z=gGO$<5Miy~<6>MVhwIzHD%i=a3{p~!S zMLa?~nYO!_n7dir_Of6Vvk2{HVL8C^`W8#(J1h(D@#wzK^!<=2{V~hprz~}cS-y_2 zBpv0o`6XL~uXy=?!;ASlUcSHO)q0G@^miKR&1t7{FdsXx_PT3gT5v-E7OqvvRzo~w1W zo}Q=YYkh5?4YiS8ppCVOHq~a@TwCac+EQC-YrRO@=*8Mr+i834pg+@&+DY@Zv*xrw zyJ%PKrkCiYdYN9XSLl`6U3=(NdbRe{UfNsx=rww+UZ;KadhMq_*Bi9I-l)IOn{1{e%$LLrcr{i^kPSo3Vl1|nsI#s9Xbe*9yb(YT7 zIeLfA)pfTrN7pmxfQ3_^K|m}LEju;|Ay#V1B@TaPs50tiRKrLF=TE&#k-Dl4m>AkEl?%;$ zilRjQJA9cG#pvcK!@B2Kz=l=h@@8|8{&Kp&Q_DZ%>(O17xpx?gj0NwGWFVQQ1 z`}g$TJHMa}ZV$b2{$DA$?_0EI&(~-w^OxlKi(~Zkp-1RbpWH|{edb2G)fc3PZu}g5 z&wnr77k`}YyX$sxe(ptb4Q{80{_$Vv^wKij{G&7U*Jnz!R9~jP+is^VUpzuD|6P?D z%_jZccMEjxwSSkE1JNk?7|A21Wy@&P;?4SYXR{B4} z5xVWh&rRB(di`fKHS;X}_V4{G?fmkCwEHj9 z^!NYmH5&f?J#^-8amIgiKmGpR12lW&&uNEe4~+!hr2P;4G2Qj2kJHn$FVSPkC+VGE z{DSWJ+6Y~D-KS_5e%4j_SGsB7X8N=LyqnZooov7LFZ9BH{W*R8p1rhi?hX3XZ+?ch zettLQzH>J{_H>s1Gi2bpZ8!FGo(_EOOJwMcR9Rjjp=( zI{N3iAJdn=@l*QS_m=4(Wa%2&L;qBL7kdxWcSHBkZQt2X562#%UC|i1d~ve>w|^wx z=iT&`yOXqco111{e4A#zU!>T*_t4R!e@=fo^*_kJdpG&EevZBq{~zSL=6d@2AAX1K zzVr9!%-_6B|Mt_L(AHbG(&ig)qFs0IrMu3*iM{Wn@BQH)(BPN%)9&q`r&nJ2ue9fL zJ8A2e57J*gHBB$S_Bw6Z_9gn>_nxFN+i%mqHQuNC@-qG1KQGYkJ9g7GXa9-1uDYH+ z_l3O_o;(gYE|bT1oSu0iMX&wCIr>HYJ^I0+KcSspiqZFSZ_$xI`!4XA?Em>C{qA?aOFu5xY3N%a`b^*TwC9QA^t+xH=ppEp=L^{L%{SANdINWFgWJT$gUSXFt`b2ldZ_bu;b3;w%P`-=<>bLuIVM}h&%eW-uMn-$BCWMqUOY*9{Wue+uo#`vLI!8Dob~D$p$Mk@7-PyorYmx5?Wgv@Qp(qCxI&J> zW(sFv2vmCJ7Q(_xEn&;pTu;S5%aX(ywAw52V%XC3#d}G z?r_nSc9!!)mUPGxPvN&MKn3aX8ECn(E$e4F_+^%i$!6SLhSsaPO+bQvXsBOSq@Rqo zsN0ff2}8al3*I=1BB`TszrLmtz!_gr@Yc#rYa}>cEm~~-g(ZL7=?anXP)o>Fw8XO& z6R^)hXMw)v4+rsG=NO-Em<-l|;gF{)#ua?XDz#E@Fz)a7=bR*}q-9(->>Q_NSn@~1 z(;it>#syJZFfu$kmQ27@XZeIoxe-@!q0(QN#Tslgw5|{^b!W@X!BDVD)}A?MI1+0N zCPVSBZumG+6m>F9JJQqjL1$02VknT&WOo-`9-M?rOe<;WAeo6(Nst1x z>NxOqMyw0b?vgp_@I)NB$`T_rR@~0CCpJzJCqnJjSjORMgq!YY*2L#mur6Zm}=O+1Zv>Jz-ja*^2JOLRy|IaSA(Hss@89_6oZj4Os1ZRV1J|r z!$UTlAbTUNzfc}(kUB1bPe4v8{)^wae4MJ0Ox>DKRZNLSIu=Q0?W|3PLbjNWL7MnY zAjRHW@teUBcTcS!d!?3ABJOdx%QfI+kJRH1r!xY-saDD8%=#;d=^%+1foj$7ijEAaiAKUs`>b$spp@ODl}D4eaaEnDClYALvY=}2rm7D`(!(NfJ+ zhR7U4KG>$#3|n1k5Hds}92+axa!@ zft1sVzmsG663cXTc62&e4Mx(9;^;u5?n-+|#>f;3H*N55wX9E!&{fX38T+YZZ9P6` zcsLWOj?;K7=y16!-L;g}6^RY`YmlhHmXAA=h+>F8EtP2A;)G{{EREhu9!LWaB=%?u zn99y#a5`D8Nt|WPUk*1sLDs0YYA8Hp?l#TZD{i*YRq270*A%FgY{{l0!e}*@HK}_8 z*5INO)MzjjL7^;st-TA1k0)6sQyD3oU_onihn9G^~PLn@ekHpgTX4xim-!V62 z1y-DoArcx(`r+$otu0(nPxn+(<>cUK$P)?102KQ&Ry_{qTuMLT)>^Wej*Z3>vt$Oc z07QteMyokSXW>(2&Q?Pd)_uMqkgGQtHrBtqU~`8f=^>vVamF8=tEa0t4d_cSQ*S0~ z0X`Xcpm;DcV)f7RSDgWGshq6CctWmbsiylH#CcnMfh8ZJ%Y)cmH4_?cgq`l5sJQ~f z_&eQ~U12JfMnl>v4aDAYX&u5{5JxwZ?X=9%cu;2Y&mYp z!51Np+bmWav?qY<$e1m=Ey-Ww^5>iBP|;dnv6t3Zq&^zY+u+fFL@ktTPUx`~nJ$;S zj6_?i<=oJw2x*?-WEqJnqceGJWoNqKoMXJ5EM>1P*YLoe?cQ3}f+*!8IfQ7=agUH4 zmYt(P2q_AU(9Ce|utc`SPL@@};&dk=t!}%1Lal*BvRHLB^IiffW1x({5rsK3E-&mp z3QTY#l|1_ghQ)rnV5&ujGgbIVGRA@t$50-bM1l7|8|d~Av2AKWM-tX7Icm2R?3E#h zr|KDXR#+-+@X-0TNl;|RTtxUYo2Hb7pUAnSjdj%}!H<2pt1Q~IH?ZFnY*W!ByuA0d$@m80Go#+hs; z%YJwlEl{z#kmX`$ShquuJ-K|-g2a~P$N40$Q^?js$Xcq@l5tsVexzJ13D(MhHyOnD z4Kc@Xc}cH2^uK7Et=NVX{fxfR7UeYn^No*I;)GS5dgS8l-tF~ku(ZmpTB0mZMtBx6ZxXN5~#E8A+ zn7_u7)bT=ReIDc-KpGpS2!p2p>u7FmfFBB#}@t+>HBjQM2FfWsgejPDoHU-YCY@^tY*!H6m1nfE>NLmJD-c9 zszEA%HSnRwXcbO916$RG<2moFE?-o_s?Axf!g7q`X>2aX@eTQ=&l!o;!?xCyzw9to z%5{gUp7SOa29P<$s0(Kkt3##w3xRU87)uW|;a-R{b!zd1oq0&Po9z#I_AK02p<*7I z4h3Uy6eJ^Q$U97?bP&0wr(QNM=^9-|$ykSdb3|Z#$><08>RgclU%R)Qv>>mHL$?F) zi7WoIb19W*hFzZNq8{Q+1XPAXDL0gf!GE`ULeq68Dux2b^;Ubz7xGLu5^xHTa=>mz z@Ju^%d7m>_g^X5HEHaR@Ex}v(%g&%<0dk0whBSW^G1fyJX_#7bC_d*aN1=DnDtH*W z0+q#(HRx$r!}!H|+K~yRr}bRVNWl^7Vo8tjt%dB+U?!c*dWjJR;Cph}72gxqeGhf? zBWStf$$XBV&VCspg#%?AFW~M#@VG>+2zswxpBOjcFwKjEo#AJbHRet zG-@9F-l{Kn{ZWp3?rbtLP9Tv=8>$0~sL>d<8CL|-f7xfHUHWAe>L)=hu(yiE(0AfA+ z)^wTW*Me%;;)LuFOGtwAN%_0&?C1MuD}JAIG~`GRqq;N0$LTqW5it)bGW-lj&6bSS znaI}IyP{f4)kB_84=f)j5pm#7NDRYzoC$Z@13hG*i!`PRwooGT-V=nt5nGK0lP&=aa#-KeMF zhgxQ9(L8D+KH1Bwo=_vquDH-|9!Zyk^o+igjZ870)C}U(@DhiiUS2&+BGV@Z*>nNpnh0AKq_5+61i3(h|TDFkZOlZKFgzs6x z_h5(psb-iXqX|`oGiS3yw8#dGUUQ<60UrT5t>KtG7X>e9N}&v{&ecpn+Fmea6XBq1 z(6SJY0H={M15Q6!Irv?b9||wju>eotw|7?-!9ir=!c1+YRL|U~%Mlt54}w*p&LLQn z4Z*GHNSABydN`%k1#fpb8Fqyr(TLOSU#Vo(SqM&~l`^n$jUBI}@Ix*nYdOSYH*~k( zTLIP@zQ@(j>PXDva23PuB*Jb#>ee(U4P_cKZfRJ@+$q1ep!x0n`)AOpnc(acGrq?xEdCB&JIPf z6bG9*)K{(DrN!Lf2wV;c2N}|R;f1^zTp-vmS2JmbUT{9pS*t{Q!W=^#u6PgEd(0{@ zyOOMU^~}zj568<{_Pr8Dr~7B{eEl_B&KcJ+lT16<5*5yh+akq56rQsI(_$SzAd{=^ zh1_#V8zo+|}PDKJh3qK@&ZCtbJJgV2C-V1>nH{)IKxWJ_AdJyxcWz#WX!s>pEI zW?u@}{XGu&D`>|mht-X*EAc^Van8iGqhYBwL*x63{k*?ulOj3^12wxCkV z+qyZ%a1D-pG>}a?IU|gqj%TDMREU|uxw1JQ0SmT+^MXiv!Wl28xRP$QFU=MLOTO?3 zRwu&_W)?g$!`YQJ?j|)aa-{X-hr%ub+tM)}axLV_xnzhyz_O0EU@ygRzU-C#lGktL zYRl?`#?&tjJqN90M!~14skFU9ImX z3i*S3My~*o1(;E>Ryh#LB*r=!hdTzVTZ$I#vXc~Aq{yv+cgjZiwnOOgpTO!h!Ix7 z^2gZ)J<~3>l^Fhxzpe&7P(9`kWFQN+-$HA+%TlRvagcXgbjlAgLRON@UKwLZvPWE-jsvn@C0Zstv#->(jImuw05*g)D- z4Nez1BSodOI#4nD;=|Z~y(gD+hwJcyRciBuUyFmla|L5N*i%40B`Mw5t1JVB@FMe3A=s!aD>*GM zll&9Vxa_GoV{fl8`PN;@&4pbVJ%(yj9c`kUh$q@B(YbPf^W52NqFGE=Jw;0vmDPIo z2!7ij0#*@gl)&h?L3QCkfG3VFT@D;2vJV4%8TQ!WaXCx1k~tr@G^T^FX#-n83^L@p zv;%PsF*m>~=s#slZgdfFW=5=%M8gbji?px>WC9{9JT5pBKVyw6O^Gb98AtMQ2@!Wz zkz=-c?JV1-1$heh#^hYNq+>z}Z8P&T+PnQAmJqLU@UuX4HE2rs^uaka`9KM}QIrf? zUW1x=%{d=8&KfSH0kCp4MxB|F@KD~4CTw;QfkfVAZvwaL1ebzLq zFQa#$G)pszeS&A!KnRp`D}Go-fMp&?^VYbFt46i55>*iYSVGMIDzji=*-;b_pS|dr z*+dk&YU08V3=^|39488ffIx4SnF4e>*Q1ZSN#`mIvjuOZ#sbUUh+5ityjXv$mzJF9TjVhSvI?cG^3 zC>%?_5gf9_j#Yf6uW9r0k@O0FUUb`vvM zT$Oa!IKMrhY=U)NF>B)HbI;t6Gu%KKpRtaW?MwReHLL|pl@iWPq)_o_S#zo4#knwY z)&%a5yK#<}VGZu2bH$A{v{`!%6>CR7@EK~hJi0OH%IiPH&NeXzjVCNoClHoW`5}b2 z2wccYRjR_Q0d6Kh?mBZTfQRgh2@xUPUUR{S}4&RiiIVRWs+q z6YLXrz&pB{Hb@u0`7J!-3Pcv1HtUfIeDILPHFZG^A(`V&qx|BB(cR7tNgItxoRbJU4?pdNN}N8?j?4m5-F zgVzRv8+cEq>W1o$bT|&iS`>oV6`r)J#wj1u^>rsI9(YX1&{2Uc}B|#WQt@e z_tZf=)tzoTDvcVd!Hz6Stx|RjQ7CNoLT20v)>*x_!jd@}PJ4E2nBPw7d1~w3KEEN@ zJAv*pf~1aB6n=k2`dr__V=IfOLE8K_E4a!~!-<>==exQ)Y6E}Kzf^O3BA#IzYFA#R z8?hEYT{UZ8%-4e(c5K+*+c!n>yaFs@1G0wRW_~kkgzgJ?9h{by%_UOoRoNQLZZL3& zyCK(5QlFw&?N8>x6ZWG`H5B%6K~C3T6_yA1Z_7Zh*r1=*d8JR85`D^9abC=maYN8m zOfFU^@ZlO!bn&n^6Sj0l|V!TH|v zvQM4Dk@e1Vt*gcc=dvr$Rw}T1lNlol{Q+;;GJxH;gr?nz3J5CEL!D)`C;Gjm9JsGE z+RAh-RyB3oh6cgy;7lYQP1=;wE~eypYMn;`R}bg0*Ke-u9C@$}LlWREndPqJ>gizB z;mX4|nc$(D)RC$McnV?8>F^9V7dflpGp(SXtlQDNIFEC=S+t9r)pnA%oZrr?YQgyn zN!z70aPmfTK8K2amTT`TP4?&@*mh4S?(d$hpz&d55)eh!bOww?U=!?j_LCd|O)1|3 zpN|3BbbhMcc(ZKBTIW?fzuwG2C&qvQ)`r|Y>z*s|6bIHa)l%hf-GeS_5}I{+#hiB| z8|XKcP~(rJhfCyW>fiath%Er=9TlJU72aQS(%aT zq@A3CXmysF(#?GBgQt5Hn?$VRnI?Gp)wOco(nx!TooF)I%4iMqcTKgjuMu$#`n-W2 z_7j!t(0~IuAzLw@KF+@7PH{72e3IIy`g-T91i}s!=Qn_$m$Pq7`p~uB9yd4=6SiC{ z`I>du+du_HKs2Ai_h#*-Fw*da8YItgHGuB8dH`mItW2xU_fDN8oY2j!SO@FPklNP^ z9v2Cgr&-Kk&=>NvUFcb0RkAZ7{t-n+5JZ}ih;s6@+AkRxDN?MPa~5{%JE z9=S#|TY-K-8z9-iYNqb2VGa$9Z#0k0vlk+%Y~dlrTLH zdX=kuME`;ZYko?{iNa(BrwIhJ(;D&=opH%Iz23c}HZUK3>51cLS8d`dyuCY%c1RGb z^`5^)oK$8MtakZF`8>(assu-(4k4z60Y=?8rF=i$Y` zKCMSIG%0~gYk{{dBN^81wbP3(XFU|O=93_!(T~OYt=?U6OK%9oCcfgH=q7um$Js!I zvw_s!^L!nb zCJ|s6^<#(V;g-P{uvSAoP@#AfD|Ejt-n7*YAQ;)0lRzwWBYJRj2c|$R7q7#bTL>=W zY~RUc?W3#7sXo1rWyo0K<{J7hzh3V%Kn4yu3Td$ocLGI{r>DY6kRT=4HBJyLXgXHs zNdm03Y7@Hg7t-@s2*60-{Ir?%N9Bw>DJB?~XGbjKis#|&?*g9R0t!F4MZJd7r%Cmh zIAbuKkLL22C}9ctqptDHv|E3EJD|Axsyk={goD_5Ql0q(v`sxJmht=+1P($@n-zgO zSDtRb?lA|3=X|18$)TH!t_WsHyX~0fFgqI~nZZN~F&4IF^!nEvDy~Flbsj>|^k=KQ zb4a8M{(DEYugi^^m!FLc7=G31=Gjf00;*Xz$4(^7sS>_6ne098dTe@d4y+%~1;W#- zl{0YQ1Obb4sUE0j#^3++9$UUmZn~Uu6xextitoK>S5jhb! zY263;b48afE8CB%(3dueET z#4%b9(dfX)6)3+^43D7xGnbtgGmXJ)EtLRY&OS!deGH_+*0^@Y z0KHY;WIv5(ui7~?bv8)BP;st|X_4FT^iMIwJn1g9DU2A(+tXaINusvh% z%2DHtx@^Md@=f;q_!l2y2GRQ@W9V`r)?zXZCfVe;{G|`pL#hB~&r9q4HVg!LLZgET zzrA2D^-O0R%tLbCfrz!^&s0B>9r0!hRv>lxcDIQxv!QPa%btTAP^P$e&Q|tLO&~JqQ5{wQ?ZoprKB*_yTv`EoIsqw7Qrq!* zm3CBJ;rtSJ^jEl#Tkv1_uz)^+y?(#MEdnRQD;Qye zj0Py$yC%EN_HNh_nuu?%@&32MUn9~*{rl0;^wMg~@@Ehu;x**|Ik&6YODZf389p@9 zG^4;*Ak$iwQ)`x2>;4>aout;T`5haA7owOJ^x~P@FfAL%+WeaGhxh7rIA=?Z89IlaSEf?juZI7HGufpxUj|!mK_Ef{EIdWwIHDx#89!tUxTh2%kJWid1Ni>$yWU|Te0g_$Vr{h&t=BA zylO`5r1s)&s-D>Zz5Twn4|(i>Wj0N6x*r_Dnq8o36u|N(~$Ay`| z=4gB#yp68Yh|>V2F2iOZ5i(3nrO)LB8q{v2>u3yh5#ql5iOtDgaCGyi@s^dH&>4<~SWWFC!&D!y)q&4{ zz1Agv4-ZGJGi(lZ7uN*v$)RE#xg)Q*Lyu#*1@tY@#YX2Y+~co+e*i-c?^-@l+n<|6 zsm~h5`{z^aQ_gEhwtDB$(daWx8L=YkhY>$V3PVL^W&ZMFiP^jN!(AqH!!^`k;NRf$*hd*LtLc33AY$^1%0+RIw2@O!4uKJTfjUbm%K*>Q zBF#AqHw09=&G)HkFmXYgHzv`r3k3LHTFpN@sX>2M(5_@4h#@nQBX=D`v}yc4*9@^V zMy_jxTUXXsz3zpB@ALN*ue(Wkzk>~kNICa9vOd8UZgJUWA|Zf!uQ3$eIb=tsJr39ZFS@xK{7a8r$!vy zAC+ia@?^Tn6U;P<+yD-$A>}O2rcYuw(7`?f#|%gWd9uDIu>5AP;T`Xw62?%bk~SIDu_4A zq;ed(DJS~i?I%SSZs&AiKpwYN@I0LNsB@82Fib1wX6bK1wJ-ELYn#jq1Gw9QF^r3b zgCzEf)5>mfnAYtU2X`mF_|-}-?oO^bQQ>468^r#qbXhE79h=L!!_Jg>Xw(q{6OQj1 zkSeU=h1i>uG(mLpmPpLDeYqeRcF33RmIm zoXie=!Q3-6eelxB8Qu`2?p6=e>eHuA-}As?DP_wy^ZP5vt|3Uph2Gn0O9P%dRmy_% z@kh&;qGJx7d$_>P+xETl-*l&~DUmI4@Mqnh-cd}#f#%1_`aSFi#u_F~bT8R|QUM%mNMD$&eA-p_J3HpCX zRY}6bL06R*AtMz@&jGPs@7)AG*}sZsickxn+Uop5$#%_yIIW z<^?vv=O`dq<8E3zu=kY9m-1s4AnxCf8(YpEJ2D)2kPbW8L>m|=w92E&In;;7B=|cx zE`n@(m5?|qdf_3`%rL0BU2ulOQIh2hcCT+I&QsYZCn0H7V87x5ttr-dTBo|{Z!hS}zV51D7Gg@t)}RyGKWK|MTL-gQrgKHXIhawbQVb5$YJq zr7DX}%;4C{zIa*KMYm!{7K)jtgbBUyQpJXzWo!OSE?);5%j00;EdJ>|tDmj1tl@N( zF6iS2lS^#?>iTaWG{bfHb(btjk_ zbV?716Nde553iES?c#m0hC0t|dF>GV0Q4eqYVYpDB=>0eXZI-sToR@i4q|G_)tJMi zQ5Kn4R~F4*vpw4!Dw(`?T(4U4mh+3KYc%LKW=V=wwsqJO*x0kiJ|pYKq(qFGMCL2l zs$fkm&|5P$cvzL{ zyXx&N@5^r}KT@xxj;r#^F{6Wf2M&up;w5E|dRW=5ykWSgWR!#O;XTO9!7^iv zvVuWVn>CDEW%jwW6IT)D%C-{nWc{vkB^%afIxv5I7SZf%3w!tpXs&u;awqav1NN?} z0{h0^x5Dn!Wvt8*w>N$0wY4O#RDUGCLF)V8_|Z2E@3%?$F#6a0aYDI-1B{`%KHxo} ze}9*FSKh9^FSi)4R9@C@Rj(%5dF)z}JE>*nJO~y55~oNV*uCc^xko^sNS=BFa|#!g z7qyGXAmqdXCK5Me3XJCnTDog?ThVI6WDuF$Axo{>=f>R))hk&p=#d0Dn#fu}^L8VC=Z*pFT9Qr;D7#2K+gy;8oc+$|qfj%l6BFXcn(RpR@~ zE$Vh<1DGor897B_fYI%FX%E4N%Z;ZEq+WyvxX9Bq5=g_@66wkk`Ou8#k%p25DHyJCnIjf899&4OXZB1;R8(c3I48G? zV{Gs2L%Ht7OwtbY3b(6IsNWZ0!sSCGuYK*?nQ;9UjJx zZ1Ajs^OOmW@{?9Xj;<9i!r0{@1u_=L$aqdg;N>15$qm@o3hJv=$Xe}`ZwcU)j2BWQ z!&Bnt53|94n1X#}%pmWSGB_A@snJQ?ShXk^&e zW7-KK~JF@r{pT7FVGy1tGJHnU8}J zBO0v8SX@HBareE6=QsmjV}HS%vLyybG8mW}$))@y9XB}WxHBJh0(YE@VQVPpwCSjg zXzm11voh|C>_x;68G#u&0-^(R3oL5(uks_PS-(jhdvq%zF|}SOPNZYVns$I!Rdn3i zRq|uFQdPs^*}8KB`nFYo;R6C{Bief&t~)P1K} z!_}9>9;8DX54Sw<#ZLn{$3Xa{^^3U$%*jPu)^Z6qdQG^XYH8r^ObC|fQqqb8I9-^6 zZnZe$zRH2}&;Y^&^0knfMx~iX>~JB!n^cPMWp(yo@`4evhIU_2&KVfD>D-|U`?{tv zVGgTiISa^{eUS2==+rJrTG^spsjemM3^>65zj&cVkhaHh-@uBrb;O2eHXa_j_w(`v zty|i`=f@ox+;LVjd4Gv>0I=kKB`ow?@SzCCCUNsPly()Z7;5mAP@Mc-j+Ov1##rSR$mO{PLryscp-Z zcdy-YX3e|1;Kf#?j9lS>9-H13oEzx6%@P(@D@WLO!!O(^Zh_uxK<<1|yn!+W`GR;x zJS*VAsP!;pebW~|{Q`3K2WZt$+&$M*Hrp5D&H?174oupPl_BO@B{evamLVmhdQdHR zs67*MVPwO5#)(NEJQ>=}F_@)H+62rQ8ed@1$B5;vB(Hw!2m$eX@*#1Q3^$+O zuw$I#5mF+t@flK|73<`)@-T{yQ(yU_d_j2<-V2QB^f1QH39??D8d`u8kGQ+-CcIL^ zQXJv>yq6I}qCw1v;wFU0>NIs(9q|a6tOAQ&vsFE&Y=acfk%mO8SD#1$ zwkLFKkl;h|mu#&pMeRy5+GT@|zQhZ5Tyqo5dUu0|7V~+VkM4uHv~NyMB5Ca&{=9t_i^n%!S~uGF=06=bh*J7!7epqyej^y zZi8RaAjLW|F4A_IT#PA4o7Eo8@ z$nRso1WI)C5H58D@jakKM+hzmDA7jw_b4S>qmEK+Q;sOxkYO0Mp4$iJlRc4gi^84= zNTGKh;*^Z@?kgqq^(pg?^cGAhF#7?tVk5CH z(irbE;;`IJ+UecS2jGt|PghRzfCA6;;>OxYV{l;z)Ad?-x-kf*7R}>ivrYy`QweIg zpolk9l+6nnkIMCoZkedb(nZJ>$~#dn$}U7&D_bVl1V(rvWt%+4k`~*vBVrrpRy$p1 zSEdoP4cl*F&h8;(RhN)MN3SG#_tqaOg=x<-E-xpKR*2EKTU@*`wos1snf zov@XM$Z+)LCt$UFg8;zcg^@)*4$lO;6&uyv;2s8_1Uqa>C7Z*zwgztC@)skHQ-B>0 zkGO^haf>f+MM=Q62_GE9a7_$E(nKyB2Ikm@9w|+2p+4({Vtv8|uLMtwy!iraHsdz1 z_x%tzqQukG^42kk9Md|?xb8s520b(2UWvAhdE2!*W+~Yf!&9*pe;hMMAClkL@*|`o z$hd)7bdvGCYma^(ev12?8d8hXko6w*aj7E)BefCIZhLItsX^a2OUNB@i`z}wm<3IH z6d7bV*ccdmvVnTM)zxqgl@sXZBNT%(ji{IwW8|*kPl-hS>vS2~1iu{(mjQ!AMjvZGs330#S)VZZV&s&3$h zs4w9LS91W?&6%`B#l)F3WGz0FwS14{(I>XU+jAD38QDvy1z!@6iyIiZIBeLhoR)h@ zeJWA1i!Y#iWu zJQ6|3T)EnCD`|JXwdGw2D<jqbc$=0 zTf}y1-LNBeapctL!+Qv|{p0cyZgryoap{QWSGMfkV5x6liqMQQq zHXxs#%MFDa%$~x&CG)#&@Z4!9-YekXlZbKcfq9z=fp5V9dfmsD+)W?UPA+Zsdft)Toz4x(u zz`=Bz%T0F~O*hamt>#ud$ei#oT#p>>5Y&otiKr#^~{No!Fn7?LQ1 z5A0WWDOpsZ6~%7Qxh7N$2HksCn4ws~X#g9bZXx5^N0%`b^&*%I&Nen)lB@RbF`8E} zVp1}HXe^(zp+H*n4L#LhglQGG97pN{qv3|?(C^no=yFd6?mZY;z@4XI-3VilcmuV; z1bQ1>A?O&zJ`@e$&!oD7(Xg!*eoHwb-lCRm5b0z(!uNBu`Sa?dYx#|2>Xzi%B&ts1 znf#%NUt-q8dI@GtdbJbA{bYFf-PhFfm+}qL+YK*0Ze+cEM%xHx z>a+^2y>B43WXC&dkO>v3ZO}P~Dmadt8waV?L2|f(oOgiKB8E~mj~e0kd%42Ryl-xZ znQP?E@Y!0#<4B|8FETU5o{1~nR!B{5Ydd0OM6k<8&mF1{bI-uIVSeKHnRg%NcvIot z?Pk8wnn%<uIfwo!h=v-W@K#9mg<4Aq1ogBvkpzf-7j?@Y;_o*fw~sT&`6VGt`S4N z!_y-XW=_>=C|x%o*3tX z17>{aGoE!#=nTEKb5cEop81DZSTb!-LoV7@WCzG8F<7Rk92ND9LKEdj%s?sw^_emiT9?&cbzx@y@9@5+OH9JChB;J8C$nO5n`Qk zX}`*DiM(6Ij+yIwa=}Mpk+f89Aq-7t{lK*)WakkBVzLAVWm+~MjWG9u9K8~i6Ln$d z5!cXM6pYav&fCSlcfPj|+?LoW!RP&Y-yKH;@7wtFk!_uD(THx;k#RH=ezY^PXY#m= z|G}=Wgr3kUQv&Z7h>gFV)wYc2|hAx6Y^lLPHyLEo}GN|5`IS!^qt{1P6{Mo49`Qa-2 znRO&y7kA0m72s+?p2Hf?ok#Yb%6-Zy?yL;v6JMWpiK^CTE$xokncNRYv$Sav@S;TYY$DF4Wj>mZu{A;3+f>hW(xeL25)0T zoLBFFzk$zD?vQUQ_XE)#+S}Cj^pUOScGf-B%ygIp-Vyr1HJ>KaBjQHodA?o6xvVJ2 z=f#cU5eZc4ZR)EefAU{|Y&B^H0DGMbcZt_OK&5Vkm0ZF_YwkNWa&WLGQF$Rh7uH{Z z2~;9x)FniwjANuR@Kkv4$pKinLpg{{PCYmr=A6X^=2NS8HTk`ictO_Ytos7$GgL(z zkk_O0azPx@I~S-@z!4#D6WiJ$EA?slw!A}mTi(zAiu=Xe)Oq9>f?z1<7;Zdu&%HPO zisbc%SCs3;BP4HpUcV)#BV@TTLivi+5niW#3m!^!bo9XQ+ltl2aiyaUZph z9DFj7D&c-<(Gfx}28p$U;pdFh;d+oGo*Z-zl6Vj|h8;YuFg-kqTa}maT~_Zpv^L4Z zfNO9?)7qD2eCY|eSOUw7JX~(;K$I}Pt*l_VLxm0^3LYaBL2z39oD2^>^^2Q6|0{XD z_KNs-h*o4K_-BmBbld0uNZhyanP(q=UA;?rUEaW)j|My+MDdorNUS4H63=0RZ*gvD z8htF>7v*l2L_3OFQA0r+uYgY&aSc2<)biw0BL^YD@Sqbsz3Ni*+?v+ai-%sbRZe*K zXUmr38FW`Cpo!qPlxx9mZIg(7oSz6_(c|A82H@lGA|E{m|7dLd{HOnX%?po^xZe05 zqLSCEE2!i<-~20Z0;E3k>d>d^V=k0s$m?(i9)1&uRG>k0H=;ypJT-{P zA1C6{;8O%&El2Ca@Oa1?Ati9p+(l_eTLDe~ti6)Wxp2!}o}ECr1lz$Cut28Fb%6#S zA@3L82BJIE`<16v@BouDJB#t>ULfq6ZAHhV+$i8JnA73j(JH>HrsGAS z6+=fLZFC%J7v4;wHZenwT1hU}5gCD`x33FGB>Du`Zrz4v!3q`?GWh_DykB`4Ug9k> zY@2*@^0-g@38PVNQ(hIfNgWaUzm;rw#sA40C8VUiLfWhEeEE}~B~+|GY-c;VghxYv zT!Bvzr?9`(jX~$4*JB<-ou#)B@vkuKEas7&D* zx}bedyp=hLoV+!ctk1)M4xJ-$NNzO(i9{x#!D6)gm2U$LJUM*ATc|FNlD6&TEoT09crRJ0XKnyUVj906Lbn@^O(W9}j*6#n1G}M2BR>Wbt~Vu+sLU+k4if5jL&f5m z51xh3X14oLundnHbtLNBt?<;ygx>b*PNOHagFO6*BapeYZ zyX&-PH245WMvpsk8dkB!anJ#~nDZs@_91)CoN}_SX4}!_gB-{~ZJ-6i4VUBK^e`#_ zW)RSWkg$KXi!PtE7P}@dSa4I$yMOa*)p^V-kvzna2NCsA)-><}x_r1wL5{y_-}YP1 zHErFgZ)!jO+I6ILD6cBOq+Bl_VN8P(qw8Buc{fp-nWOV}BfgVfcbzlAriOa+~@jAyGWCkxG>a0_rG3=JQgn$U%nk@*7 zjp}HG=fEYDz$lbRExW_97U02q81QZlNXa;iR|cbOM12W+N;{x^kPzy7@KmVrX|*+M zty}R%gcCXEl_vK4i4{)^2OsVlR z{>?8ucauiqC(3n7hXF{Cc|un32G8s7^8Z-gZ2%HdUwx1(_yd8IF!fK z4{~npzEk%-2x}h^)8LeFUm{+?L^T@oVzJexEOO_-=Yr>ed{CdV)kzo?@;A&JAPQ+Z zJBr!BuHpq$Nqu06_G1nkQ%&51ncu#Q>=b$0qs(Av%%cJab3YvP#>);7@sbw&-|Em5prU?VuajzMvjU)>DL$$ zoumueg?SS&gNRfOR8FPtlF5upwmp%<`$rnC0XV*C_Ibc}5Wfr04mq>5mKh^+18{#< zp0L2HQ}l^t=%8Wy*=3BpLJPO8(y<|rYy0+*ZSP&XbNS?P%N9&1k^0q7fAJ>q6QSc` zxv9F`K8lO|h4=^dff{lo-T603@b8ckf@dzC+^G z74I%zF(8NFTu9-2o0l>>e63?^dxZ?Ydgn8L`d#*b9IIY$L3O)=Npe1eT#Siz&g0Xjwqcv^<1Lr_Q;x)h8>V=mB&dJiASiE#QSc3qg@ z?&Nk54rjY|UWPGnwD0g3Y?%sR8vitBoFNtRnpMXceLl__#gYM5YFz@gXt*CdV2cCM8-=8@|h6kKa z4u(g;N;k+bFbXma7zMln$)9t)#b;oxfkT5tRLtCxd~~h8vzB+)+-;e_TPRrLaCLZQ za;wS}#5U@DZQsu2Th49=dzG{8KY@&84XJ1FngZ<+_4-vG*5nd%&6oA7h4$y=Kj2oE z!P_%7IPev54|e~$@O#opU%OF-9~eLXNGSIak{dn=DsPV5Bbgj!0+;V%*J| zsbCXKR(VNEtV(n^WR`&S1sp)ldK$Z4LKGPIB+^rQ{!Mu|9# zB+jM-?&tX(qOsfEKTK?e@9%lO&+~oWUz(raa)(EYw7xI;nYw)L<_{Iw8TU^g{@|Z~ zq{!9$JQYRy+m9ZWfo{J*-oiBuxL_!kP1|4Xt71l@#i_+EOkyFZP|&Iv`xyFvm|5R z(hpt6p8VrK|K0z#KgZws<=_41fBFYc(%rn2#T`_O?$=99hH|zn+22IJ+S>uRY>`J3 z!6psw!5-z&4%RC8i%gw^k1ZK#2dOO7uunO^afx+`9^r}a_M`KA83%cAc9NpAAg_% zKT<)OPjCFw%fDhouJNW!^<^K)7(6mn(nS1C<7sOAnyWmRndCE>4lkv_Uy=bpQne|2 zPi&8uc{0eS;C0r^rTfIEMmAw{?cNAK1#VZ1dEEt-vt--y>L>CG>U*3@-RN#`fg3(z zW~f*$hBqMHZkB31s_-0vABIpqUc)nAeCy;#)VE-}J!=0z?TFL^Exhq&8dLgEqYSr8 zh~#iO;>X*}DWE&5Pcf57CPtlNx)W0^os|-MPGMo;EBBOH$xobe+LZIe;n*JZAs9Gs z>3QqLeM-5#f&f8LFmQWOd{`>fw!gl1qN<~~kT?Jl0H>$2aa!*Go48o`M{qIJ*r{N% zv-C%E8B54%TJpCla0DVWZ(sT-+>%aV$c-Cs&g&YS%8`g%y3FY-3>4Pha~!}b#4phtf|vA(L#=K4lH2AU_w#dRmAyy#U-^At z&x<0rzVBWa^l(a9m_!RLu@3AI53k>>{SA2eHmMFMPOkdsbmt zXxNlX*JAlIUmO{nI|*hw*W9C@u=kiJ?5gx~eO#BDHs@We70)VzZq9+Dr`|PC$vkA9 za9(kKZ`1sD>(}f;bFCqYT%tQ>}n;lR%vI=1~cn=IX=N6*sQb6Nu8nZFngg78(Er*C69-#Gu7v57^roG z2zQ4Gm_6=7=QVw|`>OuE0WR~3c|t#AJq&n9UquNR?EwaDO5iuIXyCVZ+t>6${j~3o z<`MI(vY&piOWB+B`x2GXVuQUEB+BL@5&TGHFp-h85;sMWhrs#nsj_0`6PrAz zQrXsNqPyd|QjeQf)1w?5xJKp>`wrq$AC#Q)kEC*yzt3SwHfx6(&MaiJ7qwOkn$KmO zoY*%pP(GGZ;-E(M?_Bb&Ehl-Y0dDwxeUsUxKhU3=2hFGU5%aX;;cU{3;JZrMq2t6x zZ?$jhb*ZQhgSd{KQbe%ku{CMV-R3m|wl3H@pPF6fCQkhZrusW6T*a%ic&d2SlABt* zc4J=s-q0}NgzUjYeqJL!#I$aN564A{FQRIJKLoqy%{ND zoA(hL5idfpJ*Ttmgz|R`m*=p>3*NBzDf_K0bIMGZfZl_x0=~{J`ylu}tG~k5rU`}h z6MB_7u05aVa%53iNDH>`?G^Y6cj~7d@b!IaKQQkLpPHZQ7xajqdUW$b;C@Yh)JJ4X z*{2?U3eN$&pF&F7yn=eque<&AGPb}8gvuQbjh5lp{=&TDe5~B*p7GXkWufvo^2T8A zk;%J2#A`WG2hj(qE*q?EvhZ};kfHj6%J}hzzdCntDGjd^g@f@`<-;M?u6SDZhbQku zN4pb&t-t%eGVeRP^j*$_mvMJrbJB#X&2eShuq-aez5ZWVJ78@+to1JQfwJ%4^u98` z6+1)!)K6`?{u`L%?;=%{pUBXK*EjY{eP@6jc%kn8vP!|3o7Gh6?tpXabnCba z$IouyMwWXtC;Mxpw@CQ=L%hPk&xlF<<>h@2?-#B{V#p*a#e~Wt zYoB^pp&OxZ4}Yku4qlk0J&9oVRB>TdekF=hEZlJw?BNaf_>fD`5}yfOh!3&7nSK#M z;>uz0$)*-MMjys&8sO)g_g>KDpQ#h9;4v;&G)KbbiK#zK-a>fR_B`O(HdkH9V;K*_)?2!#2FnJ+%9Pn!6Crn5 zTA&P=Iv%!Y&>maq@LGB4X|LlfV*JySiFC^HChTUte1R#Yyxa{RZa?YuQb;}2&&~75 zCM1)2&w#1W6iNK7g{B6YS}@g~G}aG6!E*hszJjXAVI-6G^bYsoVe0oVg)2UFP&;=$ z?pK^Fkv4F}juxNO%kqd+4tV$~U)RbvaYoXX2|UiANt%9Ixz zsb++dQ1M~x8DZ9kdnFGNnC-j7q}hUe_K7%Q%D$X#<*Ui9h{U=ANi$-SKIo@xBavRJ zI{$#QA%ci!IhS!?4vyH~L7DtCm%shO77Xu$T$5)scWNkTM7z9aE@L-OL*CcZ zm$Ab#c;#=?@UnKXY36SCHS@Ga?xgTDNFC>KeXsTNHl3gR_Fuh70Um`^DoDiOE$Z2@ zW8u~`N;D@h45oKeJ;Ely4Sn1CJC@)0Xzz4SSLCp=5gpSrrp}b=F5YNTkLaXnwu>9#G`rp=M0){`kq;Swq%8xBPW1_{!u=q}t5rQe9_8bi3`k5?4ns72md= zL@S$&scZ>RxXT2rolPbC85>ejo3#(0Waq#C?^}>ZI9FL+Tb0?PoNM2|={^59aMh1k zkGfal`d6|DPwJa5G-VmO9<~N-HIf(p1zVB6MCv@B9oqidg}zu6UfqU$n1~Nzw^Cw1 zi#JR+_E4KVwx2=Xd&_DQCZ^ody3(0a1$EnT0lQ8cKt=eIwBn^V-ayRhq!z36_AwjzBs zdd9wDL?*Rej@Dha8?Jn<@B!ALU@UqRZROEdF!o+8)&o?9n>F=Kf-(GTQalaL59CkG ziodm>k(_p-JG4`##Ypu@2ys+5QYSdKn>wdUm-6R`sY~Ik79_hOHQk}Uct1OBTrj@z zB>QGt5_6UHQ_AjCcF8aAB-0Vqp=qoZxIlp~z&sJivZ;|f+UqcldR3_VozjD8Rz!acCXR+=5^$HQs7T+^;>=}fyqyMm<|S64@JW4PV*Q#;Qyt~r!FHA;(}a$Bb8TPHuH zEc30z%a&fnEK^_u`da<7^|Df=NMpEMSP;QD{tgGS;cZO(C|*F2_p zqn;%wZ&oCf&=k4n=X_o*vR|s*gnNaiU~Gw(m$L@kaqL<)L(X9p<<4Gpuv*lD5OUnXGDugd0%Q9b7f zuJy=r4^#7=ecX31b`2JUvb!GqRAJX)EkPkq8vix6E)lDFkIv`$ujS%_3vC^^Snw79 zMn8*G--UdC-1)O-FF{$emEhJ-CDcpQ`Yn;pR44v7y1BLn9>8{L)YJ5HE&j#FERtYR zO;g`gcc`YK!HMb8K%MC{b+!}kP3m#$QC7LJ!{Hj@RJY^n)uXL#S$9aWyUmW}Kv&5p z_;dR9(ob}bge&-FVM**U@B992(TnXbu}xX};@Q||(>}1*!o9wkJzGKYN*o!cusBbUe5$c^`pJ)+^ z@A*Vc@XdW6_&poRJQ7&w|H?kXTT6K_U?udES)Y#Z>$|?TtB+f3!G*7wdsN!0fe>wG zxP1!03_2PZSCrf9-LlqlupQVT{-^5Iz!)$(K=dzkf{aE@YvnD$BG7%u82h6HPuLK@i zc--Hn-?gWR>jEj0xZ$`3RQWOSotT}Tv{X$iyNo$$GGVi+q~!>9|5it&BK{Q_su%QD z(M5SrJ)B3}BfWBWZ^ba(3ahsPaVB*hQ_PExnHkHS>zM`f5I5dVN!L8Y?Ooxac<=3b zRQ(lDH$p@ReV3Nid~P4JKj0{dAe?iul$jtecgK?btJekB`6e|HU5P4E2|an0Yy)PR z{{psmP|>nlPx`3vrrOxQtSM*nU||4==^A>AOcbx4fA3P)<~8Q^WmF`SD-?4XU zbJOa{b;>un0GK3~c^Rs21Ify!(5oGRt@QsxXa9FzcwpvBK7OuCMDvr>gY2(qv_1prWz2hbP(NB)NY# zD?jVpK7}W@4>@~I`Lmwq&UQ9Yd+nQC#LXWyq z3W%+`w5OnQx*(LvUUpeQ*+}wUBFT7DbuL=mbUMdOH8e#JDF1j*takjJ>y=xlf~Cox z#Bf}IGCi)q_3!hdx4JIa#qF50!UZqffw$7fV;XM`_`jjPi0qag-DC^Vm4H;%Oz18=6^GTnL=)J zi?UY(A^?5^zJ=q-hMM+|uOA<&>#RdEC6zw~AkYIL5vD+We#gn?`h9fiC|~nQ1|>1e z)U3nf^7zX)DLf`{vL_j?r>DVQT6K@YnnVL6AK;G}-Y2DHJv7TvUuI+3NbYQ6sr_;O zMyLC0;$?{fsq^-k>y?uZD1Ny^x30CIFeWhB+#-AvtaAR7GBYZzJqeVJy~!>QO6cN8 z*mTUD#M^@7nm;0AfL?H+>(!Dk0y-vC%|mG={=ZWBj=sxH#*lN^zBVQ>>H_TI>k4`r z>*L+hLw&v^`W)i}YGbp%c!$bjd;Kk)%Bl7r{e4YGkrF^bj*d4WkTKmZZROFn0op`kq93qox;Pb{ z(*?+i1%OnT=o>yCrD%fhUY%Q!DD3K)?QKoA&qUm_o2nI1ErNnw9igdGfXa=`q+qf$ z>`@3uhGvC4FS&Rxag^z6TVy0u@pNDk?Wh{XcRRNV)B&s$4tLj&bhs(h)>>SOi>bB#Hs7Plv3N2Yde zo~iq+s3tekI_`9;v{*-cES?-s)+yW0t+hKN#DG#aCFO?3oLol(BX;oO>{A*ol!3_t8DyNR2)L0xmKdc3!=eC(O-NVS_=6RMqV1^-SJ zh?Gr5YsS+(TU~5A4~n#c{KEbg#&fPzMX7sOM;#kGNBgU64;iE2YGqEC%ir!C?@hFoho<;;L(PEqZ389hB7@y+@^SPFJ}|s0 z@15?|QL>mTedsrlK~O<7vzxhjFvfc$iX}1Cs@UjQ%UpieM6oT?VN;=OLq)E#HN4f@ zh)`rkSL+k*CY64odVD%ISTj`gS%czLrvbuHS?_cw5Mn#j#zWEgNIH+*!4u_Ve?E)U z&!g?_BvM8qb?b}=$2F_3p8Phjpk3Fwz(dzgZIv>WR(P|jFn)gYAXV&i5K(p$9dK$) zk#gg?wWU;1(q}YNeS+Jtz;k$J;~RsQ0LML{;L(i34K>m5M&PL%sqGGx1590~mHVjU zKH#>h;?a^x$>~ly>%v}T^jn_gQZ$62A0gS6f6y)fuT6D3FL~uPNlae z+q6L-i zX;?w(1~yS7@R2HK6Pq(-<57NNPeBX^xvO_~G8P_CHU)*huJ_@>TB-2=Qh(Q+7U^YN zwYVrcxN&->dL%s@1%%Ez2hP9}E9DLn%wvWN%;Z&Q7r{OCWy`xsLyB?-ncM+2$m;q8 z)+no{DxYjDh~+lSBzJ$@Ra?_Wv{dj9j_jTtj1N8c<>%{D-&KpV}Rf^blj`z)*R|h<87D!<|iIiA!AUK>|RZvwNXI&BEF%b#dIF{phYiX>))aYE@ zfaSDFEx0W`*)cdgHuUA^pRIRJi?rV47M1j`ZA{@i5N~kNXih0IEs;GCJs?{UQs2`n z)4cB)*$kY1;CwMN)Q-zkDCmTzRyF@%QMyh4cdt zJQp1rh}V|(qE3sHKewUXcgx@NwQ3cd-W?kldi&J({$;&g;hr{URG_*uUec0Pk9<`w zAHt$>szocuBDIWAKgzsv$HT7#PDbmw@*zC<5*=iI4b~iWU`63bX=7>8m-2GmhDh?3 zbY*Ts7`YyJZ ze>I<-!eV14RbZ&179tiTpyAauha=M;*A;z!cGLB~@Xkvs*|{0z|?m$~y zxrDN_dql*-Zb-MBgbWGFhuOsRo*xTmov8LN%;wC?UL z%N}?x@?=lVKwHqZ>2kV0z)2r+cj!aA{LPn?;Vb5l zbJ3hu3(m&7hiayK<3tVPf<+`TT9b*+k}vR@-M;!P*`$0)1=(VpUl{MMsO_S6&1t1E zkT>TmoUN+pzC;zK{dbGrROThK!~H~S0~Y2bdr@VqI0G|h_f*Dl4=RciWfg!gy+-=L zf8YzkXP#XkpSeWTWa%(lu&ain-4zA9ds|CGLz!a*PgV_KEff2v+8yYFpUhK3&cEhF zq++PMpeN4o+%OZK;!(N+o%z$5s4oMLj`WX3H}}QuAa}@KuyA2PBmN(o6|sl$HR92> zqo<-n-+k#&`X?H=otNOK^b=KOL*4mZ-I>{8@{`p4hlbe%^Ali3x?jU$S!xN-Gx#&n z(VrPT+E!dI^(MjEfuT%RHuvu=0a`zPQ_-6*9a82K`>-Usd zq+CwbpQyCQoKFliREuA_SY1$?IZ&1uW@bM-os73>jT6(e^Y=2MnjJ}-k4m)b`px-R z;waKk_~oUz<-t?W{mY^^5AFCwe-eDmrcPVrofaJ)EQ7wIA;&w5+w^T4T|UPyr!jA4 zhVAR8UMOFskM<3Z^|Ls7l)WBES@*dik9T(%{nuxfwMDb1LK4X`2R3n!_i*O2ZT+lk zvL*EVEFB{jSeQT8M*%_Njl90|%OMd%G|SDd#%U@XHFV!tO_F;eG&uQPgZ zPPUS#H*JOx9sTi~=%{dyQ#g2@4tZ>T%w*)kMY}`m^vC2>XNPjvTs&5Qu8;CIE%W`= zmK2rUmimtKLGcd*+g1~do#>#FlM=*}Z%pKzH%xL>cA)4pW!CG9dW|_`c6cWWo!6)U zCuT-j#bXaVl){xAbS)j+8E$-Ec64<&Canq%j4Ez+Xd z7kc|yqP`3&k+ofh#t&p>$0LW&tY7038NI_5?B(U9tv|D=x@%wY`6lsw*mE|2ZpOB~ z2NP0^mFS>-jl$?eA=`Zf7pCFrW$0GF*vbtaUF0U+E6zN9W|JG4>!(JxikoC_#Iggy zy_I{}vKlHl*b>|vFJ8M`mJgJ8_l=hqSa;yW4R(g}mGAA~K#{x2oE9E*xJ?Vk z=oR`j9@%H2o0%Dp&6zrpoe`muFcUH%NZDYBKyAl`i8zxaIFRa5&hySpKYA$?KU{rg z{Y8>vwf*u*#YFkyC87rU^DF1VG~J2MheauoI9}nU zXi=`a>9mXGqE}#_`Obbe#1@(P-}jZ!2fBQay(7W%gN18I zXq`#13l9txojrEiS%VHwJALfTXGNYB$(KC70Ivn$)lu9c3pexY$t~LXZRYGLl1KtN z-NmAG&nPTKu(3enepWO@bQ7=Tt5bp{Z0?a^@mb5MkMZwit9nyO5Km8bpG$@Qd@Q27 zq56b!&MN=m>V~NhKCv??Sp68S!0yVy?6D9__3D?`k0N>4{wnx*yJjz+U@@zdam`ul zD(7%+XpCL8lRx8xAK^iZn)c@~kfmflyDO-=WT(%y{Jm`~ zM==p-zholJx<^wG2DjyqXBcZL*}30gpYDzP+~j_s9OLD3w*m|I#}0+Q`$#qM6OzLS ib1%%2nAAjJzW#~L-cRsK`0ob(Fq6uz!$#pJ^#1|ZFj|@b literal 0 HcmV?d00001 diff --git a/data/sp/File Managers/eolite.ini b/data/sp/File Managers/eolite.ini new file mode 100644 index 0000000000..3f6445f56d --- /dev/null +++ b/data/sp/File Managers/eolite.ini @@ -0,0 +1,59 @@ +[Associations] +asm=TinyPad +inc=TinyPad +ini=TinyPad +txt=TinyPad +gif=/sys/media/kiv +bmp=/sys/media/kiv +png=/sys/media/kiv +tga=/sys/media/kiv +jpg=/sys/media/kiv +jpeg=/sys/media/kiv +ico=/sys/media/kiv +cur=/sys/media/kiv +pcx=/sys/media/kiv +xcf=/sys/media/kiv +pbm=/sys/media/kiv +pgm=/sys/media/kiv +pnm=/sys/media/kiv +tif=/sys/media/kiv +tiff=/sys/media/kiv +wbmp=/sys/media/kiv +3ds=/sys/3d/view3ds +lif=/sys/demos/life2 +skn=/sys/desktop +htm=/sys/HTMLv +html=/sys/HTMLv +mht=/sys/HTMLv +fb2=/sys/HTMLv +rtf=/sys/RtfRead +obj=/sys/develop/cObj +nes=/sys/games/fceu +xm=/sys/media/AC97SND +wav=/sys/media/AC97SND +mp3=/sys/media/AC97SND +mid=/sys/media/MIDAMP +m3u=/sys/media/listplay +lap=/sys/media/listplay +asf=/sys/media/listplay +kla=/sys/games/klavisha +avi=/bd0/4/fplay +mkv=/bd0/4/fplay +vob=/bd0/4/fplay +flv=/bd0/4/fplay +mp4=/bd0/4/fplay +mpg=/bd0/4/fplay +mpeg=/bd0/4/fplay +smc=/bd0/4/zsnes +pdf=/bd0/4/updf +mcr=/bd0/4/psx4all + +[Config] +SelectionColor=94AECE +LineHeight=18 +ShowDeviceName=1 + +[UserDirectories] +;ïàïêè äëÿ áûñòðîãî ïåðåõîäà - ïîêà ÷òî íå ðàáîòàåò +/bd0/4/kolibri/ + diff --git a/data/sp/File Managers/icons.ini b/data/sp/File Managers/icons.ini new file mode 100644 index 0000000000..26c015a42d --- /dev/null +++ b/data/sp/File Managers/icons.ini @@ -0,0 +1,143 @@ +asm=4 +inc=4 +txt=3 +rtf=3 +ini=3 +log=3 +dic=3 +doc=3 +exc=3 +wtx=3 +inf=3 +xml=3 +odt=3 +jpg=6 +jpe=6 +jpeg=6 +jif=6 +jfif=6 +jp2=6 +jpx=6 +jpk=6 +j2k=6 +jpc=6 +j2c=6 +bmp=6 +dib=6 +rle=6 +pbm=6 +pgm=6 +pnm=6 +wbm=6 +wbmp=6 +xbm=6 +xpm=6 +gif=6 +png=6 +ico=6 +cur=6 +ani=6 +tif=6 +tiff=6 +xif=6 +tga=6 +pcx=6 +xcf=6 +dcx=6 +ppm=6 +psd=6 +psp=6 +raw=6 +raf=6 +x3f=6 +orf=6 +nef=6 +mrw=6 +dcr=6 +crw=6 +cr2=6 +ras=6 +pix=6 +pict=6 +pct=6 +pic=6 +pef=6 +pcd=6 +iff=6 +lbm=6 +ilbm=6 +fpx=6 +djv=6 +djvu=6 +iw4=6 +wav=7 +mp3=7 +xm=7 +mid=7 +midi=7 +aif=7 +aifc=7 +aiff=7 +au=7 +snd=7 +wma=7 +wm=7 +avi=11 +mpg=11 +mpe=11 +mpeg=11 +flv=11 +3gp=11 +mkv=11 +wmv=11 +mov=11 +mp4=11 +img=5 +ima=5 +imz=5 +bwz=5 +dsk=5 +vfd=5 +wil=5 +wlz=5 +exe=8 +com=8 +bat=8 +7z=9 +rar=9 +zip=9 +cab=9 +arj=9 +lha=9 +lzh=9 +tar=9 +taz=9 +tbz=9 +tbz2=9 +bz=9 +bz2=9 +ice=9 +gz=9 +tgz=9 +uue=9 +uu=9 +xxe=9 +z=9 +dat=10 +ttf=12 +ttc=12 +chr=12 +mt=12 +htm=13 +html=13 +mht=13 +eml=13 +lif=14 +3ds=15 +kex=16 +skn=17 +obj=18 +dll=18 +ocx=18 +so=18 +drv=18 diff --git a/data/sp/File Managers/kfar.ini b/data/sp/File Managers/kfar.ini new file mode 100644 index 0000000000..6edf269c41 --- /dev/null +++ b/data/sp/File Managers/kfar.ini @@ -0,0 +1,79 @@ +[Associations] +asm=/sys/TinyPad; AsmMenu1,AsmMenu2 +inc=/sys/TinyPad +ini=/sys/TinyPad +txt=/sys/TinyPad +jpg=/sys/media/kiv +jpeg=/sys/media/kiv +jpe=/sys/media/kiv +gif=/sys/media/kiv; ViewGraph,MenuAnimage +ico=/sys/media/kiv +bmp=/sys/media/kiv; ViewGraph,MenuAnimage +png=/sys/media/kiv +cur=/sys/media/kiv +pcx=/sys/media/kiv +pbm=/sys/media/kiv +pgm=/sys/media/kiv +pnm=/sys/media/kiv +tif=/sys/media/kiv +tiff=/sys/media/kiv +wbmp=/sys/media/kiv +xcf=/sys/media/kiv +rtf=/sys/RtfRead +3ds=/sys/3d/view3ds +lif=/sys/demos/life2 +skn=/sys/desktop +m3u=/sys/media/listplay +lap=/sys/media/listplay +asf=/sys/media/listplay +wav=/sys/media/AC97SND +mp3=/sys/media/AC97SND +xm=/sys/media/AC97SND +mid=/sys/media/MIDAMP +cvs=/sys/graph +obj=/sys/develop/cObj +htm=/sys/HTMLv +html=/sys/HTMLv +fb2=/sys/HTMLv +mht=/sys/HTMLv +kla=/sys/games/klavisha + +[Menu] +AsmMenu1=&Edit,/sys/TinyPad +AsmMenu2=&Compile,/sys/develop/fasm +ViewGraph=&View,/sys/media/kiv +MenuAnimage=&Edit,/sys/media/animage + +[Panels] +; View modes for files on panels +; values correspond to digits for LCtrl+<1-4> +LeftViewMode=2 +RightViewMode=2 +; Sort modes for files on panels +; values are 2 * N + M, where +; M = 0 - normal sorting, M = 1 - reverse sorting +; N = 0-6 correspond to sort mode for Ctrl+F<3-9> +LeftSortMode=0 +RightSortMode=0 + +[Editor] +; Symbols for end-of-line, which will be added by kfar editor +; when new line will be created: +; DOS - like in DOS/Win (0D 0A), Unix - like in Unix (0A), +; Mac - like in Mac (0D) +EOLStyle=Unix + +[FolderShortcuts] +; You can define up to 10 links to folders Shortcut0...Shortcut9, +; the quick jump to such folders can be done with RCtrl+ +Shortcut0=/rd/1 + +[Confirmations] +Delete=1 +DeleteIncomplete=0 + +[Plugins] +; On left of the equal sign any sensical or nonsensical name can appear; +; on right - path to plugin. +; If path is not absolute, it is counted from the folder with kfar binary. +ArchiveReader=/sys/lib/archiver.obj diff --git a/data/sp/File Managers/kfm.ini b/data/sp/File Managers/kfm.ini new file mode 100644 index 0000000000..f3dcdd7450 --- /dev/null +++ b/data/sp/File Managers/kfm.ini @@ -0,0 +1,209 @@ +start +<>icons_associations +asm 0004 +inc 0004 +mac 0004 +txt 0003 +rtf 0003 +ini 0003 +log 0003 +dic 0003 +doc 0003 +exc 0003 +wtx 0003 +inf 0003 +jpg 0006 +jpe 0006 +jpeg 0006 +jif 0006 +jfif 0006 +jp2 0006 +jpx 0006 +jpk 0006 +j2k 0006 +jpc 0006 +j2c 0006 +bmp 0006 +dib 0006 +rle 0006 +pbm 0006 +wbm 0006 +wbmp 0006 +xbm 0006 +xpm 0006 +gif 0006 +png 0006 +ico 0006 +cur 0006 +ani 0006 +tif 0006 +tiff 0006 +xif 0006 +tga 0006 +pcx 0006 +pbm 0006 +pgm 0006 +pnm 0006 +xcf 0006 +dcx 0006 +ppm 0006 +psd 0006 +psp 0006 +raw 0006 +raf 0006 +x3f 0006 +orf 0006 +nef 0006 +mrw 0006 +dcr 0006 +crw 0006 +cr2 0006 +ras 0006 +pix 0006 +pict 0006 +pct 0006 +pic 0006 +pgm 0006 +pef 0006 +pcd 0006 +iff 0006 +lbm 0006 +ilbm 0006 +fpx 0006 +djv 0006 +djvu 0006 +iw4 0006 +wav 0007 +mp3 0007 +xm 0007 +mid 0007 +midi 0007 +aif 0007 +aifc 0007 +aiff 0007 +au 0007 +snd 0007 +wma 0007 +wm 0007 +avi 0011 +mpg 0011 +mov 0011 +flv 0011 +wmv 0011 +vob 0011 +mkv 0011 +mp4 0011 +mpeg 0011 +3gp 0011 +img 0005 +ima 0005 +imz 0005 +bwz 0005 +dsk 0005 +vfd 0005 +wil 0005 +wlz 0005 +exe 0008 +com 0008 +bat 0008 +sh 0008 +7z 0009 +rar 0009 +zip 0009 +cab 0009 +arj 0009 +lha 0009 +lzh 0009 +tar 0009 +taz 0009 +tbz 0009 +tbz2 0009 +bz 0009 +bz2 0009 +ice 0009 +gz 0009 +tgz 0009 +uue 0009 +uu 0009 +xxe 0009 +z 0009 +dat 0010 +dbg 0010 +mgb 0010 +ttf 0012 +ttc 0012 +chr 0012 +mt 0012 +htm 0013 +html 0013 +lif 0014 +3ds 0015 +kex 0016 +skn 0017 +<>end + +<>files_associations +asm /sys/tinypad +inc /sys/tinypad +mac /sys/tinypad +dbg /sys/tinypad +txt /sys/tinypad +ini /sys/tinypad +log /sys/tinypad +dat /sys/tinypad +inf /sys/tinypad +bat /sys/tinypad +sh /sys/tinypad +jpg /sys/media/kiv +jpeg /sys/media/kiv +jpe /sys/media/kiv +gif /sys/media/kiv +bmp /sys/media/kiv +png /sys/media/kiv +ico /sys/media/kiv +cur /sys/media/kiv +pcx /sys/media/kiv +xcf /sys/media/kiv +pbm /sys/media/kiv +pgm /sys/media/kiv +pnm /sys/media/kiv +tif /sys/media/kiv +tiff /sys/media/kiv +wbmp /sys/media/kiv +wav /sys/media/ac97snd +mp3 /sys/media/ac97snd +xm /sys/media/ac97snd +mid /sys/media/midamp +rtf /sys/rtfread +3ds /sys/3d/view3ds +lif /sys/demos/life2 +skn /sys/desktop +avi /hd0/1/fplay.kex +mpg /hd0/1/fplay.kex +mov /hd0/1/fplay.kex +flv /hd0/1/fplay.kex +wmv /hd0/1/fplay.kex +vob /hd0/1/fplay.kex +mkv /hd0/1/fplay.kex +mp4 /hd0/1/fplay.kex +mpeg /hd0/1/fplay.kex +3gp /hd0/1/fplay.kex +m3u /sys/media/listplay +lap /sys/media/listplay +asf /sys/media/listplay +cvs /sys/graph +obj /sys/develop/cObj +htm /sys/HTMLv +html /sys/HTMLv +mht /sys/HTMLv +fb2 /sys/HTMLv +kla /sys/games/klavisha +bin /sys/develop/heed +mgb /sys/develop/heed +<>end + +<>files_association1 +bmp /sys/media/animage +<>end + +end diff --git a/data/sp/Makefile b/data/sp/Makefile new file mode 100644 index 0000000000..2f5d19aff3 --- /dev/null +++ b/data/sp/Makefile @@ -0,0 +1,668 @@ +# General rule for naming: variables with CAPITALIZED names hold settings, +# you can - and are expected - to modify it; variables with lowercase names +# are intermediate variables and macroses not to be modified unless you +# know what you're doing. + +# Define directories for destination, source repository, sources of kernel, sources of programs. +BUILD_DIR:=build +REPOSITORY:=../.. +KERNEL:=$(REPOSITORY)/kernel/trunk +PROGS:=$(REPOSITORY)/programs + +# The main goal: build kolibri.img, kolibri.iso and list for creating a distribution kit +all: $(BUILD_DIR)/kolibri.img $(BUILD_DIR)/kolibri.iso $(BUILD_DIR)/distr.lst + +# Docpak requires some documents; we place them +# into 'docs' subdir and communicate with FASM +# through environment var DOCDIR. +DOCDIR:=docs/ +export DOCDIR + +# Because most programs are written in FASM and have +# the common structure of one main .asm file possibly including +# several .inc files, we handle this case separately. +# Namely, we organize one big list of such programs +# (FASM_PROGRAMS, see below) containing name of local binary file, +# name of file inside kolibri.img and name of the source file. +# This list is maintained by hand, and the rest is done with some macroses... +# well, slightly complicated macroses - however, you do not need to +# understand them in order to maintain the list. +# To add a FASM program with one .asm file, just +# add the corresponding item to the list and enjoy +# the power of GNU make. + +# The list of all FASM programs with one main FASM file. +# Every item consists of three parts, separated by ':'. +# First part is the real name of binary file in $(BUILD_DIR) +# as it should be produced by make. +# Second part is the name of a file inside kolibri.img, +# usually uppercased version of first part - to save space +# for FAT filesystem. +# Third part is the name of the source file. +# Spaces separate items, so spaces in names should be +# represented as '|'. +FASM_PROGRAMS:=\ + @clip:@CLIP:$(PROGS)/system/clip/trunk/@clip.ASM \ + @menu:@MENU:$(PROGS)/system/menu/trunk/menu.asm \ + @panel:@PANEL:$(PROGS)/system/panel/trunk/@PANEL.ASM \ + @ss:@SS:$(PROGS)/system/ss/trunk/@ss.asm\ + refrscrn:REFRSCRN:$(PROGS)/system/refrscrn/refrscrn.asm \ + asciivju:ASCIIVJU:$(PROGS)/develop/asciivju/trunk/asciivju.asm \ + calc:CALC:$(PROGS)/other/calc/trunk/calc.asm \ + calendar:CALENDAR:$(PROGS)/system/calendar/trunk/calendar.asm \ + commouse:COMMOUSE:$(PROGS)/system/commouse/trunk/commouse.asm \ + cpu:CPU:$(PROGS)/system/cpu/trunk/cpu.asm \ + cpuid:CPUID:$(PROGS)/system/cpuid/trunk/CPUID.ASM \ + desktop:DESKTOP:$(PROGS)/system/desktop/trunk/desktop.asm \ + disptest:DISPTEST:$(PROGS)/system/disptest/trunk/disptest.ASM \ + docpack:DOCPACK:$(PROGS)/system/docpack/trunk/docpack.asm \ + end:END:$(PROGS)/system/end/light/end.asm \ + gmon:GMON:$(PROGS)/system/gmon/gmon.asm \ + hdd_info:HDD_INFO:$(PROGS)/system/hdd_info/trunk/hdd_info.asm \ + icon:ICON:$(PROGS)/system/icon/trunk/icon.asm \ + cropflat:CROPFLAT:$(PROGS)/system/cropflat/cropflat.asm \ + kbd:KBD:$(PROGS)/system/kbd/trunk/kbd.ASM \ + kpack:KPACK:$(PROGS)/other/kpack/trunk/kpack.asm \ + launcher:LAUNCHER:$(PROGS)/system/launcher/trunk/launcher.asm \ + magnify:MAGNIFY:$(PROGS)/demos/magnify/trunk/magnify.asm \ + mgb:MGB:$(PROGS)/system/mgb/trunk/mgb.asm \ + mousemul:MOUSEMUL:$(PROGS)/system/mousemul/trunk/mousemul.asm \ + madmouse:MADMOUSE:$(PROGS)/other/madmouse/madmouse.asm \ + mykey:MYKEY:$(PROGS)/system/MyKey/trunk/MyKey.asm \ + pcidev:PCIDEV:$(PROGS)/system/pcidev/trunk/PCIDEV.ASM \ + rdsave:RDSAVE:$(PROGS)/system/rdsave/trunk/rdsave.asm \ + rtfread:RTFREAD:$(PROGS)/other/rtfread/trunk/rtfread.asm \ + run:RUN:$(PROGS)/system/run/trunk/run.asm \ + scrshoot:SCRSHOOT:$(PROGS)/media/scrshoot/scrshoot.asm \ + setup:SETUP:$(PROGS)/system/setup/trunk/setup.asm \ + test:TEST:$(PROGS)/system/test/trunk/test.asm \ + tinypad:TINYPAD:$(PROGS)/develop/tinypad/trunk/tinypad.asm \ + zkey:ZKEY:$(PROGS)/system/zkey/trunk/ZKEY.ASM \ + 3d/3dsheart:3D/3DSHEART:$(PROGS)/demos/3dsheart/trunk/3dsheart.asm \ + 3d/3dwav:3D/3DWAV:$(PROGS)/demos/3dwav/trunk/3dwav.asm \ + 3d/crownscr:3D/CROWNSCR:$(PROGS)/demos/crownscr/trunk/crownscr.asm \ + 3d/free3d04:3D/FREE3D04:$(PROGS)/demos/free3d04/trunk/free3d04.asm \ + 3d/view3ds:3D/VIEW3DS:$(PROGS)/demos/3DS/VIEW3DS.ASM \ + demos/bcdclk:DEMOS/BCDCLK:$(PROGS)/demos/bcdclk/trunk/bcdclk.asm \ + demos/circle:DEMOS/CIRCLE:$(PROGS)/develop/examples/circle/trunk/circle.asm \ + demos/colorref:DEMOS/COLORREF:$(PROGS)/demos/colorref/trunk/colorref.asm \ + demos/cslide:DEMOS/CSLIDE:$(PROGS)/demos/cslide/trunk/cslide.asm \ + demos/eyes:DEMOS/EYES:$(PROGS)/demos/eyes/trunk/eyes.asm \ + demos/firework:DEMOS/FIREWORK:$(PROGS)/demos/firework/trunk/firework.asm \ + demos/movback:DEMOS/MOVBACK:$(PROGS)/demos/movback/trunk/movback.asm \ + demos/plasma:DEMOS/PLASMA:$(PROGS)/demos/plasma/trunk/plasma.asm \ + demos/timer:DEMOS/TIMER:$(PROGS)/demos/timer/trunk/timer.asm \ + demos/tinyfrac:DEMOS/TINYFRAC:$(PROGS)/demos/tinyfrac/trunk/tinyfrac.asm \ + demos/trantest:DEMOS/TRANTEST:$(PROGS)/demos/trantest/trunk/trantest.asm \ + demos/tube:DEMOS/TUBE:$(PROGS)/demos/tube/trunk/tube.asm \ + demos/unvwater:DEMOS/UNVWATER:$(PROGS)/demos/unvwater/trunk/unvwater.asm \ + demos/web:DEMOS/WEB:$(PROGS)/demos/web/trunk/web.asm \ + develop/board:DEVELOP/BOARD:$(PROGS)/system/board/trunk/board.asm \ + develop/cObj:DEVELOP/cObj:$(PROGS)/develop/cObj/trunk/cObj.asm \ + develop/fasm:DEVELOP/FASM:$(PROGS)/develop/fasm/trunk/fasm.asm \ + develop/h2d2b:DEVELOP/H2D2B:$(PROGS)/develop/h2d2b/trunk/h2d2b.asm \ + develop/heed:DEVELOP/HEED:$(PROGS)/develop/heed/trunk/heed.asm \ + develop/ipc:DEVELOP/IPC:$(PROGS)/network/ipc/trunk/ipc.asm \ + develop/keyascii:DEVELOP/KEYASCII:$(PROGS)/develop/keyascii/trunk/keyascii.asm \ + develop/mtdbg:DEVELOP/MTDBG:$(PROGS)/develop/mtdbg/mtdbg.asm \ + develop/scancode:DEVELOP/SCANCODE:$(PROGS)/develop/scancode/trunk/scancode.asm \ + develop/t_edit:DEVELOP/T_EDIT:$(PROGS)/other/t_edit/t_edit.asm \ + develop/test_gets:DEVELOP/test_gets:$(PROGS)/develop/libraries/console/examples/test_gets.asm \ + develop/testcon2:DEVELOP/TESTCON2:$(PROGS)/develop/libraries/console/examples/testcon2.asm \ + develop/thread:DEVELOP/THREAD:$(PROGS)/develop/examples/thread/trunk/thread.asm \ + develop/info/asm.syn:DEVELOP/INFO/ASM.SYN:$(PROGS)/other/t_edit/info/asm_syn.asm \ + develop/info/cpp_kol_cla.syn:DEVELOP/INFO/CPP_KOL_CLA.SYN:$(PROGS)/other/t_edit/info/cpp_kol_cla_syn.asm \ + develop/info/cpp_kol_dar.syn:DEVELOP/INFO/CPP_KOL_DAR.SYN:$(PROGS)/other/t_edit/info/cpp_kol_dar_syn.asm \ + develop/info/cpp_kol_def.syn:DEVELOP/INFO/CPP_KOL_DEF.SYN:$(PROGS)/other/t_edit/info/cpp_kol_def_syn.asm \ + develop/info/default.syn:DEVELOP/INFO/DEFAULT.SYN:$(PROGS)/other/t_edit/info/default_syn.asm \ + develop/info/html.syn:DEVELOP/INFO/HTML.SYN:$(PROGS)/other/t_edit/info/html_syn.asm \ + develop/info/ini_files.syn:DEVELOP/INFO/INI_FILES.SYN:$(PROGS)/other/t_edit/info/ini_files_syn.asm \ + develop/info/win_const.syn:DEVELOP/INFO/WIN_CONST.SYN:$(PROGS)/other/t_edit/info/win_const_syn.asm \ + drivers/com_mouse.obj:DRIVERS/COM_MOUSE.OBJ:$(KERNEL)/drivers/com_mouse.asm \ + drivers/emu10k1x.obj:DRIVERS/EMU10K1X.OBJ:$(KERNEL)/drivers/emu10k1x.asm \ + drivers/fm801.obj:DRIVERS/FM801.OBJ:$(KERNEL)/drivers/fm801.asm \ + drivers/infinity.obj:DRIVERS/INFINITY.OBJ:$(KERNEL)/drivers/infinity.asm \ + drivers/intel_hda.obj:DRIVERS/intel_hda.obj:$(REPOSITORY)/drivers/audio/intel_hda/intel_hda.asm \ + drivers/ps2mouse.obj:DRIVERS/PS2MOUSE.OBJ:$(REPOSITORY)/drivers/mouse/ps2mouse4d/trunk/ps2mouse.asm \ + drivers/sb16.obj:DRIVERS/SB16.OBJ:$(KERNEL)/drivers/sb16/sb16.asm \ + drivers/sound.obj:DRIVERS/SOUND.OBJ:$(KERNEL)/drivers/sound.asm \ + drivers/intelac97.obj:DRIVERS/INTELAC97.OBJ:$(KERNEL)/drivers/intelac97.asm \ + drivers/tmpdisk.obj:DRIVERS/TMPDISK.OBJ:$(KERNEL)/drivers/tmpdisk.asm \ + drivers/vt823x.obj:DRIVERS/VT823X.OBJ:$(KERNEL)/drivers/vt823x.asm \ + File|Managers/kfar:File|Managers/KFAR:$(PROGS)/fs/kfar/trunk/kfar.asm \ + File|Managers/kfm:File|Managers/KFM:$(PROGS)/fs/kfm/trunk/kfm.asm \ + File|Managers/opendial:File|Managers/OPENDIAL:$(PROGS)/fs/opendial/opendial.asm \ + games/15:GAMES/15:$(PROGS)/games/15/trunk/15.ASM \ + games/arcanii:GAMES/ARCANII:$(PROGS)/games/arcanii/trunk/arcanii.asm \ + games/freecell:GAMES/FREECELL:$(PROGS)/games/freecell/freecell.asm \ + games/gomoku:GAMES/GOMOKU:$(PROGS)/games/gomoku/trunk/gomoku.asm \ + games/invaders:GAMES/INVADERS:$(PROGS)/games/invaders/invaders.asm \ + games/klavisha:GAMES/KLAVISHA:$(PROGS)/games/klavisha/trunk/klavisha.asm \ + games/lines:GAMES/LINES:$(PROGS)/games/lines/lines.asm \ + games/mblocks:GAMES/MBLOCKS:$(PROGS)/games/mblocks/trunk/mblocks.asm \ + games/msquare:GAMES/MSQUARE:$(PROGS)/games/MSquare/trunk/MSquare.asm \ + games/phenix:GAMES/PHENIX:$(PROGS)/games/phenix/trunk/phenix.asm \ + games/pipes:GAMES/PIPES:$(PROGS)/games/pipes/pipes.asm \ + games/pong:GAMES/PONG:$(PROGS)/games/pong/trunk/pong.asm \ + games/pong3:GAMES/PONG3:$(PROGS)/games/pong3/trunk/pong3.asm \ + games/rsquare:GAMES/RSQUARE:$(PROGS)/games/rsquare/trunk/rsquare.asm \ + games/soko:GAMES/SOKO:$(PROGS)/games/soko/trunk/SOKO.ASM \ + games/snake:GAMES/SNAKE:$(PROGS)/games/snake/trunk/snake.asm \ + games/sq_game:GAMES/SQ_GAME:$(PROGS)/games/sq_game/trunk/SQ_GAME.ASM \ + games/sudoku:GAMES/SUDOKU:$(PROGS)/games/sudoku/trunk/sudoku.asm \ + games/sw:GAMES/SW:$(PROGS)/games/sw/trunk/sw.asm \ + games/tanks:GAMES/TANKS:$(PROGS)/games/tanks/trunk/tanks.asm \ + games/tetris:GAMES/TETRIS:$(PROGS)/games/tetris/trunk/tetris.asm \ + lib/archiver.obj:LIB/ARCHIVER.OBJ:$(PROGS)/fs/kfar/trunk/kfar_arc/kfar_arc.asm \ + lib/box_lib.obj:LIB/BOX_LIB.OBJ:$(PROGS)/develop/libraries/box_lib/trunk/box_lib.asm \ + lib/buf2d.obj:LIB/BUF2D.OBJ:$(PROGS)/develop/libraries/buf2d/trunk/buf2d.asm \ + lib/console.obj:LIB/CONSOLE.OBJ:$(PROGS)/develop/libraries/console/console.asm \ + lib/libgfx.obj:LIB/LIBGFX.OBJ:$(PROGS)/develop/libraries/libs-dev/libgfx/libgfx.asm \ + lib/libimg.obj:LIB/LIBIMG.OBJ:$(PROGS)/develop/libraries/libs-dev/libimg/libimg.asm \ + lib/libini.obj:LIB/LIBINI.OBJ:$(PROGS)/develop/libraries/libs-dev/libini/libini.asm \ + lib/libio.obj:LIB/LIBIO.OBJ:$(PROGS)/develop/libraries/libs-dev/libio/libio.asm \ + lib/network.obj:LIB/NETWORK.OBJ:$(PROGS)/develop/libraries/network/network.asm \ + lib/proc_lib.obj:LIB/PROC_LIB.OBJ:$(PROGS)/develop/libraries/proc_lib/trunk/proc_lib.asm \ + lib/cnv_png.obj:LIB/CNV_PNG.OBJ:$(PROGS)/media/zsea/plugins/png/cnv_png.asm \ + media/animage:MEDIA/ANIMAGE:$(PROGS)/media/animage/trunk/animage.asm \ + media/cdp:MEDIA/CDP:$(PROGS)/media/cdp/trunk/cdp.asm \ + media/kiv:MEDIA/KIV:$(PROGS)/media/kiv/trunk/kiv.asm \ + media/listplay:MEDIA/LISTPLAY:$(PROGS)/media/listplay/trunk/listplay.asm \ + media/midamp:MEDIA/MIDAMP:$(PROGS)/media/midamp/trunk/midamp.asm \ + media/palitra:MEDIA/PALITRA:$(PROGS)/media/palitra/trunk/palitra.asm \ + media/startmus:MEDIA/STARTMUS:$(PROGS)/media/startmus/trunk/STARTMUS.ASM \ + network/airc:NETWORK/AIRC:$(PROGS)/network/airc/trunk/airc.asm \ + network/arpstat:NETWORK/ARPSTAT:$(PROGS)/network/arpstat/trunk/arpstat.asm \ + network/chess:NETWORK/CHESS:$(PROGS)/network/chess/trunk/chess.asm \ + network/downloader:NETWORK/DOWNLOADER:$(PROGS)/network/downloader/trunk/downloader.asm \ + network/ethstat:NETWORK/ETHSTAT:$(PROGS)/network/ethstat/trunk/ethstat.asm \ + network/ftps:NETWORK/FTPS:$(PROGS)/network/ftps/trunk/FTPS.ASM \ + network/https:NETWORK/HTTPS:$(PROGS)/network/https/trunk/https.asm \ + network/nntpc:NETWORK/NNTPC:$(PROGS)/network/nntpc/trunk/nntpc.asm \ + network/nslookup:NETWORK/NSLOOKUP:$(PROGS)/develop/libraries/network/examples/nslookup.asm \ + network/popc:NETWORK/POPC:$(PROGS)/network/popc/trunk/popc.asm \ + network/smtps:NETWORK/SMTPS:$(PROGS)/network/smtps/trunk/smtps.asm \ + network/stackcfg:NETWORK/STACKCFG:$(PROGS)/network/stackcfg/trunk/stackcfg.asm \ + network/telnet:NETWORK/TELNET:$(PROGS)/network/telnet/trunk/telnet.asm \ + network/tftpc:NETWORK/TFTPC:$(PROGS)/network/tftpc/trunk/tftpc.asm \ + network/VNCclient:NETWORK/VNCclient:$(PROGS)/network/VNCclient/VNCclient.asm \ + network/ym:NETWORK/YM:$(PROGS)/network/ym/trunk/ym.asm \ + network/zeroconf:NETWORK/ZEROCONF:$(PROGS)/network/zeroconf/trunk/zeroconf.asm \ +# end of list +# The list of all FASM programs with one main FASM file for CD image. +# Format of an item is exactly the same as in the previous list. +FASM_PROGRAMS_CD:=\ + drivers/atikms:DRIVERS/ATIKMS:$(REPOSITORY)/drivers/video/drm/radeon/atikms.asm \ +# end of list + +# The list of all FASM programs which needs to be compiled without KPACKing. +FASM_NOKPACK_PROGRAMS:=\ + distr_data/9x2klbr.exe:-:$(PROGS)/hd_load/9x2klbr/9x2klbr.asm \ + distr_data/MeOSload.com:-:$(PROGS)/hd_load/meosload/MeOSload.asm \ + distr_data/mtldr:-:$(PROGS)/hd_load/mtldr/mtldr.asm \ + mtldr_for_installer:-:$(PROGS)/hd_load/mtldr_install/mtldr_code/mtldr.asm \ + distr_data/mtldr_install.exe:-:$(PROGS)/hd_load/mtldr_install/mtldr_install.asm \ + distr_data/MeOSload_for_usb_boot_old.com:-:$(PROGS)/hd_load/usb_boot_old/MeOSload.asm \ + distr_data/enable_for_usb_boot_old.exe:-:$(PROGS)/hd_load/usb_boot_old/enable.asm \ + distr_data/BOOT_F32.BIN:-:$(PROGS)/hd_load/usb_boot/BOOT_F32.ASM \ + distr_data/MTLD_F32:-:$(PROGS)/hd_load/usb_boot/mtldr.asm \ + distr_data/inst.exe:-:$(PROGS)/hd_load/usb_boot/inst.asm \ + distr_data/setmbr.exe:-:$(PROGS)/hd_load/usb_boot/setmbr.asm \ +#end of list + +# The list of all NASM programs with one main NASM file. +# Format of an item is exactly the same as in the previous list. +NASM_PROGRAMS:=\ + demos/aclock:DEMOS/ACLOCK:$(PROGS)/demos/aclock/trunk/aclock.asm \ + games/c4:GAMES/C4:$(PROGS)/games/c4/trunk/c4.asm \ +# end of list + +# The list of files which should be copied from somewhere. +# Format of an item is exactly the same as in the previous list. +COPY_FILES:=\ + macros.inc:MACROS.INC:$(PROGS)/macros.inc \ + config.inc:CONFIG.INC:$(PROGS)/config.inc \ + struct.inc:STRUCT.INC:$(PROGS)/struct.inc \ + develop/te_icon.png:DEVELOP/TE_ICON.PNG:$(PROGS)/other/t_edit/te_icon.png \ + develop/tl_nod_16.png:DEVELOP/TL_NOD_16.PNG:$(PROGS)/other/t_edit/tl_nod_16.png \ + develop/tl_sys_16.png:DEVELOP/TL_SYS_16.PNG:$(PROGS)/media/log_el/trunk/tl_sys_16.png \ + develop/t_edit.ini:DEVELOP/T_EDIT.INI:$(PROGS)/other/t_edit/t_edit.ini \ + File|Managers/z_icons.png:File|Managers/Z_ICONS.PNG:$(PROGS)/fs/opendial/z_icons.png \ + File|Managers/kfm_keys.txt:File|Managers/KFM_KEYS.TXT:$(PROGS)/fs/kfm/trunk/docs/english/kfm_keys.txt \ + File|Managers/buttons.bmp:File|Managers/BUTTONS.BMP:$(PROGS)/fs/kfm/trunk/buttons.bmp \ + File|Managers/icons.bmp:File|Managers/ICONS.BMP:$(PROGS)/fs/kfm/trunk/icons.bmp \ + fonts/litt.chr:FONTS/LITT.CHR:$(PROGS)/demos/bgitest/trunk/FONTS/LITT.CHR \ + games/snake.ini:GAMES/SNAKE.INI:$(PROGS)/games/snake/trunk/snake.ini \ + games/skin.raw:GAMES/SKIN.RAW:$(PROGS)/games/soko/trunk/SKIN.RAW \ + games/soko-4.lev:GAMES/SOKO-4.LEV:$(PROGS)/games/soko/trunk/SOKO-4.LEV \ + games/soko-5.lev:GAMES/SOKO-5.LEV:$(PROGS)/games/soko/trunk/SOKO-5.LEV \ + games/soko-6.lev:GAMES/SOKO-6.LEV:$(PROGS)/games/soko/trunk/SOKO-6.LEV \ + games/soko-7.lev:GAMES/SOKO-7.LEV:$(PROGS)/games/soko/trunk/SOKO-7.LEV \ + games/soko-8.lev:GAMES/SOKO-8.LEV:$(PROGS)/games/soko/trunk/SOKO-8.LEV \ + games/soko-9.lev:GAMES/SOKO-9.LEV:$(PROGS)/games/soko/trunk/SOKO-9.LEV \ + media/kiv.ini:MEDIA/KIV.INI:$(PROGS)/media/kiv/trunk/kiv.ini \ + .shell:.shell:$(PROGS)/system/shell/bin/eng/.shell \ + mykey.ini:MYKEY.INI:$(PROGS)/system/MyKey/trunk/mykey.ini \ +# end of list + +# The list of all C-- programs with one main C-- file. +# Format of an item is exactly the same as in the previous list, +# except that there can be fourth field with parameters for a compiler. +CMM_PROGRAMS:=\ + File|Managers/eolite:File|Managers/EOLITE:$(PROGS)/cmm/eolite/Eolite.c \ + games/clicks:GAMES/CLICKS:$(PROGS)/games/clicks/trunk/clicks.c \ + games/FindNumbers:GAMES/FindNumbers:$(PROGS)/games/FindNumbers/trunk/FindNumbers.c-- \ + games/flood-it:GAMES/flood-it:$(PROGS)/games/flood-it/trunk/flood-it.c \ + games/mine:GAMES/MINE:$(PROGS)/games/mine/trunk/mine.c--:/MEOS \ + HTMLv:HTMLv:$(PROGS)/cmm/browser/HTMLv.c \ + tmpdisk:tmpdisk:$(PROGS)/cmm/tmpdisk/tmpdisk.c \ + @notify:@notify:$(PROGS)/cmm/notify/notify.c \ + @rb:@rb:$(PROGS)/cmm/rb/rb.c \ +#develop/c--:DEVELOP/C--:$(PROGS)/develop/c--/trunk/32.c-- \ +# end of list + +# List of other files to be included in the image file. +# Some of them are auto-built with special rules, some just exist before build. +# Each item is of the form :. +# Spaces should be represented as |. +OTHER_FILES:=autorun.dat:AUTORUN.DAT \ + default.skn:DEFAULT.SKN \ + graph:GRAPH hdread:HDREAD \ + icons.dat:ICONS.DAT iconstrp.png:ICONSTRP.PNG index_htm:INDEX.HTM \ + kernel.mnt:KERNEL.MNT kerpack:KERPACK keymap.key:KEYMAP.KEY \ + kuzkina.mid:KUZKINA.MID lang.inc:LANG.INC lang.ini:LANG.INI \ + menu.dat:MENU.DAT \ + panel.ini:PANEL.INI setup.dat:SETUP.DAT \ + shell:SHELL table:TABLE \ + vmode:VMODE 3d/3dsheart:3D/3DSHEART \ + 3d/cubeline:3D/CUBELINE 3d/gears:3D/GEARS 3d/house.3ds:3D/HOUSE.3DS \ + demos/ak47.lif:DEMOS/AK47.LIF \ + demos/relay.lif:DEMOS/RELAY.LIF demos/rpento.lif:DEMOS/RPENTO.LIF \ + demos/use_mb:DEMOS/USE_MB \ + File|Managers/eolite.ini:File|Managers/EOLITE.INI \ + File|Managers/icons.ini:File|Managers/ICONS.INI \ + File|Managers/kfar.ini:File|Managers/KFAR.INI \ + File|Managers/kfm.ini:File|Managers/KFM.INI \ + games/checkers:GAMES/CHECKERS \ + games/reversi:GAMES/REVERSI games/rforces:GAMES/RFORCES \ + games/xonix:GAMES/XONIX games/megamaze:GAMES/MEGAMAZE \ + games/kosilka:GAMES/KOSILKA \ + lib/msgbox.obj:LIB/MSGBOX.OBJ \ + lib/pixlib.obj:LIB/PIXLIB.OBJ lib/sort.obj:LIB/SORT.OBJ \ + media/ac97snd:MEDIA/AC97SND \ + media/ImgF/ImgF:MEDIA/ImgF/ImgF \ + media/ImgF/cEdg.obj:MEDIA/ImgF/cEdg.obj \ + media/ImgF/dither.obj:MEDIA/ImgF/dither.obj \ + media/ImgF/invSol.obj:MEDIA/ImgF/invSol.obj \ + network/jmail:NETWORK/JMAIL network/zeroconf.ini:NETWORK/ZEROCONF.INI \ +#end of list + +# Generate skins list understandable by gnu make +Makefile.skins: $(REPOSITORY)/skins/authors.txt $(REPOSITORY)/data/generate_makefile_skins.sh + cut -f1 $< | $(SHELL) $(REPOSITORY)/data/generate_makefile_skins.sh > $@ +include Makefile.skins + +# Extra targets for the distribution kit and LiveCD image in the syntax of mkisofs +EXTRA:=\ + emu/e80/e80=e80 \ + emu/dosbox/=$(PROGS)/emulator/DosBox/dosbox \ + emu/dosbox/=$(PROGS)/emulator/DosBox/dosbox.conf \ + emu/dosbox/=$(PROGS)/emulator/DosBox/readme.txt \ + /=distr_data/autorun.inf \ + /=distr_data/KolibriOS_icon.ico \ + Skins/=$(REPOSITORY)/skins/authors.txt \ + Docs/config.txt=docs/CONFIG.TXT \ + Docs/copying.txt=docs/COPYING.TXT \ + Docs/hot_keys.txt=docs/HOT_KEYS.TXT \ + Docs/install.txt=docs/INSTALL.TXT \ + Docs/readme.txt=docs/README.TXT \ + Docs/stack.txt=docs/STACK.TXT \ + Docs/sysfuncs.txt=docs/SYSFUNCS.TXT \ + HD_Load/9x2klbr/=distr_data/9x2klbr.exe \ + HD_Load/9x2klbr/=../common/HD_load/9x2klbr/LDKLBR.VXD \ + HD_Load/9x2klbr/=$(PROGS)/hd_load/9x2klbr/readme.txt \ + HD_Load/MeOSLoad/=distr_data/MeOSload.com \ + HD_Load/MeOSLoad/=$(PROGS)/hd_load/meosload/AUTOEXEC.BAT \ + HD_Load/MeOSLoad/=$(PROGS)/hd_load/meosload/CONFIG.SYS \ + HD_Load/MeOSLoad/=$(PROGS)/hd_load/meosload/L_readme.txt \ + HD_Load/MeOSLoad/=$(PROGS)/hd_load/meosload/L_readme_Win.txt \ + HD_Load/mtldr/=distr_data/mtldr \ + HD_Load/mtldr/install.txt=$(PROGS)/hd_load/mtldr/install_eng.txt \ + HD_Load/mtldr/=$(PROGS)/hd_load/mtldr/vista_install.bat \ + HD_Load/mtldr/=$(PROGS)/hd_load/mtldr/vista_remove.bat \ + HD_Load/=distr_data/mtldr_install.exe \ + HD_Load/memdisk=../common/HD_load/memdisk \ + HD_Load/USB_Boot/=distr_data/BOOT_F32.BIN \ + HD_Load/USB_Boot/=distr_data/MTLD_F32 \ + HD_Load/USB_Boot/=distr_data/inst.exe \ + HD_Load/USB_Boot/=distr_data/setmbr.exe \ + HD_Load/USB_Boot/readme.txt=$(PROGS)/hd_load/usb_boot/readme_eng.txt \ + HD_Load/USB_boot_old/=$(PROGS)/hd_load/usb_boot_old/usb_boot.rtf \ + HD_Load/USB_boot_old/=$(PROGS)/hd_load/usb_boot_old/usb_boot_866.txt \ + HD_Load/USB_boot_old/=$(PROGS)/hd_load/usb_boot_old/usb_boot_1251.txt \ + HD_Load/USB_boot_old/MeOSload.com=distr_data/MeOSload_for_usb_boot_old.com \ + HD_Load/USB_boot_old/enable.exe=distr_data/enable_for_usb_boot_old.exe \ + games/=../common/games \ + games/fara=games/fara \ + games/soko/soko=games/soko \ +#end of list +DISTRIBUTION_EXTRA:=\ + $(EXTRA) \ + /readme.txt=distr_data/readme_distr.txt \ +#end of list +MKISOFS_EXTRA:=\ + $(EXTRA) \ + /=distr_data/readme.txt \ +#end of list + +# Some macro for convenient work. +# Macros for replacing '|' to escaped space '\ '. +space:=\ #plus space +respace=$(subst |,$(space),$(1)) +# Macro for selecting different parts of ':'-separated items. +binarypart=$(word 1,$(subst :, ,$(1))) +imagepart=$(word 2,$(subst :, ,$(1))) +sourcepart=$(word 3,$(subst :, ,$(1))) +parampart=$(word 4,$(subst :, ,$(1))) +# Get file names, possibly with spaces inside, from an item. +# Here $(f) is an item - in fact, macro argument. +fbinary=$(call respace,$(call binarypart,$(f))) +fimage=$(call respace,$(call imagepart,$(f))) +fsource=$(call respace,$(call sourcepart,$(f))) +fparam=$(call respace,$(call parampart,$(f))) + +# Define targets for image file. +# Join all the lists above. +targets_full:=$(COPY_FILES) $(FASM_PROGRAMS) $(NASM_PROGRAMS) $(OTHER_FILES) $(CMM_PROGRAMS) +# For each item in the united list call fbinary. +targets:=$(foreach f,$(targets_full),$(fbinary)) + +# Define a command for copying a file inside the image. +# mcopy_command is a macro with two parameters, +# local file name $(1) and image file name $(2). +# Note that spaces in these have to be escaped with backslashes. +mcopy_command=mcopy -moi $(BUILD_DIR)/kolibri.img $(1) ::$(2) +# Specialize a previous command for an item $(f) in one of lists. +mcopy_item_command=$(call mcopy_command,$(fbinary),$(fimage)) + +# Join all $(mcopy_item_command) for all items, +# append newline after each item. +# The first newline character after "define" line and +# the last newline character before "endef" line get away +# with define/endef, so we make three newline characters, +# that is two empty lines, in order to get one in $(newline). +define newline + + +endef +mcopy_all_items:=$(foreach f,$(targets_full),$(mcopy_item_command)$(newline)) + +# add skins to MKISOFS_EXTRA and DISTRIBUTION_EXTRA +allskins:=$(foreach f,$(SKIN_SOURCES),$(call imagepart,$(f))=$(call binarypart,$(f))) +MKISOFS_EXTRA:=$(MKISOFS_EXTRA) $(allskins) +DISTRIBUTION_EXTRA:=$(DISTRIBUTION_EXTRA) $(allskins) +# dependencies of MKISOFS_EXTRA; we iterate through $(MKISOFS_EXTRA), +# substitute "=" with space, get the 2nd word and join all results +mkisofs_extra_targets:=$(call respace,$(foreach f,$(MKISOFS_EXTRA),$(word 2,$(subst =, ,$(f))))) +distribution_extra_targets:=$(call respace,$(foreach f,$(DISTRIBUTION_EXTRA),$(word 2,$(subst =, ,$(f))))) + +# Define a command for creating a symlink for an item in DISTRIBUTION_EXTRA. +makelink_item_command=ln -sr $(word 2,$(subst =, ,$(f))) distribution_kit/$(word 1,$(subst =, ,$(f))) +# Join all $(makelink_command) for all items from DISTRIBUTION_EXTRA. +make_distribution_links:=$(foreach f,$(DISTRIBUTION_EXTRA),$(makelink_item_command)$(newline)) +# Define a command for creating all directories for DISTRIBUTION_EXTRA. +# Note that $(sort) removes duplicate entries. +distribution_dirs:=$(sort $(foreach f,$(DISTRIBUTION_EXTRA),$(dir distribution_kit/$(word 1,$(subst =, ,$(f)))))) +make_distribution_dirs:=$(foreach f,$(distribution_dirs),mkdir -p $(f)$(newline)) + +# The first goal: floppy image. +$(BUILD_DIR)/kolibri.img: $(BUILD_DIR)/.dir \ + Makefile \ + $(BUILD_DIR)/boot_fat12.bin \ + $(targets) +# SYSXTREE + str=`date -u +"[auto-build %d %b %Y %R, r$(REV)]"`; \ + echo -n $$str|dd of=kernel.mnt bs=1 seek=`expr 279 - length "$$str"` conv=notrunc 2>/dev/null + dd if=/dev/zero of=$(BUILD_DIR)/kolibri.img count=2880 bs=512 2>&1 + mformat -f 1440 -i $(BUILD_DIR)/kolibri.img :: + dd if=$(BUILD_DIR)/boot_fat12.bin of=$(BUILD_DIR)/kolibri.img count=1 bs=512 conv=notrunc 2>&1 + mmd -i $(BUILD_DIR)/kolibri.img ::3D + mmd -i $(BUILD_DIR)/kolibri.img ::DEMOS + mmd -i $(BUILD_DIR)/kolibri.img ::DEVELOP + mmd -i $(BUILD_DIR)/kolibri.img ::DEVELOP/INFO + mmd -i $(BUILD_DIR)/kolibri.img ::DRIVERS + mmd -i $(BUILD_DIR)/kolibri.img ::File\ Managers + mmd -i $(BUILD_DIR)/kolibri.img ::FONTS + mmd -i $(BUILD_DIR)/kolibri.img ::GAMES + mmd -i $(BUILD_DIR)/kolibri.img ::LIB + mmd -i $(BUILD_DIR)/kolibri.img ::MEDIA + mmd -i $(BUILD_DIR)/kolibri.img ::MEDIA/ImgF + mmd -i $(BUILD_DIR)/kolibri.img ::NETWORK + $(mcopy_all_items) + +# The second goal: LiveCD image. +$(BUILD_DIR)/kolibri.iso: $(BUILD_DIR)/kolibri.img $(mkisofs_extra_targets) + mkisofs -U -J -pad -b kolibri.img -c boot.catalog -hide-joliet boot.catalog -graft-points \ + -A "KolibriOS AutoBuilder" -p "CleverMouse" -publisher "KolibriOS Team" -V "KolibriOS r$(REV)" -sysid "KOLIBRI" \ + -iso-level 3 -o $(BUILD_DIR)/kolibri.iso $(BUILD_DIR)/kolibri.img $(call respace,$(MKISOFS_EXTRA)) 2>&1 + +# The third goal: distribution list. +$(BUILD_DIR)/distr.lst: $(BUILD_DIR)/kolibri.img $(distribution_extra_targets) + rm -rf distribution_kit + $(call respace,$(make_distribution_dirs)) + ln -sr $(BUILD_DIR)/kolibri.img distribution_kit/kolibri.img + $(call respace,$(make_distribution_links)) + touch $(BUILD_DIR)/distr.lst + +# Special targets to modify behaviour of make. +.DELETE_ON_ERROR: +.SUFFIXES: # delete all predefined rules + +# The floppy bootsector. +$(BUILD_DIR)/boot_fat12.bin: $(KERNEL)/bootloader/boot_fat12.asm $(KERNEL)/bootloader/floppy1440.inc + fasm $(KERNEL)/bootloader/boot_fat12.asm $(BUILD_DIR)/boot_fat12.bin + +$(BUILD_DIR)/.dir 3d/.dir demos/.dir develop/.dir develop/info/.dir drivers/.dir fonts/.dir \ + games/.dir lib/.dir media/.dir network/.dir allskins/.dir distr_data/.dir .deps/.dir: + mkdir -p $(dir $@) + touch $@ +develop/info/.dir: develop/.dir +File\ Managers/.dir: + mkdir -p "File Managers" + touch "File Managers/.dir" + +# extra dependency for mtldr_install.exe +distr_data/mtldr_install.exe: mtldr_for_installer + +# FASM black magic goes to Makefile.fasm. +include Makefile.fasm + +# Similar for NASM. +include Makefile.nasm + +# Similar for copying files. +include Makefile.copy + +# Special rules for copying sysfuncs.txt - it isn't directly included in the image. +docpack: $(DOCDIR)SYSFUNCS.TXT +$(DOCDIR)SYSFUNCS.TXT: $(KERNEL)/docs/sysfuncs.txt + cp $(KERNEL)/docs/sysfuncs.txt $(DOCDIR)SYSFUNCS.TXT + +# Similar for C--. +include Makefile.cmm + +# Sorry, even black magic seems to be insufficient for +# auto-handling all subtle effects. So we just define +# command lines for compiling and linking, and +# maintain the list of sources and objects by hand. +include Makefile.msvc + +# Rules for table +table: .obj.table/table.exe + $(msvc_final) +TABLE_OBJECTS:=.obj.table/calc.obj .obj.table/func.obj .obj.table/hello.obj \ + .obj.table/KosFile.obj .obj.table/kosSyst.obj .obj.table/math2.obj \ + .obj.table/mcsmemm.obj .obj.table/parser.obj +TABLE_H_FILES:=$(wildcard $(PROGS)/other/table/*.h) +.obj.table/table.exe: $(TABLE_OBJECTS) + $(msvc_link) +$(TABLE_OBJECTS): .obj.table/%.obj: $(PROGS)/other/table/%.cpp $(TABLE_H_FILES) Makefile.msvc | .obj.table + $(msvc_compile) +.obj.table: + mkdir -p .obj.table + +# Rules for graph +graph: .obj.graph/graph.exe + $(msvc_final) +GRAPH_CPP_OBJECTS:=.obj.graph/func.obj .obj.graph/hello.obj .obj.graph/kolibri.obj \ + .obj.graph/KosFile.obj .obj.graph/kosSyst.obj .obj.graph/math2.obj \ + .obj.graph/mcsmemm.obj .obj.graph/parser.obj +GRAPH_C_OBJECTS:=.obj.graph/string.obj +GRAPH_H_FILES:=$(wildcard $(PROGS)/other/graph/*.h) +GRAPH_FASM_OBJECTS:=.obj.graph/memcpy.obj .obj.graph/memset.obj +.obj.graph/graph.exe: $(GRAPH_CPP_OBJECTS) $(GRAPH_C_OBJECTS) $(GRAPH_FASM_OBJECTS) + $(msvc_link) +$(GRAPH_CPP_OBJECTS): .obj.graph/%.obj: $(PROGS)/other/graph/%.cpp $(GRAPH_H_FILES) Makefile.msvc | .obj.graph + $(msvc_compile) +$(GRAPH_C_OBJECTS): .obj.graph/%.obj: $(PROGS)/other/graph/%.c $(GRAPH_H_FILES) Makefile.msvc | .obj.graph + $(msvc_compile) +$(GRAPH_FASM_OBJECTS): .obj.graph/%.obj: $(PROGS)/other/graph/%.asm Makefile.msvc | .obj.graph + fasm $< $@ +.obj.graph: + mkdir -p .obj.graph + +# Rules for kosilka +games/kosilka: .obj.kosilka/kosilka.exe + $(msvc_final) +KOSILKA_OBJECTS:=.obj.kosilka/kosilka.obj .obj.kosilka/KosFile.obj .obj.kosilka/kosSyst.obj .obj.kosilka/mcsmemm.obj +KOSILKA_H_FILES:=$(PROGS)/games/kosilka/*.h +.obj.kosilka/kosilka.exe: $(KOSILKA_OBJECTS) + $(msvc_link) +$(KOSILKA_OBJECTS): .obj.kosilka/%.obj: $(PROGS)/games/kosilka/%.cpp $(KOSILKA_H_FILES) Makefile.msvc | .obj.kosilka + $(msvc_compile) +.obj.kosilka: + mkdir -p .obj.kosilka + +include Makefile.gcc + +# Rules for shell +shell: .obj.shell/start.o .obj.shell/shell.o .obj.shell/kolibri.o .obj.shell/stdlib.o .obj.shell/string.o .obj.shell/ctype.o \ + $(PROGS)/system/shell/kolibri.ld + $(call gcc_link,$(PROGS)/system/shell/kolibri.ld) +.obj.shell/shell.o: $(PROGS)/system/shell/shell.c \ + $(PROGS)/system/shell/all.h \ + $(PROGS)/system/shell/system/*.h \ + $(PROGS)/system/shell/cmd/*.c \ + $(PROGS)/system/shell/modules/*.c \ + $(PROGS)/system/shell/locale/rus/globals.h \ + Makefile.gcc | .obj.shell + $(gcc_compile) +.obj.shell/kolibri.o .obj.shell/stdlib.o .obj.shell/string.o .obj.shell/ctype.o: .obj.shell/%.o: \ + $(PROGS)/system/shell/system/%.c $(PROGS)/system/shell/system/*.h \ + Makefile.gcc | .obj.shell + $(gcc_compile) + win32-gcc -c -Os -o $@ $< +.obj.shell/start.o: $(PROGS)/system/shell/start.asm | .obj.shell + fasm $< $@ +.obj.shell: + mkdir -p .obj.shell + +# Rules for e80 +E80DIR=$(PROGS)/emulator/e80/trunk +e80: .obj.e80/start.o .obj.e80/kolibri.o .obj.e80/stdlib.o .obj.e80/string.o .obj.e80/z80.o .obj.e80/e80.o + $(call gcc_link,$(E80DIR)/kolibri.ld) +.obj.e80/e80.o: $(E80DIR)/e80.c $(E80DIR)/48.h \ + $(E80DIR)/system/*.h $(E80DIR)/system/msgbox.c \ + $(E80DIR)/z80/z80.h Makefile.gcc | .obj.e80 + $(gcc_compile) +.obj.e80/kolibri.o .obj.e80/stdlib.o .obj.e80/string.o: .obj.e80/%.o: \ + $(E80DIR)/system/%.c $(E80DIR)/system/*.h Makefile.gcc | .obj.e80 + $(gcc_compile) +.obj.e80/z80.o: $(E80DIR)/z80/z80.c $(E80DIR)/z80/* + $(gcc_compile) +.obj.e80/start.o: $(E80DIR)/asm_code.asm | .obj.e80 + fasm $< $@ +.obj.e80: + mkdir -p .obj.e80 + +# Rules for sdk/sound, used by media/ac97snd +SOUNDDIR=$(PROGS)/develop/sdk/trunk/sound/src +SOUND_OBJECTS:=$(patsubst $(SOUNDDIR)/%.asm,.sdk/%.obj,$(wildcard $(SOUNDDIR)/*.asm)) +SOUND_INC_FILES:=$(wildcard $(SOUNDDIR)/*.inc) +.sdk/sound.lib: $(SOUND_OBJECTS) + win32-link /lib /out:$@ $^ +$(SOUND_OBJECTS): .sdk/%.obj: $(SOUNDDIR)/%.asm $(SOUND_INC_FILES) | .sdk + fasm $< $@ +.sdk: + mkdir -p .sdk +# Rules for media/ac97snd +AC97DIR=$(PROGS)/media/ac97snd +media/ac97snd: .obj.ac97snd/ac97snd.exe + $(msvc_final) +.obj.ac97snd/ac97snd.exe: .obj.ac97snd/ac97wav.obj .obj.ac97snd/crt.obj .obj.ac97snd/k_lib.obj \ + .obj.ac97snd/mpg.lib .sdk/sound.lib .obj.ac97snd/ufmod.obj + $(msvc_link) +.obj.ac97snd/ac97wav.obj: $(AC97DIR)/ac97snd/ac97wav.c \ + $(AC97DIR)/kolibri.h $(AC97DIR)/ac97snd/ac97wav.h $(AC97DIR)/mpg/mpg123.h \ + $(AC97DIR)/sound.h $(AC97DIR)/ufmod-codec.h Makefile.msvc | .obj.ac97snd + $(msvc_compile) +.obj.ac97snd/crt.obj: $(AC97DIR)/ac97snd/crt.c $(AC97DIR)/ac97snd/crt.h Makefile.msvc | .obj.ac97snd + $(msvc_compile) +.obj.ac97snd/k_lib.obj: $(AC97DIR)/ac97snd/k_lib.asm $(AC97DIR)/ac97snd/proc32.inc | .obj.ac97snd + fasm $< $@ +.obj.ac97snd/ufmod.obj: $(AC97DIR)/ufmod-config.asm | .obj.ac97snd + fasm $< $@ -s .deps/ac97snd-ufmod.fas + prepsrc .deps/ac97snd-ufmod.fas /dev/stdout | \ + perl -n -e 's|\\|/|g;s| |\\ |g;push @a,$$1 if/^;include\\ \x27(.*?)\x27/;' \ + -e 'END{$$a=join " \\\n ",@a;print "$@: $$a\n$$a:\n"}' > .deps/ac97snd-ufmod.Po +-include .deps/ac97snd-ufmod.Po +AC97SND_MPG_C_FILES:=$(wildcard $(AC97DIR)/mpg/*.c) +AC97SND_MPG_H_FILES:=$(wildcard $(AC97DIR)/mpg/*.h) +AC97SND_MPG_C_OBJECTS:=$(patsubst $(AC97DIR)/mpg/%.c,.obj.ac97snd/%.o,$(AC97SND_MPG_C_FILES)) +.obj.ac97snd/mpg.lib: $(AC97SND_MPG_C_OBJECTS) .obj.ac97snd/pow.obj + win32-link /lib /ltcg /out:$@ $^ +$(AC97SND_MPG_C_OBJECTS): .obj.ac97snd/%.o: $(AC97DIR)/mpg/%.c $(AC97SND_MPG_H_FILES) Makefile.msvc | .obj.ac97snd + $(msvc_compile) +.obj.ac97snd/pow.obj: $(AC97DIR)/mpg/pow.asm $(AC97DIR)/mpg/proc32.inc | .obj.ac97snd + fasm $< $@ +.obj.ac97snd: + mkdir -p .obj.ac97snd + +# Rules for atikms.dll +# Use Makefile from $(REPOSITORY)/drivers/ddk and $(REPOSITORY)/drivers/video/drm/radeon +# However, dependencies must be duplicated - I don't know how to avoid this +# without need to rebuild kolibri.img at every iteration... +# Note that we are going to write in the directory shared +# between all Makefiles, so we need locked operations. +drivers/atikms.dll: $(REPOSITORY)/drivers/video/drm/radeon/atikms.dll drivers/.dir + kpack --nologo $< $@ +$(REPOSITORY)/drivers/video/drm/radeon/atikms.dll: $(REPOSITORY)/drivers/video/drm/radeon/Makefile.lto + flock $(REPOSITORY)/drivers/video/drm/radeon/.lock \ + $(MAKE) CC=win32-gcc45 AS=win32-as LD=win32-ld AR=win32-ar FASM=fasm -C $(REPOSITORY)/drivers/video/drm/radeon -f Makefile.lto +$(REPOSITORY)/drivers/ddk/libddk.a: $(REPOSITORY)/drivers/ddk/Makefile + flock $(REPOSITORY)/drivers/ddk/.lock \ + $(MAKE) CC=win32-gcc45 AS=win32-as LD=win32-ld AR=win32-ar FASM=fasm -C $(REPOSITORY)/drivers/ddk libddk.a +$(REPOSITORY)/drivers/ddk/libcore.a: $(REPOSITORY)/drivers/ddk/Makefile + flock $(REPOSITORY)/drivers/ddk/.lock \ + $(MAKE) CC=win32-gcc45 AS=win32-as LD=win32-ld AR=win32-ar FASM=fasm -C $(REPOSITORY)/drivers/ddk libcore.a +# dependencies +$(REPOSITORY)/drivers/video/drm/radeon/atikms.dll: \ + $(REPOSITORY)/drivers/video/drm/radeon/atikms.lds \ + $(REPOSITORY)/drivers/ddk/libddk.a \ + $(REPOSITORY)/drivers/ddk/libcore.a \ + $(REPOSITORY)/drivers/video/drm/radeon/*.[Sch] \ + $(REPOSITORY)/drivers/video/drm/radeon/*.asm \ + $(REPOSITORY)/drivers/video/drm/radeon/Makefile \ + $(REPOSITORY)/drivers/video/drm/radeon/firmware/*.bin \ + $(REPOSITORY)/drivers/include/*.h \ + $(REPOSITORY)/drivers/include/*/*.h \ + $(REPOSITORY)/drivers/include/*/*/*.h \ + $(REPOSITORY)/drivers/include/*/*/*/*.h +$(REPOSITORY)/drivers/ddk/libddk.a: \ + $(REPOSITORY)/drivers/ddk/*/* \ + $(REPOSITORY)/drivers/include/*.h \ + $(REPOSITORY)/drivers/include/*/*.h \ + $(REPOSITORY)/drivers/include/*/*/*.h \ + $(REPOSITORY)/drivers/include/*/*/*/*.h +$(REPOSITORY)/drivers/ddk/libcore.a: \ + $(REPOSITORY)/drivers/ddk/core.S diff --git a/data/sp/Makefile.cmm b/data/sp/Makefile.cmm new file mode 100644 index 0000000000..561f7e49aa --- /dev/null +++ b/data/sp/Makefile.cmm @@ -0,0 +1,15 @@ +# This is similar to Makefile.fasm, look there for comments. +# No dependency tracking, so force dependencies on all files +# in dir/* and dir/*/* +# Also, we cannot set output file name and need to guess +# whether c-- has created .com file or no-extension file. +define cmm_meta_rule +$(1): $(2) Makefile.cmm $$(call respace,$$(addsuffix .dir,$(3))) \ + $$(wildcard $$(dir $(2))*) $$(wildcard $$(dir $(2))*/*) + flock $$(dir $(2)).lock -c '\ + (cd "$$(dir $(2))" && win32-c-- /D=AUTOBUILD /D=LANG_ENG $(5) $$(notdir $(2)) >&2) && \ + if [ -e $$(basename $$<) ]; then f=$$(basename $$<); else f=$$(basename $$<).com; fi && \ + kpack --nologo $$$$f "$$@" && rm $$$$f' +endef + +$(foreach f,$(CMM_PROGRAMS),$(eval $(call cmm_meta_rule,$(fbinary),$(fsource),$(binarydir),$(progname),$(fparam)))) diff --git a/data/sp/Makefile.copy b/data/sp/Makefile.copy new file mode 100644 index 0000000000..538ecb4ef6 --- /dev/null +++ b/data/sp/Makefile.copy @@ -0,0 +1,6 @@ +# This is similar to Makefile.fasm, look there for comments. +define copy_meta_rule +$(1): $(2) Makefile.copy $$(call respace,$$(addsuffix .dir,$(3))) + cp $$< "$$@" +endef +$(foreach f,$(COPY_FILES),$(eval $(call copy_meta_rule,$(fbinary),$(fsource),$(binarydir)))) diff --git a/data/sp/Makefile.fasm b/data/sp/Makefile.fasm new file mode 100644 index 0000000000..8f4c65dca9 --- /dev/null +++ b/data/sp/Makefile.fasm @@ -0,0 +1,60 @@ +# This is not a independent Makefile; it is auxiliary file +# included from main Makefile. +# It depends on the following variables and macro: +# $(FASM_PROGRAMS) is a list of all programs to build with FASM rule; +# $(binarypart) is a macro which converts from $(1)=item of $(FASM_PROGRAMS) +# to space-escaped full name of binary, $(respace) unescapes spaces; +# $(fbinary) and $(fsource) gives space-unescaped full name of binary +# and source (respectively) of $(f)=item of $(FASM_PROGRAMS). + +# Define the rule for all FASM programs. +# Yes, this looks like a black magic. +# But it is not so scary as it seems. +# First, we define "meta-rule" as a rule which is +# macro depending on $(fasmprog). +# Second, the construction foreach+eval creates +# usual rules, one for each $(fasmprog) in $(FASM_PROGRAMS). +# Note that meta-rule is double-expanded, first +# time as the arg of eval - it is the place where $(fasmprog) +# gets expanded - and second time as the rule; +# so all $ which are expected to expand at the second time should be escaped. +# And all $ which are expected to be expanded by the shell should be escaped +# twice, so they become $$$$. + +# The arguments of macro fasm_meta_rule: +# $(1) = name of binary file, +# $(2) = name of main source file. +# $(3) = folder of binary file - without spaces. +# $(4) = name of program - without path and extension, +define fasm_meta_rule +$(1): $(2) Makefile.fasm .deps/.dir $$(call respace,$$(addsuffix .dir,$(3))) + tmpfile=`mktemp --tmpdir build.XXXXXXXX` && \ + (fasm -m 65536 "$$<" "$$@" -s $$$$tmpfile && \ + fasmdep -e $$$$tmpfile > .deps/$(4).Po && \ + rm $$$$tmpfile) || (rm $$$$tmpfile; false) + kpack --nologo "$$@" +-include .deps/$(4).Po +endef + +define fasm_nokpack_meta_rule +$(1): $(2) Makefile.fasm .deps/.dir $$(call respace,$$(addsuffix .dir,$(3))) + tmpfile=`mktemp --tmpdir build.XXXXXXXX` && \ + (fasm -m 65536 "$$<" "$$@" -s $$$$tmpfile && \ + fasmdep -e $$$$tmpfile > .deps/$(4).Po && \ + rm $$$$tmpfile) || (rm $$$$tmpfile; false) +-include .deps/$(4).Po +endef + +progname=$(call respace,$(basename $(notdir $(call binarypart,$(f))))) +binarydir=$(subst ./,,$(dir $(call binarypart,$(f)))) +$(foreach f,$(FASM_PROGRAMS) $(FASM_PROGRAMS_CD) $(SKIN_SOURCES),$(eval $(call fasm_meta_rule,$(fbinary),$(fsource),$(binarydir),$(progname)))) +$(foreach f,$(FASM_NOKPACK_PROGRAMS),$(eval $(call fasm_nokpack_meta_rule,$(fbinary),$(fsource),$(binarydir),$(progname)))) + +# Rule for the kernel differs: it uses kerpack instead of kpack. +kernel.mnt: $(KERNEL)/kernel.asm Makefile.fasm .deps/.dir + tmpfile=`mktemp --tmpdir build.XXXXXXXX` && \ + (fasm -m 65536 "$<" "$@" -s $$tmpfile && \ + fasmdep -e $$tmpfile > .deps/kernel.Po && \ + rm $$tmpfile) || (rm $$tmpfile; false) + kerpack "$@" +-include .deps/kernel.Po diff --git a/data/sp/Makefile.gcc b/data/sp/Makefile.gcc new file mode 100644 index 0000000000..14ae973a61 --- /dev/null +++ b/data/sp/Makefile.gcc @@ -0,0 +1,8 @@ +define gcc_compile + win32-gcc -c -Os -DAUTOBUILD -DLANG_ENG=1 -o $@ $< +endef +define gcc_link + win32-ld -nostdlib -T $(1) -o "$@" $^ + win32-objcopy "$@" -O binary + kpack --nologo "$@" +endef diff --git a/data/sp/Makefile.msvc b/data/sp/Makefile.msvc new file mode 100644 index 0000000000..0902ceed22 --- /dev/null +++ b/data/sp/Makefile.msvc @@ -0,0 +1,13 @@ +define msvc_compile +win32-cl /c /O2 /Os /Oy /GF /GS- /GR- /EHs-c- /fp:fast /GL /QIfist /Gr /DAUTOBUILD /Fo$@ Z:$< >&2 +endef +define msvc_link +win32-link /section:.bss,E /fixed:no /subsystem:native \ +/merge:.data=.text /merge:.rdata=.text /merge:.1seg=.text \ +/entry:crtStartUp /out:$@ /ltcg /nodefaultlib \ +$(addprefix Z:,$^) >&2 +endef +define msvc_final +EXENAME=$< fasm doexe2.asm "$@" +kpack --nologo "$@" +endef diff --git a/data/sp/Makefile.nasm b/data/sp/Makefile.nasm new file mode 100644 index 0000000000..cb4714fd21 --- /dev/null +++ b/data/sp/Makefile.nasm @@ -0,0 +1,16 @@ +# This is similar to Makefile.fasm, look there for comments. +define nasm_meta_rule +.deps/$(4).Po: $(2) Makefile.nasm .deps/.dir + nasm -I$$(dir $(2)) -o "$(1)" -M $$< > .deps/$(4).Tpo 2>/dev/null; \ + if [ $$$$? -eq 0 ]; then perl -ln -e 'next unless $$$$_;' \ + -e 'm/((.*): )?(.*)/;$$$$a=$$$$2 if $$$$2;push @b,$$$$3;' \ + -e 'END{$$$$b=join "\n",@b;print "$$$$a .deps/$(4).Po: $$$$b\n$$$$b:"}' \ + .deps/$(4).Tpo > .deps/$(4).Po; fi + rm -f .deps/$(4).Tpo +$(1): $(2) Makefile.nasm $$(call respace,$$(addsuffix .dir,$(3))) + nasm -I$$(dir $(2)) -o "$$@" $$< + kpack --nologo "$$@" +-include .deps/$(4).Po +endef + +$(foreach f,$(NASM_PROGRAMS),$(eval $(call nasm_meta_rule,$(fbinary),$(fsource),$(binarydir),$(progname)))) diff --git a/data/sp/autorun.dat b/data/sp/autorun.dat new file mode 100644 index 0000000000..a53468d052 --- /dev/null +++ b/data/sp/autorun.dat @@ -0,0 +1,18 @@ +# Syntaxis is: +# Use "parameter value" for parameters with spaces. Use "" if no parameter is required. +# Delay time means how much the system should wait, before running the next line. It is measured in 1/100 seconds. +# If delay is negative, wait for termination of the spawned process. Otherwise, simply wait +# +#/RD/1/CROPFLAT "XS800 YS480" 1 # set limits of screen +#/RD/1/COMMOUSE "" 1 # COM mice detector +#/RD/1/DEVELOP/BOARD "" 1 # Load DEBUG board +#/RD/1/refrscrn "" 1 # Refresh screen +/RD/1/NETWORK/ZEROCONF "" 1 # Network configuration +/RD/1/MEDIA/PALITRA "H 007DCEDF 003C427F" 1 #SET BG +/RD/1/@PANEL "" 1 # Start panel +/RD/1/SETUP BOOT 1 # Load device settings +/RD/1/ICON BOOT 1 # Multithread icon +/RD/1/@RB "" 1 # Desktop right-click menu +/RD/1/@SS ASSM 1 # Screensaver +/RD/1/TMPDISK A1 1 # Add virtual RAM disk /tmp1/1 +### Hello, ASM World! ### diff --git a/data/sp/background.png b/data/sp/background.png new file mode 100644 index 0000000000000000000000000000000000000000..20d0f90f9c8563d584c1e682ad240eb77005ac07 GIT binary patch literal 365 zcmV-z0h0cSP)ySDe9y9M#Jq##j==55#q{H{?dsq5J6YY90002^ zNklp^@jz}O;?9I`r5plZA5eXJ$Oe+mzrD1ND zHB)w;7(4i2Zre&6951K0000%#gZwsj&&}CIeQq_5y2l4A4O>G0GKu;$y2TLliSq~ zW+!gUqqXs333l^#LqFk__MVQ+AdN)I&j-1FHe$(%`%O7(A+QBMg5%Ej0y^($hehSc zbcl@(I8wDBr1qeS3)E~kl3pQZOv|HV?QU*WrSl$aj^?YrYg%v72f64f`L9S8IAKTXqKF>hh{j=tK$& z)@_Fe?RA~mfnvLDY64uGWvDa7A5MPLpqw2V8y)X9WHE*v0v zac|Y2XBdaB+|Nwz<Ch-_rr`~?1obos7#Jqp8^ncF7&0j@9`rdW1F{x!%AFOyfDd?of&{{P5!mAc{iSM z@C*BQK=&}l-3qDb2}|!bRR8@cd<&!^L1%#){hy$&_xpTH;cQfjORfT;eQY3qGZ!&@ z1Wb&`SB8@Z;|uF_wD$exzaHQtZHf34&}BtnaG2s>){?_VNk{nPX!HCjETXBH4`JQ` zJ2qQ$D$`%r6QM1G;Fh6l#l@%UJuF zm3$z$z_bQc=2vIT$49xBq+$4dp^GnXFT@Rv)UF5kBy33Kp0KCsNLs42*6jWd8e~if z&KS=4=C4Cs2U8_{YlIeNuGi}xUROMO1hGe^3N)}larB;Gc)9YywT}GBvLY>dEeuS} zp7+~`$*D?sZRGnObJ+CS0F{SyG}LIh1yi3l?>iPU0BEeLcUBt{MDM?JyZB6eYPSmg zZTP<^#{EGvr5XN)@RUIMe(=}&Cm332e2jp5NEvGBc5*Iss2;NrZMByf+TbB;n5m6@ zU`Z~2>A{&oyAi%`I`Px6E+#auGZ=ZM)81mw`S$nKGJ?XaladaxwZk&TSnt&oodOyj zU1kY5TKO5y1=|IB$0lI>HHFmfZ|r3=q0!n1@;L0Qsv!M*y#FO`Zq6u!3zwSoM3Q7M z&qM2WupBw4KrKo}ss8Y0m|2PM{I-LEl-V7L`xB~CcVWSp8v3I06b~LJ@^de?eEw6g z$Rw~!wp;-&y0UV0^@g7!kB^S#BA6|VL`rbBJK~XLTMN{;^7jIeCdM~n{*IQH2A;%F zhI2K!NXm!bsMsWzRn6^b&4*L5S+OLgiIw5H4MCe~s)Umuqkh;z#HIcp8m!P!WReX3 z596_3L^thrNa>`01TA0aq#|_l8KOVUm@Pyo~JnW|AXI~BWK z28;Ay;>A!q&TS;`mkJf?6j^`g%N~8j?D7k+_<_9joW3is<&3{|2NKd{mwPOTBzUh3 z(!OPopcQ;^m|Lslh0n;~Ce0h#oYF*a{Hc_Z0ijE1+7BZEkq}v@7&mp=Ah$*PoDWV* zE#1VtZ89b@V%Do6i%?beOyq38nCe10*%|3rMB4ivy({iEMJ|wfW(-EmAW7&*ZG-r| z@DSov);{oEjcZKon4nuSl(a1@`9j0rx@)8s`>6<%+;!qi7akMG2!s4BFw?xST?fqD zw45b*W||UtKRQMu1U@mhF*QTmg z#8vWnUa5iwHjjwL|8!mLXvrlw_J);ja%9G&+T^0*!T6g5p?!^M^nR;!!icgmCfvHu4mT%(>X2;c#m@#aHpCD9;@(z2x$|D|oiBO)|piAm@w zobyIGbl_n?3d^j)r7!=B^un3l!ikw6Ei2*I;b$YG0obHcV8DocI9S`bH$JXr6&1Sb zPL7PN!~A*DxFQPY{ygYcZG>q7xn{PS*j9|nG8MA&RJM(Nt%q$vmwX1Tp!!Ga0ugBQ z?)H*6Hb4?%nvquQxJ(Y32%cF|PUz*yGO&POiujzr&gq7)m$k4t&3hiPqcsGPfVgDu z-vo5Zmw`Lg%~C~px$9ojsz-v;HLT%^t3qv?Z+>Ye(MroRq>xXnc~VcnS-2wfx__HmHsQZ|THE?qoEg9Xa03yO1VR){jL7~C&P24b2zNY;h0&Gu69 zA~+S!KYTW1?PsD%p=S%xJl@3n>A9>T)g5ms|&SBK!G8`04&DsgqiFP$eXQ{0qd zfQ6zI1M3Cfwu7dNvPe3~I3QTO(XlP9%jleOoXwPGp;KOidKGi!!1Avy z_Z`omAa@e?e@=z1O}!9pE3yK;1bZYDVO}p9k;sv0p|B*GojC3IMi$Y+{hH;d?JQac z&2x=^_maF@=oxcPRBmvN@c@;$!xud)R}%&EOsXn%jG``4nHOrmco`r_mA2owyk?j$ z_b!9y6)i-H(L958$~uIgzLO%1e6(pe$?s(AjFSaFjIdGu*Z?y|AX<|-H`AwOHPRF}Yf-Kvm>Z5rk)!>OJL!M`QmW#My&9sFO(8 zq`w${b82cXS)c#EYPmgl2%B6|0$$BnVC?6i2wy^5tT|4;X-SG=Zb?bqrlRpZBRLJ& zYQh$XZ5C(O8qL}AF=`~dGsCGbe2ebFC|y!3qC0y(+4PB>DW!R1@8c$@mtqEO9ZmosbS zCy82~8HqG@m7&)0Tz$|_$&uLn@6$2TkI-e;`3$?is#g4p`znuok@Ma{v9t%j%jCJ^({0-~yqM-$>3x055q)j~dmu zYzfjEOW0HU-_32BVRe=&B63rf*bqSPaYw0dbRvag5EQ3(r@%=;% zyn|iYe;tK}P6$f2MP&_@D0dka-2SAt9EZY#Im~CZsRZrj_b+$Os||vW(Xfg5Xh|}r+t71%d^fDQ@vivyGv5S2!Z#= z1-ev!r~-613f1hG%PCb&J<9`0X9GBIVHtEJ{$jx+Cx_D>hs^5+PI;+LCo`--u%f2q zz{17#hbKqaR76b0oa!MO9j{r>@{()3-&+bfH9{(AFk&4~HirJ3+-W(GC@t5{he+<) z{a4jCet|bx=m;~JIY&h57UX&4Jz)r6ifQK^J0qf-b!;ZQil_CCT!4WOYv(p1*;xz7 z71x2n>B9z+ut4-Bq`a_PY5t$qB6NiswpnU)R@gml$0}KO79STUGB@&A=wZ%hd+n9| z>}Vzb5p_*n0$?^!I)pdF)4#Ub1Ex=hgaqy|UPM6HP}4*d#e8jranvv!i)$?;AELU@ zA)Wfofzs>YnUqttorZkIf)ndRmPKpzzoVZAk3e&SD$n_kCnq4V+ua1X?yZ zAYaJCFfpZ2Z^wHb=k4HU%MjI{_Vsm9--NPZ;{h%SALx$LDFFRpnY6O^n!w=N?mBB9 z(%BDM9~t)A_5sqU-G1-IF;Q?ND;%cLGvd!2)Uk`Y33sDGmgl$WE-JEpU;aPJV%!23b~UW$eRHD42+5btnJQS*ZrB>a(KpXniUpd?~yBdcBRu(|Zt zpFD74!FFV4qZHgn2`MafU>I9TcT}crtu?^D0w}lmZCe&bANOY_Pc8Y>LaHG@zT(C8 zLa;F0y`F!pyd>$Bkf%d{eg2_syP-9~wL>s2A3ZscoihjyM@P zJSpNPju2Mrp63xU({1YO{issM!>wol$M`#*`7$L;k-K-(Zh>k_4@YN(iYKEpZ^UYL zG@RYK!ju?ITij{L3O^F&5m;wX7z%I*x#yvg#NB#KLhUO2QEr7k^e9zPP}+=*)_9sa zXk4YRP!_2Bvgc9!MSROwx@sUqjfEGOPHc+y4s_r_XF?(ph5>}vKqg_aqren(#SIN+ zr~sOF-sFU|Sf0w?TAC1QF_K?oqITS*cjNicePkV^aY&nUEzcXaoGJgrWICXZmAu*Y z_m~~oD24Gw?U_=CQbr?fl#`XdhB;>%5ZRlB)5l1@6qTTNeO0vPjuOBgsWuOD5t-0} zLM#PADu|0cK8-bDHy;|kRu#D>R^xH2OZ2}g*Q`z?wzbI4G~E5@Mp~poH(OuPoaQBM z0m{0@+cEU2sanVRw)sqn#xbhc1aJk!?s|vWJ_GMKg-J}}F?dkL$F61x3d8^*ua=!~e8c_ocW;`KjRFM|K59wDu~s8UE3FY z!q5qPkF_fBNsA0|rCwoRws$Ao@%y1>}lszH(-^1F1 z_IWAnDbheO;j{%vS5;VsI*qVAywCcyI5tWKNI4Dv5UGpvVSHzGrO|qGi$m8KNz&&s zcpI(5n-PiO5P|`OE7R7zg*F_4@MA!D2a%Ik?sTuT*vNgFl>4b&n%((^MXoG*|LHs- z{~njFNaiTncnVgJXc|7$z5(wj+*j6f_Q$)nOv6c2RHH7pyh)h&(Vm@7@rks-=WQwT zAgY2CWo?Z77GIXw;06aixUsd4Vu1$Md;o+6l7c(&J59LNv0Uoy*s4ylmMrJHZ{m+e zoz?1p-X4s&VdX|F>z>&$E%!lax7u-?f1XuZrg8g5cm!E>_X>oLq85C_ob0?cA3P=8 zfT&MEBP2&uvc&olYG$=J;$3)4q#f7Yi!@A6IUjQ7?MF9zw{)WFmPx>>$%x@CW9f7HtlhzNh1xGxo^%)(ZE-MM@l+7x_ z5Q(prYmHP#8)1L*8gH- zCJ0`k2f+$~mC&IR4_aZb;7%{I$4ev@#Bs7|L(?jWTZ6cUUj^#Z!y z=cpTlS*28&_CLb}9Kd`W#b3GOuDcoZejPHYY)8@ZcsNqovYC{}@d4%Lb@kg|rm zJ|p$;V2tjh@HV!+`Vmj<_;v@n?fTXt#oxH?EAbw@&2E_5gew@$d@0Waj=7Q@J zmF*N>*|jS)&Z8a~ban7mZ)XfL@D8N@Zto=H#P92{C&>Z@Z~(9;I&wd|e~<(JVf1)? z^~M#Z!LUcFfFHQp{~mHOKTr4ncp&{ySn_xu+<@)3Aue6CkO_s*D`vfQfCU=5{2V;} z2@%2_o%VaPM-3?HVqFHS!tu?^;KL!GJGp%znA`+C*uB0CdoL}C+x<}K9O{kiO)DFh z^6P+GR9zp;(%+p3-AL93oew>#+g0ajKY&Vw3g4w--2-W5f&fb|o5C!}?^@U;OdGDV zdvC2QWtH<(4thFN^n3$UEuIhlK`te^>E+2K_K<;z-hzO{11}3{lNKMW^t-!T(}ri!;Fw_@$$+jiJK5*0{~C3 zdR>@fV=Fe@Tl? z7BVc!Ko`<|AA_sYyWubb4Q9c~jScGhdd!v2?2mJ+;+w)r)V(1JPOMgFa996_Fi#aa0|bG%#Tmcp-!5)mbsoXtkGs?48SBbC9KgN=lM_|LrHf4XFBjjN zyht1Q0W#|hpKPxdSQ5ze1}?uuzvOtai)TbquW=djUHh=H8M>bbU1o->yxr5JFsJ|*;SsHTp96~XX2~|G!u9-n&zCb1h%*K9Eb5;D?3f`x(poqfVs~_# zrmLWqC)bqCUqPLLU^j#$CbuM)i32VPixt*>Ylx7p{*$aJ2=fLta;M~XAF{*jFz8#4 zwLavx4N_4X5RcuMQyJ8U7EX!!c&{jv{o1zRak=)BK`XHF0hlarlVKP&FF>hMm{u@l zq2MR41NhGU1h~9XiNGqZR%xC51-P>&6L6h~_B({ADHClq)KTQ&zaiXE~ko?JF?J4ibk*R4JNGFnNh7U4v&4~%03>9PomQ`ZxIBO05 zDeZhfVG%fMI|rj=xp+zRGe_O#b3S7M>AA|Om+Nfto!=4=j`ZdZua~Syc?a4FKbZw4ztYd>&thgA%So(lh zAfArK^oO}aLs-M=T0#w^R{;GKbE*UYJ)qvmDNJ0%_M;W1ykRTkKil*KtC1q>I}WUo=^XPtkIKOi+uA=?;r zR&dHnp<4-0H~bQ*#UX18_F6O+*a!tE23hk`yK0zQ(?E|JDZ!Se77%{#&16EhSn)t- zc3w`(f?&f)%E2~(yb?wk#Cs@>q^}UNBuAvDXeDdwjmnWO*5j>J`W%Wt=_x!^cnY8O zdmdcJ++BFz%$Xz_%3A%KpwHXf6PuD>nimIL8&+4T>CR!9mHc$VG26TEcvb!`@+e^6 zE!Rxf>i+L2H0lN_58X=eG4r^+qvBdwh*YxgI?-si=s&y`Syj}f91H9yKP9hqMGv!D z6COGQr(D8koN@2e9;KnW;=FZa@N*Gs#g&r&#t~^YYJW<#${=4vlzu9Njxu0>-z&j9 z7WkkF%USX7!5nnvHW%(G`{-H@@1jcf=~hGG)g(-{R4UM`zn5orP<;&3E&=FA ziBmd^#$>iEu@j^0qn|v%ZII3{=PP3_L%^7Hyp(Msx-VzAGsBs6$qiowO>qC}X&fD% z=2HZ5wefj$Gvt3JTHHFAJNFM-Ir4bX8%X>}B>1S59<>rEiP?Mgl1Nb7n|DvU>h>7o zhy^M%o@Gjho{F7_x6$?DmR@=uVdTtkqoj4cmtb`8tmrv_j*O063=X z&w}1DbRWORwr8M^Mbnz;dHuw~@|m$G2|dE@`P&B4tOWscY~I|a45`W6eJ@q?v*UIY z={4qWICo=O66bjQmu&SMwwLZfX14jqn337@WRztwmO6^L@x-ExB@Yf{8p`}hcI8?V zeaYRF8ew%dHq@QC7v;AMuyl}2D$iZ(&t4Fdb?^xLaRe5m{nvE!L+w*W@pS&uz9zxc z50VL-8&EdLuqu)T&5jH?#1c1tw@*>KGIc>r-FeQE|B*BWw}P=S2hy*v<#j7KY)~=#S=6z%>cR-W8 zqh_-~Z(1>$@6Bug zYKu9iNa+9=e$2&;=Av?{7{h)j#TqXcAIr=_yN}Sc#Mj9lGOtVU#}X-QhKkffFnKwM z@H@H&(^@IbwJhcn!I(rToyiI*Am%tU208l-dEXJx zo=>~O?M~T0N3uEDdweS^bVAv;Ai2I)rji1MJDJFwYaR*Ixd~2CniOdruD!OQgQz4UKt{kynh7R4^{4g@0_FR|6(l~ zdIH`IBXSO~6CvE#Y(is~C-m&3@zkqhv8gUqE{M7mZDI|>a42?NQ|=%DADTe}p!JdetBDutPLcGZYtZ`oF3(l% zKqmo*VffF`)>$HiF>Q5hWNsd$~=rmW><@C*2Kec#iQNvH>wcs_2(@l#=RrjGmb!?TQ2F` z`Rc5{rSm;cD?TlszVXXp&(o>!+gSsT%URXDr(tNCx&NjenC7%xoJzT-OlP)_0|wBv z3G~++_h5~^{511B7tv6`@|V$n=W^Dl`W*0B5+%vPRnx_7DQZiw;Lj_Iz%%6X+y%p3 zPI$cc871X>UMk5L~7clQF2c5q`FG}4sWrZvWU-BhK zkt(@9^V4g-+S}*p!2-|zo4xS3na{a8P>tbfeAgD9rZvCFZW$4gkl4UdrmU;douERG z!6v*r=u^vUQc0Nhu|yUStUY|gCd|T)vSjhK1=B%>0i7+&pPE55bb9Lq2dw}&^n`m< zNQZ2RG4WCY%Z0pgDeO}$v`|TYCu;U&jCUJ*TZ6{Q@Cb4{7tcqF$Y9{(dfe}TJ~1;N zYpDFF#_xDiO>595O2G}?s(t=fL zb@obP^1NtyITKnx{e?B|=Wr>FAY>oun}9RLb8o*P?)%Buwo5+dT~iRBbS zD|ikptep844Q+#AU1)gS!*VgSxq<9@w~E$t>l5TnGPJk;P2>}Wg7QROHsNNi!D*0w zQVL5|URh94&Mn8sa%xTu$(uTaa<44WDcEgIPG)T|i8EhputQ|R72sJi)lAc7ssKf1O_^-v=iJsf_J@3} z>f*=lWV$_g!CVRH(00om=R<40#eF1w@cFb?ezF@Y68|aLD5IPPV`rr-Ar^{D9yO(5 zz7s7~MdYe_B9qqM_#!_K%Ban)T3?_491-#QzMn|egY3%^6uBDn@r%cnn`RLo!+BR! zK8C%e@3|e*qhcXUb{PAz>O+P+k-E-y%pqdyLCX}gc|;!LvXd2F%QwaYGCU8(^a*v| zZy0={CvjLDzb2$iH~`Jxgh^Fzi2d)&$L#3BCrd$}UUlqcerz(HDYxg_6>w_Hl4k8* zW$9>=)(02-u4Jky;6pbdMa$G08Al8&l8qb>E3Ez}c!PJUuTHcN9=qb{KJSK- zzhjsxcdOtrQni3P8R|Ugv1^WhYE(lvXfm%y(4iK!)beT$LNZEUFYFrB_$7XWi>(f= zcSz{F!m8BQhxS0`Kc$BqAlOKcz+B6^{Wlu6L_1qRL&|J@*e79Z(9vRY^(5YxR)#3> z=*Q}4qc1qK&)v$`>!(FaWi1*igSie!CZ>2!JgD_8&{-eOVn>VdalfV~j#Aup zq@=y9DE)jP=?RU$!(S)cxBqbPLzS3aLZ?!yKfBmx>T^8ZXics>(c3#^eda}J=NMyr z13Z!vgh|*+U9R|vo`hrxy~~D@7;p(h;xTr8xCTt)dH#i}s1&dsuc>>&+GOD}AuvnH z768hQW)}HPw6uV1bb#L^aoZ?ei9*MCGsH>=G7JIiGXs231+m9w&R8sEI1mdQOdVNs zJ!sN>KC#_r@5)<{bLbmy?uwVIxFsYtLBXSx&xHOSv5sr}z6nwp&zVcEejO}~YGq#% zX%6Z`pa;<@eT~PA7tvfV?p6uWAt=M!oQYt#-=d!d_Mq#p2ZH_^#`Y|~s^-=)Uw|gS zjP*T7+MQ6%2 zOM%&Q>QXe36(1a`6l-rTf{d1#Ur{dwD%v~UxgZ^AgAB%|%-!lq(1r7My`XNgfQbRi zC4z&>$LMc-t%01^FD5J_W!T~oYkEm#+-~^C3Cnp06hSAw6s04=phc4BM zVN;?}>^=SygmMa>*~nx(3nQ?($tGg|1M7b9^wWh>@Zn!sSwTrk#I+M;UsPfnArVNXsE?(AR~QcZOp44~jFa%> z7)6_THqVFHI_9P|wa93QVH*A2bB%w@PV3R0C4lWYHc}fewN{dMXoJuwibUz~)$Ao| zwHqSe2&DcH{fKuX=CSpPWM(v%lZq~u6X~*hQj)HT-a`9iIS%DjfJ6^M4B}{NYyA)0 zA*An{Q0#+5tfi1KL{th?IzTk;iBe1Yf`-?hF2F*%;riWyK( zxt!_?W!D)4VUMBc8#39)q+I0O5zp!Eg;qLHvdWpyw2;uM3v?->6AXxoV8B7`odA73 zxomf}ZTmP!=DLp8zB>uoM_HdLPPfW;Ip5L3F5AVZt-%|n z)O_4#csQXQeW;o8KVDi>-uyaZx;G3J#*uR=s;8~`QFA&`-0oJffyN!ILgGqsOZ&g`g;VH`wQ27vl;5?JHKbg4h% zFgK4UNR9B8sF6Hx8GqaKSd^;%4&gXzoo}mtQMHz6;@*KdjS4q_jlJSzBn$*KntKBM zsvkq}UPU%At_OfKn^~KedEw;!52VDF#su>|(BGXn^i!zBr3D!-Tbqi>Qw~ok@3FuL zy>9r%YRR&3;z@(=z%FgUNl1( zh!SlAJ;eZ3x5hQsOszge(4+-PFoJv?whx^3RX-~28`XolN~R! z7NB?t(&{DlaR$GGp{fg=!0dBiG&uHs_04N05}4R~^&HX`_GHvsikC%L0OUA_VrF8q zV=lj2Mm!x%I0h|>LuU013)thcC_2Nh!||w2Is>f>SL-1oTfB32?@>*_2|zs+2-f1k{%pt_`D~>q zV1Fa`_3pSxE;(J6(tZ(Uexvn|ti};YehG$wjg4tvm1W%J$rr8-zf*2L7{(Ie@b{GO zQopQ;Wsb8rPll3l|I^Dqxy1z=;SmG@INX<{l6HdQyn!RBxrqSZ9bB_j%&0kURQNqQ zRWwl0ynGO}`kj3{^qWjx{~HW!ux>*){!z(4o_QZ8h))D^Ee$RWXmj|b8JIfijzLwn zV|{P(n~Y^N$|F4nJ#;XZUpXYp^14v^8zaZt&72TSaP*xceTZMiz2Us0{7{ zo$!Gunlq@c{|^w5w~oml{Cn+W?l@lrc60)_vov!yvR3Pk3-v&tb8~pS%uDMZ_eK21 z&?a9Uq>dBV+t>P8H{?1ziJ`2NpJ@W%#Yc&6qo2Iw%K-~$YQn3Q z+TH=Q+ul6G(rJY`?nk^80+>(KDi94CjWY*X7u@#5vv`gt^BxvZNKyg?ZdAi8#ZO8@ zZc|X>sd>#SA!%My&sre+d7&(DUeU{&H}S&#*lAY_9-L;Mg=d+m(Y?bzX2P?VR7Q|R z@Ya#vlD=Yr@p~w%=oEvj%Y}A=gkZ6b>X$|}pS(<;z3=R)*j;|_ zpr?2>*pgTk0cMZrX1K&AUpNMUw>MrWBAiSAUsLB@p1W(Ek5-jwF!I**ftxLKm;_~P z(jdav_Pw1+_dwqSOizdk0Q888bE$^xhOMz1hI>zxCPE#WQH72gPr_Y=sj@8r7e?rd z5r_CTlZNOZXefU}owxhBF3rcgUU9->S2nL02d=ZRsql{#P1hNnMy$~)Zw;*(l0oE~ z=dRr&512m4L_o0> z&zt!bsTWWZ@S-#_&QlP^rE7)s?NUk)Ob+(bxwmP@v6*w0y=|99q@);($L~nmAW^Rn zstgmG3&<{CHQFhw#@n&RV=5GgopP>-^Ak<@8J{8`I|a7&+E0qkB}o>~&Jf z!@^i5Daoq9Au69JioiSrq-;CP2}=#F$IT;E5jq)$vN7TpfI1trH42BNGv5@&RQS!$ zFIvsnL9jBrBf4SW$ZLYz#`KSU)#K(uVaVv>1q^l4qBKs`EUKVb;pddbQTWf#;j65vD z#JzDW+~97)7R9gyF6$l+M9Jk3rgZ#BHd`kt;Nfx}JMC2ot2=a{|J{Ay8Tl-P5y%*1 z_raY=>{;uC{GQHVMr;^xzjLta+6Xv&F@=JRPG7qb?q)zXKYK_wx#Ku|cfTA)Z&SY% znquIdNVA!NlnNNOUR(^LcoiGN>b3M)#DWZq;tX`LwUv~Ic&@jx!_dQhw7g(LfNmR-X>&K zJkSvLGqhe5aIkUM-gH8VC`Gyp^Pdz^ZTWqFE&TG0Y%`c9tkLb3cEP}Y<=!ic+#x@f zFpl(ancxj6Lao*sMfL4fx5Z6EJUpEmMEuJK$R_zu8?i0$#&NtwX=f6~3yC(k}&r~p}rLCf4 z3e%s-m7m*h#lQ7Y$*3jQd`ZZ`Fu6%+@J_KKL4!gq9h|nqQ(XXT|Bz*4AFuEKC~P5I z6lkezty~p9x3h$To}qg2Tyk}uwf3F5vI3l9D*u#jr{)Lr-?$`RMHys39F8(aTAVSp zpeAR)84lD0Z(sWeW2^s03cx%bF(tV+cWDyM!nQ$ZA~@}N%0z<}1{J_*0*YNGO+(1t zcXhpLRNJ;zRTIAdX(?S7@3Fgx2`jm$k^b>PRCSw_X3#sf((%tAWD~J`1domMMCquN z^z%oNR^-^ETn8Hi0-XA7!jHmTvlCIofsIA+1@$x{8__lNSud44($AT=?`9IcT=g1E zey_iGRC49!VEWOmoI#B}j8&%RL-nsPb!gs$XT@{ACa7Vi?9WwFyq^6%;*Ut505fZ2 ztf%c6mRMG)zl_Gs3?>$9HTyuy7695ue-Se!2RS8j3F2PVb!jR*`ys9^lm_&x>DkB^xdS`xi>uz=~*XPsvyb4%BC0zBYHs!!ZHQx<=sC9gkm zXmvkthHk1X^vt_yJL`}S={9T@{bdX9SLDNp{1ymu`Kf>(Ur8-yLz5<&WxxAt#emJ2 zm_^hsnRJSDc^jdOb!qPFPLbjLLa4`3K)qxJ{Vv;3$gGxompSj+m&NS=Hsl~Q)h#%B zol3n`>ikxdm$jgI_0K2rrG=BAv?c4W33<-66_ukKA!+M!GR2z_8=lRssv9y`Yc1t_ zzD0*U-@1|hJZ{Os!;9W}N^ydUHWxq&nDFZXdvYUksNTV2L)sW>ycj~3Qv&ymrddk% z$346so8=Ea^V()VxPHyr$mjE;H#MsuI{h3zXLM{fXHNrfCf^txXcVj+-K0{X6e#=R z6wJgejUCq;^c{arRXVp79mH_7)g%r-Ry5Cse%ca>Sfc{fug6G*oZQ2G)du7et2L)z5Nx4ECufBVgAEdjagr-lvK!IcRK1Vw)-?3TR42%E;L5hS zctkttvO0_z|BLI4Ap-HZH>$3eVw)Zw1KLq7!Ho9M>oqrAVi}zUZE@GGzgI|_$(PD? zgGgHy?2P{Hc^(G6!PNC$f?AqlAA@I$D0@ z28Ve5p9v%65c}zPYgEKkUeEUE?N2(`qdq+KWy8c_xpw8dfk~oLLGVqX>@vIkL#|(9 zfJ@9lT$SkU;J}k`lK$Mg9M^v2h{jN?7qw7Ude_~B4s$1_#l6EA>tW*1l1A{@8CYZKW;gh+xsiST^f>{_7FD>VEP6WRM-*B znB`DpXigUPqQtDyDMFa{E7TYG<=bQ*!vD_s3rW<65xz?n%LuBlp{b3KbCTDjQ0E(7 zZ*rOIqLw#D#<%aZR(t#-IgQ{Yy-OCCRRciv1afI^6xm1NBPB1ONUa@82iT>z+RW^G z)=`ZGjq}Rk#i4%+Ni~gL8Hhou!Jms(YVAJKJ!|b&mBeHAr0ji8i5gRMvPQ=lS2-*s zMi+FE>YQ8+-|XFKy{(xJrpaU=DThu6IJ~bD=_)#T>KZVU2N8n#4}>aWe)M9 z$Wdfi{;kJbsUuK0-(Q0~+wbqfvkFE;ffRf*$;H)zZA@ks2qs_KDmEa@JEkBSrDGCb zymO(8`hj;Y+;Q`Ib*9BPFV6o;qkrQ$YS-V1tYs1~J2x}Jm6V89#~2acY9Flv)W5^o z=))Ze2-6gEj0o7nEXimkw`PQfyC-<4oiaM+kH_1C7C%3aP!V!yn-g6oj91@v9(Tn9 zo3`<~0#)tWkV`5vGvM0I=c~7Y4XF~gqK`BJF?z|C1M8Tpq2*X`IAR{o)y1SUq-g4s zw<^X8^eht#$mTiysQ_p6R>k2Jrd6!T|6QBD#hiD_U-*2p{m@1DtT&oJT0%kffHB>*W|S@oi8B<=Eem zB8~>g?I%#ZKT~A#1r=6DcWABr-ao&Xuk7C~+wqsrXH@F*w|iAWm4YHf>{cgdM;VKq8dOku=- z-&__OM&kpt_H5SaMqOuM(GR}-rCxcwx#nB+sUEj!<~*$UfIK&HQlyn28l_N;WtdJO z1c4$1QV0n*Enj#p!oCHLj+SA=3c~Y6l`r(u9c5*hfiJ=vUGxEEduag?`YzX#rS%fM zv?;aI4r4c}Mb9%?dkcwO5$vYJi%I|AKCA{i?Jp+F){Y>|)ePKaHvikbge-uQ!A|1) zmD{M8RM?S;OuYS9*FE2ms+ROi`{n~^-YMWj|75tYTH-6EqE5zDIk1_5d3vl+v)O#g zj1fDe#4n2Bp2ZD{iB&FVKk5wZ{j>PQG2F1mNRnvn8{x*wgRR{)izwHsCgtEweG>NulT`#V+;B~AydI!T02eNy!nhwO>bBHmT;`3R z1X%{)ut5|S{EyJ5>6k>PTRaYIE|yuh6_g7S0aS}y5xX!nM9TJ=8NMN^2~V>X#$V59 zAW10^Fg>t}^58>4D49Jj1r)Et%r}g)cg2NR9GuqMvzw0IFk{6rycn4(~36VL_$IegW%<#t2USB7_&AlK6@mmZc>#gf` zCK}UCbfnr;6Ioe5+2=o0G>i+t#dgVTVUh+YD3S6uaqFX;h0Ac(XO%d8s*ZDO{ftq* z3>+iPlk2#gX~>8wY{&M$W`A)QvE|jXaA#Xhl931GM;TawhMN4qnq}b*i03XM2jGa} z9p;WVgdmG>Gg~Q|-Ty=nMy33+#`xJIeHJX7zI{7M?MY_0s>8*?fGVYk_i;KWT$W0! z{bDyq=Fa-_y&1k37+cfFrVf@OtvLD_ZboeNl z0vWEm)vd=%i?a;KY*m@~Mr_pN@3QD|br}0OrbN~@KtNu2E2rvAcE)XlmaIU5>W!@I z5LS7x+tS~Q!PrHm48y3+91n?8rni?x5RW&Ii(Q-uZh)^l06#|nR%{GgUY@fYg3yMT zuVhe)#&uFvP1cGlxw4oCocZiqGIB?C%D(GJZ5$gTyb|uxFdgHPVXDjK+>eoq3ht_F z*F##`iV+ep-QRO+m1OD=cEib8_}y9m%&dLSlcK3ugkAZ-+QiM(&V45|lOHX!RXZyZ z8kAlbXO#7s&VRMq$kL}o%u}|6f}{tYX2^JRx)q%xQ-s)vct$*8uOU3Y*Sdu#Czi6t zBe+KIL*VF9U@}Cq>q#X)zw}TpE+^2n=`^OAw$FC_Y>vE~`II_f24#1gjlsXW<(=XN zO_r@}A;@dX7{PX~e8Nqi!MR?yy%M@4#SG14?h`iZ6x18MFPQHyXKdkMI5OifSeml7 z`xvIN^a5kq4%Fqvs31T!Ko(Q892M!b*>2@3=If)!BJt|XX+A0Sc}>IPv!L^^Y6aIV z4e17Ds}-V^I=dFBoH}GXpC0SWKp%vggO(AyP|Z|Q9jIz`=Yj4&h)R>uPIq^**;q4D zCWgd#_Qq7CW~rl-6g$p*F$F@mpuF>QpV>Ob1l0%}$gRVpg^XH@~E zmn2s`8`gafS}~v6T5iiluuB~puZh%9OQiPwF{8G?UpSYjJh*;*4#mx}E4jbeQb97= z?Bj$@$AdefS5Yw1SYDrW`>kJs_stBY@bac6rmgU3Znb$^r%QcGO4q5rPI6Yh`r8%| zb!aY0WP?U-l-@l0vKNxvq00;dM4wzI7g!ylbNW^Bwp6l269D>twMRH2AdO_I{)`5o z@og3@aSH*!6RJ#pf<|r zHcI3WR(LfSZa~?A&BPUF9OU_p;=usKt4v(VOOS{pevBB03FLbIY?~iUEpjfKXCLxE z?7|~!s65aNEI`vg`d3dzMz#0-EL`3dCe*uY1?TOJi)<|nQdjwW{Kg6?;VGAfoWApR z-$!iFr@#@+ND64Z9?G4U*8G2{6tYPznAIT82l6X*uT|P5Y-Wo9i3q!AtYd(?*#Ebn zM%3Ig^Eyb}j!u`6WT^D^qyN9vG$l2o(&RGHZ$k7l-igt_9YBr^CQuzv^Mp0!2h)&M z;=@(X;|#AsXXBS+lE)E6%^$g*=S%H~tan>^pU_MpByxkvpbF{InB|)7$8T447O08= zK((;V5{e}yqBsHGRDI6oi!92MP`+@kxFqGx=s&cIB+D;P`nboHp#MQ>7b?SfZ2PpH zipfu2-m1Wf0TWA);35*Nq$4^*Z{ar&`L zP^p?QZkoOZ^-G9Cysu}SdEJnBdE#1?AB^9C z2|!Zbh*zrb(o{Y;my!iN6MXO0ZI14nP32btGU!PPQQcVhSZc5Hf_E?HG#%92H$a(T zCrR|jNGL@VK>H--UEV=S^$G@jtCYZ!sfXCT@ilA0kK4nD$VIR|DXKZ87tYRv7U<*X z_f~0Z2z}azLe>c)CL7Eh4VK1~QK-B<(4KadcvIplFWOw6n#2dMdFJBv!B~sshX;gi z>FI{t5t)|i4t67#UD{vF{F~FbOalK`Xx4xyH`P$xtP(w=@2><{A00001Mv*2LLXK;4&&M{uW+J}PWu31<_((SS^9|dxs>2$r z4K9RFx}Urzhlcx-Aq$xn6;9g`qN<4=g4&Y$GVn|&i4O?S3p`aey^k5);Dl~vH)~Zq z(|9c;OljeMQf~aQoIG`l6@qt-ChCa|S_X2wH+_!G7nNxZ70O>ofFWC^&n}YL-~1CW z4iE@1>V)Q`YH3kKhyO= zYy$!kaSr+g*;Sp0S^Ri^8kUui-KmE#0cZfGANkBXgzxzv-4|EAw9bq`&jdHDU~&Q7 zRKbnQgzP!Cb&~hRrj!I!-ytbb%370T>tL6*HX^!=@v&3@1N7?oC@5>36fU zibh=ZQMofs3*4il6_4pf4E31tAlL&h2W$~~LN}}%RAgMUiHNfMz!cVPO>07nuW->U z#_aRw5L#}>VY;sv3u2fZ`A@zfZ6Tq*jGLH&T8-ON7naOH3JathLPg|6ROM$%*ra{? zX5G2#q{s7j^%{yD18Dxd!RTr(VUkZNx`>eN5o}S543D$sq{;C}5&!>j90JH;#Aty( z=W93Vs3wl&jlYB-Y&?AH!Omu;AwGM6@JyFMXi@f~8%bU&zU+UOSJ&RBq%dsT55giO zglzVnAb&9*@OUxS$E59UkH@}=ukZW6LLvOK&7QLt=c}5+^lr7M16|iL^3yxq&n@VY zwH!9UQAbFVX#8~FNwecSvJ6*b3_Q{_H_rpx8~ZAYLqLiW%q1Vh0`Cx8L@PacwocK}6K!sZp_Wikj6#V<;CQPK%z{f*^Q2OQ=gS9BxD4BADxLuIBP>=ywnw~S~_-I zI(3EIzZzCb{d7U^LP;Td?@7v6H_qriu{f;h5n#Q`=c;+)OIIp3Kg7(~@1VB}v=t@* ziD_}iN)SHkfMsF)Jp%a2W_PYJxojoR9T642oVfhN9C;PDih(Ckkq)wQ+-a?RFD2HJ zwQc#!1^J@Xln7V$duTVcS)%<3xk@VSE561I`aXXrBI+@xkFK>=;F)507lk-soLzkpg;dl&Jq5oh0<+IW>r%i6viHr>bDN2 z2v!7NpMtr#?Z_LvH@=j1CUF%44r!IAmKj7(_ef~S%{l9)lw&F|gLg2mS67+SwD%6z Isg-&bYjdJQfB*mh literal 0 HcmV?d00001 diff --git a/data/sp/distr_data/KolibriOS_icon.ico b/data/sp/distr_data/KolibriOS_icon.ico new file mode 100644 index 0000000000000000000000000000000000000000..fcba0849d9af8fd2f5820cabcb66bb575991a16b GIT binary patch literal 26070 zcmeI5d0bV+|NqA&_sX(t)3C)-6W7u#6*SGv+_N+_!_o{xmdhfbvZeweh_Wgd5d_&} zQ}D7~cDSsvBcg(!?2584^8UT%!Zj02E9?9F<8vO5Va}N|XXZU~X6DQ}ujgDC>&FJM zY10_|aqP@^#gvnm1%gjw1p+zvV{tq`K~r-s%JeScJ@+JK=&_mKvq5mrJjpeG$8Om* zaRR|0*#61YkdVNup`nqHs;b&is;XZl?cHl|#os?P#nkjLFBi)64$3eb_Hf(!$*zB# zkGLb?csZW<-aRhO2hWSu)J7F~dz%opmdeVO3`@%k(W<6*|_E<*u(7_Agc%LOKnfq5)25n zJ-fh2Ka30vd?|Ie#>!-Et?@Yjuatr3i*`OBYUj?^;&<;BwAR;4%h2A^axd%X(ae(I z;7hy=^~J?^Gb}6uVl_2?LR*r5urK_<_M?7^#yXKS=Z!3yFf@hKR8CQvp2qTjvkbfr zG0yZu{k|gEx9^wQoSZCfb9-y+y&MOJ{H7Z>8u)Q-W@dGqwzebeUxmIf9%bkmle7j% z>;0IYqKO`CA6rcFL#t?f|LZi4WzsHX;eS?!Xf?GLaW7U}kBA88Hg`5OwC4$h#cg-) zw0GXSN7n)a3lsJ94)*kgH_*O^!S+ER$NUvd_P}%qDuS1xsivmwMq*+u->3F=%5!pxi`CFjLA#rg zq^a@3xuf2n8SjPdZ(pU!&)=d+Lt1IVzz(=JnmFhVz4Hw2!!QY{s^C8SS7i_ghDysI z7E8;}Tv5?_BO#%N7oq;zwYw=sM(zn3YAZyRC)OGoMAFBTifQsow`k(CEi_?p2TdH> zPLqbg{$b5D>DfAZ@40I<{>21RRXhIQmSN}4FUq2$Be~rzH*U04rKR2C`^A2~*%A5% z)&>UQ_hwBmqDf3gv+k($adnxVV|$gRHPzTC*sTW_(aa3X_Xyk$fI0Ou9ld->#v_V{g-xvA1aIxLTSz zzM5uCyg@VMOKHZ;e3~*ViR3>%OX~Wz(lTHSc;x46Dn!O zVtx9PA)rWI_ockU|T$Cemj+V`;H=BrP@wrA7PC(r4x_^r@*iX<8lnLm7BG!F+Kz?0q}q=usiB zsB8xZUp)UmgnfJt+2?%rLEFzA_f^z$2%|ab3FPjVPq(TYDd0pLg`dr)lFK!8{Yo9( z>+GbnC$nhLSIM+yMI>F#uc5-ktF(Q!4=q}eKnvGNXyGRK+u~^PE-`(+JDipphte|3 zAo|kImzKGlrq55<()?paq-A4HsRG;wEopxk0^47WR#Dm9eB(wXogun+ zM&AB=_1{0(e!@plUl>kr>*dkgf&$uSCE-;-jg2i-dZmWkg{idRdl6~rC(&WMB2rwR zLG#yT&_1;=Do87*D4#U4GYO^5N@r>L&lhM3+RHM%5L#v&M9UBR(+US4TIJ?RD}7JW z3V#P$;$uz=UGz!I)|}EbwU$Y=wB<05Us>qx9@5#-L1_mLc!_uIn#KDu?CdrEJYf64 z;1g#R_PB)8TgG|x!rpQkrB_KSU}x#|ddd*zP;zt;*}LV_$3J2$QOcoto73pSO<6Si zyG&ZXDT0L7vDDGVTiZQ~_l~23dpu~1)+t(R44V&o(`p9~TI23cYkghln;<7zd*K+Z z2|q;3LX2qP8BNl&Gb8ntOI%U+r+A&+xq7u4^UEFR3w-?Pv+iYm;GE0Zd3#QU)3^iq zG}5G;o;9wbVTQFdR{t6)@43K}quk`nv~{~T%~MXIsmj?jeMc6}+MY(AY)_;G+v8}> zwg3{SdyudF1?p_?pmyA|D4#Ieb}hlMWToi)Q6C+^mL% z9;l^fO{?hzlw+R0guMElq&qR&*r>2vi9v`i30Yqfl7 ztELMX={ZnFYzkhCS}4%bk#?Q1rp;$;==;FKwE4mz+9bB1O$p|-NpgTTrkc>kBqRF8 zTa_|0MAEtnGTc`Xucp2OeffRVy|nE-Y`5$<=SJPd9cQo72e#Mg<)bw;{19w6uc47< zmGsj7>-45^F)hLz-`%sjFYpZFf|AJ3JCSTo#L{{lUs|=>m)7m^q;CyR(Z>Bk+G^oI z`etTSQjkrZ9rx(u31d?BFraP0rnEKEgp}ewv2Ie^eFCiL z=e=7gSa{qU-x1zH-T!IZ$;~Ytl2+MTw9&ts#yeHhE5}gphbn25MH#(fc8$g!xJ>Vv z=FoDzAPNdeqw31rR9$h48tWR#@1%&7we4w>;R*VFzZ2}Xqisj6XuG``?Q}9C3u^&g zy?l{wloe8-zcn2?qfa`18l)=HqF-WnlSY^p9SYn-lFaTldN$mScKE8&9zSyma6hp( zNlR-m?C7dqv$k0fb?(_x<4Bks|VaF&C z?I+aDPHheu6LR3GCw=_+Tg6JhN4};d9>ImkrW-o zw7>?>&0}Y1y`7MDAKFj(@nUJcH`mosVL}9n{g2WKhYjT5wuXeKSCNb7N(%N+rizkO zN;+#n6_+s<@vUdtm!0ZImS?w;o_HIn#VXVOU^8yJ9@@;nztU!8Hb3m=QAh$yQ_7AG>$U}dTW{BqxA``5bzDPkZeNk-sV^xIb?D6I$FBtOl^$~l$LOkj`?pS!}!gl75fvJ1@5O1zvH^e0?h$W!**F&igSwx z=U3GgnFL4CcK6eyYJZ3#+#Km%M<+E^-k_HHTa@f!O`cXO$ou3X3J@-&2;oL5&G4af zM;D@;R+JWOh;eWQg$MmiA^ty+x8FK)3|U1M(QC*=ypgN}Oz48YaQD-;T~>yxdAWlN ztEw(rhx(Jfl@@h2^7%5lZBrxFT`QzQkvk=x)uT|y1tjs@MHSg1+>;85I<}IoCAp%V z*-(hj910Z8A@A@{=v1^K*^8IZA<=5G_uosRfD^lu1Q=uf!Z;(d?MeOIb3xBuF32p2 zJ#!rG_a5CTy@HQK?bLFsmfD&yH}cs{;bw|-`$its6Dy zx)3f;L6I}aBkU78eqj+E56~l#-|>Ilc6{#{i0^Mh<8^d4RAyc5;&tD4>lQUvmQmXs zJjZgx6luJGO5#pZM{^y;8qcA!L?LCnso*}`prQzK%;hGMSTvE&g~^l8xq0MvR-3|o z9shOP@!aT#Z*Bv_m6gZkIyhjk@7_9FnyJ2|m^vEkDb+!pu3oU0p2$0`OldX~=+gfNm9tDb;ZnrJQ-4qJ7@Sd`X2O z{r(%Sro&e4Vbj520e0 z7wD?*4(U5*+ns94u%AUq?s631@e7H4?EaH_=eF|=?>znS{xCZ2&>;(6_p+^{sp(!* zd3jrB=RGR$Fr@sGlc~&OB;7bYfXdwlQK5sPG-_>{AEns7Pv_jWk=Xl~ZudANor^tk zF5jK=)A`H40YxY)PsR7=`wy)4#>RWl1)6v}%CfUNSDALMtUTfys_+?2RcD4!h3h~n zIkSeE%hE_e7xNE3)N$v|z1F6tu6t-R z=oi7bHw*GkyNqh8PPtqazJ_XjM^WXe;Z*LsfJ!gyqHu@JQriw}4{57TEvk)JN#)*eP~nN! zC>-N|wEN*b2?EXkwBBVckJ}F$-@&-!DK#E{@C~#=Vq#(ytFHbL^nwxbc&C=dugXsv z+)|xVbY1i<#rddFtj|&HL`~HBe_Zb}dtiS*UcaekW}DF7W2-YWBk>*MN3^H6@IE~l z=ee%^hi@^}g(-t;DsxNI68wMS>HJ^WF3lUZNz0(2F%tJ-8lC}D@LlOS^yz01{@C|9 zSsL8`zuI{Ha>vWjG{Du={(<)u3S$(3h)h)jsg5=_%MP>kSzC+ z;DDav!Q97rZa4RNIk?Zu#eIVwpSW+>T@Uc3^+JZPO6!RX$E@r=uW(K3M-w*0mu|oN zf8?}YWzy}9Zts78|5pP~y#}tHKM&3ch!au<-~_%2c+*qQIPd8e+l@%Z)*Z>46Unm5Cgni&gm)zZ>e*N{&^D@#4190@`asI|x zKt*7RUN!0Q0l0j;C@>%UV=VlfP9zIhWc4t9XzfW(14;BbK9fWiTUGjT)<5F8LV z0C2$HOd3%){@H8qzL)^^=Dy`maR+z}ECE~teH=R=Ya;Xvz}3u}b_rAspqh6_wg9OC zQ3If6@~8&jH1e-h0HzuLrWh#AQ?%rMQr$NWtPD^YkTL*e6y~N)8ejGPTX)}mwHb`e z#L*3tUT&B?`mX$|^}u7~Uo7cehCUO>D6cmeM+_1)^}6K_nHFP%O!AE*mR7j-?`r)bIjq`DO0be`7E z!F^sjKe%_3DN-)wcPynOy&OaefRvfjt^-E_jRF`2EDBH*kSG9AX8v$O)AY#GvIOZI zH1Yy#;_aCS(&Rp90?MSRrlDIn0b%mf%9z=o76C5-T>`jd-nVIrKO`&chyhqKPsF z%bL479k9qkrNqy6#()%AY!I^Ox3iy_3qgqh5_u?b9H!gYpc#M->3ynqh^|8zXb`|4 zx2hWgPQ-!)DJiM}2ZGNrpg;hDfB^vl0s>_FYH#o#3%{0t{#dvzcCm^W=*JhvApk#? z+W9UMo(Ak4#z`X#7|8N#G2Vjn6y61s%faF-=;0=xg7zZehCEn%> zg?d0Z?q>&l1N27P{{8nu9<{Sa7!FCOv)D8Ntvp#VVv zfI>-AXr$|q9+T45)&h1y<%IR-Ge-bUfSUj|0cv8CWIvb*AQQiMsivoMU;?-VXo)|u z2aE&|2@n!5+th%M7-3#B(yZd8->!p=Sfm?ypNxnNO7incJaQriOazdKulINYh}ig> zvyz2_o|ze72(S=9AwWU^giwk!`61o}6a*j$rBnkT5TY127~>sa_48h(VCTm?dDALd zK|H+cR1MzYg+mpf9RNFw-Cs1`G-tVPP|*3b>WbUdH*Yo6H2`t|;{e3r``?_DEbO+~ zSOISU-2k}ZYSBfY4Imp1ozVl=0IcDcnB9OHz%)oQIMM*10Xze62G9(DQa|0NQY+d4 zFo0hGzVPbdYhx@gfnAtjo&j><3!@-#3tRM@K`j7U0J8vO0mK4;1@H>M6+kNhRsgF2 zRH41?Zhh^|t3{H?XyGaEeSj3Y83n%!HmV^4@Cm_wPdZadt!M*}FwODGc-vyY2otQ* zfg*rJP&gC<4q?-8$GvTwIE2vJdfvg>22 z8*sBoiUvp@yubo1&noGPx2eS_{}yca_l)T_59+^8aQfO4=OO*CcXWpEe_!{9=G?oe#rb#`L$wxG7J3eyx(IwRPSneCOI8!VCNN(?$7)G7+vL(+z#4MF>EQA9&o0n}`W*(qmUi}rrs&+AtR*?p$=4+Ei9bG!jt zR~K|@$kbe=?&yF4yIJ#%BE8+2#L z&QP5pIzw}YO)t~_Gh zP4CfAkZ-yUgnkV980s;^V`#_!Jkvi(0opL^fietX7`iZI;qJ)Lgdqt-5w18j9C~o+ z1r?~l|F$s@d%Lw>G$FiMK<9nXa!9;Tc+0)sC_M2hIbjz5N>;C z0mT-AZLGIijJHkivrjz)Vl3KBbw-9*MdeY6*Hq*}e|^;1|Aqgr2L7`e=pN{P*UcV2 zzOKMSphwE}_|N01h2xUJtp?n$A5gEr{mua;a@_Cg7yUfw5IN=pH?Y&Fen^i*0#ZG)wMUPHFSQ50)IRt`aP>X**Y}jCzNdWk)4I!BvRhhyD(RHg z2bFdiNUtNl@ihAOxlTC_P7#j(?gZZqM@qe3e|lI0>H3rh_U|9}y5K1X@I1l04F_r3MlD&-{lj`3unP_jm5T3Kl%8yc!%4eWG@vGKMfef@1% zGyQZXOFp1e6r!rh9#>S?biHUV>4Go?3g@w1!77XIm)!$CqyYB^|MX2lInZ-0|FxKAoZ^xSX zTQuX%Bs!^e&=d9W&Ofb(C^fY~m=zlHdbnLsAO+vA1_q`lsqb1QH1j+2@#HHs@wrBN ze^4jZTl00-E%e^7N*ez%?uFKYe^d{$dx!q;LbkoVNyn{Q4R=dQTAFW`HH4bjr7T>S zN8`s}-SJCU^Zg>$OTW}a@_fzl>vc3?%vG8_JB&{19`MZ2(freT;Q7e%>Z>jAFz{M~ zQV#6j+1k+1+}T)v?_zi!&6$pMZ;p9S^E>}$-yirfn6yx+pFryZs_ss}w|w)kO5=zH`!bnk$9gw9@Y+Ej?>P3taZl zso#uFV{OZrw1WqYI>5gs=;)|(K2}yTf}tSDT%J-lu%*nWjbQxPwOq*Xsz%Red8;n^`Z9kjo6A- zV7=TbZ(Z8AYfJ8}+`Q^5etvQ2U;Me!s}Bgzr8rH*I>ccIt7!0nIvQbIL-X_`RC=w3 za#M@Rz$~1;RK7r;?ZUc4wF~r>h97O!5R%VH4BgF*WOe))ZS*=qo6lL&rf94&Og5tp zSfls7NSm^Ee0}ULwVh}Od_3yU6PNVPA5yEl1J4l3qV{lU_f3g~nn1+y@7fv34$y zzT0z(bTkfQ&0GYTA9JE#jv_Ctms3BfNm{3NQb?EswKvyORe2#r#-60m2&_%Oy6WO< zY0|ZE4gq%JBu%X$U{iaQ{Xsh}6xmz=l>)D}Hn8w>cD8(fmCd<&ZWDvETTmz3qB^vH~gQxi<<(B0w z^9w2~bC0-MQ3wBc-_=F8ODEajH{{EJB?C3Mu{@z)zO$yHqq4Q*Yh`?lt0w1H~6 zdnE&NL)5?1vs9IE40Upg(i}ddSnnwm;``e_y5Brs*@kg)P@1LX{q-ZQ_%hUv^_uza z>#5vh1l@FFRCIhXb<|xaiS0xZdF~S@|HJz&%bWXnUX7_rOw5(u`<51z`^xPkLnFOP ziR<~Qb2F*hV-VI$ETh6e0fo6~MJE_MdH;SepGWOS3j_=Jx^u27b;2bZ8|#8+AI#&o zRY`KHf@e^n^XnApsu!K0_1F9Nqw0-aXXUd-#~CIWx7k?!}Wt3fOrG&Ib%4^%i(*8@P{fWrQhVpF8~&Ca;vk zRxOEPOO#@eZw?a*Oqoz04)&M|V%P>#A^XDKg>A4CvehmwOxezqDOuVvC4_JAv}8*H z?AQj89a|M3MEzT`4VIn^3Nu?`3fm6{vQ?G=Oy5$(ls#d8j49iYV#?%Ak*_84w~K)f z+wF4LFw;8Z6~px5^z2fQb_x>$bhfjzWR^lZ)US|vn%XfDoTVqik*^TWGr*Ds1eh`r zoTsOdiA1(c2pde1ubrs~`yyP6eK==l5%Yu-i9A>eKIx|%I>d5pZE#}gRZ0dRoW&n-^K*#_55Xyr_aMjdW@Ei*W(Z- zb39#X-+tgbr0m=u#{nMt=%>LY?tVtPojByiami03%|3;nUb{3pwE}A zUbSZaN8J%zWf@uPr(FQ~vH61KJO#yF zJ9lg!xR)Kv=&98s+Pin3OVs=3o3-ox5=Bo) zg!E?m9Pjh$e=m@aD}3X>Vie6?rva7hR-pQ6a@0ERdFqtTG5C@$KIdQ^n2QK7CwT{R zlfflD4*Sm|Ob+K15QooEF!{lfYOC>`lYzZvjUqW2lUny9CJ|M-t7 z|9*tuOP$$x{d!G9X=&F*YipN8f$D&GL*p^aKP;k8#wAg*p60aQWB0uW!gEYxNl9hL ztvZU{vv=o`Pm5aL8gLK4t=dWprieR|^|T(FMx2KF%XPUq#nC~<^ws=Qnm_R-O?u-N zO`cRrpRe%kNYeRZ8u%TNKa9WOdi&n+K9$^BTUJLcwRflm-=F5s%cGC+n}nbI97n77 z+IK(`n956#W^TSYQD1+7tTb_kMq@uU%52Xos3V^4kPc=p=9lJl6KhXkcpcb zUA!1d;rOkXD>t*rT5Ln%CI-FgGa#$N?Ni%G`p(*(I_eup9B59*-Ih~I;t9G_T}sJ0 z-eeG=)fH)C@QB{ZSfnKJ)V0D)YP?xOq7&<=B!sZgU=cp=d8>OB3 zzAN5j-(#=k*Eij~S$nIXpiHbPc==9&%jrCic@%4)KZT!rk`0UH6k}CYhsxsSUkrau zw*PPVRtETee>g)0^jA5&BRvO)aUvR-8R9_}4OfCWKt0~#>oGdiBThZyHW={1sQdo_ z{65a~ybs};zBaTahWpRZ1{v-r!#!cBW0vPJmx)e%&CpgD?lD7qW2kd>DeM=9`e*3B z41I^84>HA_=h<@A^9Fb=ZtbRQOxcAlZ_vm0@C3~hlW=Xf#nBZhX# z(5@N!H#>er!n{r;GxT|eafi2mhQ7!GvTic;1BSlL3e&Ts^X!`RbcXSXVZ3E%V+?JS zUAd9X?v@raj2oC=*I~buVH{)_Pg&!Q5{AWd41JGbEMgcN8O9~nQGXZrt_zMB#>#*F zeQ0;T+0ywpTlGr6A#nV-ulJ!L-lO|H>HE+@%+2}xkRj&o6NdP(uit9Yu|}ig;ru;; zhx0briF0DPCLNxq$+#w+A%kW!{yxFqANagq=K6Xc;%W5tKE%U$dff5rA1oJtA2LF| zL(qqYzykh0B(sIv!?!ctp7ievh$D-u*c1MSupdHaGey|G2yO!2Yx=+2s`I$_A%4BA zJdb-H;_;#v&StCZet#e0(*r*C@$h6`E^NGS%lfyptUUCAd4%lzUzu<4blKXEKb89T z|7`jWZ+CCJbpM!bRN6k~)mI*vk*rxd_Vv-PNgsLASW7l+{o&;|0Mk0rRHgc-fQ>CVcc^zu^n#elvqdXJ5Vj&W|&P&fl^? z_7MMa`Q{;u<_!E@>-p*1&lH~hUGn^7+qyx|jgVd|{qz0TOcBH46K#B~w1P`Cz<8?A fGmbuseI(Dv*l3KgB|T$ot6cXOdlzx}b=>_wz*0uF literal 0 HcmV?d00001 diff --git a/data/sp/distr_data/autorun.inf b/data/sp/distr_data/autorun.inf new file mode 100644 index 0000000000..a3c071e7c4 --- /dev/null +++ b/data/sp/distr_data/autorun.inf @@ -0,0 +1,3 @@ +[AutoRun] +icon=KolibriOS_icon.ico +shellexecute=readme.txt \ No newline at end of file diff --git a/data/sp/distr_data/readme.txt b/data/sp/distr_data/readme.txt new file mode 100644 index 0000000000..a17b0e785c --- /dev/null +++ b/data/sp/distr_data/readme.txt @@ -0,0 +1,12 @@ +Kolibri OS 0.7.7.0+ night build, LiveCD-version. + +This is a bootable CD-Rom. To see the system in action, reboot and point to +BIOS either in boot menu (if it can be called) or in settings booting from CD. + +Changes and revisions compared with Kolibri 0.7.7.0 are described in file +readme.txt, which is placed in Docs folder. And also in OS in the application +docpak. + +Instructions for install to other information mediums and minimal system +requirements can be found in file install.txt. +Instructions for configuring can be found in file config.txt. diff --git a/data/sp/distr_data/readme_distr.txt b/data/sp/distr_data/readme_distr.txt new file mode 100644 index 0000000000..d3b394ef69 --- /dev/null +++ b/data/sp/distr_data/readme_distr.txt @@ -0,0 +1,9 @@ +Kolibri OS 0.7.7.0+ night build. + +Changes and revisions compared with Kolibri 0.7.7.0 are described in file +readme.txt, which is placed in Docs folder. And also in OS in the application +docpak. + +Instructions for install to other information mediums and minimal system +requirements can be found in file install.txt. +Instructions for configuring can be found in file config.txt. diff --git a/data/sp/docs/CONFIG.TXT b/data/sp/docs/CONFIG.TXT new file mode 100644 index 0000000000..10a5eddba6 --- /dev/null +++ b/data/sp/docs/CONFIG.TXT @@ -0,0 +1,98 @@ +KolibriOS allows some configures for user requirements. This file describes +such settings. +For this it is required to change files on ramdisk. If you boot from floppy, +there is no problem - change files on floppy. If you use floppy image +kolibri.img - either use program which can work with images (for example, +WinImage or DiskExplorer) or make changes from Kolibri and do not forget to +save ramdisk (with the application rdsave). + +1. Desktop background. +a) Replace in the file autorun.dat (it is text file) the parameter for + the program kiv ("\S__background.jpg") the name of file to the full + Kolibri-path to JPEG-, BMP-, GIF- or PNG-image which you like. It will be + new background. background.jpg now can be deleted. +b) Replace in the file autorun.dat "/RD/1/KIV \S__background.jpg" to + "/rd/1/PIC4" (spaces are ignored by the loader program). You can delete + BACKGROUND.JPG. New background will be nice texture. + For programmers: you can change texture and color, for this in file + pic4.asm from distributive sources change: + * to change texture: value of variable usearray (string 585) + from ptarray to any of ptarray2,ptarray3, ..., ptarray9. + * to change color: in procedure check_parameters find string with + the appropriate comment (string 127) and add to 0x40000 1 or 2. + After changes recompile pic4, by request pack with kpack (in + distributive is so), inject to ramdisk. +c) Two previous points sets background for a long time (until next + reinstall). It is possible also after Kolibri boot to set background + until next reboot in programs kiv, iconedit, pic4, tinyfrac. + +2. Configure system menu. + Data for system menu are placed in text file menu.dat. It can be edited + in any editor keeping format. If you use Kolibri TINYPAD, you + must disable option "optimal fill on saving". + +3. Configure autorun. + The list of programs, loading when system boots, is read out from + text file autorun.dat. It can be changed in any editor keeping format. + For example, you can add as first item start of application startmus + (delay 1, without arguments) to hear distinctive melody each time at + booting. + For programmers: you can change melody, for this edit file startmus.asm + from distributive sources: there you can choose melody from three existing + or add your own - format of melody is explained in documentation on + subfunction 55 of function 55. + +4. Icons list. + The list of desktop icons is kept in text file icons.dat, but to + change the list it is recommended to use icon manager icon (which can + be run from desktop context menu). Images for icons are kept in file + iconstrp.gif, which must be edited by external graphics editor. + +5. Skin. + The skin can be viewed and changed dynamically with the application + desktop; after you choose most likely for you skin, you can make it + permanent by replace file default.skn, from which system loads skin at + booting. Standard skin is included to ramdisk, some alternative skins can + be found in distributive in the folder Skins. You can also create your own + skin, for detailed comments look at distributive sources. + +6. Sound. + Driver sound.obj, which is located on ramdisk by default, is intended for + south bridges Intel ICH, ICH0, ICH2, ICH3, ICH4, ICH5, ICH6, ICH7 and + NVidia NForce, NForce 2, NForce 3, NForce 4. If you have SB16-compatible + sound card, remove sound.obj and rename sb16.obj from the folder 'drivers' + to sound.obj. If you have controller sis7012, rename sis.obj from root + folder in distributive to sound.obj and copy it to floppy or image to + the folder 'drivers' (replacing old). The driver fm801.obj can be useful + for ForceMedia FM801 controller, the driver vt8235.obj - for VIA chipsets, + the driver emu10k1x.obj - for EMU10K1X audioprocessor, all are intended to + similar with previous case use: copy it to the folder 'drivers' as + 'sound.obj', replacing the old file. + +7. Bus Disconnect. + The application KBD (Kolibri Bus Disconnect) allows to disconnect processor + bus in order to decrease its temperature, a side effect is noise in AC97 + codecs. The application can be loaded automatically at system boot, to do + this add to autorun (file autorun.dat, see 3) a line of the form +"/RD/1/KBD BOOT 20 # Enable Bus Disconnect for AMD K7 processors". + +8. Network settings. + Initial network configuration is read at boot from the ini file + /rd/1/network/zeroconf.ini. You can set automatic detection with DHCP + ("type=zeroconf") or fixed IP addresses ("type=static"). + +9. Configuration of videomode for ATI videocards. + The driver for ATI can set required screen resolution with refresh rate + at system startup, if they are supported. The list of supported modes + can be obtained with the utility VMODE, it allows also manual mode setting. + To set the mode at startup one must pass to the loader ATIKMS, described + in AUTORUN.DAT, the argument -mxx, e.g. + +/RD/1/DRIVERS/ATIKMS -m1024x768x60 -1 + + Pay attention that the format of autorun.dat does not allow spaces in + command line, so there must be no other arguments. + Also one can disable ability to change videomodes and all linked actions + at startup by passing the argument -n. The driver will still support + hardware cursor. To fully disable the driver, one can simply delete + the line with ATIKMS from autorun.dat. diff --git a/data/sp/docs/COPYING.TXT b/data/sp/docs/COPYING.TXT new file mode 100644 index 0000000000..f6213b69c6 --- /dev/null +++ b/data/sp/docs/COPYING.TXT @@ -0,0 +1,347 @@ + + GNU GENERAL PUBLIC LICENSE + + Version 2, June 1991 + + + Copyright (C) 1989, 1991 Free Software Foundation, Inc. + 675 Mass Ave, Cambridge, MA 02139, USA + + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + + + Preamble + + The licenses for most software are designed to take away your +freedom to share and change it. By contrast, the GNU General Public +License is intended to guarantee your freedom to share and change free +software--to make sure the software is free for all its users. This +General Public License applies to most of the Free Software +Foundation's software and to any other program whose authors commit to +using it. (Some other Free Software Foundation software is covered by +the GNU Library General Public License instead.) You can apply it to +your programs, too. + + When we speak of free software, we are referring to freedom, not +price. Our General Public Licenses are designed to make sure that you +have the freedom to distribute copies of free software (and charge for +this service if you wish), that you receive source code or can get it +if you want it, that you can change the software or use pieces of it +in new free programs; and that you know you can do these things. + + To protect your rights, we need to make restrictions that forbid +anyone to deny you these rights or to ask you to surrender the rights. +These restrictions translate to certain responsibilities for you if you +distribute copies of the software, or if you modify it. + + For example, if you distribute copies of such a program, whether +gratis or for a fee, you must give the recipients all the rights that +you have. You must make sure that they, too, receive or can get the +source code. And you must show them these terms so they know their +rights. + + We protect your rights with two steps: (1) copyright the software, and +(2) offer you this license which gives you legal permission to copy, +distribute and/or modify the software. + + Also, for each author's protection and ours, we want to make certain +that everyone understands that there is no warranty for this free +software. If the software is modified by someone else and passed on, we +want its recipients to know that what they have is not the original, so +that any problems introduced by others will not reflect on the original +authors' reputations. + + Finally, any free program is threatened constantly by software +patents. We wish to avoid the danger that redistributors of a free +program will individually obtain patent licenses, in effect making the +program proprietary. To prevent this, we have made it clear that any +patent must be licensed for everyone's free use or not licensed at all. + + The precise terms and conditions for copying, distribution and +modification follow. + + + GNU GENERAL PUBLIC LICENSE + + TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION + + + 0. This License applies to any program or other work which contains +a notice placed by the copyright holder saying it may be distributed +under the terms of this General Public License. The "Program", below, +refers to any such program or work, and a "work based on the Program" +means either the Program or any derivative work under copyright law: +that is to say, a work containing the Program or a portion of it, +either verbatim or with modifications and/or translated into another +language. (Hereinafter, translation is included without limitation in +the term "modification".) Each licensee is addressed as "you". + +Activities other than copying, distribution and modification are not +covered by this License; they are outside its scope. The act of +running the Program is not restricted, and the output from the Program +is covered only if its contents constitute a work based on the +Program (independent of having been made by running the Program). +Whether that is true depends on what the Program does. + + 1. You may copy and distribute verbatim copies of the Program's +source code as you receive it, in any medium, provided that you +conspicuously and appropriately publish on each copy an appropriate +copyright notice and disclaimer of warranty; keep intact all the +notices that refer to this License and to the absence of any warranty; +and give any other recipients of the Program a copy of this License +along with the Program. + +You may charge a fee for the physical act of transferring a copy, and +you may at your option offer warranty protection in exchange for a fee. + + 2. You may modify your copy or copies of the Program or any portion +of it, thus forming a work based on the Program, and copy and +distribute such modifications or work under the terms of Section 1 +above, provided that you also meet all of these conditions: + + a) You must cause the modified files to carry prominent notices + stating that you changed the files and the date of any change. + + b) You must cause any work that you distribute or publish, that in + whole or in part contains or is derived from the Program or any + part thereof, to be licensed as a whole at no charge to all third + parties under the terms of this License. + + c) If the modified program normally reads commands interactively + when run, you must cause it, when started running for such + interactive use in the most ordinary way, to print or display an + announcement including an appropriate copyright notice and a + notice that there is no warranty (or else, saying that you provide + a warranty) and that users may redistribute the program under + these conditions, and telling the user how to view a copy of this + License. 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But when you +distribute the same sections as part of a whole which is a work based +on the Program, the distribution of the whole must be on the terms of +this License, whose permissions for other licensees extend to the +entire whole, and thus to each and every part regardless of who wrote it. + +Thus, it is not the intent of this section to claim rights or contest +your rights to work written entirely by you; rather, the intent is to +exercise the right to control the distribution of derivative or +collective works based on the Program. + +In addition, mere aggregation of another work not based on the Program +with the Program (or with a work based on the Program) on a volume of +a storage or distribution medium does not bring the other work under +the scope of this License. + + 3. You may copy and distribute the Program (or a work based on it, +under Section 2) in object code or executable form under the terms of +Sections 1 and 2 above provided that you also do one of the following: + + a) Accompany it with the complete corresponding machine-readable + source code, which must be distributed under the terms of Sections + 1 and 2 above on a medium customarily used for software interchange; or, + + b) Accompany it with a written offer, valid for at least three + years, to give any third party, for a charge no more than your + cost of physically performing source distribution, a complete + machine-readable copy of the corresponding source code, to be + distributed under the terms of Sections 1 and 2 above on a medium + customarily used for software interchange; or, + + c) Accompany it with the information you received as to the offer + to distribute corresponding source code. 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The Free Software Foundation may publish revised and/or new versions +of the General Public License from time to time. Such new versions will +be similar in spirit to the present version, but may differ in detail to +address new problems or concerns. + +Each version is given a distinguishing version number. If the Program +specifies a version number of this License which applies to it and "any +later version", you have the option of following the terms and conditions +either of that version or of any later version published by the Free +Software Foundation. If the Program does not specify a version number of +this License, you may choose any version ever published by the Free Software +Foundation. + + 10. If you wish to incorporate parts of the Program into other free +programs whose distribution conditions are different, write to the author +to ask for permission. For software which is copyrighted by the Free +Software Foundation, write to the Free Software Foundation; we sometimes +make exceptions for this. Our decision will be guided by the two goals +of preserving the free status of all derivatives of our free software and +of promoting the sharing and reuse of software generally. + + NO WARRANTY + + 11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY +FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN +OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES +PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED +OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF +MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS +TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE +PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING, +REPAIR OR CORRECTION. + + 12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING +WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR +REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, +INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING +OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED +TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY +YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER +PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE +POSSIBILITY OF SUCH DAMAGES. + + END OF TERMS AND CONDITIONS + + Appendix: How to Apply These Terms to Your New Programs + + If you develop a new program, and you want it to be of the greatest +possible use to the public, the best way to achieve this is to make it +free software which everyone can redistribute and change under these terms. + + To do so, attach the following notices to the program. It is safest +to attach them to the start of each source file to most effectively +convey the exclusion of warranty; and each file should have at least +the "copyright" line and a pointer to where the full notice is found. + + + Copyright (C) 19yy + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + +Also add information on how to contact you by electronic and paper mail. + +If the program is interactive, make it output a short notice like this +when it starts in an interactive mode: + + Gnomovision version 69, Copyright (C) 19yy name of author + Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'. + This is free software, and you are welcome to redistribute it + under certain conditions; type `show c' for details. + +The hypothetical commands `show w' and `show c' should show the appropriate +parts of the General Public License. Of course, the commands you use may +be called something other than `show w' and `show c'; they could even be +mouse-clicks or menu items--whatever suits your program. + +You should also get your employer (if you work as a programmer) or your +school, if any, to sign a "copyright disclaimer" for the program, if +necessary. Here is a sample; alter the names: + + Yoyodyne, Inc., hereby disclaims all copyright interest in the program + `Gnomovision' (which makes passes at compilers) written by James Hacker. + + , 1 April 1989 + Ty Coon, President of Vice + +This General Public License does not permit incorporating your program into +proprietary programs. If your program is a subroutine library, you may +consider it more useful to permit linking proprietary applications with the +library. If this is what you want to do, use the GNU Library General +Public License instead of this License. diff --git a/data/sp/docs/FARA.TXT b/data/sp/docs/FARA.TXT new file mode 100644 index 0000000000..364a54dc08 --- /dev/null +++ b/data/sp/docs/FARA.TXT @@ -0,0 +1,48 @@ + PHARAOH TOMB + +The purpose of the game is to open passage by moving hieroglyphs on entrance +in the next room of the pharaoh tomb (8X8). You can exchange two hieroglyphs +located near each other on vertical or horizontal if after such transposition +a combination of three or more identical pictures abreast is generated. Such +lines are disappeared immediately, and free place is filled by hieroglyphs +which "falled" from top. Missing hieroglyphs are generated randomly. For +disappearing hieroglyphs points are added. For combination of hieroglyphs +number of points is calculated by formula L+(L+1)^(N-3), but no more than +20*L*N, where N is number of hieroglyphs in combination, and L is level number. +To pass to the next level it is required to remove certain number of +hieroglyphs (different on each level). From below of panel with hieroglyphs is +located field which indicates how many is passed and how many is remained. + +1st level - 500 +2nd level - 450 +3rd level - 400 +4th level - 350 +5th level - 300 +6th level and further - 50*(L+1) + +On the first level combinations are composed from 6 states of hieroglyphs. +With each new level one new hieroglyph is involved, but no more than 10 +(i.e. starting from 5th level and further 10 different hieroglyphs are +involved, not counting special ones). + +Starting from 2nd level for each combination from 4 and more hieroglyphs, +and also for passing each fourth of level the player gets "free" hieroglyph - +it is usual hieroglyph (generated randomly), which keeps "in pocket" of player +and can be necessarily inserted by player to any place and replace thus +located there hieroglyph. + +Starting from 3rd level for each combination from 5 and more hieroglyphs, +and also for passing each third of level the player gets "universal key", +which matches to any combination of hieroglyphs and to several different +combination simultaneously. + +Starting from 4th level for each combination from 6 and more hieroglyphs, +and also for passing a half of level the player gets "space crooker", +which allows, when is used, to make 3 moves (not obligatory successive) at +diagonal. + +The player can not have simultaneously more than 1 extra hieroglyph of each +type (1 usual, 1 joker and 1 crooker). + +The game is ended, if the player can not make any combination with existing +hieroglyphs. diff --git a/data/sp/docs/FASM.TXT b/data/sp/docs/FASM.TXT new file mode 100644 index 0000000000..e5665e667c --- /dev/null +++ b/data/sp/docs/FASM.TXT @@ -0,0 +1,4723 @@ + + ,''' + ,,;,, ,,,, ,,,,, ,,, ,, + ; ; ; ; ; ; + ; ,''''; '''', ; ; ; + ; ',,,,;, ,,,,,' ; ; ; + + flat assembler 1.70 + Programmer's Manual + + +Table of contents +----------------- + +Chapter 1 Introduction + + 1.1 Compiler overview + 1.1.1 System requirements + 1.1.2 Executing compiler from command line + 1.1.3 Compiler messages + 1.1.4 Output formats + + 1.2 Assembly syntax + 1.2.1 Instruction syntax + 1.2.2 Data definitions + 1.2.3 Constants and labels + 1.2.4 Numerical expressions + 1.2.5 Jumps and calls + 1.2.6 Size settings + +Chapter 2 Instruction set + + 2.1 The x86 architecture instructions + 2.1.1 Data movement instructions + 2.1.2 Type conversion instructions + 2.1.3 Binary arithmetic instructions + 2.1.4 Decimal arithmetic instructions + 2.1.5 Logical instructions + 2.1.6 Control transfer instructions + 2.1.7 I/O instructions + 2.1.8 Strings operations + 2.1.9 Flag control instructions + 2.1.10 Conditional operations + 2.1.11 Miscellaneous instructions + 2.1.12 System instructions + 2.1.13 FPU instructions + 2.1.14 MMX instructions + 2.1.15 SSE instructions + 2.1.16 SSE2 instructions + 2.1.17 SSE3 instructions + 2.1.18 AMD 3DNow! instructions + 2.1.19 The x86-64 long mode instructions + 2.1.20 SSE4 instructions + 2.1.21 AVX instructions + 2.1.22 AVX2 instructions + 2.1.23 Auxiliary sets of computational instructions + 2.1.24 Other extensions of instruction set + + 2.2 Control directives + 2.2.1 Numerical constants + 2.2.2 Conditional assembly + 2.2.3 Repeating blocks of instructions + 2.2.4 Addressing spaces + 2.2.5 Other directives + 2.2.6 Multiple passes + + 2.3 Preprocessor directives + 2.3.1 Including source files + 2.3.2 Symbolic constants + 2.3.3 Macroinstructions + 2.3.4 Structures + 2.3.5 Repeating macroinstructions + 2.3.6 Conditional preprocessing + 2.3.7 Order of processing + + 2.4 Formatter directives + 2.4.1 MZ executable + 2.4.2 Portable Executable + 2.4.3 Common Object File Format + 2.4.4 Executable and Linkable Format + + + +Chapter 1 Introduction +----------------------- + +This chapter contains all the most important information you need to begin +using the flat assembler. If you are experienced assembly language programmer, +you should read at least this chapter before using this compiler. + + +1.1 Compiler overview + +Flat assembler is a fast assembly language compiler for the x86 architecture +processors, which does multiple passes to optimize the size of generated +machine code. It is self-compilable and versions for different operating +systems are provided. All the versions are designed to be used from the system +command line and they should not differ in behavior. + + +1.1.1 System requirements + +All versions require the x86 architecture 32-bit processor (at least 80386), +although they can produce programs for the x86 architecture 16-bit processors, +too. DOS version requires an OS compatible with MS DOS 2.0 and either true +real mode environment or DPMI. Windows version requires a Win32 console +compatible with 3.1 version. + + +1.1.2 Executing compiler from command line + +To execute flat assembler from the command line you need to provide two +parameters - first should be name of source file, second should be name of +destination file. If no second parameter is given, the name for output +file will be guessed automatically. After displaying short information about +the program name and version, compiler will read the data from source file and +compile it. When the compilation is successful, compiler will write the +generated code to the destination file and display the summary of compilation +process; otherwise it will display the information about error that occurred. + The source file should be a text file, and can be created in any text +editor. Line breaks are accepted in both DOS and Unix standards, tabulators +are treated as spaces. + In the command line you can also include "-m" option followed by a number, +which specifies how many kilobytes of memory flat assembler should maximally +use. In case of DOS version this options limits only the usage of extended +memory. The "-p" option followed by a number can be used to specify the limit +for number of passes the assembler performs. If code cannot be generated +within specified amount of passes, the assembly will be terminated with an +error message. The maximum value of this setting is 65536, while the default +limit, used when no such option is included in command line, is 100. +It is also possible to limit the number of passes the assembler +performs, with the "-p" option followed by a number specifying the maximum +number of passes. + There are no command line options that would affect the output of compiler, +flat assembler requires only the source code to include the information it +really needs. For example, to specify output format you specify it by using +the "format" directive at the beginning of source. + + +1.1.3 Compiler messages + +As it is stated above, after the successful compilation, the compiler displays +the compilation summary. It includes the information of how many passes was +done, how much time it took, and how many bytes were written into the +destination file. +The following is an example of the compilation summary: + +flat assembler version 1.70 (16384 kilobytes memory) +38 passes, 5.3 seconds, 77824 bytes. + +In case of error during the compilation process, the program will display an +error message. For example, when compiler can't find the input file, it will +display the following message: + +flat assembler version 1.70 (16384 kilobytes memory) +error: source file not found. + +If the error is connected with a specific part of source code, the source line +that caused the error will be also displayed. Also placement of this line in +the source is given to help you finding this error, for example: + +flat assembler version 1.70 (16384 kilobytes memory) +example.asm [3]: + mob ax,1 +error: illegal instruction. + +It means that in the third line of the "example.asm" file compiler has +encountered an unrecognized instruction. When the line that caused error +contains a macroinstruction, also the line in macroinstruction definition +that generated the erroneous instruction is displayed: + +flat assembler version 1.70 (16384 kilobytes memory) +example.asm [6]: + stoschar 7 +example.asm [3] stoschar [1]: + mob al,char +error: illegal instruction. + +It means that the macroinstruction in the sixth line of the "example.asm" file +generated an unrecognized instruction with the first line of its definition. + + +1.1.4 Output formats + +By default, when there is no "format" directive in source file, flat +assembler simply puts generated instruction codes into output, creating this +way flat binary file. By default it generates 16-bit code, but you can always +turn it into the 16-bit or 32-bit mode by using "use16" or "use32" directive. +Some of the output formats switch into 32-bit mode, when selected - more +information about formats which you can choose can be found in 2.4. + All output code is always in the order in which it was entered into the +source file. + + +1.2 Assembly syntax + +The information provided below is intended mainly for the assembler +programmers that have been using some other assembly compilers before. +If you are beginner, you should look for the assembly programming tutorials. + Flat assembler by default uses the Intel syntax for the assembly +instructions, although you can customize it using the preprocessor +capabilities (macroinstructions and symbolic constants). It also has its own +set of the directives - the instructions for compiler. + All symbols defined inside the sources are case-sensitive. + + +1.2.1 Instruction syntax + +Instructions in assembly language are separated by line breaks, and one +instruction is expected to fill the one line of text. If a line contains +a semicolon, except for the semicolons inside the quoted strings, the rest of +this line is the comment and compiler ignores it. If a line ends with "\" +character (eventually the semicolon and comment may follow it), the next line +is attached at this point. + Each line in source is the sequence of items, which may be one of the three +types. One type are the symbol characters, which are the special characters +that are individual items even when are not spaced from the other ones. +Any of the "+-*/=<>()[]{}:,|&~#`" is the symbol character. The sequence of +other characters, separated from other items with either blank spaces or +symbol characters, is a symbol. If the first character of symbol is either a +single or double quote, it integrates any sequence of characters following it, +even the special ones, into a quoted string, which should end with the same +character, with which it began (the single or double quote) - however if there +are two such characters in a row (without any other character between them), +they are integrated into quoted string as just one of them and the quoted +string continues then. The symbols other than symbol characters and quoted +strings can be used as names, so are also called the name symbols. + Every instruction consists of the mnemonic and the various number of +operands, separated with commas. The operand can be register, immediate value +or a data addressed in memory, it can also be preceded by size operator to +define or override its size (table 1.1). Names of available registers you can +find in table 1.2, their sizes cannot be overridden. Immediate value can be +specified by any numerical expression. + When operand is a data in memory, the address of that data (also any +numerical expression, but it may contain registers) should be enclosed in +square brackets or preceded by "ptr" operator. For example instruction +"mov eax,3" will put the immediate value 3 into the EAX register, instruction +"mov eax,[7]" will put the 32-bit value from the address 7 into EAX and the +instruction "mov byte [7],3" will put the immediate value 3 into the byte at +address 7, it can also be written as "mov byte ptr 7,3". To specify which +segment register should be used for addressing, segment register name followed +by a colon should be put just before the address value (inside the square +brackets or after the "ptr" operator). + + Table 1.1 Size operators + /-------------------------\ + | Operator | Bits | Bytes | + |==========|======|=======| + | byte | 8 | 1 | + | word | 16 | 2 | + | dword | 32 | 4 | + | fword | 48 | 6 | + | pword | 48 | 6 | + | qword | 64 | 8 | + | tbyte | 80 | 10 | + | tword | 80 | 10 | + | dqword | 128 | 16 | + | xword | 128 | 16 | + | qqword | 256 | 32 | + | yword | 256 | 32 | + \-------------------------/ + + Table 1.2 Registers + /-----------------------------------------------------------------\ + | Type | Bits | | + |=========|======|================================================| + | | 8 | al cl dl bl ah ch dh bh | + | General | 16 | ax cx dx bx sp bp si di | + | | 32 | eax ecx edx ebx esp ebp esi edi | + |---------|------|------------------------------------------------| + | Segment | 16 | es cs ss ds fs gs | + |---------|------|------------------------------------------------| + | Control | 32 | cr0 cr2 cr3 cr4 | + |---------|------|------------------------------------------------| + | Debug | 32 | dr0 dr1 dr2 dr3 dr6 dr7 | + |---------|------|------------------------------------------------| + | FPU | 80 | st0 st1 st2 st3 st4 st5 st6 st7 | + |---------|------|------------------------------------------------| + | MMX | 64 | mm0 mm1 mm2 mm3 mm4 mm5 mm6 mm7 | + |---------|------|------------------------------------------------| + | SSE | 128 | xmm0 xmm1 xmm2 xmm3 xmm4 xmm5 xmm6 xmm7 | + |---------|------|------------------------------------------------| + | AVX | 256 | ymm0 ymm1 ymm2 ymm3 ymm4 ymm5 ymm6 ymm7 | + \-----------------------------------------------------------------/ + + +1.2.2 Data definitions + +To define data or reserve a space for it, use one of the directives listed in +table 1.3. The data definition directive should be followed by one or more of +numerical expressions, separated with commas. These expressions define the +values for data cells of size depending on which directive is used. For +example "db 1,2,3" will define the three bytes of values 1, 2 and 3 +respectively. + The "db" and "du" directives also accept the quoted string values of any +length, which will be converted into chain of bytes when "db" is used and into +chain of words with zeroed high byte when "du" is used. For example "db 'abc'" +will define the three bytes of values 61, 62 and 63. + The "dp" directive and its synonym "df" accept the values consisting of two +numerical expressions separated with colon, the first value will become the +high word and the second value will become the low double word of the far +pointer value. Also "dd" accepts such pointers consisting of two word values +separated with colon, and "dt" accepts the word and quad word value separated +with colon, the quad word is stored first. The "dt" directive with single +expression as parameter accepts only floating point values and creates data in +FPU double extended precision format. + Any of the above directive allows the usage of special "dup" operator to +make multiple copies of given values. The count of duplicates should precede +this operator and the value to duplicate should follow - it can even be the +chain of values separated with commas, but such set of values needs to be +enclosed with parenthesis, like "db 5 dup (1,2)", which defines five copies +of the given two byte sequence. + The "file" is a special directive and its syntax is different. This +directive includes a chain of bytes from file and it should be followed by the +quoted file name, then optionally numerical expression specifying offset in +file preceded by the colon, and - also optionally - comma and numerical +expression specifying count of bytes to include (if no count is specified, all +data up to the end of file is included). For example "file 'data.bin'" will +include the whole file as binary data and "file 'data.bin':10h,4" will include +only four bytes starting at offset 10h. + The data reservation directive should be followed by only one numerical +expression, and this value defines how many cells of the specified size should +be reserved. All data definition directives also accept the "?" value, which +means that this cell should not be initialized to any value and the effect is +the same as by using the data reservation directive. The uninitialized data +may not be included in the output file, so its values should be always +considered unknown. + + Table 1.3 Data directives + /----------------------------\ + | Size | Define | Reserve | + | (bytes) | data | data | + |=========|========|=========| + | 1 | db | rb | + | | file | | + |---------|--------|---------| + | 2 | dw | rw | + | | du | | + |---------|--------|---------| + | 4 | dd | rd | + |---------|--------|---------| + | 6 | dp | rp | + | | df | rf | + |---------|--------|---------| + | 8 | dq | rq | + |---------|--------|---------| + | 10 | dt | rt | + \----------------------------/ + + +1.2.3 Constants and labels + +In the numerical expressions you can also use constants or labels instead of +numbers. To define the constant or label you should use the specific +directives. Each label can be defined only once and it is accessible from the +any place of source (even before it was defined). Constant can be redefined +many times, but in this case it is accessible only after it was defined, and +is always equal to the value from last definition before the place where it's +used. When a constant is defined only once in source, it is - like the label - +accessible from anywhere. + The definition of constant consists of name of the constant followed by the +"=" character and numerical expression, which after calculation will become +the value of constant. This value is always calculated at the time the +constant is defined. For example you can define "count" constant by using the +directive "count = 17", and then use it in the assembly instructions, like +"mov cx,count" - which will become "mov cx,17" during the compilation process. + There are different ways to define labels. The simplest is to follow the +name of label by the colon, this directive can even be followed by the other +instruction in the same line. It defines the label whose value is equal to +offset of the point where it's defined. This method is usually used to label +the places in code. The other way is to follow the name of label (without a +colon) by some data directive. It defines the label with value equal to +offset of the beginning of defined data, and remembered as a label for data +with cell size as specified for that data directive in table 1.3. + The label can be treated as constant of value equal to offset of labeled +code or data. For example when you define data using the labeled directive +"char db 224", to put the offset of this data into BX register you should use +"mov bx,char" instruction, and to put the value of byte addressed by "char" +label to DL register, you should use "mov dl,[char]" (or "mov dl,ptr char"). +But when you try to assemble "mov ax,[char]", it will cause an error, because +fasm compares the sizes of operands, which should be equal. You can force +assembling that instruction by using size override: "mov ax,word [char]", but +remember that this instruction will read the two bytes beginning at "char" +address, while it was defined as a one byte. + The last and the most flexible way to define labels is to use "label" +directive. This directive should be followed by the name of label, then +optionally size operator (it can be preceded by a colon) and then - also +optionally "at" operator and the numerical expression defining the address at +which this label should be defined. For example "label wchar word at char" +will define a new label for the 16-bit data at the address of "char". Now the +instruction "mov ax,[wchar]" will be after compilation the same as +"mov ax,word [char]". If no address is specified, "label" directive defines +the label at current offset. Thus "mov [wchar],57568" will copy two bytes +while "mov [char],224" will copy one byte to the same address. + The label whose name begins with dot is treated as local label, and its name +is attached to the name of last global label (with name beginning with +anything but dot) to make the full name of this label. So you can use the +short name (beginning with dot) of this label anywhere before the next global +label is defined, and in the other places you have to use the full name. Label +beginning with two dots are the exception - they are like global, but they +don't become the new prefix for local labels. + The "@@" name means anonymous label, you can have defined many of them in +the source. Symbol "@b" (or equivalent "@r") references the nearest preceding +anonymous label, symbol "@f" references the nearest following anonymous label. +These special symbol are case-insensitive. + + +1.2.4 Numerical expressions + +In the above examples all the numerical expressions were the simple numbers, +constants or labels. But they can be more complex, by using the arithmetical +or logical operators for calculations at compile time. All these operators +with their priority values are listed in table 1.4. The operations with higher +priority value will be calculated first, you can of course change this +behavior by putting some parts of expression into parenthesis. The "+", "-", +"*" and "/" are standard arithmetical operations, "mod" calculates the +remainder from division. The "and", "or", "xor", "shl", "shr" and "not" +perform the same logical operations as assembly instructions of those names. +The "rva" and "plt" are special unary operators that perform conversions +between different kinds of addresses, they can be used only with few of the +output formats and their meaning may vary (see 2.4). + The arithmetical and logical calculations are usually processed as if they +operated on infinite precision 2-adic numbers, and assembler signalizes an +overflow error if because of its limitations it is not table to perform the +required calculation, or if the result is too large number to fit in either +signed or unsigned range for the destination unit size. However "not", "xor" +and "shr" operators are exceptions from this rule - if the value specified +by numerical expression has to fit in a unit of specified size, and the +arguments for operation fit into that size, the operation will be performed +with precision limited to that size. + The numbers in the expression are by default treated as a decimal, binary +numbers should have the "b" letter attached at the end, octal number should +end with "o" letter, hexadecimal numbers should begin with "0x" characters +(like in C language) or with the "$" character (like in Pascal language) or +they should end with "h" letter. Also quoted string, when encountered in +expression, will be converted into number - the first character will become +the least significant byte of number. + The numerical expression used as an address value can also contain any of +general registers used for addressing, they can be added and multiplied by +appropriate values, as it is allowed for the x86 architecture instructions. + There are also some special symbols that can be used inside the numerical +expression. First is "$", which is always equal to the value of current +offset, while "$$" is equal to base address of current addressing space. The +other one is "%", which is the number of current repeat in parts of code that +are repeated using some special directives (see 2.2). There's also "%t" +symbol, which is always equal to the current time stamp. + Any numerical expression can also consist of single floating point value +(flat assembler does not allow any floating point operations at compilation +time) in the scientific notation, they can end with the "f" letter to be +recognized, otherwise they should contain at least one of the "." or "E" +characters. So "1.0", "1E0" and "1f" define the same floating point value, +while simple "1" defines an integer value. + + Table 1.4 Arithmetical and logical operators by priority + /-------------------------\ + | Priority | Operators | + |==========|==============| + | 0 | + - | + |----------|--------------| + | 1 | * / | + |----------|--------------| + | 2 | mod | + |----------|--------------| + | 3 | and or xor | + |----------|--------------| + | 4 | shl shr | + |----------|--------------| + | 5 | not | + |----------|--------------| + | 6 | rva plt | + \-------------------------/ + + +1.2.5 Jumps and calls + +The operand of any jump or call instruction can be preceded not only by the +size operator, but also by one of the operators specifying type of the jump: +"short", "near" of "far". For example, when assembler is in 16-bit mode, +instruction "jmp dword [0]" will become the far jump and when assembler is +in 32-bit mode, it will become the near jump. To force this instruction to be +treated differently, use the "jmp near dword [0]" or "jmp far dword [0]" form. + When operand of near jump is the immediate value, assembler will generate +the shortest variant of this jump instruction if possible (but will not create +32-bit instruction in 16-bit mode nor 16-bit instruction in 32-bit mode, +unless there is a size operator stating it). By specifying the jump type +you can force it to always generate long variant (for example "jmp near 0") +or to always generate short variant and terminate with an error when it's +impossible (for example "jmp short 0"). + + +1.2.6 Size settings + +When instruction uses some memory addressing, by default the smallest form of +instruction is generated by using the short displacement if only address +value fits in the range. This can be overridden using the "word" or "dword" +operator before the address inside the square brackets (or after the "ptr" +operator), which forces the long displacement of appropriate size to be made. +In case when address is not relative to any registers, those operators allow +also to choose the appropriate mode of absolute addressing. + Instructions "adc", "add", "and", "cmp", "or", "sbb", "sub" and "xor" with +first operand being 16-bit or 32-bit are by default generated in shortened +8-bit form when the second operand is immediate value fitting in the range +for signed 8-bit values. It also can be overridden by putting the "word" or +"dword" operator before the immediate value. The similar rules applies to the +"imul" instruction with the last operand being immediate value. + Immediate value as an operand for "push" instruction without a size operator +is by default treated as a word value if assembler is in 16-bit mode and as a +double word value if assembler is in 32-bit mode, shorter 8-bit form of this +instruction is used if possible, "word" or "dword" size operator forces the +"push" instruction to be generated in longer form for specified size. "pushw" +and "pushd" mnemonics force assembler to generate 16-bit or 32-bit code +without forcing it to use the longer form of instruction. + + +Chapter 2 Instruction set +-------------------------- + +This chapter provides the detailed information about the instructions and +directives supported by flat assembler. Directives for defining labels were +already discussed in 1.2.3, all other directives will be described later in +this chapter. + + +2.1 The x86 architecture instructions + +In this section you can find both the information about the syntax and +purpose the assembly language instructions. If you need more technical +information, look for the Intel Architecture Software Developer's Manual. + Assembly instructions consist of the mnemonic (instruction's name) and from +zero to three operands. If there are two or more operands, usually first is +the destination operand and second is the source operand. Each operand can be +register, memory or immediate value (see 1.2 for details about syntax of +operands). After the description of each instruction there are examples +of different combinations of operands, if the instruction has any. + Some instructions act as prefixes and can be followed by other instruction +in the same line, and there can be more than one prefix in a line. Each name +of the segment register is also a mnemonic of instruction prefix, altough it +is recommended to use segment overrides inside the square brackets instead of +these prefixes. + + +2.1.1 Data movement instructions + +"mov" transfers a byte, word or double word from the source operand to the +destination operand. It can transfer data between general registers, from +the general register to memory, or from memory to general register, but it +cannot move from memory to memory. It can also transfer an immediate value to +general register or memory, segment register to general register or memory, +general register or memory to segment register, control or debug register to +general register and general register to control or debug register. The "mov" +can be assembled only if the size of source operand and size of destination +operand are the same. Below are the examples for each of the allowed +combinations: + + mov bx,ax ; general register to general register + mov [char],al ; general register to memory + mov bl,[char] ; memory to general register + mov dl,32 ; immediate value to general register + mov [char],32 ; immediate value to memory + mov ax,ds ; segment register to general register + mov [bx],ds ; segment register to memory + mov ds,ax ; general register to segment register + mov ds,[bx] ; memory to segment register + mov eax,cr0 ; control register to general register + mov cr3,ebx ; general register to control register + + "xchg" swaps the contents of two operands. It can swap two byte operands, +two word operands or two double word operands. Order of operands is not +important. The operands may be two general registers, or general register +with memory. For example: + + xchg ax,bx ; swap two general registers + xchg al,[char] ; swap register with memory + + "push" decrements the stack frame pointer (ESP register), then transfers +the operand to the top of stack indicated by ESP. The operand can be memory, +general register, segment register or immediate value of word or double word +size. If operand is an immediate value and no size is specified, it is by +default treated as a word value if assembler is in 16-bit mode and as a double +word value if assembler is in 32-bit mode. "pushw" and "pushd" mnemonics are +variants of this instruction that store the values of word or double word size +respectively. If more operands follow in the same line (separated only with +spaces, not commas), compiler will assemble chain of the "push" instructions +with these operands. The examples are with single operands: + + push ax ; store general register + push es ; store segment register + pushw [bx] ; store memory + push 1000h ; store immediate value + + "pusha" saves the contents of the eight general register on the stack. +This instruction has no operands. There are two version of this instruction, +one 16-bit and one 32-bit, assembler automatically generates the appropriate +version for current mode, but it can be overridden by using "pushaw" or +"pushad" mnemonic to always get the 16-bit or 32-bit version. The 16-bit +version of this instruction pushes general registers on the stack in the +following order: AX, CX, DX, BX, the initial value of SP before AX was pushed, +BP, SI and DI. The 32-bit version pushes equivalent 32-bit general registers +in the same order. + "pop" transfers the word or double word at the current top of stack to the +destination operand, and then increments ESP to point to the new top of stack. +The operand can be memory, general register or segment register. "popw" and +"popd" mnemonics are variants of this instruction for restoring the values of +word or double word size respectively. If more operands separated with spaces +follow in the same line, compiler will assemble chain of the "pop" +instructions with these operands. + + pop bx ; restore general register + pop ds ; restore segment register + popw [si] ; restore memory + + "popa" restores the registers saved on the stack by "pusha" instruction, +except for the saved value of SP (or ESP), which is ignored. This instruction +has no operands. To force assembling 16-bit or 32-bit version of this +instruction use "popaw" or "popad" mnemonic. + + +2.1.2 Type conversion instructions + +The type conversion instructions convert bytes into words, words into double +words, and double words into quad words. These conversions can be done using +the sign extension or zero extension. The sign extension fills the extra bits +of the larger item with the value of the sign bit of the smaller item, the +zero extension simply fills them with zeros. + "cwd" and "cdq" double the size of value AX or EAX register respectively +and store the extra bits into the DX or EDX register. The conversion is done +using the sign extension. These instructions have no operands. + "cbw" extends the sign of the byte in AL throughout AX, and "cwde" extends +the sign of the word in AX throughout EAX. These instructions also have no +operands. + "movsx" converts a byte to word or double word and a word to double word +using the sign extension. "movzx" does the same, but it uses the zero +extension. The source operand can be general register or memory, while the +destination operand must be a general register. For example: + + movsx ax,al ; byte register to word register + movsx edx,dl ; byte register to double word register + movsx eax,ax ; word register to double word register + movsx ax,byte [bx] ; byte memory to word register + movsx edx,byte [bx] ; byte memory to double word register + movsx eax,word [bx] ; word memory to double word register + + +2.1.3 Binary arithmetic instructions + +"add" replaces the destination operand with the sum of the source and +destination operands and sets CF if overflow has occurred. The operands may +be bytes, words or double words. The destination operand can be general +register or memory, the source operand can be general register or immediate +value, it can also be memory if the destination operand is register. + + add ax,bx ; add register to register + add ax,[si] ; add memory to register + add [di],al ; add register to memory + add al,48 ; add immediate value to register + add [char],48 ; add immediate value to memory + + "adc" sums the operands, adds one if CF is set, and replaces the destination +operand with the result. Rules for the operands are the same as for the "add" +instruction. An "add" followed by multiple "adc" instructions can be used to +add numbers longer than 32 bits. + "inc" adds one to the operand, it does not affect CF. The operand can be a +general register or memory, and the size of the operand can be byte, word or +double word. + + inc ax ; increment register by one + inc byte [bx] ; increment memory by one + + "sub" subtracts the source operand from the destination operand and replaces +the destination operand with the result. If a borrow is required, the CF is +set. Rules for the operands are the same as for the "add" instruction. + "sbb" subtracts the source operand from the destination operand, subtracts +one if CF is set, and stores the result to the destination operand. Rules for +the operands are the same as for the "add" instruction. A "sub" followed by +multiple "sbb" instructions may be used to subtract numbers longer than 32 +bits. + "dec" subtracts one from the operand, it does not affect CF. Rules for the +operand are the same as for the "inc" instruction. + "cmp" subtracts the source operand from the destination operand. It updates +the flags as the "sub" instruction, but does not alter the source and +destination operands. Rules for the operands are the same as for the "sub" +instruction. + "neg" subtracts a signed integer operand from zero. The effect of this +instructon is to reverse the sign of the operand from positive to negative or +from negative to positive. Rules for the operand are the same as for the "inc" +instruction. + "xadd" exchanges the destination operand with the source operand, then loads +the sum of the two values into the destination operand. Rules for the operands +are the same as for the "add" instruction. + All the above binary arithmetic instructions update SF, ZF, PF and OF flags. +SF is always set to the same value as the result's sign bit, ZF is set when +all the bits of result are zero, PF is set when low order eight bits of result +contain an even number of set bits, OF is set if result is too large for a +positive number or too small for a negative number (excluding sign bit) to fit +in destination operand. + "mul" performs an unsigned multiplication of the operand and the +accumulator. If the operand is a byte, the processor multiplies it by the +contents of AL and returns the 16-bit result to AH and AL. If the operand is a +word, the processor multiplies it by the contents of AX and returns the 32-bit +result to DX and AX. If the operand is a double word, the processor multiplies +it by the contents of EAX and returns the 64-bit result in EDX and EAX. "mul" +sets CF and OF when the upper half of the result is nonzero, otherwise they +are cleared. Rules for the operand are the same as for the "inc" instruction. + "imul" performs a signed multiplication operation. This instruction has +three variations. First has one operand and behaves in the same way as the +"mul" instruction. Second has two operands, in this case destination operand +is multiplied by the source operand and the result replaces the destination +operand. Destination operand must be a general register, it can be word or +double word, source operand can be general register, memory or immediate +value. Third form has three operands, the destination operand must be a +general register, word or double word in size, source operand can be general +register or memory, and third operand must be an immediate value. The source +operand is multiplied by the immediate value and the result is stored in the +destination register. All the three forms calculate the product to twice the +size of operands and set CF and OF when the upper half of the result is +nonzero, but second and third form truncate the product to the size of +operands. So second and third forms can be also used for unsigned operands +because, whether the operands are signed or unsigned, the lower half of the +product is the same. Below are the examples for all three forms: + + imul bl ; accumulator by register + imul word [si] ; accumulator by memory + imul bx,cx ; register by register + imul bx,[si] ; register by memory + imul bx,10 ; register by immediate value + imul ax,bx,10 ; register by immediate value to register + imul ax,[si],10 ; memory by immediate value to register + + "div" performs an unsigned division of the accumulator by the operand. +The dividend (the accumulator) is twice the size of the divisor (the operand), +the quotient and remainder have the same size as the divisor. If divisor is +byte, the dividend is taken from AX register, the quotient is stored in AL and +the remainder is stored in AH. If divisor is word, the upper half of dividend +is taken from DX, the lower half of dividend is taken from AX, the quotient is +stored in AX and the remainder is stored in DX. If divisor is double word, +the upper half of dividend is taken from EDX, the lower half of dividend is +taken from EAX, the quotient is stored in EAX and the remainder is stored in +EDX. Rules for the operand are the same as for the "mul" instruction. + "idiv" performs a signed division of the accumulator by the operand. +It uses the same registers as the "div" instruction, and the rules for +the operand are the same. + + +2.1.4 Decimal arithmetic instructions + +Decimal arithmetic is performed by combining the binary arithmetic +instructions (already described in the prior section) with the decimal +arithmetic instructions. The decimal arithmetic instructions are used to +adjust the results of a previous binary arithmetic operation to produce a +valid packed or unpacked decimal result, or to adjust the inputs to a +subsequent binary arithmetic operation so the operation will produce a valid +packed or unpacked decimal result. + "daa" adjusts the result of adding two valid packed decimal operands in +AL. "daa" must always follow the addition of two pairs of packed decimal +numbers (one digit in each half-byte) to obtain a pair of valid packed +decimal digits as results. The carry flag is set if carry was needed. +This instruction has no operands. + "das" adjusts the result of subtracting two valid packed decimal operands +in AL. "das" must always follow the subtraction of one pair of packed decimal +numbers (one digit in each half-byte) from another to obtain a pair of valid +packed decimal digits as results. The carry flag is set if a borrow was +needed. This instruction has no operands. + "aaa" changes the contents of register AL to a valid unpacked decimal +number, and zeroes the top four bits. "aaa" must always follow the addition +of two unpacked decimal operands in AL. The carry flag is set and AH is +incremented if a carry is necessary. This instruction has no operands. + "aas" changes the contents of register AL to a valid unpacked decimal +number, and zeroes the top four bits. "aas" must always follow the +subtraction of one unpacked decimal operand from another in AL. The carry flag +is set and AH decremented if a borrow is necessary. This instruction has no +operands. + "aam" corrects the result of a multiplication of two valid unpacked decimal +numbers. "aam" must always follow the multiplication of two decimal numbers +to produce a valid decimal result. The high order digit is left in AH, the +low order digit in AL. The generalized version of this instruction allows +adjustment of the contents of the AX to create two unpacked digits of any +number base. The standard version of this instruction has no operands, the +generalized version has one operand - an immediate value specifying the +number base for the created digits. + "aad" modifies the numerator in AH and AL to prepare for the division of two +valid unpacked decimal operands so that the quotient produced by the division +will be a valid unpacked decimal number. AH should contain the high order +digit and AL the low order digit. This instruction adjusts the value and +places the result in AL, while AH will contain zero. The generalized version +of this instruction allows adjustment of two unpacked digits of any number +base. Rules for the operand are the same as for the "aam" instruction. + + +2.1.5 Logical instructions + +"not" inverts the bits in the specified operand to form a one's complement +of the operand. It has no effect on the flags. Rules for the operand are the +same as for the "inc" instruction. + "and", "or" and "xor" instructions perform the standard logical operations. +They update the SF, ZF and PF flags. Rules for the operands are the same as +for the "add" instruction. + "bt", "bts", "btr" and "btc" instructions operate on a single bit which can +be in memory or in a general register. The location of the bit is specified +as an offset from the low order end of the operand. The value of the offset +is the taken from the second operand, it either may be an immediate byte or +a general register. These instructions first assign the value of the selected +bit to CF. "bt" instruction does nothing more, "bts" sets the selected bit to +1, "btr" resets the selected bit to 0, "btc" changes the bit to its +complement. The first operand can be word or double word. + + bt ax,15 ; test bit in register + bts word [bx],15 ; test and set bit in memory + btr ax,cx ; test and reset bit in register + btc word [bx],cx ; test and complement bit in memory + + "bsf" and "bsr" instructions scan a word or double word for first set bit +and store the index of this bit into destination operand, which must be +general register. The bit string being scanned is specified by source operand, +it may be either general register or memory. The ZF flag is set if the entire +string is zero (no set bits are found); otherwise it is cleared. If no set bit +is found, the value of the destination register is undefined. "bsf" scans from +low order to high order (starting from bit index zero). "bsr" scans from high +order to low order (starting from bit index 15 of a word or index 31 of a +double word). + + bsf ax,bx ; scan register forward + bsr ax,[si] ; scan memory reverse + + "shl" shifts the destination operand left by the number of bits specified +in the second operand. The destination operand can be byte, word, or double +word general register or memory. The second operand can be an immediate value +or the CL register. The processor shifts zeros in from the right (low order) +side of the operand as bits exit from the left side. The last bit that exited +is stored in CF. "sal" is a synonym for "shl". + + shl al,1 ; shift register left by one bit + shl byte [bx],1 ; shift memory left by one bit + shl ax,cl ; shift register left by count from cl + shl word [bx],cl ; shift memory left by count from cl + + "shr" and "sar" shift the destination operand right by the number of bits +specified in the second operand. Rules for operands are the same as for the +"shl" instruction. "shr" shifts zeros in from the left side of the operand as +bits exit from the right side. The last bit that exited is stored in CF. +"sar" preserves the sign of the operand by shifting in zeros on the left side +if the value is positive or by shifting in ones if the value is negative. + "shld" shifts bits of the destination operand to the left by the number +of bits specified in third operand, while shifting high order bits from the +source operand into the destination operand on the right. The source operand +remains unmodified. The destination operand can be a word or double word +general register or memory, the source operand must be a general register, +third operand can be an immediate value or the CL register. + + shld ax,bx,1 ; shift register left by one bit + shld [di],bx,1 ; shift memory left by one bit + shld ax,bx,cl ; shift register left by count from cl + shld [di],bx,cl ; shift memory left by count from cl + + "shrd" shifts bits of the destination operand to the right, while shifting +low order bits from the source operand into the destination operand on the +left. The source operand remains unmodified. Rules for operands are the same +as for the "shld" instruction. + "rol" and "rcl" rotate the byte, word or double word destination operand +left by the number of bits specified in the second operand. For each rotation +specified, the high order bit that exits from the left of the operand returns +at the right to become the new low order bit. "rcl" additionally puts in CF +each high order bit that exits from the left side of the operand before it +returns to the operand as the low order bit on the next rotation cycle. Rules +for operands are the same as for the "shl" instruction. + "ror" and "rcr" rotate the byte, word or double word destination operand +right by the number of bits specified in the second operand. For each rotation +specified, the low order bit that exits from the right of the operand returns +at the left to become the new high order bit. "rcr" additionally puts in CF +each low order bit that exits from the right side of the operand before it +returns to the operand as the high order bit on the next rotation cycle. +Rules for operands are the same as for the "shl" instruction. + "test" performs the same action as the "and" instruction, but it does not +alter the destination operand, only updates flags. Rules for the operands are +the same as for the "and" instruction. + "bswap" reverses the byte order of a 32-bit general register: bits 0 through +7 are swapped with bits 24 through 31, and bits 8 through 15 are swapped with +bits 16 through 23. This instruction is provided for converting little-endian +values to big-endian format and vice versa. + + bswap edx ; swap bytes in register + + +2.1.6 Control transfer instructions + +"jmp" unconditionally transfers control to the target location. The +destination address can be specified directly within the instruction or +indirectly through a register or memory, the acceptable size of this address +depends on whether the jump is near or far (it can be specified by preceding +the operand with "near" or "far" operator) and whether the instruction is +16-bit or 32-bit. Operand for near jump should be "word" size for 16-bit +instruction or the "dword" size for 32-bit instruction. Operand for far jump +should be "dword" size for 16-bit instruction or "pword" size for 32-bit +instruction. A direct "jmp" instruction includes the destination address as +part of the instruction (and can be preceded by "short", "near" or "far" +operator), the operand specifying address should be the numerical expression +for near or short jump, or two numerical expressions separated with colon for +far jump, the first specifies selector of segment, the second is the offset +within segment. The "pword" operator can be used to force the 32-bit far call, +and "dword" to force the 16-bit far call. An indirect "jmp" instruction +obtains the destination address indirectly through a register or a pointer +variable, the operand should be general register or memory. See also 1.2.5 for +some more details. + + jmp 100h ; direct near jump + jmp 0FFFFh:0 ; direct far jump + jmp ax ; indirect near jump + jmp pword [ebx] ; indirect far jump + + "call" transfers control to the procedure, saving on the stack the address +of the instruction following the "call" for later use by a "ret" (return) +instruction. Rules for the operands are the same as for the "jmp" instruction, +but the "call" has no short variant of direct instruction and thus it not +optimized. + "ret", "retn" and "retf" instructions terminate the execution of a procedure +and transfers control back to the program that originally invoked the +procedure using the address that was stored on the stack by the "call" +instruction. "ret" is the equivalent for "retn", which returns from the +procedure that was executed using the near call, while "retf" returns from +the procedure that was executed using the far call. These instructions default +to the size of address appropriate for the current code setting, but the size +of address can be forced to 16-bit by using the "retw", "retnw" and "retfw" +mnemonics, and to 32-bit by using the "retd", "retnd" and "retfd" mnemonics. +All these instructions may optionally specify an immediate operand, by adding +this constant to the stack pointer, they effectively remove any arguments that +the calling program pushed on the stack before the execution of the "call" +instruction. + "iret" returns control to an interrupted procedure. It differs from "ret" in +that it also pops the flags from the stack into the flags register. The flags +are stored on the stack by the interrupt mechanism. It defaults to the size of +return address appropriate for the current code setting, but it can be forced +to use 16-bit or 32-bit address by using the "iretw" or "iretd" mnemonic. + The conditional transfer instructions are jumps that may or may not transfer +control, depending on the state of the CPU flags when the instruction +executes. The mnemonics for conditional jumps may be obtained by attaching +the condition mnemonic (see table 2.1) to the "j" mnemonic, +for example "jc" instruction will transfer the control when the CF flag is +set. The conditional jumps can be short or near, and direct only, and can be +optimized (see 1.2.5), the operand should be an immediate value specifying +target address. + + Table 2.1 Conditions + /-----------------------------------------------------------\ + | Mnemonic | Condition tested | Description | + |==========|=======================|========================| + | o | OF = 1 | overflow | + |----------|-----------------------|------------------------| + | no | OF = 0 | not overflow | + |----------|-----------------------|------------------------| + | c | | carry | + | b | CF = 1 | below | + | nae | | not above nor equal | + |----------|-----------------------|------------------------| + | nc | | not carry | + | ae | CF = 0 | above or equal | + | nb | | not below | + |----------|-----------------------|------------------------| + | e | ZF = 1 | equal | + | z | | zero | + |----------|-----------------------|------------------------| + | ne | ZF = 0 | not equal | + | nz | | not zero | + |----------|-----------------------|------------------------| + | be | CF or ZF = 1 | below or equal | + | na | | not above | + |----------|-----------------------|------------------------| + | a | CF or ZF = 0 | above | + | nbe | | not below nor equal | + |----------|-----------------------|------------------------| + | s | SF = 1 | sign | + |----------|-----------------------|------------------------| + | ns | SF = 0 | not sign | + |----------|-----------------------|------------------------| + | p | PF = 1 | parity | + | pe | | parity even | + |----------|-----------------------|------------------------| + | np | PF = 0 | not parity | + | po | | parity odd | + |----------|-----------------------|------------------------| + | l | SF xor OF = 1 | less | + | nge | | not greater nor equal | + |----------|-----------------------|------------------------| + | ge | SF xor OF = 0 | greater or equal | + | nl | | not less | + |----------|-----------------------|------------------------| + | le | (SF xor OF) or ZF = 1 | less or equal | + | ng | | not greater | + |----------|-----------------------|------------------------| + | g | (SF xor OF) or ZF = 0 | greater | + | nle | | not less nor equal | + \-----------------------------------------------------------/ + + The "loop" instructions are conditional jumps that use a value placed in +CX (or ECX) to specify the number of repetitions of a software loop. All +"loop" instructions automatically decrement CX (or ECX) and terminate the +loop (don't transfer the control) when CX (or ECX) is zero. It uses CX or ECX +whether the current code setting is 16-bit or 32-bit, but it can be forced to +us CX with the "loopw" mnemonic or to use ECX with the "loopd" mnemonic. +"loope" and "loopz" are the synonyms for the same instruction, which acts as +the standard "loop", but also terminates the loop when ZF flag is set. +"loopew" and "loopzw" mnemonics force them to use CX register while "looped" +and "loopzd" force them to use ECX register. "loopne" and "loopnz" are the +synonyms for the same instructions, which acts as the standard "loop", but +also terminate the loop when ZF flag is not set. "loopnew" and "loopnzw" +mnemonics force them to use CX register while "loopned" and "loopnzd" force +them to use ECX register. Every "loop" instruction needs an operand being an +immediate value specifying target address, it can be only short jump (in the +range of 128 bytes back and 127 bytes forward from the address of instruction +following the "loop" instruction). + "jcxz" branches to the label specified in the instruction if it finds a +value of zero in CX, "jecxz" does the same, but checks the value of ECX +instead of CX. Rules for the operands are the same as for the "loop" +instruction. + "int" activates the interrupt service routine that corresponds to the +number specified as an operand to the instruction, the number should be in +range from 0 to 255. The interrupt service routine terminates with an "iret" +instruction that returns control to the instruction that follows "int". +"int3" mnemonic codes the short (one byte) trap that invokes the interrupt 3. +"into" instruction invokes the interrupt 4 if the OF flag is set. + "bound" verifies that the signed value contained in the specified register +lies within specified limits. An interrupt 5 occurs if the value contained in +the register is less than the lower bound or greater than the upper bound. It +needs two operands, the first operand specifies the register being tested, +the second operand should be memory address for the two signed limit values. +The operands can be "word" or "dword" in size. + + bound ax,[bx] ; check word for bounds + bound eax,[esi] ; check double word for bounds + + +2.1.7 I/O instructions + + "in" transfers a byte, word, or double word from an input port to AL, AX, +or EAX. I/O ports can be addressed either directly, with the immediate byte +value coded in instruction, or indirectly via the DX register. The destination +operand should be AL, AX, or EAX register. The source operand should be an +immediate value in range from 0 to 255, or DX register. + + in al,20h ; input byte from port 20h + in ax,dx ; input word from port addressed by dx + + "out" transfers a byte, word, or double word to an output port from AL, AX, +or EAX. The program can specify the number of the port using the same methods +as the "in" instruction. The destination operand should be an immediate value +in range from 0 to 255, or DX register. The source operand should be AL, AX, +or EAX register. + + out 20h,ax ; output word to port 20h + out dx,al ; output byte to port addressed by dx + + +2.1.8 Strings operations + +The string operations operate on one element of a string. A string element +may be a byte, a word, or a double word. The string elements are addressed by +SI and DI (or ESI and EDI) registers. After every string operation SI and/or +DI (or ESI and/or EDI) are automatically updated to point to the next element +of the string. If DF (direction flag) is zero, the index registers are +incremented, if DF is one, they are decremented. The amount of the increment +or decrement is 1, 2, or 4 depending on the size of the string element. Every +string operation instruction has short forms which have no operands and use +SI and/or DI when the code type is 16-bit, and ESI and/or EDI when the code +type is 32-bit. SI and ESI by default address data in the segment selected +by DS, DI and EDI always address data in the segment selected by ES. Short +form is obtained by attaching to the mnemonic of string operation letter +specifying the size of string element, it should be "b" for byte element, +"w" for word element, and "d" for double word element. Full form of string +operation needs operands providing the size operator and the memory addresses, +which can be SI or ESI with any segment prefix, DI or EDI always with ES +segment prefix. + "movs" transfers the string element pointed to by SI (or ESI) to the +location pointed to by DI (or EDI). Size of operands can be byte, word, or +double word. The destination operand should be memory addressed by DI or EDI, +the source operand should be memory addressed by SI or ESI with any segment +prefix. + + movs byte [di],[si] ; transfer byte + movs word [es:di],[ss:si] ; transfer word + movsd ; transfer double word + + "cmps" subtracts the destination string element from the source string +element and updates the flags AF, SF, PF, CF and OF, but it does not change +any of the compared elements. If the string elements are equal, ZF is set, +otherwise it is cleared. The first operand for this instruction should be the +source string element addressed by SI or ESI with any segment prefix, the +second operand should be the destination string element addressed by DI or +EDI. + + cmpsb ; compare bytes + cmps word [ds:si],[es:di] ; compare words + cmps dword [fs:esi],[edi] ; compare double words + + "scas" subtracts the destination string element from AL, AX, or EAX +(depending on the size of string element) and updates the flags AF, SF, ZF, +PF, CF and OF. If the values are equal, ZF is set, otherwise it is cleared. +The operand should be the destination string element addressed by DI or EDI. + + scas byte [es:di] ; scan byte + scasw ; scan word + scas dword [es:edi] ; scan double word + + "stos" places the value of AL, AX, or EAX into the destination string +element. Rules for the operand are the same as for the "scas" instruction. + "lods" places the source string element into AL, AX, or EAX. The operand +should be the source string element addressed by SI or ESI with any segment +prefix. + + lods byte [ds:si] ; load byte + lods word [cs:si] ; load word + lodsd ; load double word + + "ins" transfers a byte, word, or double word from an input port addressed +by DX register to the destination string element. The destination operand +should be memory addressed by DI or EDI, the source operand should be the DX +register. + + insb ; input byte + ins word [es:di],dx ; input word + ins dword [edi],dx ; input double word + + "outs" transfers the source string element to an output port addressed by +DX register. The destination operand should be the DX register and the source +operand should be memory addressed by SI or ESI with any segment prefix. + + outs dx,byte [si] ; output byte + outsw ; output word + outs dx,dword [gs:esi] ; output double word + + The repeat prefixes "rep", "repe"/"repz", and "repne"/"repnz" specify +repeated string operation. When a string operation instruction has a repeat +prefix, the operation is executed repeatedly, each time using a different +element of the string. The repetition terminates when one of the conditions +specified by the prefix is satisfied. All three prefixes automatically +decrease CX or ECX register (depending whether string operation instruction +uses the 16-bit or 32-bit addressing) after each operation and repeat the +associated operation until CX or ECX is zero. "repe"/"repz" and +"repne"/"repnz" are used exclusively with the "scas" and "cmps" instructions +(described below). When these prefixes are used, repetition of the next +instruction depends on the zero flag (ZF) also, "repe" and "repz" terminate +the execution when the ZF is zero, "repne" and "repnz" terminate the execution +when the ZF is set. + + rep movsd ; transfer multiple double words + repe cmpsb ; compare bytes until not equal + + +2.1.9 Flag control instructions + +The flag control instructions provide a method for directly changing the +state of bits in the flag register. All instructions described in this +section have no operands. + "stc" sets the CF (carry flag) to 1, "clc" zeroes the CF, "cmc" changes the +CF to its complement. "std" sets the DF (direction flag) to 1, "cld" zeroes +the DF, "sti" sets the IF (interrupt flag) to 1 and therefore enables the +interrupts, "cli" zeroes the IF and therefore disables the interrupts. + "lahf" copies SF, ZF, AF, PF, and CF to bits 7, 6, 4, 2, and 0 of the +AH register. The contents of the remaining bits are undefined. The flags +remain unaffected. + "sahf" transfers bits 7, 6, 4, 2, and 0 from the AH register into SF, ZF, +AF, PF, and CF. + "pushf" decrements "esp" by two or four and stores the low word or +double word of flags register at the top of stack, size of stored data +depends on the current code setting. "pushfw" variant forces storing the +word and "pushfd" forces storing the double word. + "popf" transfers specific bits from the word or double word at the top +of stack, then increments "esp" by two or four, this value depends on +the current code setting. "popfw" variant forces restoring from the word +and "popfd" forces restoring from the double word. + + +2.1.10 Conditional operations + + The instructions obtained by attaching the condition mnemonic (see table +2.1) to the "set" mnemonic set a byte to one if the condition is true and set +the byte to zero otherwise. The operand should be an 8-bit be general register +or the byte in memory. + + setne al ; set al if zero flag cleared + seto byte [bx] ; set byte if overflow + + "salc" instruction sets the all bits of AL register when the carry flag is +set and zeroes the AL register otherwise. This instruction has no arguments. + The instructions obtained by attaching the condition mnemonic to "cmov" +mnemonic transfer the word or double word from the general register or memory +to the general register only when the condition is true. The destination +operand should be general register, the source operand can be general register +or memory. + + cmove ax,bx ; move when zero flag set + cmovnc eax,[ebx] ; move when carry flag cleared + + "cmpxchg" compares the value in the AL, AX, or EAX register with the +destination operand. If the two values are equal, the source operand is +loaded into the destination operand. Otherwise, the destination operand is +loaded into the AL, AX, or EAX register. The destination operand may be a +general register or memory, the source operand must be a general register. + + cmpxchg dl,bl ; compare and exchange with register + cmpxchg [bx],dx ; compare and exchange with memory + + "cmpxchg8b" compares the 64-bit value in EDX and EAX registers with the +destination operand. If the values are equal, the 64-bit value in ECX and EBX +registers is stored in the destination operand. Otherwise, the value in the +destination operand is loaded into EDX and EAX registers. The destination +operand should be a quad word in memory. + + cmpxchg8b [bx] ; compare and exchange 8 bytes + + +2.1.11 Miscellaneous instructions + +"nop" instruction occupies one byte but affects nothing but the instruction +pointer. This instruction has no operands and doesn't perform any operation. + "ud2" instruction generates an invalid opcode exception. This instruction +is provided for software testing to explicitly generate an invalid opcode. +This is instruction has no operands. + "xlat" replaces a byte in the AL register with a byte indexed by its value +in a translation table addressed by BX or EBX. The operand should be a byte +memory addressed by BX or EBX with any segment prefix. This instruction has +also a short form "xlatb" which has no operands and uses the BX or EBX address +in the segment selected by DS depending on the current code setting. + "lds" transfers a pointer variable from the source operand to DS and the +destination register. The source operand must be a memory operand, and the +destination operand must be a general register. The DS register receives the +segment selector of the pointer while the destination register receives the +offset part of the pointer. "les", "lfs", "lgs" and "lss" operate identically +to "lds" except that rather than DS register the ES, FS, GS and SS is used +respectively. + + lds bx,[si] ; load pointer to ds:bx + + "lea" transfers the offset of the source operand (rather than its value) +to the destination operand. The source operand must be a memory operand, and +the destination operand must be a general register. + + lea dx,[bx+si+1] ; load effective address to dx + + "cpuid" returns processor identification and feature information in the +EAX, EBX, ECX, and EDX registers. The information returned is selected by +entering a value in the EAX register before the instruction is executed. +This instruction has no operands. + "pause" instruction delays the execution of the next instruction an +implementation specific amount of time. It can be used to improve the +performance of spin wait loops. This instruction has no operands. + "enter" creates a stack frame that may be used to implement the scope rules +of block-structured high-level languages. A "leave" instruction at the end of +a procedure complements an "enter" at the beginning of the procedure to +simplify stack management and to control access to variables for nested +procedures. The "enter" instruction includes two parameters. The first +parameter specifies the number of bytes of dynamic storage to be allocated on +the stack for the routine being entered. The second parameter corresponds to +the lexical nesting level of the routine, it can be in range from 0 to 31. +The specified lexical level determines how many sets of stack frame pointers +the CPU copies into the new stack frame from the preceding frame. This list +of stack frame pointers is sometimes called the display. The first word (or +double word when code is 32-bit) of the display is a pointer to the last stack +frame. This pointer enables a "leave" instruction to reverse the action of the +previous "enter" instruction by effectively discarding the last stack frame. +After "enter" creates the new display for a procedure, it allocates the +dynamic storage space for that procedure by decrementing ESP by the number of +bytes specified in the first parameter. To enable a procedure to address its +display, "enter" leaves BP (or EBP) pointing to the beginning of the new stack +frame. If the lexical level is zero, "enter" pushes BP (or EBP), copies SP to +BP (or ESP to EBP) and then subtracts the first operand from ESP. For nesting +levels greater than zero, the processor pushes additional frame pointers on +the stack before adjusting the stack pointer. + + enter 2048,0 ; enter and allocate 2048 bytes on stack + + +2.1.12 System instructions + +"lmsw" loads the operand into the machine status word (bits 0 through 15 of +CR0 register), while "smsw" stores the machine status word into the +destination operand. The operand for both those instructions can be 16-bit +general register or memory, for "smsw" it can also be 32-bit general +register. + + lmsw ax ; load machine status from register + smsw [bx] ; store machine status to memory + + "lgdt" and "lidt" instructions load the values in operand into the global +descriptor table register or the interrupt descriptor table register +respectively. "sgdt" and "sidt" store the contents of the global descriptor +table register or the interrupt descriptor table register in the destination +operand. The operand should be a 6 bytes in memory. + + lgdt [ebx] ; load global descriptor table + + "lldt" loads the operand into the segment selector field of the local +descriptor table register and "sldt" stores the segment selector from the +local descriptor table register in the operand. "ltr" loads the operand into +the segment selector field of the task register and "str" stores the segment +selector from the task register in the operand. Rules for operand are the same +as for the "lmsw" and "smsw" instructions. + "lar" loads the access rights from the segment descriptor specified by +the selector in source operand into the destination operand and sets the ZF +flag. The destination operand can be a 16-bit or 32-bit general register. +The source operand should be a 16-bit general register or memory. + + lar ax,[bx] ; load access rights into word + lar eax,dx ; load access rights into double word + + "lsl" loads the segment limit from the segment descriptor specified by the +selector in source operand into the destination operand and sets the ZF flag. +Rules for operand are the same as for the "lar" instruction. + "verr" and "verw" verify whether the code or data segment specified with +the operand is readable or writable from the current privilege level. The +operand should be a word, it can be general register or memory. If the segment +is accessible and readable (for "verr") or writable (for "verw") the ZF flag +is set, otherwise it's cleared. Rules for operand are the same as for the +"lldt" instruction. + "arpl" compares the RPL (requestor's privilege level) fields of two segment +selectors. The first operand contains one segment selector and the second +operand contains the other. If the RPL field of the destination operand is +less than the RPL field of the source operand, the ZF flag is set and the RPL +field of the destination operand is increased to match that of the source +operand. Otherwise, the ZF flag is cleared and no change is made to the +destination operand. The destination operand can be a word general register +or memory, the source operand must be a general register. + + arpl bx,ax ; adjust RPL of selector in register + arpl [bx],ax ; adjust RPL of selector in memory + + "clts" clears the TS (task switched) flag in the CR0 register. This +instruction has no operands. + "lock" prefix causes the processor's bus-lock signal to be asserted during +execution of the accompanying instruction. In a multiprocessor environment, +the bus-lock signal insures that the processor has exclusive use of any shared +memory while the signal is asserted. The "lock" prefix can be prepended only +to the following instructions and only to those forms of the instructions +where the destination operand is a memory operand: "add", "adc", "and", "btc", +"btr", "bts", "cmpxchg", "cmpxchg8b", "dec", "inc", "neg", "not", "or", "sbb", +"sub", "xor", "xadd" and "xchg". If the "lock" prefix is used with one of +these instructions and the source operand is a memory operand, an undefined +opcode exception may be generated. An undefined opcode exception will also be +generated if the "lock" prefix is used with any instruction not in the above +list. The "xchg" instruction always asserts the bus-lock signal regardless of +the presence or absence of the "lock" prefix. + "hlt" stops instruction execution and places the processor in a halted +state. An enabled interrupt, a debug exception, the BINIT, INIT or the RESET +signal will resume execution. This instruction has no operands. + "invlpg" invalidates (flushes) the TLB (translation lookaside buffer) entry +specified with the operand, which should be a memory. The processor determines +the page that contains that address and flushes the TLB entry for that page. + "rdmsr" loads the contents of a 64-bit MSR (model specific register) of the +address specified in the ECX register into registers EDX and EAX. "wrmsr" +writes the contents of registers EDX and EAX into the 64-bit MSR of the +address specified in the ECX register. "rdtsc" loads the current value of the +processor's time stamp counter from the 64-bit MSR into the EDX and EAX +registers. The processor increments the time stamp counter MSR every clock +cycle and resets it to 0 whenever the processor is reset. "rdpmc" loads the +contents of the 40-bit performance monitoring counter specified in the ECX +register into registers EDX and EAX. These instructions have no operands. + "wbinvd" writes back all modified cache lines in the processor's internal +cache to main memory and invalidates (flushes) the internal caches. The +instruction then issues a special function bus cycle that directs external +caches to also write back modified data and another bus cycle to indicate that +the external caches should be invalidated. This instruction has no operands. + "rsm" return program control from the system management mode to the program +that was interrupted when the processor received an SMM interrupt. This +instruction has no operands. + "sysenter" executes a fast call to a level 0 system procedure, "sysexit" +executes a fast return to level 3 user code. The addresses used by these +instructions are stored in MSRs. These instructions have no operands. + + +2.1.13 FPU instructions + +The FPU (Floating-Point Unit) instructions operate on the floating-point +values in three formats: single precision (32-bit), double precision (64-bit) +and double extended precision (80-bit). The FPU registers form the stack and +each of them holds the double extended precision floating-point value. When +some values are pushed onto the stack or are removed from the top, the FPU +registers are shifted, so ST0 is always the value on the top of FPU stack, ST1 +is the first value below the top, etc. The ST0 name has also the synonym ST. + "fld" pushes the floating-point value onto the FPU register stack. The +operand can be 32-bit, 64-bit or 80-bit memory location or the FPU register, +its value is then loaded onto the top of FPU register stack (the ST0 +register) and is automatically converted into the double extended precision +format. + + fld dword [bx] ; load single prevision value from memory + fld st2 ; push value of st2 onto register stack + + "fld1", "fldz", "fldl2t", "fldl2e", "fldpi", "fldlg2" and "fldln2" load the +commonly used contants onto the FPU register stack. The loaded constants are ++1.0, +0.0, lb 10, lb e, pi, lg 2 and ln 2 respectively. These instructions +have no operands. + "fild" converts the signed integer source operand into double extended +precision floating-point format and pushes the result onto the FPU register +stack. The source operand can be a 16-bit, 32-bit or 64-bit memory location. + + fild qword [bx] ; load 64-bit integer from memory + + "fst" copies the value of ST0 register to the destination operand, which +can be 32-bit or 64-bit memory location or another FPU register. "fstp" +performs the same operation as "fst" and then pops the register stack, +getting rid of ST0. "fstp" accepts the same operands as the "fst" instruction +and can also store value in the 80-bit memory. + + fst st3 ; copy value of st0 into st3 register + fstp tword [bx] ; store value in memory and pop stack + + "fist" converts the value in ST0 to a signed integer and stores the result +in the destination operand. The operand can be 16-bit or 32-bit memory +location. "fistp" performs the same operation and then pops the register +stack, it accepts the same operands as the "fist" instruction and can also +store integer value in the 64-bit memory, so it has the same rules for +operands as "fild" instruction. + "fbld" converts the packed BCD integer into double extended precision +floating-point format and pushes this value onto the FPU stack. "fbstp" +converts the value in ST0 to an 18-digit packed BCD integer, stores the result +in the destination operand, and pops the register stack. The operand should be +an 80-bit memory location. + "fadd" adds the destination and source operand and stores the sum in the +destination location. The destination operand is always an FPU register, if +the source is a memory location, the destination is ST0 register and only +source operand should be specified. If both operands are FPU registers, at +least one of them should be ST0 register. An operand in memory can be a +32-bit or 64-bit value. + + fadd qword [bx] ; add double precision value to st0 + fadd st2,st0 ; add st0 to st2 + + "faddp" adds the destination and source operand, stores the sum in the +destination location and then pops the register stack. The destination operand +must be an FPU register and the source operand must be the ST0. When no +operands are specified, ST1 is used as a destination operand. + + faddp ; add st0 to st1 and pop the stack + faddp st2,st0 ; add st0 to st2 and pop the stack + +"fiadd" instruction converts an integer source operand into double extended +precision floating-point value and adds it to the destination operand. The +operand should be a 16-bit or 32-bit memory location. + + fiadd word [bx] ; add word integer to st0 + + "fsub", "fsubr", "fmul", "fdiv", "fdivr" instruction are similar to "fadd", +have the same rules for operands and differ only in the perfomed computation. +"fsub" substracts the source operand from the destination operand, "fsubr" +substract the destination operand from the source operand, "fmul" multiplies +the destination and source operands, "fdiv" divides the destination operand by +the source operand and "fdivr" divides the source operand by the destination +operand. "fsubp", "fsubrp", "fmulp", "fdivp", "fdivrp" perform the same +operations and pop the register stack, the rules for operand are the same as +for the "faddp" instruction. "fisub", "fisubr", "fimul", "fidiv", "fidivr" +perform these operations after converting the integer source operand into +floating-point value, they have the same rules for operands as "fiadd" +instruction. + "fsqrt" computes the square root of the value in ST0 register, "fsin" +computes the sine of that value, "fcos" computes the cosine of that value, +"fchs" complements its sign bit, "fabs" clears its sign to create the absolute +value, "frndint" rounds it to the nearest integral value, depending on the +current rounding mode. "f2xm1" computes the exponential value of 2 to the +power of ST0 and substracts the 1.0 from it, the value of ST0 must lie in the +range -1.0 to +1.0. All these instruction store the result in ST0 and have no +operands. + "fsincos" computes both the sine and the cosine of the value in ST0 +register, stores the sine in ST0 and pushes the cosine on the top of FPU +register stack. "fptan" computes the tangent of the value in ST0, stores the +result in ST0 and pushes a 1.0 onto the FPU register stack. "fpatan" computes +the arctangent of the value in ST1 divided by the value in ST0, stores the +result in ST1 and pops the FPU register stack. "fyl2x" computes the binary +logarithm of ST0, multiplies it by ST1, stores the result in ST1 and pops the +FPU register stack; "fyl2xp1" performs the same operation but it adds 1.0 to +ST0 before computing the logarithm. "fprem" computes the remainder obtained +from dividing the value in ST0 by the value in ST1, and stores the result +in ST0. "fprem1" performs the same operation as "fprem", but it computes the +remainder in the way specified by IEEE Standard 754. "fscale" truncates the +value in ST1 and increases the exponent of ST0 by this value. "fxtract" +separates the value in ST0 into its exponent and significand, stores the +exponent in ST0 and pushes the significand onto the register stack. "fnop" +performs no operation. These instruction have no operands. + "fxch" exchanges the contents of ST0 an another FPU register. The operand +should be an FPU register, if no operand is specified, the contents of ST0 and +ST1 are exchanged. + "fcom" and "fcomp" compare the contents of ST0 and the source operand and +set flags in the FPU status word according to the results. "fcomp" +additionally pops the register stack after performing the comparison. The +operand can be a single or double precision value in memory or the FPU +register. When no operand is specified, ST1 is used as a source operand. + + fcom ; compare st0 with st1 + fcomp st2 ; compare st0 with st2 and pop stack + + "fcompp" compares the contents of ST0 and ST1, sets flags in the FPU status +word according to the results and pops the register stack twice. This +instruction has no operands. + "fucom", "fucomp" and "fucompp" performs an unordered comparison of two FPU +registers. Rules for operands are the same as for the "fcom", "fcomp" and +"fcompp", but the source operand must be an FPU register. + "ficom" and "ficomp" compare the value in ST0 with an integer source operand +and set the flags in the FPU status word according to the results. "ficomp" +additionally pops the register stack after performing the comparison. The +integer value is converted to double extended precision floating-point format +before the comparison is made. The operand should be a 16-bit or 32-bit +memory location. + + ficom word [bx] ; compare st0 with 16-bit integer + + "fcomi", "fcomip", "fucomi", "fucomip" perform the comparison of ST0 with +another FPU register and set the ZF, PF and CF flags according to the results. +"fcomip" and "fucomip" additionaly pop the register stack after performing the +comparison. The instructions obtained by attaching the FPU condition mnemonic +(see table 2.2) to the "fcmov" mnemonic transfer the specified FPU register +into ST0 register if the fiven test condition is true. These instruction +allow two different syntaxes, one with single operand specifying the source +FPU register, and one with two operands, in that case destination operand +should be ST0 register and the second operand specifies the source FPU +register. + + fcomi st2 ; compare st0 with st2 and set flags + fcmovb st0,st2 ; transfer st2 to st0 if below + + Table 2.2 FPU conditions + /------------------------------------------------------\ + | Mnemonic | Condition tested | Description | + |==========|==================|========================| + | b | CF = 1 | below | + | e | ZF = 1 | equal | + | be | CF or ZF = 1 | below or equal | + | u | PF = 1 | unordered | + | nb | CF = 0 | not below | + | ne | ZF = 0 | not equal | + | nbe | CF and ZF = 0 | not below nor equal | + | nu | PF = 0 | not unordered | + \------------------------------------------------------/ + + "ftst" compares the value in ST0 with 0.0 and sets the flags in the FPU +status word according to the results. "fxam" examines the contents of the ST0 +and sets the flags in FPU status word to indicate the class of value in the +register. These instructions have no operands. + "fstsw" and "fnstsw" store the current value of the FPU status word in the +destination location. The destination operand can be either a 16-bit memory or +the AX register. "fstsw" checks for pending umasked FPU exceptions before +storing the status word, "fnstsw" does not. + "fstcw" and "fnstcw" store the current value of the FPU control word at the +specified destination in memory. "fstcw" checks for pending umasked FPU +exceptions before storing the control word, "fnstcw" does not. "fldcw" loads +the operand into the FPU control word. The operand should be a 16-bit memory +location. + "fstenv" and "fnstenv" store the current FPU operating environment at the +memory location specified with the destination operand, and then mask all FPU +exceptions. "fstenv" checks for pending umasked FPU exceptions before +proceeding, "fnstenv" does not. "fldenv" loads the complete operating +environment from memory into the FPU. "fsave" and "fnsave" store the current +FPU state (operating environment and register stack) at the specified +destination in memory and reinitializes the FPU. "fsave" check for pending +unmasked FPU exceptions before proceeding, "fnsave" does not. "frstor" +loads the FPU state from the specified memory location. All these instructions +need an operand being a memory location. For each of these instruction +exist two additional mnemonics that allow to precisely select the type of the +operation. The "fstenvw", "fnstenvw", "fldenvw", "fsavew", "fnsavew" and +"frstorw" mnemonics force the instruction to perform operation as in the 16-bit +mode, while "fstenvd", "fnstenvd", "fldenvd", "fsaved", "fnsaved" and "frstord" +force the operation as in 32-bit mode. + "finit" and "fninit" set the FPU operating environment into its default +state. "finit" checks for pending unmasked FPU exception before proceeding, +"fninit" does not. "fclex" and "fnclex" clear the FPU exception flags in the +FPU status word. "fclex" checks for pending unmasked FPU exception before +proceeding, "fnclex" does not. "wait" and "fwait" are synonyms for the same +instruction, which causes the processor to check for pending unmasked FPU +exceptions and handle them before proceeding. These instruction have no +operands. + "ffree" sets the tag associated with specified FPU register to empty. The +operand should be an FPU register. + "fincstp" and "fdecstp" rotate the FPU stack by one by adding or +substracting one to the pointer of the top of stack. These instruction have no +operands. + + +2.1.14 MMX instructions + +The MMX instructions operate on the packed integer types and use the MMX +registers, which are the low 64-bit parts of the 80-bit FPU registers. Because +of this MMX instructions cannot be used at the same time as FPU instructions. +They can operate on packed bytes (eight 8-bit integers), packed words (four +16-bit integers) or packed double words (two 32-bit integers), use of packed +formats allows to perform operations on multiple data at one time. + "movq" copies a quad word from the source operand to the destination +operand. At least one of the operands must be a MMX register, the second one +can be also a MMX register or 64-bit memory location. + + movq mm0,mm1 ; move quad word from register to register + movq mm2,[ebx] ; move quad word from memory to register + + "movd" copies a double word from the source operand to the destination +operand. One of the operands must be a MMX register, the second one can be a +general register or 32-bit memory location. Only low double word of MMX +register is used. + All general MMX operations have two operands, the destination operand should +be a MMX register, the source operand can be a MMX register or 64-bit memory +location. Operation is performed on the corresponding data elements of the +source and destination operand and stored in the data elements of the +destination operand. "paddb", "paddw" and "paddd" perform the addition of +packed bytes, packed words, or packed double words. "psubb", "psubw" and +"psubd" perform the substraction of appropriate types. "paddsb", "paddsw", +"psubsb" and "psubsw" perform the addition or substraction of packed bytes +or packed words with the signed saturation. "paddusb", "paddusw", "psubusb", +"psubusw" are analoguous, but with unsigned saturation. "pmulhw" and "pmullw" +performs a signed multiplication of the packed words and store the high or low +words of the results in the destination operand. "pmaddwd" performs a multiply +of the packed words and adds the four intermediate double word products in +pairs to produce result as a packed double words. "pand", "por" and "pxor" +perform the logical operations on the quad words, "pandn" peforms also a +logical negation of the destination operand before performing the "and" +operation. "pcmpeqb", "pcmpeqw" and "pcmpeqd" compare for equality of packed +bytes, packed words or packed double words. If a pair of data elements is +equal, the corresponding data element in the destination operand is filled with +bits of value 1, otherwise it's set to 0. "pcmpgtb", "pcmpgtw" and "pcmpgtd" +perform the similar operation, but they check whether the data elements in the +destination operand are greater than the correspoding data elements in the +source operand. "packsswb" converts packed signed words into packed signed +bytes, "packssdw" converts packed signed double words into packed signed +words, using saturation to handle overflow conditions. "packuswb" converts +packed signed words into packed unsigned bytes. Converted data elements from +the source operand are stored in the low part of the destination operand, +while converted data elements from the destination operand are stored in the +high part. "punpckhbw", "punpckhwd" and "punpckhdq" interleaves the data +elements from the high parts of the source and destination operands and +stores the result into the destination operand. "punpcklbw", "punpcklwd" and +"punpckldq" perform the same operation, but the low parts of the source and +destination operand are used. + + paddsb mm0,[esi] ; add packed bytes with signed saturation + pcmpeqw mm3,mm7 ; compare packed words for equality + + "psllw", "pslld" and "psllq" perform logical shift left of the packed words, +packed double words or a single quad word in the destination operand by the +amount specified in the source operand. "psrlw", "psrld" and "psrlq" perform +logical shift right of the packed words, packed double words or a single quad +word. "psraw" and "psrad" perform arithmetic shift of the packed words or +double words. The destination operand should be a MMX register, while source +operand can be a MMX register, 64-bit memory location, or 8-bit immediate +value. + + psllw mm2,mm4 ; shift words left logically + psrad mm4,[ebx] ; shift double words right arithmetically + + "emms" makes the FPU registers usable for the FPU instructions, it must be +used before using the FPU instructions if any MMX instructions were used. + + +2.1.15 SSE instructions + +The SSE extension adds more MMX instructions and also introduces the +operations on packed single precision floating point values. The 128-bit +packed single precision format consists of four single precision floating +point values. The 128-bit SSE registers are designed for the purpose of +operations on this data type. + "movaps" and "movups" transfer a double quad word operand containing packed +single precision values from source operand to destination operand. At least +one of the operands have to be a SSE register, the second one can be also a +SSE register or 128-bit memory location. Memory operands for "movaps" +instruction must be aligned on boundary of 16 bytes, operands for "movups" +instruction don't have to be aligned. + + movups xmm0,[ebx] ; move unaligned double quad word + + "movlps" moves packed two single precision values between the memory and the +low quad word of SSE register. "movhps" moved packed two single precision +values between the memory and the high quad word of SSE register. One of the +operands must be a SSE register, and the other operand must be a 64-bit memory +location. + + movlps xmm0,[ebx] ; move memory to low quad word of xmm0 + movhps [esi],xmm7 ; move high quad word of xmm7 to memory + + "movlhps" moves packed two single precision values from the low quad word +of source register to the high quad word of destination register. "movhlps" +moves two packed single precision values from the high quad word of source +register to the low quad word of destination register. Both operands have to +be a SSE registers. + "movmskps" transfers the most significant bit of each of the four single +precision values in the SSE register into low four bits of a general register. +The source operand must be a SSE register, the destination operand must be a +general register. + "movss" transfers a single precision value between source and destination +operand (only the low double word is trasferred). At least one of the operands +have to be a SSE register, the second one can be also a SSE register or 32-bit +memory location. + + movss [edi],xmm3 ; move low double word of xmm3 to memory + + Each of the SSE arithmetic operations has two variants. When the mnemonic +ends with "ps", the source operand can be a 128-bit memory location or a SSE +register, the destination operand must be a SSE register and the operation is +performed on packed four single precision values, for each pair of the +corresponding data elements separately, the result is stored in the +destination register. When the mnemonic ends with "ss", the source operand +can be a 32-bit memory location or a SSE register, the destination operand +must be a SSE register and the operation is performed on single precision +values, only low double words of SSE registers are used in this case, the +result is stored in the low double word of destination register. "addps" and +"addss" add the values, "subps" and "subss" substract the source value from +destination value, "mulps" and "mulss" multiply the values, "divps" and +"divss" divide the destination value by the source value, "rcpps" and "rcpss" +compute the approximate reciprocal of the source value, "sqrtps" and "sqrtss" +compute the square root of the source value, "rsqrtps" and "rsqrtss" compute +the approximate reciprocal of square root of the source value, "maxps" and +"maxss" compare the source and destination values and return the greater one, +"minps" and "minss" compare the source and destination values and return the +lesser one. + + mulss xmm0,[ebx] ; multiply single precision values + addps xmm3,xmm7 ; add packed single precision values + + "andps", "andnps", "orps" and "xorps" perform the logical operations on +packed single precision values. The source operand can be a 128-bit memory +location or a SSE register, the destination operand must be a SSE register. + "cmpps" compares packed single precision values and returns a mask result +into the destination operand, which must be a SSE register. The source operand +can be a 128-bit memory location or SSE register, the third operand must be an +immediate operand selecting code of one of the eight compare conditions +(table 2.3). "cmpss" performs the same operation on single precision values, +only low double word of destination register is affected, in this case source +operand can be a 32-bit memory location or SSE register. These two +instructions have also variants with only two operands and the condition +encoded within mnemonic. Their mnemonics are obtained by attaching the +mnemonic from table 2.3 to the "cmp" mnemonic and then attaching the "ps" or +"ss" at the end. + + cmpps xmm2,xmm4,0 ; compare packed single precision values + cmpltss xmm0,[ebx] ; compare single precision values + + Table 2.3 SSE conditions + /-------------------------------------------\ + | Code | Mnemonic | Description | + |======|==========|=========================| + | 0 | eq | equal | + | 1 | lt | less than | + | 2 | le | less than or equal | + | 3 | unord | unordered | + | 4 | neq | not equal | + | 5 | nlt | not less than | + | 6 | nle | not less than nor equal | + | 7 | ord | ordered | + \-------------------------------------------/ + + "comiss" and "ucomiss" compare the single precision values and set the ZF, +PF and CF flags to show the result. The destination operand must be a SSE +register, the source operand can be a 32-bit memory location or SSE register. + "shufps" moves any two of the four single precision values from the +destination operand into the low quad word of the destination operand, and any +two of the four values from the source operand into the high quad word of the +destination operand. The destination operand must be a SSE register, the +source operand can be a 128-bit memory location or SSE register, the third +operand must be an 8-bit immediate value selecting which values will be moved +into the destination operand. Bits 0 and 1 select the value to be moved from +destination operand to the low double word of the result, bits 2 and 3 select +the value to be moved from the destination operand to the second double word, +bits 4 and 5 select the value to be moved from the source operand to the third +double word, and bits 6 and 7 select the value to be moved from the source +operand to the high double word of the result. + + shufps xmm0,xmm0,10010011b ; shuffle double words + + "unpckhps" performs an interleaved unpack of the values from the high parts +of the source and destination operands and stores the result in the +destination operand, which must be a SSE register. The source operand can be +a 128-bit memory location or a SSE register. "unpcklps" performs an +interleaved unpack of the values from the low parts of the source and +destination operand and stores the result in the destination operand, +the rules for operands are the same. + "cvtpi2ps" converts packed two double word integers into the the packed two +single precision floating point values and stores the result in the low quad +word of the destination operand, which should be a SSE register. The source +operand can be a 64-bit memory location or MMX register. + + cvtpi2ps xmm0,mm0 ; convert integers to single precision values + + "cvtsi2ss" converts a double word integer into a single precision floating +point value and stores the result in the low double word of the destination +operand, which should be a SSE register. The source operand can be a 32-bit +memory location or 32-bit general register. + + cvtsi2ss xmm0,eax ; convert integer to single precision value + + "cvtps2pi" converts packed two single precision floating point values into +packed two double word integers and stores the result in the destination +operand, which should be a MMX register. The source operand can be a 64-bit +memory location or SSE register, only low quad word of SSE register is used. +"cvttps2pi" performs the similar operation, except that truncation is used to +round a source values to integers, rules for the operands are the same. + + cvtps2pi mm0,xmm0 ; convert single precision values to integers + + "cvtss2si" convert a single precision floating point value into a double +word integer and stores the result in the destination operand, which should be +a 32-bit general register. The source operand can be a 32-bit memory location +or SSE register, only low double word of SSE register is used. "cvttss2si" +performs the similar operation, except that truncation is used to round a +source value to integer, rules for the operands are the same. + + cvtss2si eax,xmm0 ; convert single precision value to integer + + "pextrw" copies the word in the source operand specified by the third +operand to the destination operand. The source operand must be a MMX register, +the destination operand must be a 32-bit general register (the high word of +the destination is cleared), the third operand must an 8-bit immediate value. + + pextrw eax,mm0,1 ; extract word into eax + + "pinsrw" inserts a word from the source operand in the destination operand +at the location specified with the third operand, which must be an 8-bit +immediate value. The destination operand must be a MMX register, the source +operand can be a 16-bit memory location or 32-bit general register (only low +word of the register is used). + + pinsrw mm1,ebx,2 ; insert word from ebx + + "pavgb" and "pavgw" compute average of packed bytes or words. "pmaxub" +return the maximum values of packed unsigned bytes, "pminub" returns the +minimum values of packed unsigned bytes, "pmaxsw" returns the maximum values +of packed signed words, "pminsw" returns the minimum values of packed signed +words. "pmulhuw" performs a unsigned multiplication of the packed words and +stores the high words of the results in the destination operand. "psadbw" +computes the absolute differences of packed unsigned bytes, sums the +differences, and stores the sum in the low word of destination operand. All +these instructions follow the same rules for operands as the general MMX +operations described in previous section. + "pmovmskb" creates a mask made of the most significant bit of each byte in +the source operand and stores the result in the low byte of destination +operand. The source operand must be a MMX register, the destination operand +must a 32-bit general register. + "pshufw" inserts words from the source operand in the destination operand +from the locations specified with the third operand. The destination operand +must be a MMX register, the source operand can be a 64-bit memory location or +MMX register, third operand must an 8-bit immediate value selecting which +values will be moved into destination operand, in the similar way as the third +operand of the "shufps" instruction. + "movntq" moves the quad word from the source operand to memory using a +non-temporal hint to minimize cache pollution. The source operand should be a +MMX register, the destination operand should be a 64-bit memory location. +"movntps" stores packed single precision values from the SSE register to +memory using a non-temporal hint. The source operand should be a SSE register, +the destination operand should be a 128-bit memory location. "maskmovq" stores +selected bytes from the first operand into a 64-bit memory location using a +non-temporal hint. Both operands should be a MMX registers, the second operand +selects wich bytes from the source operand are written to memory. The +memory location is pointed by DI (or EDI) register in the segment selected +by DS. + "prefetcht0", "prefetcht1", "prefetcht2" and "prefetchnta" fetch the line +of data from memory that contains byte specified with the operand to a +specified location in hierarchy. The operand should be an 8-bit memory +location. + "sfence" performs a serializing operation on all instruction storing to +memory that were issued prior to it. This instruction has no operands. + "ldmxcsr" loads the 32-bit memory operand into the MXCSR register. "stmxcsr" +stores the contents of MXCSR into a 32-bit memory operand. + "fxsave" saves the current state of the FPU, MXCSR register, and all the FPU +and SSE registers to a 512-byte memory location specified in the destination +operand. "fxrstor" reloads data previously stored with "fxsave" instruction +from the specified 512-byte memory location. The memory operand for both those +instructions must be aligned on 16 byte boundary, it should declare operand +of no specified size. + + +2.1.16 SSE2 instructions + +The SSE2 extension introduces the operations on packed double precision +floating point values, extends the syntax of MMX instructions, and adds also +some new instructions. + "movapd" and "movupd" transfer a double quad word operand containing packed +double precision values from source operand to destination operand. These +instructions are analogous to "movaps" and "movups" and have the same rules +for operands. + "movlpd" moves double precision value between the memory and the low quad +word of SSE register. "movhpd" moved double precision value between the memory +and the high quad word of SSE register. These instructions are analogous to +"movlps" and "movhps" and have the same rules for operands. + "movmskpd" transfers the most significant bit of each of the two double +precision values in the SSE register into low two bits of a general register. +This instruction is analogous to "movmskps" and has the same rules for +operands. + "movsd" transfers a double precision value between source and destination +operand (only the low quad word is trasferred). At least one of the operands +have to be a SSE register, the second one can be also a SSE register or 64-bit +memory location. + Arithmetic operations on double precision values are: "addpd", "addsd", +"subpd", "subsd", "mulpd", "mulsd", "divpd", "divsd", "sqrtpd", "sqrtsd", +"maxpd", "maxsd", "minpd", "minsd", and they are analoguous to arithmetic +operations on single precision values described in previous section. When the +mnemonic ends with "pd" instead of "ps", the operation is performed on packed +two double precision values, but rules for operands are the same. When the +mnemonic ends with "sd" instead of "ss", the source operand can be a 64-bit +memory location or a SSE register, the destination operand must be a SSE +register and the operation is performed on double precision values, only low +quad words of SSE registers are used in this case. + "andpd", "andnpd", "orpd" and "xorpd" perform the logical operations on +packed double precision values. They are analoguous to SSE logical operations +on single prevision values and have the same rules for operands. + "cmppd" compares packed double precision values and returns and returns a +mask result into the destination operand. This instruction is analoguous to +"cmpps" and has the same rules for operands. "cmpsd" performs the same +operation on double precision values, only low quad word of destination +register is affected, in this case source operand can be a 64-bit memory or +SSE register. Variant with only two operands are obtained by attaching the +condition mnemonic from table 2.3 to the "cmp" mnemonic and then attaching +the "pd" or "sd" at the end. + "comisd" and "ucomisd" compare the double precision values and set the ZF, +PF and CF flags to show the result. The destination operand must be a SSE +register, the source operand can be a 128-bit memory location or SSE register. + "shufpd" moves any of the two double precision values from the destination +operand into the low quad word of the destination operand, and any of the two +values from the source operand into the high quad word of the destination +operand. This instruction is analoguous to "shufps" and has the same rules for +operand. Bit 0 of the third operand selects the value to be moved from the +destination operand, bit 1 selects the value to be moved from the source +operand, the rest of bits are reserved and must be zeroed. + "unpckhpd" performs an unpack of the high quad words from the source and +destination operands, "unpcklpd" performs an unpack of the low quad words from +the source and destination operands. They are analoguous to "unpckhps" and +"unpcklps", and have the same rules for operands. + "cvtps2pd" converts the packed two single precision floating point values to +two packed double precision floating point values, the destination operand +must be a SSE register, the source operand can be a 64-bit memory location or +SSE register. "cvtpd2ps" converts the packed two double precision floating +point values to packed two single precision floating point values, the +destination operand must be a SSE register, the source operand can be a +128-bit memory location or SSE register. "cvtss2sd" converts the single +precision floating point value to double precision floating point value, the +destination operand must be a SSE register, the source operand can be a 32-bit +memory location or SSE register. "cvtsd2ss" converts the double precision +floating point value to single precision floating point value, the destination +operand must be a SSE register, the source operand can be 64-bit memory +location or SSE register. + "cvtpi2pd" converts packed two double word integers into the the packed +double precision floating point values, the destination operand must be a SSE +register, the source operand can be a 64-bit memory location or MMX register. +"cvtsi2sd" converts a double word integer into a double precision floating +point value, the destination operand must be a SSE register, the source +operand can be a 32-bit memory location or 32-bit general register. "cvtpd2pi" +converts packed double precision floating point values into packed two double +word integers, the destination operand should be a MMX register, the source +operand can be a 128-bit memory location or SSE register. "cvttpd2pi" performs +the similar operation, except that truncation is used to round a source values +to integers, rules for operands are the same. "cvtsd2si" converts a double +precision floating point value into a double word integer, the destination +operand should be a 32-bit general register, the source operand can be a +64-bit memory location or SSE register. "cvttsd2si" performs the similar +operation, except that truncation is used to round a source value to integer, +rules for operands are the same. + "cvtps2dq" and "cvttps2dq" convert packed single precision floating point +values to packed four double word integers, storing them in the destination +operand. "cvtpd2dq" and "cvttpd2dq" convert packed double precision floating +point values to packed two double word integers, storing the result in the low +quad word of the destination operand. "cvtdq2ps" converts packed four +double word integers to packed single precision floating point values. +For all these instruction destination operand must be a SSE register, the +source operand can be a 128-bit memory location or SSE register. +"cvtdq2pd" converts packed two double word integers from the source operand to +packed double precision floating point values, the source can be a 64-bit +memory location or SSE register, destination has to be SSE register. + "movdqa" and "movdqu" transfer a double quad word operand containing packed +integers from source operand to destination operand. At least one of the +operands have to be a SSE register, the second one can be also a SSE register +or 128-bit memory location. Memory operands for "movdqa" instruction must be +aligned on boundary of 16 bytes, operands for "movdqu" instruction don't have +to be aligned. + "movq2dq" moves the contents of the MMX source register to the low quad word +of destination SSE register. "movdq2q" moves the low quad word from the source +SSE register to the destination MMX register. + + movq2dq xmm0,mm1 ; move from MMX register to SSE register + movdq2q mm0,xmm1 ; move from SSE register to MMX register + + All MMX instructions operating on the 64-bit packed integers (those with +mnemonics starting with "p") are extended to operate on 128-bit packed +integers located in SSE registers. Additional syntax for these instructions +needs an SSE register where MMX register was needed, and the 128-bit memory +location or SSE register where 64-bit memory location or MMX register were +needed. The exception is "pshufw" instruction, which doesn't allow extended +syntax, but has two new variants: "pshufhw" and "pshuflw", which allow only +the extended syntax, and perform the same operation as "pshufw" on the high +or low quad words of operands respectively. Also the new instruction "pshufd" +is introduced, which performs the same operation as "pshufw", but on the +double words instead of words, it allows only the extended syntax. + + psubb xmm0,[esi] ; substract 16 packed bytes + pextrw eax,xmm0,7 ; extract highest word into eax + + "paddq" performs the addition of packed quad words, "psubq" performs the +substraction of packed quad words, "pmuludq" performs an unsigned +multiplication of low double words from each corresponding quad words and +returns the results in packed quad words. These instructions follow the same +rules for operands as the general MMX operations described in 2.1.14. + "pslldq" and "psrldq" perform logical shift left or right of the double +quad word in the destination operand by the amount of bytes specified in the +source operand. The destination operand should be a SSE register, source +operand should be an 8-bit immediate value. + "punpckhqdq" interleaves the high quad word of the source operand and the +high quad word of the destination operand and writes them to the destination +SSE register. "punpcklqdq" interleaves the low quad word of the source operand +and the low quad word of the destination operand and writes them to the +destination SSE register. The source operand can be a 128-bit memory location +or SSE register. + "movntdq" stores packed integer data from the SSE register to memory using +non-temporal hint. The source operand should be a SSE register, the +destination operand should be a 128-bit memory location. "movntpd" stores +packed double precision values from the SSE register to memory using a +non-temporal hint. Rules for operand are the same. "movnti" stores integer +from a general register to memory using a non-temporal hint. The source +operand should be a 32-bit general register, the destination operand should +be a 32-bit memory location. "maskmovdqu" stores selected bytes from the first +operand into a 128-bit memory location using a non-temporal hint. Both +operands should be a SSE registers, the second operand selects wich bytes from +the source operand are written to memory. The memory location is pointed by DI +(or EDI) register in the segment selected by DS and does not need to be +aligned. + "clflush" writes and invalidates the cache line associated with the address +of byte specified with the operand, which should be a 8-bit memory location. + "lfence" performs a serializing operation on all instruction loading from +memory that were issued prior to it. "mfence" performs a serializing operation +on all instruction accesing memory that were issued prior to it, and so it +combines the functions of "sfence" (described in previous section) and +"lfence" instructions. These instructions have no operands. + + +2.1.17 SSE3 instructions + +Prescott technology introduced some new instructions to improve the performance +of SSE and SSE2 - this extension is called SSE3. + "fisttp" behaves like the "fistp" instruction and accepts the same operands, +the only difference is that it always used truncation, irrespective of the +rounding mode. + "movshdup" loads into destination operand the 128-bit value obtained from +the source value of the same size by filling the each quad word with the two +duplicates of the value in its high double word. "movsldup" performs the same +action, except it duplicates the values of low double words. The destination +operand should be SSE register, the source operand can be SSE register or +128-bit memory location. + "movddup" loads the 64-bit source value and duplicates it into high and low +quad word of the destination operand. The destination operand should be SSE +register, the source operand can be SSE register or 64-bit memory location. + "lddqu" is functionally equivalent to "movdqu" with memory as source +operand, but it may improve performance when the source operand crosses a +cacheline boundary. The destination operand has to be SSE register, the source +operand must be 128-bit memory location. + "addsubps" performs single precision addition of second and fourth pairs and +single precision substracion of the first and third pairs of floating point +values in the operands. "addsubpd" performs double precision addition of the +second pair and double precision substraction of the first pair of floating +point values in the operand. "haddps" performs the addition of two single +precision values within the each quad word of source and destination operands, +and stores the results of such horizontal addition of values from destination +operand into low quad word of destination operand, and the results from the +source operand into high quad word of destination operand. "haddpd" performs +the addition of two double precision values within each operand, and stores +the result from destination operand into low quad word of destination operand, +and the result from source operand into high quad word of destination operand. +All these instruction need the destination operand to be SSE register, source +operand can be SSE register or 128-bit memory location. + "monitor" sets up an address range for monitoring of write-back stores. It +need its three operands to be EAX, ECX and EDX register in that order. "mwait" +waits for a write-back store to the address range set up by the "monitor" +instruction. It uses two operands with additional parameters, first being the +EAX and second the ECX register. + The functionality of SSE3 is further extended by the set of Supplemental +SSE3 instructions (SSSE3). They generally follow the same rules for operands +as all the MMX operations extended by SSE. + "phaddw" and "phaddd" perform the horizontal additional of the pairs of +adjacent values from both the source and destination operand, and stores the +sums into the destination (sums from the source operand go into lower part of +destination register). They operate on 16-bit or 32-bit chunks, respectively. +"phaddsw" performs the same operation on signed 16-bit packed values, but the +result of each addition is saturated. "phsubw" and "phsubd" analogously +perform the horizontal substraction of 16-bit or 32-bit packed value, and +"phsubsw" performs the horizontal substraction of signed 16-bit packed values +with saturation. + "pabsb", "pabsw" and "pabsd" calculate the absolute value of each signed +packed signed value in source operand and stores them into the destination +register. They operator on 8-bit, 16-bit and 32-bit elements respectively. + "pmaddubsw" multiplies signed 8-bit values from the source operand with the +corresponding unsigned 8-bit values from the destination operand to produce +intermediate 16-bit values, and every adjacent pair of those intermediate +values is then added horizontally and those 16-bit sums are stored into the +destination operand. + "pmulhrsw" multiplies corresponding 16-bit integers from the source and +destination operand to produce intermediate 32-bit values, and the 16 bits +next to the highest bit of each of those values are then rounded and packed +into the destination operand. + "pshufb" shuffles the bytes in the destination operand according to the +mask provided by source operand - each of the bytes in source operand is +an index of the target position for the corresponding byte in the destination. + "psignb", "psignw" and "psignd" perform the operation on 8-bit, 16-bit or +32-bit integers in destination operand, depending on the signs of the values +in the source. If the value in source is negative, the corresponding value in +the destination register is negated, if the value in source is positive, no +operation is performed on the corresponding value is performed, and if the +value in source is zero, the value in destination is zeroed, too. + "palignr" appends the source operand to the destination operand to form the +intermediate value of twice the size, and then extracts into the destination +register the 64 or 128 bits that are right-aligned to the byte offset +specified by the third operand, which should be an 8-bit immediate value. This +is the only SSSE3 instruction that takes three arguments. + + +2.1.18 AMD 3DNow! instructions + +The 3DNow! extension adds a new MMX instructions to those described in 2.1.14, +and introduces operation on the 64-bit packed floating point values, each +consisting of two single precision floating point values. + These instructions follow the same rules as the general MMX operations, the +destination operand should be a MMX register, the source operand can be a MMX +register or 64-bit memory location. "pavgusb" computes the rounded averages +of packed unsigned bytes. "pmulhrw" performs a signed multiplication of the +packed words, round the high word of each double word results and stores them +in the destination operand. "pi2fd" converts packed double word integers into +packed floating point values. "pf2id" converts packed floating point values +into packed double word integers using truncation. "pi2fw" converts packed +word integers into packed floating point values, only low words of each +double word in source operand are used. "pf2iw" converts packed floating +point values to packed word integers, results are extended to double words +using the sign extension. "pfadd" adds packed floating point values. "pfsub" +and "pfsubr" substracts packed floating point values, the first one substracts +source values from destination values, the second one substracts destination +values from the source values. "pfmul" multiplies packed floating point +values. "pfacc" adds the low and high floating point values of the destination +operand, storing the result in the low double word of destination, and adds +the low and high floating point values of the source operand, storing the +result in the high double word of destination. "pfnacc" substracts the high +floating point value of the destination operand from the low, storing the +result in the low double word of destination, and substracts the high floating +point value of the source operand from the low, storing the result in the high +double word of destination. "pfpnacc" substracts the high floating point value +of the destination operand from the low, storing the result in the low double +word of destination, and adds the low and high floating point values of the +source operand, storing the result in the high double word of destination. +"pfmax" and "pfmin" compute the maximum and minimum of floating point values. +"pswapd" reverses the high and low double word of the source operand. "pfrcp" +returns an estimates of the reciprocals of floating point values from the +source operand, "pfrsqrt" returns an estimates of the reciprocal square +roots of floating point values from the source operand, "pfrcpit1" performs +the first step in the Newton-Raphson iteration to refine the reciprocal +approximation produced by "pfrcp" instruction, "pfrsqit1" performs the first +step in the Newton-Raphson iteration to refine the reciprocal square root +approximation produced by "pfrsqrt" instruction, "pfrcpit2" performs the +second final step in the Newton-Raphson iteration to refine the reciprocal +approximation or the reciprocal square root approximation. "pfcmpeq", +"pfcmpge" and "pfcmpgt" compare the packed floating point values and sets +all bits or zeroes all bits of the correspoding data element in the +destination operand according to the result of comparison, first checks +whether values are equal, second checks whether destination value is greater +or equal to source value, third checks whether destination value is greater +than source value. + "prefetch" and "prefetchw" load the line of data from memory that contains +byte specified with the operand into the data cache, "prefetchw" instruction +should be used when the data in the cache line is expected to be modified, +otherwise the "prefetch" instruction should be used. The operand should be an +8-bit memory location. + "femms" performs a fast clear of MMX state. This instruction has no +operands. + + +2.1.19 The x86-64 long mode instructions + +The AMD64 and EM64T architectures (we will use the common name x86-64 for them +both) extend the x86 instruction set for the 64-bit processing. While legacy +and compatibility modes use the same set of registers and instructions, the +new long mode extends the x86 operations to 64 bits and introduces several new +registers. You can turn on generating the code for this mode with the "use64" +directive. + Each of the general purpose registers is extended to 64 bits and the eight +whole new general purpose registers and also eight new SSE registers are added. +See table 2.4 for the summary of new registers (only the ones that was not +listed in table 1.2). The general purpose registers of smallers sizes are the +low order portions of the larger ones. You can still access the "ah", "bh", +"ch" and "dh" registers in long mode, but you cannot use them in the same +instruction with any of the new registers. + + Table 2.4 New registers in long mode + /--------------------------------------------------\ + | Type | General | SSE | AVX | + |------|---------------------------|-------|-------| + | Bits | 8 | 16 | 32 | 64 | 128 | 256 | + |======|======|======|======|======|=======|=======| + | | | | | rax | | | + | | | | | rcx | | | + | | | | | rdx | | | + | | | | | rbx | | | + | | spl | | | rsp | | | + | | bpl | | | rbp | | | + | | sil | | | rsi | | | + | | dil | | | rdi | | | + | | r8b | r8w | r8d | r8 | xmm8 | ymm8 | + | | r9b | r9w | r9d | r9 | xmm9 | ymm9 | + | | r10b | r10w | r10d | r10 | xmm10 | ymm10 | + | | r11b | r11w | r11d | r11 | xmm11 | ymm11 | + | | r12b | r12w | r12d | r12 | xmm12 | ymm12 | + | | r13b | r13w | r13d | r13 | xmm13 | ymm13 | + | | r14b | r14w | r14d | r14 | xmm14 | ymm14 | + | | r15b | r15w | r15d | r15 | xmm15 | ymm15 | + \--------------------------------------------------/ + + In general any instruction from x86 architecture, which allowed 16-bit or +32-bit operand sizes, in long mode allows also the 64-bit operands. The 64-bit +registers should be used for addressing in long mode, the 32-bit addressing +is also allowed, but it's not possible to use the addresses based on 16-bit +registers. Below are the samples of new operations possible in long mode on the +example of "mov" instruction: + + mov rax,r8 ; transfer 64-bit general register + mov al,[rbx] ; transfer memory addressed by 64-bit register + +The long mode uses also the instruction pointer based addresses, you can +specify it manually with the special RIP register symbol, but such addressing +is also automatically generated by flat assembler, since there is no 64-bit +absolute addressing in long mode. You can still force the assembler to use the +32-bit absolute addressing by putting the "dword" size override for address +inside the square brackets. There is also one exception, where the 64-bit +absolute addressing is possible, it's the "mov" instruction with one of the +operand being accumulator register, and second being the memory operand. +To force the assembler to use the 64-bit absolute addressing there, use the +"qword" size operator for address inside the square brackets. When no size +operator is applied to address, assembler generates the optimal form +automatically. + + mov [qword 0],rax ; absolute 64-bit addressing + mov [dword 0],r15d ; absolute 32-bit addressing + mov [0],rsi ; automatic RIP-relative addressing + mov [rip+3],sil ; manual RIP-relative addressing + + Also as the immediate operands for 64-bit operations only the signed 32-bit +values are possible, with the only exception being the "mov" instruction with +destination operand being 64-bit general purpose register. Trying to force the +64-bit immediate with any other instruction will cause an error. + If any operation is performed on the 32-bit general registers in long mode, +the upper 32 bits of the 64-bit registers containing them are filled with +zeros. This is unlike the operations on 16-bit or 8-bit portions of those +registers, which preserve the upper bits. + Three new type conversion instructions are available. The "cdqe" sign +extends the double word in EAX into quad word and stores the result in RAX +register. "cqo" sign extends the quad word in RAX into double quad word and +stores the extra bits in the RDX register. These instructions have no +operands. "movsxd" sign extends the double word source operand, being either +the 32-bit register or memory, into 64-bit destination operand, which has to +be register. No analogous instruction is needed for the zero extension, since +it is done automatically by any operations on 32-bit registers, as noted in +previous paragraph. And the "movzx" and "movsx" instructions, conforming to +the general rule, can be used with 64-bit destination operand, allowing +extension of byte or word values into quad words. + All the binary arithmetic and logical instruction have been promoted to +allow 64-bit operands in long mode. The use of decimal arithmetic instructions +in long mode is prohibited. + The stack operations, like "push" and "pop" in long mode default to 64-bit +operands and it's not possible to use 32-bit operands with them. The "pusha" +and "popa" are disallowed in long mode. + The indirect near jumps and calls in long mode default to 64-bit operands +and it's not possible to use the 32-bit operands with them. On the other hand, +the indirect far jumps and calls allow any operands that were allowed by the +x86 architecture and also 80-bit memory operand is allowed (though only EM64T +seems to implement such variant), with the first eight bytes defining the +offset and two last bytes specifying the selector. The direct far jumps and +calls are not allowed in long mode. + The I/O instructions, "in", "out", "ins" and "outs" are the exceptional +instructions that are not extended to accept quad word operands in long mode. +But all other string operations are, and there are new short forms "movsq", +"cmpsq", "scasq", "lodsq" and "stosq" introduced for the variants of string +operations for 64-bit string elements. The RSI and RDI registers are used by +default to address the string elements. + The "lfs", "lgs" and "lss" instructions are extended to accept 80-bit source +memory operand with 64-bit destination register (though only EM64T seems to +implement such variant). The "lds" and "les" are disallowed in long mode. + The system instructions like "lgdt" which required the 48-bit memory operand, +in long mode require the 80-bit memory operand. + The "cmpxchg16b" is the 64-bit equivalent of "cmpxchg8b" instruction, it uses +the double quad word memory operand and 64-bit registers to perform the +analoguous operation. + The "fxsave64" and "fxrstor64" are new variants of "fxsave" and "fxrstor" +instructions, available only in long mode, which use a different format of +storage area in order to store some pointers in full 64-bit size. + "swapgs" is the new instruction, which swaps the contents of GS register and +the KernelGSbase model-specific register (MSR address 0C0000102h). + "syscall" and "sysret" is the pair of new instructions that provide the +functionality similar to "sysenter" and "sysexit" in long mode, where the +latter pair is disallowed. The "sysexitq" and "sysretq" mnemonics provide the +64-bit versions of "sysexit" and "sysret" instructions. + The "rdmsrq" and "wrmsrq" mnemonics are the 64-bit variants of the "rdmsr" +and "wrmsr" instructions. + + +2.1.20 SSE4 instructions + +There are actually three different sets of instructions under the name SSE4. +Intel designed two of them, SSE4.1 and SSE4.2, with latter extending the +former into the full Intel's SSE4 set. On the other hand, the implementation +by AMD includes only a few instructions from this set, but also contains +some additional instructions, that are called the SSE4a set. + The SSE4.1 instructions mostly follow the same rules for operands, as +the basic SSE operations, so they require destination operand to be SSE +register and source operand to be 128-bit memory location or SSE register, +and some operations require a third operand, the 8-bit immediate value. + "pmulld" performs a signed multiplication of the packed double words and +stores the low double words of the results in the destination operand. +"pmuldq" performs a two signed multiplications of the corresponding double +words in the lower quad words of operands, and stores the results as +packed quad words into the destination register. "pminsb" and "pmaxsb" +return the minimum or maximum values of packed signed bytes, "pminuw" and +"pmaxuw" return the minimum and maximum values of packed unsigned words, +"pminud", "pmaxud", "pminsd" and "pmaxsd" return minimum or maximum values +of packed unsigned or signed words. These instruction complement the +instructions computing packed minimum or maximum introduced by SSE. + "ptest" sets the ZF flag to one when the result of bitwise AND of the +both operands is zero, and zeroes the ZF otherwise. It also sets CF flag +to one, when the result of bitwise AND of the destination operand with +the bitwise NOT of the source operand is zero, and zeroes the CF otherwise. +"pcmpeqq" compares packed quad words for equality, and fills the +corresponding elements of destination operand with either ones or zeros, +depending on the result of comparison. + "packusdw" converts packed signed double words from both the source and +destination operand into the unsigned words using saturation, and stores +the eight resulting word values into the destination register. + "phminposuw" finds the minimum unsigned word value in source operand and +places it into the lowest word of destination operand, setting the remaining +upper bits of destination to zero. + "roundps", "roundss", "roundpd" and "roundsd" perform the rounding of packed +or individual floating point value of single or double precision, using the +rounding mode specified by the third operand. + + roundsd xmm0,xmm1,0011b ; round toward zero + + "dpps" calculates dot product of packed single precision floating point +values, that is it multiplies the corresponding pairs of values from source and +destination operand and then sums the products up. The high four bits of the +8-bit immediate third operand control which products are calculated and taken +to the sum, and the low four bits control, into which elements of destination +the resulting dot product is copied (the other elements are filled with zero). +"dppd" calculates dot product of packed double precision floating point values. +The bits 4 and 5 of third operand control, which products are calculated and +added, and bits 0 and 1 of this value control, which elements in destination +register should get filled with the result. "mpsadbw" calculates multiple sums +of absolute differences of unsigned bytes. The third operand controls, with +value in bits 0-1, which of the four-byte blocks in source operand is taken to +calculate the absolute differencies, and with value in bit 2, at which of the +two first four-byte block in destination operand start calculating multiple +sums. The sum is calculated from four absolute differencies between the +corresponding unsigned bytes in the source and destination block, and each next +sum is calculated in the same way, but taking the four bytes from destination +at the position one byte after the position of previous block. The four bytes +from the source stay the same each time. This way eight sums of absolute +differencies are calculated and stored as packed word values into the +destination operand. The instructions described in this paragraph follow the +same rules for operands, as "roundps" instruction. + "blendps", "blendvps", "blendpd" and "blendvpd" conditionally copy the +values from source operand into the destination operand, depending on the bits +of the mask provided by third operand. If a mask bit is set, the corresponding +element of source is copied into the same place in destination, otherwise this +position is destination is left unchanged. The rules for the first two operands +are the same, as for general SSE instructions. "blendps" and "blendpd" need +third operand to be 8-bit immediate, and they operate on single or double +precision values, respectively. "blendvps" and "blendvpd" require third operand +to be the XMM0 register. + + blendvps xmm3,xmm7,xmm0 ; blend according to mask + + "pblendw" conditionally copies word elements from the source operand into the +destination, depending on the bits of mask provided by third operand, which +needs to be 8-bit immediate value. "pblendvb" conditionally copies byte +elements from the source operands into destination, depending on mask defined +by the third operand, which has to be XMM0 register. These instructions follow +the same rules for operands as "blendps" and "blendvps" instructions, +respectively. + "insertps" inserts a single precision floating point value taken from the +position in source operand specified by bits 6-7 of third operand into location +in destination register selected by bits 4-5 of third operand. Additionally, +the low four bits of third operand control, which elements in destination +register will be set to zero. The first two operands follow the same rules as +for the general SSE operation, the third operand should be 8-bit immediate. + "extractps" extracts a single precision floating point value taken from the +location in source operand specified by low two bits of third operand, and +stores it into the destination operand. The destination can be a 32-bit memory +value or general purpose register, the source operand must be SSE register, +and the third operand should be 8-bit immediate value. + + extractps edx,xmm3,3 ; extract the highest value + + "pinsrb", "pinsrd" and "pinsrq" copy a byte, double word or quad word from +the source operand into the location of destination operand determined by the +third operand. The destination operand has to be SSE register, the source +operand can be a memory location of appropriate size, or the 32-bit general +purpose register (but 64-bit general purpose register for "pinsrq", which is +only available in long mode), and the third operand has to be 8-bit immediate +value. These instructions complement the "pinsrw" instruction operating on SSE +register destination, which was introduced by SSE2. + + pinsrd xmm4,eax,1 ; insert double word into second position + + "pextrb", "pextrw", "pextrd" and "pextrq" copy a byte, word, double word or +quad word from the location in source operand specified by third operand, into +the destination. The source operand should be SSE register, the third operand +should be 8-bit immediate, and the destination operand can be memory location +of appropriate size, or the 32-bit general purpose register (but 64-bit general +purpose register for "pextrq", which is only available in long mode). The +"pextrw" instruction with SSE register as source was already introduced by +SSE2, but SSE4 extends it to allow memory operand as destination. + + pextrw [ebx],xmm3,7 ; extract highest word into memory + + "pmovsxbw" and "pmovzxbw" perform sign extension or zero extension of eight +byte values from the source operand into packed word values in destination +operand, which has to be SSE register. The source can be 64-bit memory or SSE +register - when it is register, only its low portion is used. "pmovsxbd" and +"pmovzxbd" perform sign extension or zero extension of the four byte values +from the source operand into packed double word values in destination operand, +the source can be 32-bit memory or SSE register. "pmovsxbq" and "pmovzxbq" +perform sign extension or zero extension of the two byte values from the +source operand into packed quad word values in destination operand, the source +can be 16-bit memory or SSE register. "pmovsxwd" and "pmovzxwd" perform sign +extension or zero extension of the four word values from the source operand +into packed double words in destination operand, the source can be 64-bit +memory or SSE register. "pmovsxwq" and "pmovzxwq" perform sign extension or +zero extension of the two word values from the source operand into packed quad +words in destination operand, the source can be 32-bit memory or SSE register. +"pmovsxdq" and "pmovzxdq" perform sign extension or zero extension of the two +double word values from the source operand into packed quad words in +destination operand, the source can be 64-bit memory or SSE register. + + pmovzxbq xmm0,word [si] ; zero-extend bytes to quad words + pmovsxwq xmm0,xmm1 ; sign-extend words to quad words + + "movntdqa" loads double quad word from the source operand to the destination +using a non-temporal hint. The destination operand should be SSE register, +and the source operand should be 128-bit memory location. + The SSE4.2, described below, adds not only some new operations on SSE +registers, but also introduces some completely new instructions operating on +general purpose registers only. + "pcmpistri" compares two zero-ended (implicit length) strings provided in +its source and destination operand and generates an index stored to ECX; +"pcmpistrm" performs the same comparison and generates a mask stored to XMM0. +"pcmpestri" compares two strings of explicit lengths, with length provided +in EAX for the destination operand and in EDX for the source operand, and +generates an index stored to ECX; "pcmpestrm" performs the same comparision +and generates a mask stored to XMM0. The source and destination operand follow +the same rules as for general SSE instructions, the third operand should be +8-bit immediate value determining the details of performed operation - refer to +Intel documentation for information on those details. + "pcmpgtq" compares packed quad words, and fills the corresponding elements of +destination operand with either ones or zeros, depending on whether the value +in destination is greater than the one in source, or not. This instruction +follows the same rules for operands as "pcmpeqq". + "crc32" accumulates a CRC32 value for the source operand starting with +initial value provided by destination operand, and stores the result in +destination. Unless in long mode, the destination operand should be a 32-bit +general purpose register, and the source operand can be a byte, word, or double +word register or memory location. In long mode the destination operand can +also be a 64-bit general purpose register, and the source operand in such case +can be a byte or quad word register or memory location. + + crc32 eax,dl ; accumulate CRC32 on byte value + crc32 eax,word [ebx] ; accumulate CRC32 on word value + crc32 rax,qword [rbx] ; accumulate CRC32 on quad word value + + "popcnt" calculates the number of bits set in the source operand, which can +be 16-bit, 32-bit, or 64-bit general purpose register or memory location, +and stores this count in the destination operand, which has to be register of +the same size as source operand. The 64-bit variant is available only in long +mode. + + popcnt ecx,eax ; count bits set to 1 + + The SSE4a extension, which also includes the "popcnt" instruction introduced +by SSE4.2, at the same time adds the "lzcnt" instruction, which follows the +same syntax, and calculates the count of leading zero bits in source operand +(if the source operand is all zero bits, the total number of bits in source +operand is stored in destination). + "extrq" extract the sequence of bits from the low quad word of SSE register +provided as first operand and stores them at the low end of this register, +filling the remaining bits in the low quad word with zeros. The position of bit +string and its length can either be provided with two 8-bit immediate values +as second and third operand, or by SSE register as second operand (and there +is no third operand in such case), which should contain position value in bits +8-13 and length of bit string in bits 0-5. + + extrq xmm0,8,7 ; extract 8 bits from position 7 + extrq xmm0,xmm5 ; extract bits defined by register + + "insertq" writes the sequence of bits from the low quad word of the source +operand into specified position in low quad word of the destination operand, +leaving the other bits in low quad word of destination intact. The position +where bits should be written and the length of bit string can either be +provided with two 8-bit immediate values as third and fourth operand, or by +the bit fields in source operand (and there are only two operands in such +case), which should contain position value in bits 72-77 and length of bit +string in bits 64-69. + + insertq xmm1,xmm0,4,2 ; insert 4 bits at position 2 + insertq xmm1,xmm0 ; insert bits defined by register + + "movntss" and "movntsd" store single or double precision floating point +value from the source SSE register into 32-bit or 64-bit destination memory +location respectively, using non-temporal hint. + + +2.1.21 AVX instructions + +The Advanced Vector Extensions introduce instructions that are new variants +of SSE instructions, with new scheme of encoding that allows extended syntax +having a destination operand separate from all the source operands. It also +introduces 256-bit AVX registers, which extend up the old 128-bit SSE +registers. Any AVX instruction that puts some result into SSE register, puts +zero bits into high portion of the AVX register containing it. + The AVX version of SSE instruction has the mnemonic obtained by prepending +SSE instruction name with "v". For any SSE arithmetic instruction which had a +destination operand also being used as one of the source values, the AVX +variant has a new syntax with three operands - the destination and two sources. +The destination and first source can be SSE registers, and second source can be +SSE register or memory. If the operation is performed on single pair of values, +the remaining bits of first source SSE register are copied into the the +destination register. + + vsubss xmm0,xmm2,xmm3 ; substract two 32-bit floats + vmulsd xmm0,xmm7,qword [esi] ; multiply two 64-bit floats + +In case of packed operations, each instruction can also operate on the 256-bit +data size when the AVX registers are specified instead of SSE registers, and +the size of memory operand is also doubled then. + + vaddps ymm1,ymm5,yword [esi] ; eight sums of 32-bit float pairs + +The instructions that operate on packed integer types (in particular the ones +that earlier had been promoted from MMX to SSE) also acquired the new syntax +with three operands, however they are only allowed to operate on 128-bit +packed types and thus cannot use the whole AVX registers. + + vpavgw xmm3,xmm0,xmm2 ; average of 16-bit integers + vpslld xmm1,xmm0,1 ; shift double words left + +If the SSE version of instruction had a syntax with three operands, the third +one being an immediate value, the AVX version of such instruction takes four +operands, with immediate remaining the last one. + + vshufpd ymm0,ymm1,ymm2,10010011b ; shuffle 64-bit floats + vpalignr xmm0,xmm4,xmm2,3 ; extract byte aligned value + +The promotion to new syntax according to the rules described above has been +applied to all the instructions from SSE extensions up to SSE4, with the +exceptions described below. + "vdppd" instruction has syntax extended to four operans, but it does not +have a 256-bit version. + The are a few instructions, namely "vsqrtpd", "vsqrtps", "vrcpps" and +"vrsqrtps", which can operate on 256-bit data size, but retained the syntax +with only two operands, because they use data from only one source: + + vsqrtpd ymm1,ymm0 ; put square roots into other register + +In a similar way "vroundpd" and "vroundps" retained the syntax with three +operands, the last one being immediate value. + + vroundps ymm0,ymm1,0011b ; round toward zero + + Also some of the operations on packed integers kept their two-operand or +three-operand syntax while being promoted to AVX version. In such case these +instructions follow exactly the same rules for operands as their SSE +counterparts (since operations on packed integers do not have 256-bit variants +in AVX extension). These include "vpcmpestri", "vpcmpestrm", "vpcmpistri", +"vpcmpistrm", "vphminposuw", "vpshufd", "vpshufhw", "vpshuflw". And there are +more instructions that in AVX versions keep exactly the same syntax for +operands as the one from SSE, without any additional options: "vcomiss", +"vcomisd", "vcvtss2si", "vcvtsd2si", "vcvttss2si", "vcvttsd2si", "vextractps", +"vpextrb", "vpextrw", "vpextrd", "vpextrq", "vmovd", "vmovq", "vmovntdqa", +"vmaskmovdqu", "vpmovmskb", "vpmovsxbw", "vpmovsxbd", "vpmovsxbq", "vpmovsxwd", +"vpmovsxwq", "vpmovsxdq", "vpmovzxbw", "vpmovzxbd", "vpmovzxbq", "vpmovzxwd", +"vpmovzxwq" and "vpmovzxdq". + The move and conversion instructions have mostly been promoted to allow +256-bit size operands in addition to the 128-bit variant with syntax identical +to that from SSE version of the same instruction. Each of the "vcvtdq2ps", +"vcvtps2dq" and "vcvttps2dq", "vmovaps", "vmovapd", "vmovups", "vmovupd", +"vmovdqa", "vmovdqu", "vlddqu", "vmovntps", "vmovntpd", "vmovntdq", +"vmovsldup", "vmovshdup", "vmovmskps" and "vmovmskpd" inherits the 128-bit +syntax from SSE without any changes, and also allows a new form with 256-bit +operands in place of 128-bit ones. + + vmovups [edi],ymm6 ; store unaligned 256-bit data + + "vmovddup" has the identical 128-bit syntax as its SSE version, and it also +has a 256-bit version, which stores the duplicates of the lowest quad word +from the source operand in the lower half of destination operand, and in the +upper half of destination the duplicates of the low quad word from the upper +half of source. Both source and destination operands need then to be 256-bit +values. + "vmovlhps" and "vmovhlps" have only 128-bit versions, and each takes three +operands, which all must be SSE registers. "vmovlhps" copies two single +precision values from the low quad word of second source register to the high +quad word of destination register, and copies the low quad word of first +source register into the low quad word of destination register. "vmovhlps" +copies two single precision values from the high quad word of second source +register to the low quad word of destination register, and copies the high +quad word of first source register into the high quad word of destination +register. + "vmovlps", "vmovhps", "vmovlpd" and "vmovhpd" have only 128-bit versions and +their syntax varies depending on whether memory operand is a destination or +source. When memory is destination, the syntax is identical to the one of +equivalent SSE instruction, and when memory is source, the instruction requires +three operands, first two being SSE registers and the third one 64-bit memory. +The value put into destination is then the value copied from first source with +either low or high quad word replaced with value from second source (the +memory operand). + + vmovhps [esi],xmm7 ; store upper half to memory + vmovlps xmm0,xmm7,[ebx] ; low from memory, rest from register + + "vmovss" and "vmovsd" have syntax identical to their SSE equivalents as long +as one of the operands is memory, while the versions that operate purely on +registers require three operands (each being SSE register). The value stored +in destination is then the value copied from first source with lowest data +element replaced with the lowest value from second source. + + vmovss xmm3,[edi] ; low from memory, rest zeroed + vmovss xmm0,xmm1,xmm2 ; one value from xmm2, three from xmm1 + + "vcvtss2sd", "vcvtsd2ss", "vcvtsi2ss" and "vcvtsi2d" use the three-operand +syntax, where destination and first source are always SSE registers, and the +second source follows the same rules and the source in syntax of equivalent +SSE instruction. The value stored in destination is then the value copied from +first source with lowest data element replaced with the result of conversion. + + vcvtsi2sd xmm4,xmm4,ecx ; 32-bit integer to 64-bit float + vcvtsi2ss xmm0,xmm0,rax ; 64-bit integer to 32-bit float + + "vcvtdq2pd" and "vcvtps2pd" allow the same syntax as their SSE equivalents, +plus the new variants with AVX register as destination and SSE register or +128-bit memory as source. Analogously "vcvtpd2dq", "vcvttpd2dq" and +"vcvtpd2ps", in addition to variant with syntax identical to SSE version, +allow a variant with SSE register as destination and AVX register or 256-bit +memory as source. + "vinsertps", "vpinsrb", "vpinsrw", "vpinsrd", "vpinsrq" and "vpblendw" use +a syntax with four operands, where destination and first source have to be SSE +registers, and the third and fourth operand follow the same rules as second +and third operand in the syntax of equivalent SSE instruction. Value stored in +destination is the the value copied from first source with some data elements +replaced with values extracted from the second source, analogously to the +operation of corresponding SSE instruction. + + vpinsrd xmm0,xmm0,eax,3 ; insert double word + + "vblendvps", "vblendvpd" and "vpblendvb" use a new syntax with four register +operands: destination, two sources and a mask, where second source can also be +a memory operand. "vblendvps" and "vblendvpd" have 256-bit variant, where +operands are AVX registers or 256-bit memory, as well as 128-bit variant, +which has operands being SSE registers or 128-bit memory. "vpblendvb" has only +a 128-bit variant. Value stored in destination is the value copied from the +first source with some data elements replaced, according to mask, by values +from the second source. + + vblendvps ymm3,ymm1,ymm2,ymm7 ; blend according to mask + + "vptest" allows the same syntax as its SSE version and also has a 256-bit +version, with both operands doubled in size. There are also two new +instructions, "vtestps" and "vtestpd", which perform analogous tests, but only +of the sign bits of corresponding single precision or double precision values, +and set the ZF and CF accordingly. They follow the same syntax rules as +"vptest". + + vptest ymm0,yword [ebx] ; test 256-bit values + vtestpd xmm0,xmm1 ; test sign bits of 64-bit floats + + "vbroadcastss", "vbroadcastsd" and "vbroadcastf128" are new instructions, +which broadcast the data element defined by source operand into all elements +of corresponing size in the destination register. "vbroadcastss" needs +source to be 32-bit memory and destination to be either SSE or AVX register. +"vbroadcastsd" requires 64-bit memory as source, and AVX register as +destination. "vbroadcastf128" requires 128-bit memory as source, and AVX +register as destination. + + vbroadcastss ymm0,dword [eax] ; get eight copies of value + + "vinsertf128" is the new instruction, which takes four operands. The +destination and first source have to be AVX registers, second source can be +SSE register or 128-bit memory location, and fourth operand should be an +immediate value. It stores in destination the value obtained by taking +contents of first source and replacing one of its 128-bit units with value of +the second source. The lowest bit of fourth operand specifies at which +position that replacement is done (either 0 or 1). + "vextractf128" is the new instruction with three operands. The destination +needs to be SSE register or 128-bit memory location, the source must be AVX +register, and the third operand should be an immediate value. It extracts +into destination one of the 128-bit units from source. The lowest bit of third +operand specifies, which unit is extracted. + "vmaskmovps" and "vmaskmovpd" are the new instructions with three operands +that selectively store in destination the elements from second source +depending on the sign bits of corresponding elements from first source. These +instructions can operate on either 128-bit data (SSE registers) or 256-bit +data (AVX registers). Either destination or second source has to be a memory +location of appropriate size, the two other operands should be registers. + + vmaskmovps [edi],xmm0,xmm5 ; conditionally store + vmaskmovpd ymm5,ymm0,[esi] ; conditionally load + + "vpermilpd" and "vpermilps" are the new instructions with three operands +that permute the values from first source according to the control fields from +second source and put the result into destination operand. It allows to use +either three SSE registers or three AVX registers as its operands, the second +source can be a memory of size equal to the registers used. In alternative +form the second source can be immediate value and then the first source +can be a memory location of the size equal to destination register. + "vperm2f128" is the new instruction with four operands, which selects +128-bit blocks of floating point data from first and second source according +to the bit fields from fourth operand, and stores them in destination. +Destination and first source need to be AVX registers, second source can be +AVX register or 256-bit memory area, and fourth operand should be an immediate +value. + + vperm2f128 ymm0,ymm6,ymm7,12h ; permute 128-bit blocks + + "vzeroall" instruction sets all the AVX registers to zero. "vzeroupper" sets +the upper 128-bit portions of all AVX registers to zero, leaving the SSE +registers intact. These new instructions take no operands. + "vldmxcsr" and "vstmxcsr" are the AVX versions of "ldmxcsr" and "stmxcsr" +instructions. The rules for their operands remain unchanged. + + +2.1.22 AVX2 instructions + +The AVX2 extension allows all the AVX instructions operating on packed integers +to use 256-bit data types, and introduces some new instructions as well. + The AVX instructions that operate on packed integers and had only a 128-bit +variants, have been supplemented with 256-bit variants, and thus their syntax +rules became analogous to AVX instructions operating on packed floating point +types. + + vpsubb ymm0,ymm0,[esi] ; substract 32 packed bytes + vpavgw ymm3,ymm0,ymm2 ; average of 16-bit integers + +However there are some instructions that have not been equipped with the +256-bit variants. "vpcmpestri", "vpcmpestrm", "vpcmpistri", "vpcmpistrm", +"vpextrb", "vpextrw", "vpextrd", "vpextrq", "vpinsrb", "vpinsrw", "vpinsrd", +"vpinsrq" and "vphminposuw" are not affected by AVX2 and allow only the +128-bit operands. + The packed shift instructions, which allowed the third operand specifying +amount to be SSE register or 128-bit memory location, use the same rules +for the third operand in their 256-bit variant. + + vpsllw ymm2,ymm2,xmm4 ; shift words left + vpsrad ymm0,ymm3,xword [ebx] ; shift double words right + + There are also new packed shift instructions with standard three-operand AVX +syntax, which shift each element from first source by the amount specified in +corresponding element of second source, and store the results in destination. +"vpsllvd" shifts 32-bit elements left, "vpsllvq" shifts 64-bit elements left, +"vpsrlvd" shifts 32-bit elements right logically, "vpsrlvq" shifts 64-bit +elements right logically and "vpsravd" shifts 32-bit elements right +arithmetically. + The sign-extend and zero-extend instructions, which in AVX versions allowed +source operand to be SSE register or a memory of specific size, in the new +256-bit variant need memory of that size doubled or SSE register as source and +AVX register as destination. + + vpmovzxbq ymm0,dword [esi] ; bytes to quad words + + Also "vmovntdqa" has been upgraded with 256-bit variant, so it allows to +transfer 256-bit value from memory to AVX register, it needs memory address +to be aligned to 32 bytes. + "vpmaskmovd" and "vpmaskmovq" are the new instructions with syntax identical +to "vmaskmovps" or "vmaskmovpd", and they performs analogous operation on +packed 32-bit or 64-bit values. + "vinserti128", "vextracti128", "vbroadcasti128" and "vperm2i128" are the new +instructions with syntax identical to "vinsertf128", "vextractf128", +"vbroadcastf128" and "vperm2f128" respectively, and they perform analogous +operations on 128-bit blocks of integer data. + "vbroadcastss" and "vbroadcastsd" instructions have been extended to allow +SSE register as a source operand (which in AVX could only be a memory). + "vpbroadcastb", "vpbroadcastw", "vpbroadcastd" and "vpbroadcastq" are the +new instructions which broadcast the byte, word, double word or quad word from +the source operand into all elements of corresponing size in the destination +register. The destination operand can be either SSE or AVX register, and the +source operand can be SSE register or memory of size equal to the size of data +element. + + vpbroadcastb ymm0,byte [ebx] ; get 32 identical bytes + + "vpermd" and "vpermps" are new three-operand instructions, which use each +32-bit element from first source as an index of element in second source which +is copied into destination at position corresponding to element containing +index. The destination and first source have to be AVX registers, and the +second source can be AVX register or 256-bit memory. + "vpermq" and "vpermpd" are new three-operand instructions, which use 2-bit +indexes from the immediate value specified as third operand to determine which +element from source store at given position in destination. The destination +has to be AVX register, source can be AVX register or 256-bit memory, and the +third operand must be 8-bit immediate value. + The family of new instructions performing "gather" operation have special +syntax, as in their memory operand they use addressing mode that is unique to +them. The base of address can be a 32-bit or 64-bit general purpose register +(the latter only in long mode), and the index (possibly multiplied by scale +value, as in standard addressing) is specified by SSE or AVX register. It is +possible to use only index without base and any numerical displacement can be +added to the address. Each of those instructions takes three operands. First +operand is the destination register, second operand is memory addressed with +a vector index, and third operand is register containing a mask. The most +significant bit of each element of mask determines whether a value will be +loaded from memory into corresponding element in destination. The address of +each element to load is determined by using the corresponding element from +index register in memory operand to calculate final address with given base +and displacement. When the index register contains less elements than the +destination and mask registers, the higher elements of destination are zeroed. +After the value is successfuly loaded, the corresponding element in mask +register is set to zero. The destination, index and mask should all be +distinct registers, it is not allowed to use the same register in two +different roles. + "vgatherdps" loads single precision floating point values addressed by +32-bit indexes. The destination, index and mask should all be registers of the +same type, either SSE or AVX. The data addressed by memory operand is 32-bit +in size. + + vgatherdps xmm0,[eax+xmm1],xmm3 ; gather four floats + vgatherdps ymm0,[ebx+ymm7*4],ymm3 ; gather eight floats + + "vgatherqps" loads single precision floating point values addressed by +64-bit indexes. The destination and mask should always be SSE registers, while +index register can be either SSE or AVX register. The data addressed by memory +operand is 32-bit in size. + + vgatherqps xmm0,[xmm2],xmm3 ; gather two floats + vgatherqps xmm0,[ymm2+64],xmm3 ; gather four floats + + "vgatherdpd" loads double precision floating point values addressed by +32-bit indexes. The index register should always be SSE register, the +destination and mask should be two registers of the same type, either SSE or +AVX. The data addressed by memory operand is 64-bit in size. + + vgatherdpd xmm0,[ebp+xmm1],xmm3 ; gather two doubles + vgatherdpd ymm0,[xmm3*8],ymm5 ; gather four doubles + + "vgatherqpd" loads double precision floating point values addressed by +64-bit indexes. The destination, index and mask should all be registers of the +same type, either SSE or AVX. The data addressed by memory operand is 64-bit +in size. + "vpgatherdd" and "vpgatherqd" load 32-bit values addressed by either 32-bit +or 64-bit indexes. They follow the same rules as "vgatherdps" and "vgatherqps" +respectively. + "vpgatherdq" and "vpgatherqq" load 64-bit values addressed by either 32-bit +or 64-bit indexes. They follow the same rules as "vgatherdpd" and "vgatherqpd" +respectively. + + +2.1.23 Auxiliary sets of computational instructions + + There is a number of additional instruction set extensions related to +AVX. They introduce new vector instructions (and sometimes also their SSE +equivalents that use classic instruction encoding), and even some new +instructions operating on general registers that use the AVX-like encoding +allowing the extended syntax with separate destination and source operands. +The CPU support for each of these instruction sets needs to be determined +separately. + The AES extension provides a specialized set of instructions for the +purpose of cryptographic computations defined by Advanced Encryption Standard. +Each of these instructions has two versions: the AVX one and the one with +SSE-like syntax that uses classic encoding. Refer to the Intel manuals for the +details of operation of these instructions. + "aesenc" and "aesenclast" perform a single round of AES encryption on data +from first source with a round key from second source, and store result in +destination. The destination and first source are SSE registers, and the +second source can be SSE register or 128-bit memory. The AVX versions of these +instructions, "vaesenc" and "vaesenclast", use the syntax with three operands, +while the SSE-like version has only two operands, with first operand being +both the destination and first source. + "aesdec" and "aesdeclast" perform a single round of AES decryption on data +from first source with a round key from second source. The syntax rules for +them and their AVX versions are the same as for "aesenc". + "aesimc" performs the InvMixColumns transformation of source operand and +store the result in destination. Both "aesimc" and "vaesimc" use only two +operands, destination being SSE register, and source being SSE register or +128-bit memory location. + "aeskeygenassist" is a helper instruction for generating the round key. +It needs three operands: destination being SSE register, source being SSE +register or 128-bit memory, and third operand being 8-bit immediate value. +The AVX version of this instruction uses the same syntax. + The CLMUL extension introduces just one instruction, "pclmulqdq", and its +AVX version as well. This instruction performs a carryless multiplication of +two 64-bit values selected from first and second source according to the bit +fields in immediate value. The destination and first source are SSE registers, +second source is SSE register or 128-bit memory, and immediate value is +provided as last operand. "vpclmulqdq" takes four operands, while "pclmulqdq" +takes only three operands, with the first one serving both the role of +destination and first source. + The FMA (Fused Multiply-Add) extension introduces additional AVX +instructions which perform multiplication and summation as single operation. +Each one takes three operands, first one serving both the role of destination +and first source, and the following ones being the second and third source. +The mnemonic of FMA instruction is obtained by appending to "vf" prefix: first +either "m" or "nm" to select whether result of multiplication should be taken +as-is or negated, then either "add" or "sub" to select whether third value +will be added to the product or substracted from the product, then either +"132", "213" or "231" to select which source operands are multiplied and which +one is added or substracted, and finally the type of data on which the +instruction operates, either "ps", "pd", "ss" or "sd". As it was with SSE +instructions promoted to AVX, instructions operating on packed floating point +values allow 128-bit or 256-bit syntax, in former all the operands are SSE +registers, but the third one can also be a 128-bit memory, in latter the +operands are AVX registers and the third one can also be a 256-bit memory. +Instructions that compute just one floating point result need operands to be +SSE registers, and the third operand can also be a memory, either 32-bit for +single precision or 64-bit for double precision. + + vfmsub231ps ymm1,ymm2,ymm3 ; multiply and substract + vfnmadd132sd xmm0,xmm5,[ebx] ; multiply, negate and add + +In addition to the instructions created by the rule described above, there are +families of instructions with mnemonics starting with either "vfmaddsub" or +"vfmsubadd", followed by either "132", "213" or "231" and then either "ps" or +"pd" (the operation must always be on packed values in this case). They add +to the result of multiplication or substract from it depending on the position +of value in packed data - instructions from the "vfmaddsub" group add when the +position is odd and substract when the position is even, instructions from the +"vfmsubadd" group add when the position is even and subtstract when the +position is odd. The rules for operands are the same as for other FMA +instructions. + The FMA4 instructions are similar to FMA, but use syntax with four operands +and thus allow destination to be different than all the sources. Their +mnemonics are identical to FMA instructions with the "132", "213" or "231" cut +out, as having separate destination operand makes such selection of operands +superfluous. The multiplication is always performed on values from the first +and second source, and then the value from third source is added or +substracted. Either second or third source can be a memory operand, and the +rules for the sizes of operands are the same as for FMA instructions. + + vfmaddpd ymm0,ymm1,[esi],ymm2 ; multiply and add + vfmsubss xmm0,xmm1,xmm2,[ebx] ; multiply and substract + + The F16C extension consists of two instructions, "vcvtps2ph" and +"vcvtph2ps", which convert floating point values between single precision and +half precision (the 16-bit floating point format). "vcvtps2ph" takes three +operands: destination, source, and rounding controls. The third operand is +always an immediate, the source is either SSE or AVX register containing +single precision values, and the destination is SSE register or memory, the +size of memory is 64 bits when the source is SSE register and 128 bits when +the source is AVX register. "vcvtph2ps" takes two operands, the destination +that can be SSE or AVX register, and the source that is SSE register or memory +with size of the half of destination operand's size. + The AMD XOP extension introduces a number of new vector instructions with +encoding and syntax analogous to AVX instructions. "vfrczps", "vfrczss", +"vfrczpd" and "vfrczsd" extract fractional portions of single or double +precision values, they all take two operands. The packed operations allow +either SSE or AVX register as destination, for the other two it has to be SSE +register. Source can be register of the same type as destination, or memory +of appropriate size (256-bit for destination being AVX register, 128-bit for +packed operation with destination being SSE register, 64-bit for operation +on a solitary double precision value and 32-bit for operation on a solitary +single precision value). + + vfrczps ymm0,[esi] ; load fractional parts + + "vpcmov" copies bits from either first or second source into destination +depending on the values of corresponding bits in the fourth operand (the +selector). If the bit in selector is set, the corresponding bit from first +source is copied into the same position in destination, otherwise the bit from +second source is copied. Either second source or selector can be memory +location, 128-bit or 256-bit depending on whether SSE registers or AVX +registers are specified as the other operands. + + vpcmov xmm0,xmm1,xmm2,[ebx] ; selector in memory + vpcmov ymm0,ymm5,[esi],ymm2 ; source in memory + +The family of packed comparison instructions take four operands, the +destination and first source being SSE register, second source being SSE +register or 128-bit memory and the fourth operand being immediate value +defining the type of comparison. The mnemonic or instruction is created +by appending to "vpcom" prefix either "b" or "ub" to compare signed or +unsigned bytes, "w" or "uw" to compare signed or unsigned words, "d" or "ud" +to compare signed or unsigned double words, "q" or "uq" to compare signed or +unsigned quad words. The respective values from the first and second source +are compared and the corresponding data element in destination is set to +either all ones or all zeros depending on the result of comparison. The fourth +operand has to specify one of the eight comparison types (table 2.5). All +these instruction have also variants with only three operands and the type +of comparison encoded within the instruction name by inserting the comparison +mnemonic after "vpcom". + + vpcomb xmm0,xmm1,xmm2,4 ; test for equal bytes + vpcomgew xmm0,xmm1,[ebx] ; compare signed words + + Table 2.5 XOP comparisons + /-------------------------------------------\ + | Code | Mnemonic | Description | + |======|==========|=========================| + | 0 | lt | less than | + | 1 | le | less than or equal | + | 2 | gt | greater than | + | 3 | ge | greater than or equal | + | 4 | eq | equal | + | 5 | neq | not equal | + | 6 | false | false | + | 7 | true | true | + \-------------------------------------------/ + + "vpermil2ps" and "vpermil2pd" set the elements in destination register to +zero or to a value selected from first or second source depending on the +corresponding bit fields from the fourth operand (the selector) and the +immediate value provided in fifth operand. Refer to the AMD manuals for the +detailed explanation of the operation performed by these instructions. Each +of the first four operands can be a register, and either second source or +selector can be memory location, 128-bit or 256-bit depending on whether SSE +registers or AVX registers are used for the other operands. + + vpermil2ps ymm0,ymm3,ymm7,ymm2,0 ; permute from two sources + + "vphaddbw" adds pairs of adjacent signed bytes to form 16-bit values and +stores them at the same positions in destination. "vphaddubw" does the same +but treats the bytes as unsigned. "vphaddbd" and "vphaddubd" sum all bytes +(either signed or unsigned) in each four-byte block to 32-bit results, +"vphaddbq" and "vphaddubq" sum all bytes in each eight-byte block to +64-bit results, "vphaddwd" and "vphadduwd" add pairs of words to 32-bit +results, "vphaddwq" and "vphadduwq" sum all words in each four-word block to +64-bit results, "vphadddq" and "vphaddudq" add pairs of double words to 64-bit +results. "vphsubbw" substracts in each two-byte block the byte at higher +position from the one at lower position, and stores the result as a signed +16-bit value at the corresponding position in destination, "vphsubwd" +substracts in each two-word block the word at higher position from the one at +lower position and makes signed 32-bit results, "vphsubdq" substract in each +block of two double word the one at higher position from the one at lower +position and makes signed 64-bit results. Each of these instructions takes +two operands, the destination being SSE register, and the source being SSE +register or 128-bit memory. + + vphadduwq xmm0,xmm1 ; sum quadruplets of words + + "vpmacsww" and "vpmacssww" multiply the corresponding signed 16-bit values +from the first and second source and then add the products to the parallel +values from the third source, then "vpmacsww" takes the lowest 16 bits of the +result and "vpmacssww" saturates the result down to 16-bit value, and they +store the final 16-bit results in the destination. "vpmacsdd" and "vpmacssdd" +perform the analogous operation on 32-bit values. "vpmacswd" and "vpmacswd" do +the same calculation only on the low 16-bit values from each 32-bit block and +form the 32-bit results. "vpmacsdql" and "vpmacssdql" perform such operation +on the low 32-bit values from each 64-bit block and form the 64-bit results, +while "vpmacsdqh" and "vpmacssdqh" do the same on the high 32-bit values from +each 64-bit block, also forming the 64-bit results. "vpmadcswd" and +"vpmadcsswd" multiply the corresponding signed 16-bit value from the first +and second source, then sum all the four products and add this sum to each +16-bit element from third source, storing the truncated or saturated result +in destination. All these instructions take four operands, the second source +can be 128-bit memory or SSE register, all the other operands have to be +SSE registers. + + vpmacsdd xmm6,xmm1,[ebx],xmm6 ; accumulate product + + "vpperm" selects bytes from first and second source, optionally applies a +separate transformation to each of them, and stores them in the destination. +The bit fields in fourth operand (the selector) specify for each position in +destination what byte from which source is taken and what operation is applied +to it before it is stored there. Refer to the AMD manuals for the detailed +information about these bit fields. This instruction takes four operands, +either second source or selector can be a 128-bit memory (or they can be SSE +registers both), all the other operands have to be SSE registers. + "vpshlb", "vpshlw", "vpshld" and "vpshlq" shift logically bytes, words, double +words or quad words respectively. The amount of bits to shift by is specified +for each element separately by the signed byte placed at the corresponding +position in the third operand. The source containing elements to shift is +provided as second operand. Either second or third operand can be 128-bit +memory (or they can be SSE registers both) and the other operands have to be +SSE registers. + + vpshld xmm3,xmm1,[ebx] ; shift bytes from xmm1 + +"vpshab", "vpshaw", "vpshad" and "vpshaq" arithmetically shift bytes, words, +double words or quad words. These instructions follow the same rules as the +logical shifts described above. "vprotb", "vprotw", "vprotd" and "vprotq" +rotate bytes, word, double words or quad words. They follow the same rules as +shifts, but additionally allow third operand to be immediate value, in which +case the same amount of rotation is specified for all the elements in source. + + vprotb xmm0,[esi],3 ; rotate bytes to the left + + The MOVBE extension introduces just one new instruction, "movbe", which +swaps bytes in value from source before storing it in destination, so can +be used to load and store big endian values. It takes two operands, either +the destination or source should be a 16-bit, 32-bit or 64-bit memory (the +last one being only allowed in long mode), and the other operand should be +a general register of the same size. + The BMI extension, consisting of two subsets - BMI1 and BMI2, introduces +new instructions operating on general registers, which use the same encoding +as AVX instructions and so allow the extended syntax. All these instructions +use 32-bit operands, and in long mode they also allow the forms with 64-bit +operands. + "andn" calculates the bitwise AND of second source with the inverted bits +of first source and stores the result in destination. The destination and +the first source have to be general registers, the second source can be +general register or memory. + + andn edx,eax,[ebx] ; bit-multiply inverted eax with memory + + "bextr" extracts from the first source the sequence of bits using an index +and length specified by bit fields in the second source operand and stores +it into destination. The lowest 8 bits of second source specify the position +of bit sequence to extract and the next 8 bits of second source specify the +length of sequence. The first source can be a general register or memory, +the other two operands have to be general registers. + + bextr eax,[esi],ecx ; extract bit field from memory + + "blsi" extracts the lowest set bit from the source, setting all the other +bits in destination to zero. The destination must be a general register, +the source can be general register or memory. + + blsi rax,r11 ; isolate the lowest set bit + + "blsmsk" sets all the bits in the destination up to the lowest set bit in +the source, including this bit. "blsr" copies all the bits from the source to +destination except for the lowest set bit, which is replaced by zero. These +instructions follow the same rules for operands as "blsi". + "tzcnt" counts the number of trailing zero bits, that is the zero bits up to +the lowest set bit of source value. This instruction is analogous to "lzcnt" +and follows the same rules for operands, so it also has a 16-bit version, +unlike the other BMI instructions. + "bzhi" is BMI2 instruction, which copies the bits from first source to +destination, zeroing all the bits up from the position specified by second +source. It follows the same rules for operands as "bextr". + "pext" uses a mask in second source operand to select bits from first +operands and puts the selected bits as a continuous sequence into destination. +"pdep" performs the reverse operation - it takes sequence of bits from the +first source and puts them consecutively at the positions where the bits in +second source are set, setting all the other bits in destination to zero. +These BMI2 instructions follow the same rules for operands as "andn". + "mulx" is a BMI2 instruction which performs an unsigned multiplication of +value from EDX or RDX register (depending on the size of specified operands) +by the value from third operand, and stores the low half of result in the +second operand, and the high half of result in the first operand, and it does +it without affecting the flags. The third operand can be general register or +memory, and both the destination operands have to be general registers. + + mulx edx,eax,ecx ; multiply edx by ecx into edx:eax + + "shlx", "shrx" and "sarx" are BMI2 instructions, which perform logical or +arithmetical shifts of value from first source by the amount specified by +second source, and store the result in destination without affecting the +flags. The have the same rules for operands as "bzhi" instruction. + "rorx" is a BMI2 instruction which rotates right the value from source +operand by the constant amount specified in third operand and stores the +result in destination without affecting the flags. The destination operand +has to be general register, the source operand can be general register or +memory, and the third operand has to be an immediate value. + + rorx eax,edx,7 ; rotate without affecting flags + + The TBM is an extension designed by AMD to supplement the BMI set. The +"bextr" instruction is extended with a new form, in which second source is +a 32-bit immediate value. "blsic" is a new instruction which performs the +same operation as "blsi", but with the bits of result reversed. It uses the +same rules for operands as "blsi". "blsfill" is a new instruction, which takes +the value from source, sets all the bits below the lowest set bit and store +the result in destination, it also uses the same rules for operands as "blsi". + "blci", "blcic", "blcs", "blcmsk" and "blcfill" are instructions analogous +to "blsi", "blsic", "blsr", "blsmsk" and "blsfill" respectively, but they +perform the bit-inverted versions of the same operations. They follow the +same rules for operands as the instructions they reflect. + "tzmsk" finds the lowest set bit in value from source operand, sets all bits +below it to 1 and all the rest of bits to zero, then writes the result to +destination. "t1mskc" finds the least significant zero bit in the value from +source operand, sets the bits below it to zero and all the other bits to 1, +and writes the result to destination. These instructions have the same rules +for operands as "blsi". + + +2.1.24 Other extensions of instruction set + +There is a number of additional instruction set extensions recognized by flat +assembler, and the general syntax of the instructions introduced by those +extensions is provided here. For a detailed information on the operations +performed by them, check out the manuals from Intel (for the VMX, SMX, XSAVE, +RDRAND, FSGSBASE, INVPCID, HLE and RTM extensions) or AMD (for the SVM +extension). + The Virtual-Machine Extensions (VMX) provide a set of instructions for the +management of virtual machines. The "vmxon" instruction, which enters the VMX +operation, requires a single 64-bit memory operand, which should be a physical +address of memory region, which the logical processor may use to support VMX +operation. The "vmxoff" instruction, which leaves the VMX operation, has no +operands. The "vmlaunch" and "vmresume", which launch or resume the virtual +machines, and "vmcall", which allows guest software to call the VM monitor, +use no operands either. + The "vmptrld" loads the physical address of current Virtual Machine Control +Structure (VMCS) from its memory operand, "vmptrst" stores the pointer to +current VMCS into address specified by its memory operand, and "vmclear" sets +the launch state of the VMCS referenced by its memory operand to clear. These +three instruction all require single 64-bit memory operand. + The "vmread" reads from VCMS a field specified by the source operand and +stores it into the destination operand. The source operand should be a +general purpose register, and the destination operand can be a register of +memory. The "vmwrite" writes into a VMCS field specified by the destination +operand the value provided by source operand. The source operand can be a +general purpose register or memory, and the destination operand must be a +register. The size of operands for those instructions should be 64-bit when +in long mode, and 32-bit otherwise. + The "invept" and "invvpid" invalidate the translation lookaside buffers +(TLBs) and paging-structure caches, either derived from extended page tables +(EPT), or based on the virtual processor identifier (VPID). These instructions +require two operands, the first one being the general purpose register +specifying the type of invalidation, and the second one being a 128-bit +memory operand providing the invalidation descriptor. The first operand +should be a 64-bit register when in long mode, and 32-bit register otherwise. + The Safer Mode Extensions (SMX) provide the functionalities available +throught the "getsec" instruction. This instruction takes no operands, and +the function that is executed is determined by the contents of EAX register +upon executing this instruction. + The Secure Virtual Machine (SVM) is a variant of virtual machine extension +used by AMD. The "skinit" instruction securely reinitializes the processor +allowing the startup of trusted software, such as the virtual machine monitor +(VMM). This instruction takes a single operand, which must be EAX, and +provides a physical address of the secure loader block (SLB). + The "vmrun" instruction is used to start a guest virtual machine, +its only operand should be an accumulator register (AX, EAX or RAX, the +last one available only in long mode) providing the physical address of the +virtual machine control block (VMCB). The "vmsave" stores a subset of +processor state into VMCB specified by its operand, and "vmload" loads the +same subset of processor state from a specified VMCB. The same operand rules +as for the "vmrun" apply to those two instructions. + "vmmcall" allows the guest software to call the VMM. This instruction takes +no operands. + "stgi" set the global interrupt flag to 1, and "clgi" zeroes it. These +instructions take no operands. + "invlpga" invalidates the TLB mapping for a virtual page specified by the +first operand (which has to be accumulator register) and address space +identifier specified by the second operand (which must be ECX register). + The XSAVE set of instructions allows to save and restore processor state +components. "xsave" and "xsaveopt" store the components of processor state +defined by bit mask in EDX and EAX registers into area defined by memory +operand. "xrstor" restores from the area specified by memory operand the +components of processor state defined by mask in EDX and EAX. The "xsave64", +"xsaveopt64" and "xrstor64" are 64-bit versions of these instructions, allowed +only in long mode. + "xgetbv" read the contents of 64-bit XCR (extended control register) +specified in ECX register into EDX and EAX registers. "xsetbv" writes the +contents of EDX and EAX into the 64-bit XCR specified by ECX register. These +instructions have no operands. + The RDRAND extension introduces one new instruction, "rdrand", which loads +the hardware-generated random value into general register. It takes one +operand, which can be 16-bit, 32-bit or 64-bit register (with the last one +being allowed only in long mode). + The FSGSBASE extension adds long mode instructions that allow to read and +write the segment base registers for FS and GS segments. "rdfsbase" and +"rdgsbase" read the corresponding segment base registers into operand, while +"wrfsbase" and "wrgsbase" write the value of operand into those register. +All these instructions take one operand, which can be 32-bit or 64-bit general +register. + The INVPCID extension adds "invpcid" instruction, which invalidates mapping +in the TLBs and paging caches based on the invalidation type specified in +first operand and PCID invalidate descriptor specified in second operand. +The first operands should be 32-bit general register when not in long mode, +or 64-bit general register when in long mode. The second operand should be +128-bit memory location. + The HLE and RTM extensions provide set of instructions for the transactional +management. The "xacquire" and "xrelease" are new prefixes that can be used +with some of the instructions to start or end lock elision on the memory +address specified by prefixed instruction. The "xbegin" instruction starts +the transactional execution, its operand is the address a fallback routine +that gets executes in case of transaction abort, specified like the operand +for near jump instruction. "xend" marks the end of transcational execution +region, it takes no operands. "xabort" forces the transaction abort, it takes +an 8-bit immediate value as its only operand, this value is passed in the +highest bits of EAX to the fallback routine. "xtest" checks whether there is +transactional execution in progress, this instruction takes no operands. + + +2.2 Control directives + +This section describes the directives that control the assembly process, they +are processed during the assembly and may cause some blocks of instructions +to be assembled differently or not assembled at all. + + +2.2.1 Numerical constants + +The "=" directive allows to define the numerical constant. It should be +preceded by the name for the constant and followed by the numerical expression +providing the value. The value of such constants can be a number or an address, +but - unlike labels - the numerical constants are not allowed to hold the +register-based addresses. Besides this difference, in their basic variant +numerical constants behave very much like labels and you can even +forward-reference them (access their values before they actually get defined). + There is, however, a second variant of numerical constants, which is +recognized by assembler when you try to define the constant of name, under +which there already was a numerical constant defined. In such case assembler +treats that constant as an assembly-time variable and allows it to be assigned +with new value, but forbids forward-referencing it (for obvious reasons). Let's +see both the variant of numerical constants in one example: + + dd sum + x = 1 + x = x+2 + sum = x + +Here the "x" is an assembly-time variable, and every time it is accessed, the +value that was assigned to it the most recently is used. Thus if we tried to +access the "x" before it gets defined the first time, like if we wrote "dd x" +in place of the "dd sum" instruction, it would cause an error. And when it is +re-defined with the "x = x+2" directive, the previous value of "x" is used to +calculate the new one. So when the "sum" constant gets defined, the "x" has +value of 3, and this value is assigned to the "sum". Since this one is defined +only once in source, it is the standard numerical constant, and can be +forward-referenced. So the "dd sum" is assembled as "dd 3". To read more about +how the assembler is able to resolve this, see section 2.2.6. + The value of numerical constant can be preceded by size operator, which can +ensure that the value will fit in the range for the specified size, and can +affect also how some of the calculations inside the numerical expression are +performed. This example: + + c8 = byte -1 + c32 = dword -1 + +defines two different constants, the first one fits in 8 bits, the second one +fits in 32 bits. + When you need to define constant with the value of address, which may be +register-based (and thus you cannot employ numerical constant for this +purpose), you can use the extended syntax of "label" directive (already +described in section 1.2.3), like: + + label myaddr at ebp+4 + +which declares label placed at "ebp+4" address. However remember that labels, +unlike numerical constants, cannot become assembly-time variables. + + +2.2.2 Conditional assembly + +"if" directive causes some block of instructions to be assembled only under +certain condition. It should be followed by logical expression specifying the +condition, instructions in next lines will be assembled only when this +condition is met, otherwise they will be skipped. The optional "else if" +directive followed with logical expression specifying additional condition +begins the next block of instructions that will be assembled if previous +conditions were not met, and the additional condition is met. The optional +"else" directive begins the block of instructions that will be assembled if +all the conditions were not met. The "end if" directive ends the last block of +instructions. + You should note that "if" directive is processed at assembly stage and +therefore it doesn't affect any preprocessor directives, like the definitions +of symbolic constants and macroinstructions - when the assembler recognizes the +"if" directive, all the preprocessing has been already finished. + The logical expression consist of logical values and logical operators. The +logical operators are "~" for logical negation, "&" for logical and, "|" for +logical or. The negation has the highest priority. Logical value can be a +numerical expression, it will be false if it is equal to zero, otherwise it +will be true. Two numerical expression can be compared using one of the +following operators to make the logical value: "=" (equal), "<" (less), +">" (greater), "<=" (less or equal), ">=" (greater or equal), +"<>" (not equal). + The "used" operator followed by a symbol name, is the logical value that +checks whether the given symbol is used somewhere (it returns correct result +even if symbol is used only after this check). The "defined" operator can be +followed by any expression, usually just by a single symbol name; it checks +whether the given expression contains only symbols that are defined in the +source and accessible from the current position. + With "relativeto" operator it is possible to check whether values of two +expressions differ only by constant amount. The valid syntax is a numerical +expression followed by "relativeto" and then another expression (possibly +register-based). Labels that have no simple numerical value can be tested +this way to determine what kind of operations may be possible with them. + The following simple example uses the "count" constant that should be +defined somewhere in source: + + if count>0 + mov cx,count + rep movsb + end if + +These two assembly instructions will be assembled only if the "count" constant +is greater than 0. The next sample shows more complex conditional structure: + + if count & ~ count mod 4 + mov cx,count/4 + rep movsd + else if count>4 + mov cx,count/4 + rep movsd + mov cx,count mod 4 + rep movsb + else + mov cx,count + rep movsb + end if + +The first block of instructions gets assembled when the "count" is non zero and +divisible by four, if this condition is not met, the second logical expression, +which follows the "else if", is evaluated and if it's true, the second block +of instructions get assembled, otherwise the last block of instructions, which +follows the line containing only "else", is assembled. + There are also operators that allow comparison of values being any chains of +symbols. The "eq" compares whether two such values are exactly the same. +The "in" operator checks whether given value is a member of the list of values +following this operator, the list should be enclosed between "<" and ">" +characters, its members should be separated with commas. The symbols are +considered the same when they have the same meaning for the assembler - for +example "pword" and "fword" for assembler are the same and thus are not +distinguished by the above operators. In the same way "16 eq 10h" is the true +condition, however "16 eq 10+4" is not. + The "eqtype" operator checks whether the two compared values have the same +structure, and whether the structural elements are of the same type. The +distinguished types include numerical expressions, individual quoted strings, +floating point numbers, address expressions (the expressions enclosed in square +brackets or preceded by "ptr" operator), instruction mnemonics, registers, size +operators, jump type and code type operators. And each of the special +characters that act as a separators, like comma or colon, is the separate type +itself. For example, two values, each one consisting of register name followed +by comma and numerical expression, will be regarded as of the same type, no +matter what kind of register and how complicated numerical expression is used; +with exception for the quoted strings and floating point values, which are the +special kinds of numerical expressions and are treated as different types. Thus +"eax,16 eqtype fs,3+7" condition is true, but "eax,16 eqtype eax,1.6" is false. + + +2.2.3 Repeating blocks of instructions + +"times" directive repeats one instruction specified number of times. It +should be followed by numerical expression specifying number of repeats and +the instruction to repeat (optionally colon can be used to separate number and +instruction). When special symbol "%" is used inside the instruction, it is +equal to the number of current repeat. For example "times 5 db %" will define +five bytes with values 1, 2, 3, 4, 5. Recursive use of "times" directive is +also allowed, so "times 3 times % db %" will define six bytes with values +1, 1, 2, 1, 2, 3. + "repeat" directive repeats the whole block of instructions. It should be +followed by numerical expression specifying number of repeats. Instructions +to repeat are expected in next lines, ended with the "end repeat" directive, +for example: + + repeat 8 + mov byte [bx],% + inc bx + end repeat + +The generated code will store byte values from one to eight in the memory +addressed by BX register. + Number of repeats can be zero, in that case the instructions are not +assembled at all. + The "break" directive allows to stop repeating earlier and continue assembly +from the first line after the "end repeat". Combined with the "if" directive it +allows to stop repeating under some special condition, like: + + s = x/2 + repeat 100 + if x/s = s + break + end if + s = (s+x/s)/2 + end repeat + + The "while" directive repeats the block of instructions as long as the +condition specified by the logical expression following it is true. The block +of instructions to be repeated should end with the "end while" directive. +Before each repetition the logical expression is evaluated and when its value +is false, the assembly is continued starting from the first line after the +"end while". Also in this case the "%" symbol holds the number of current +repeat. The "break" directive can be used to stop this kind of loop in the same +way as with "repeat" directive. The previous sample can be rewritten to use the +"while" instead of "repeat" this way: + + s = x/2 + while x/s <> s + s = (s+x/s)/2 + if % = 100 + break + end if + end while + + The blocks defined with "if", "repeat" and "while" can be nested in any +order, however they should be closed in the same order in which they were +started. The "break" directive always stops processing the block that was +started last with either the "repeat" or "while" directive. + + +2.2.4 Addressing spaces + + "org" directive sets address at which the following code is expected to +appear in memory. It should be followed by numerical expression specifying +the address. This directive begins the new addressing space, the following +code itself is not moved in any way, but all the labels defined within it +and the value of "$" symbol are affected as if it was put at the given +address. However it's the responsibility of programmer to put the code at +correct address at run-time. + The "load" directive allows to define constant with a binary value loaded +from the already assembled code. This directive should be followed by the name +of the constant, then optionally size operator, then "from" operator and a +numerical expression specifying a valid address in current addressing space. +The size operator has unusual meaning in this case - it states how many bytes +(up to 8) have to be loaded to form the binary value of constant. If no size +operator is specified, one byte is loaded (thus value is in range from 0 to +255). The loaded data cannot exceed current offset. + The "store" directive can modify the already generated code by replacing +some of the previously generated data with the value defined by given +numerical expression, which follows. The expression can be preceded by the +optional size operator to specify how large value the expression defines, and +therefore how much bytes will be stored, if there is no size operator, the +size of one byte is assumed. Then the "at" operator and the numerical +expression defining the valid address in current addressing code space, at +which the given value have to be stored should follow. This is a directive for +advanced appliances and should be used carefully. + Both "load" and "store" directives are limited to operate on places in +current addressing space. The "$$" symbol is always equal to the base address +of current addressing space, and the "$" symbol is the address of current +position in that addressing space, therefore these two values define limits +of the area, where "load" and "store" can operate. + Combining the "load" and "store" directives allows to do things like encoding +some of the already generated code. For example to encode the whole code +generated in current addressing space you can use such block of directives: + + repeat $-$$ + load a byte from $$+%-1 + store byte a xor c at $$+%-1 + end repeat + +and each byte of code will be xored with the value defined by "c" constant. + "virtual" defines virtual data at specified address. This data will not be +included in the output file, but labels defined there can be used in other +parts of source. This directive can be followed by "at" operator and the +numerical expression specifying the address for virtual data, otherwise is +uses current address, the same as "virtual at $". Instructions defining data +are expected in next lines, ended with "end virtual" directive. The block of +virtual instructions itself is an independent addressing space, after it's +ended, the context of previous addressing space is restored. + The "virtual" directive can be used to create union of some variables, for +example: + + GDTR dp ? + virtual at GDTR + GDT_limit dw ? + GDT_address dd ? + end virtual + +It defines two labels for parts of the 48-bit variable at "GDTR" address. + It can be also used to define labels for some structures addressed by a +register, for example: + + virtual at bx + LDT_limit dw ? + LDT_address dd ? + end virtual + +With such definition instruction "mov ax,[LDT_limit]" will be assembled +to the same instruction as "mov ax,[bx]". + Declaring defined data values or instructions inside the virtual block would +also be useful, because the "load" directive can be used to load the values +from the virtually generated code into a constants. This directive should be +used after the code it loads but before the virtual block ends, because it can +only load the values from the same addressing space. For example: + + virtual at 0 + xor eax,eax + and edx,eax + load zeroq dword from 0 + end virtual + +The above piece of code will define the "zeroq" constant containing four bytes +of the machine code of the instructions defined inside the virtual block. +This method can be also used to load some binary value from external file. +For example this code: + + virtual at 0 + file 'a.txt':10h,1 + load char from 0 + end virtual + +loads the single byte from offset 10h in file "a.txt" into the "char" +constant. + Any of the "section" directives described in 2.4 also begins a new +addressing space. + + +2.2.5 Other directives + +"align" directive aligns code or data to the specified boundary. It should +be followed by a numerical expression specifying the number of bytes, to the +multiply of which the current address has to be aligned. The boundary value +has to be the power of two. + The "align" directive fills the bytes that had to be skipped to perform the +alignment with the "nop" instructions and at the same time marks this area as +uninitialized data, so if it is placed among other uninitialized data that +wouldn't take space in the output file, the alignment bytes will act the same +way. If you need to fill the alignment area with some other values, you can +combine "align" with "virtual" to get the size of alignment needed and then +create the alignment yourself, like: + + virtual + align 16 + a = $ - $$ + end virtual + db a dup 0 + +The "a" constant is defined to be the difference between address after +alignment and address of the "virtual" block (see previous section), so it is +equal to the size of needed alignment space. + "display" directive displays the message at the assembly time. It should +be followed by the quoted strings or byte values, separated with commas. It +can be used to display values of some constants, for example: + + bits = 16 + display 'Current offset is 0x' + repeat bits/4 + d = '0' + $ shr (bits-%*4) and 0Fh + if d > '9' + d = d + 'A'-'9'-1 + end if + display d + end repeat + display 13,10 + +This block of directives calculates the four hexadecimal digits of 16-bit +value and converts them into characters for displaying. Note that this will +not work if the adresses in current addressing space are relocatable (as it +might happen with PE or object output formats), since only absolute values can +be used this way. The absolute value may be obtained by calculating the +relative address, like "$-$$", or "rva $" in case of PE format. + The "err" directive immediately terminates the assembly process when it is +encountered by assembler. + The "assert" directive tests whether the logical expression that follows it +is true, and if not, it signalizes the error. + + +2.2.6 Multiple passes + +Because the assembler allows to reference some of the labels or constants +before they get actually defined, it has to predict the values of such labels +and if there is even a suspicion that prediction failed in at least one case, +it does one more pass, assembling the whole source, this time doing better +prediction based on the values the labels got in the previous pass. + The changing values of labels can cause some instructions to have encodings +of different length, and this can cause the change in values of labels again. +And since the labels and constants can also be used inside the expressions that +affect the behavior of control directives, the whole block of source can be +processed completely differently during the new pass. Thus the assembler does +more and more passes, each time trying to do better predictions to approach +the final solution, when all the values get predicted correctly. It uses +various method for predicting the values, which has been chosen to allow +finding in a few passes the solution of possibly smallest length for the most +of the programs. + Some of the errors, like the values not fitting in required boundaries, are +not signaled during those intermediate passes, since it may happen that when +some of the values are predicted better, these errors will disappear. However +if assembler meets some illegal syntax construction or unknown instruction, it +always stops immediately. Also defining some label more than once causes such +error, because it makes the predictions groundless. + Only the messages created with the "display" directive during the last +performed pass get actually displayed. In case when the assembly has been +stopped due to an error, these messages may reflect the predicted values that +are not yet resolved correctly. + The solution may sometimes not exist and in such cases the assembler will +never manage to make correct predictions - for this reason there is a limit for +a number of passes, and when assembler reaches this limit, it stops and +displays the message that it is not able to generate the correct output. +Consider the following example: + + if ~ defined alpha + alpha: + end if + +The "defined" operator gives the true value when the expression following it +could be calculated in this place, what in this case means that the "alpha" +label is defined somewhere. But the above block causes this label to be defined +only when the value given by "defined" operator is false, what leads to an +antynomy and makes it impossible to resolve such code. When processing the "if" +directive assembler has to predict whether the "alpha" label will be defined +somewhere (it wouldn't have to predict only if the label was already defined +earlier in this pass), and whatever the prediction is, the opposite always +happens. Thus the assembly will fail, unless the "alpha" label is defined +somewhere in source preceding the above block of instructions - in such case, +as it was already noted, the prediction is not needed and the block will just +get skipped. + The above sample might have been written as a try to define the label only +when it was not yet defined. It fails, because the "defined" operator does +check whether the label is defined anywhere, and this includes the definition +inside this conditionally processed block. However adding some additional +condition may make it possible to get it resolved: + + if ~ defined alpha | defined @f + alpha: + @@: + end if + +The "@f" is always the same label as the nearest "@@" symbol in the source +following it, so the above sample would mean the same if any unique name was +used instead of the anonymous label. When "alpha" is not defined in any other +place in source, the only possible solution is when this block gets defined, +and this time this doesn't lead to the antynomy, because of the anonymous +label which makes this block self-establishing. To better understand this, +look at the blocks that has nothing more than this self-establishing: + + if defined @f + @@: + end if + +This is an example of source that may have more than one solution, as both +cases when this block gets processed or not are equally correct. Which one of +those two solutions we get depends on the algorithm on the assembler, in case +of flat assembler - on the algorithm of predictions. Back to the previous +sample, when "alpha" is not defined anywhere else, the condition for "if" block +cannot be false, so we are left with only one possible solution, and we can +hope the assembler will arrive at it. On the other hand, when "alpha" is +defined in some other place, we've got two possible solutions again, but one of +them causes "alpha" to be defined twice, and such an error causes assembler to +abort the assembly immediately, as this is the kind of error that deeply +disturbs the process of resolving. So we can get such source either correctly +resolved or causing an error, and what we get may depend on the internal +choices made by the assembler. + However there are some facts about such choices that are certain. When +assembler has to check whether the given symbol is defined and it was already +defined in the current pass, no prediction is needed - it was already noted +above. And when the given symbol has been defined never before, including all +the already finished passes, the assembler predicts it to be not defined. +Knowing this, we can expect that the simple self-establishing block shown +above will not be assembled at all and that the previous sample will resolve +correctly when "alpha" is defined somewhere before our conditional block, +while it will itself define "alpha" when it's not already defined earlier, thus +potentially causing the error because of double definition if the "alpha" is +also defined somewhere later. + The "used" operator may be expected to behave in a similar manner in +analogous cases, however any other kinds of predictions my not be so simple and +you should never rely on them this way. + The "err" directive, usually used to stop the assembly when some condition is +met, stops the assembly immediately, regardless of whether the current pass +is final or intermediate. So even when the condition that caused this directive +to be interpreted is mispredicted and temporary, and would eventually disappear +in the later passes, the assembly is stopped anyway. + The "assert" directive signalizes the error only if its expression is false +after all the symbols have been resolved. You can use "assert 0" in place of +"err" when you do not want to have assembly stopped during the intermediate +passes. + + +2.3 Preprocessor directives + +All preprocessor directives are processed before the main assembly process, +and therefore are not affected by the control directives. At this time also +all comments are stripped out. + + +2.3.1 Including source files + +"include" directive includes the specified source file at the position where +it is used. It should be followed by the quoted name of file that should be +included, for example: + + include 'macros.inc' + +The whole included file is preprocessed before preprocessing the lines next +to the line containing the "include" directive. There are no limits to the +number of included files as long as they fit in memory. + The quoted path can contain environment variables enclosed within "%" +characters, they will be replaced with their values inside the path, both the +"\" and "/" characters are allowed as a path separators. The file is first +searched for in the directory containing file which included it and when it is +not found there, the search is continued in the directories specified in the +environment variable called INCLUDE (the multiple paths separated with +semicolons can be defined there, they will be searched in the same order as +specified). If file was not found in any of these places, preprocessor looks +for it in the directory containing the main source file (the one specified in +command line). These rules concern also paths given with the "file" directive. + + +2.3.2 Symbolic constants + +The symbolic constants are different from the numerical constants, before the +assembly process they are replaced with their values everywhere in source +lines after their definitions, and anything can become their values. + The definition of symbolic constant consists of name of the constant +followed by the "equ" directive. Everything that follows this directive will +become the value of constant. If the value of symbolic constant contains +other symbolic constants, they are replaced with their values before assigning +this value to the new constant. For example: + + d equ dword + NULL equ d 0 + d equ edx + +After these three definitions the value of "NULL" constant is "dword 0" and +the value of "d" is "edx". So, for example, "push NULL" will be assembled as +"push dword 0" and "push d" will be assembled as "push edx". And if then the +following line was put: + + d equ d,eax + +the "d" constant would get the new value of "edx,eax". This way the growing +lists of symbols can be defined. + "restore" directive allows to get back previous value of redefined symbolic +constant. It should be followed by one more names of symbolic constants, +separated with commas. So "restore d" after the above definitions will give +"d" constant back the value "edx", the second one will restore it to value +"dword", and one more will revert "d" to original meaning as if no such +constant was defined. If there was no constant defined of given name, +"restore" will not cause an error, it will be just ignored. + Symbolic constant can be used to adjust the syntax of assembler to personal +preferences. For example the following set of definitions provides the handy +shortcuts for all the size operators: + + b equ byte + w equ word + d equ dword + p equ pword + f equ fword + q equ qword + t equ tword + x equ dqword + y equ qqword + + Because symbolic constant may also have an empty value, it can be used to +allow the syntax with "offset" word before any address value: + + offset equ + +After this definition "mov ax,offset char" will be valid construction for +copying the offset of "char" variable into "ax" register, because "offset" is +replaced with an empty value, and therefore ignored. + The "define" directive followed by the name of constant and then the value, +is the alternative way of defining symbolic constant. The only difference +between "define" and "equ" is that "define" assigns the value as it is, it does +not replace the symbolic constants with their values inside it. + Symbolic constants can also be defined with the "fix" directive, which has +the same syntax as "equ", but defines constants of high priority - they are +replaced with their symbolic values even before processing the preprocessor +directives and macroinstructions, the only exception is "fix" directive +itself, which has the highest possible priority, so it allows redefinition of +constants defined this way. + The "fix" directive can be used for syntax adjustments related to directives +of preprocessor, what cannot be done with "equ" directive. For example: + + incl fix include + +defines a short name for "include" directive, while the similar definition done +with "equ" directive wouldn't give such result, as standard symbolic constants +are replaced with their values after searching the line for preprocessor +directives. + + +2.3.3 Macroinstructions + +"macro" directive allows you to define your own complex instructions, called +macroinstructions, using which can greatly simplify the process of +programming. In its simplest form it's similar to symbolic constant +definition. For example the following definition defines a shortcut for the +"test al,0xFF" instruction: + + macro tst {test al,0xFF} + +After the "macro" directive there is a name of macroinstruction and then its +contents enclosed between the "{" and "}" characters. You can use "tst" +instruction anywhere after this definition and it will be assembled as +"test al,0xFF". Defining symbolic constant "tst" of that value would give the +similar result, but the difference is that the name of macroinstruction is +recognized only as an instruction mnemonic. Also, macroinstructions are +replaced with corresponding code even before the symbolic constants are +replaced with their values. So if you define macroinstruction and symbolic +constant of the same name, and use this name as an instruction mnemonic, it +will be replaced with the contents of macroinstruction, but it will be +replaced with value if symbolic constant if used somewhere inside the +operands. + The definition of macroinstruction can consist of many lines, because +"{" and "}" characters don't have to be in the same line as "macro" directive. +For example: + + macro stos0 + { + xor al,al + stosb + } + +The macroinstruction "stos0" will be replaced with these two assembly +instructions anywhere it's used. + Like instructions which needs some number of operands, the macroinstruction +can be defined to need some number of arguments separated with commas. The +names of needed argument should follow the name of macroinstruction in the +line of "macro" directive and should be separated with commas if there is more +than one. Anywhere one of these names occurs in the contents of +macroinstruction, it will be replaced with corresponding value, provided when +the macroinstruction is used. Here is an example of a macroinstruction that +will do data alignment for binary output format: + + macro align value { rb (value-1)-($+value-1) mod value } + +When the "align 4" instruction is found after this macroinstruction is +defined, it will be replaced with contents of this macroinstruction, and the +"value" will there become 4, so the result will be "rb (4-1)-($+4-1) mod 4". + If a macroinstruction is defined that uses an instruction with the same name +inside its definition, the previous meaning of this name is used. Useful +redefinition of macroinstructions can be done in that way, for example: + + macro mov op1,op2 + { + if op1 in & op2 in + push op2 + pop op1 + else + mov op1,op2 + end if + } + +This macroinstruction extends the syntax of "mov" instruction, allowing both +operands to be segment registers. For example "mov ds,es" will be assembled as +"push es" and "pop ds". In all other cases the standard "mov" instruction will +be used. The syntax of this "mov" can be extended further by defining next +macroinstruction of that name, which will use the previous macroinstruction: + + macro mov op1,op2,op3 + { + if op3 eq + mov op1,op2 + else + mov op1,op2 + mov op2,op3 + end if + } + +It allows "mov" instruction to have three operands, but it can still have two +operands only, because when macroinstruction is given less arguments than it +needs, the rest of arguments will have empty values. When three operands are +given, this macroinstruction will become two macroinstructions of the previous +definition, so "mov es,ds,dx" will be assembled as "push ds", "pop es" and +"mov ds,dx". + By placing the "*" after the name of argument you can mark the argument as +required - preprocessor will not allow it to have an empty value. For example +the above macroinstruction could be declared as "macro mov op1*,op2*,op3" to +make sure that first two arguments will always have to be given some non empty +values. + Alternatively, you can provide the default value for argument, by placing +the "=" followed by value after the name of argument. Then if the argument +has an empty value provided, the default value will be used instead. + When it's needed to provide macroinstruction with argument that contains +some commas, such argument should be enclosed between "<" and ">" characters. +If it contains more than one "<" character, the same number of ">" should be +used to tell that the value of argument ends. + "purge" directive allows removing the last definition of specified +macroinstruction. It should be followed by one or more names of +macroinstructions, separated with commas. If such macroinstruction has not +been defined, you will not get any error. For example after having the syntax +of "mov" extended with the macroinstructions defined above, you can disable +syntax with three operands back by using "purge mov" directive. Next +"purge mov" will disable also syntax for two operands being segment registers, +and all the next such directives will do nothing. + If after the "macro" directive you enclose some group of arguments' names in +square brackets, it will allow giving more values for this group of arguments +when using that macroinstruction. Any more argument given after the last +argument of such group will begin the new group and will become the first +argument of it. That's why after closing the square bracket no more argument +names can follow. The contents of macroinstruction will be processed for each +such group of arguments separately. The simplest example is to enclose one +argument name in square brackets: + + macro stoschar [char] + { + mov al,char + stosb + } + +This macroinstruction accepts unlimited number of arguments, and each one +will be processed into these two instructions separately. For example +"stoschar 1,2,3" will be assembled as the following instructions: + + mov al,1 + stosb + mov al,2 + stosb + mov al,3 + stosb + + There are some special directives available only inside the definitions of +macroinstructions. "local" directive defines local names, which will be +replaced with unique values each time the macroinstruction is used. It should +be followed by names separated with commas. If the name given as parameter to +"local" directive begins with a dot or two dots, the unique labels generated +by each evaluation of macroinstruction will have the same properties. +This directive is usually needed for the constants or labels that +macroinstruction defines and uses internally. For example: + + macro movstr + { + local move + move: + lodsb + stosb + test al,al + jnz move + } + +Each time this macroinstruction is used, "move" will become other unique name +in its instructions, so you will not get an error you normally get when some +label is defined more than once. + "forward", "reverse" and "common" directives divide macroinstruction into +blocks, each one processed after the processing of previous is finished. They +differ in behavior only if macroinstruction allows multiple groups of +arguments. Block of instructions that follows "forward" directive is processed +for each group of arguments, from first to last - exactly like the default +block (not preceded by any of these directives). Block that follows "reverse" +directive is processed for each group of argument in reverse order - from last +to first. Block that follows "common" directive is processed only once, +commonly for all groups of arguments. Local name defined in one of the blocks +is available in all the following blocks when processing the same group of +arguments as when it was defined, and when it is defined in common block it is +available in all the following blocks not depending on which group of +arguments is processed. + Here is an example of macroinstruction that will create the table of +addresses to strings followed by these strings: + + macro strtbl name,[string] + { + common + label name dword + forward + local label + dd label + forward + label db string,0 + } + +First argument given to this macroinstruction will become the label for table +of addresses, next arguments should be the strings. First block is processed +only once and defines the label, second block for each string declares its +local name and defines the table entry holding the address to that string. +Third block defines the data of each string with the corresponding label. + The directive starting the block in macroinstruction can be followed by the +first instruction of this block in the same line, like in the following +example: + + macro stdcall proc,[arg] + { + reverse push arg + common call proc + } + +This macroinstruction can be used for calling the procedures using STDCALL +convention, which has all the arguments pushed on stack in the reverse order. +For example "stdcall foo,1,2,3" will be assembled as: + + push 3 + push 2 + push 1 + call foo + + If some name inside macroinstruction has multiple values (it is either one +of the arguments enclosed in square brackets or local name defined in the +block following "forward" or "reverse" directive) and is used in block +following the "common" directive, it will be replaced with all of its values, +separated with commas. For example the following macroinstruction will pass +all of the additional arguments to the previously defined "stdcall" +macroinstruction: + + macro invoke proc,[arg] + { common stdcall [proc],arg } + +It can be used to call indirectly (by the pointer stored in memory) the +procedure using STDCALL convention. + Inside macroinstruction also special operator "#" can be used. This +operator causes two names to be concatenated into one name. It can be useful, +because it's done after the arguments and local names are replaced with their +values. The following macroinstruction will generate the conditional jump +according to the "cond" argument: + + macro jif op1,cond,op2,label + { + cmp op1,op2 + j#cond label + } + +For example "jif ax,ae,10h,exit" will be assembled as "cmp ax,10h" and +"jae exit" instructions. + The "#" operator can be also used to concatenate two quoted strings into one. +Also conversion of name into a quoted string is possible, with the "`" operator, +which likewise can be used inside the macroinstruction. It converts the name +that follows it into a quoted string - but note, that when it is followed by +a macro argument which is being replaced with value containing more than one +symbol, only the first of them will be converted, as the "`" operator converts +only one symbol that immediately follows it. Here's an example of utilizing +those two features: + + macro label name + { + label name + if ~ used name + display `name # " is defined but not used.",13,10 + end if + } + +When label defined with such macro is not used in the source, macro will warn +you with the message, informing to which label it applies. + To make macroinstruction behaving differently when some of the arguments are +of some special type, for example a quoted strings, you can use "eqtype" +comparison operator. Here's an example of utilizing it to distinguish a +quoted string from an other argument: + + macro message arg + { + if arg eqtype "" + local str + jmp @f + str db arg,0Dh,0Ah,24h + @@: + mov dx,str + else + mov dx,arg + end if + mov ah,9 + int 21h + } + +The above macro is designed for displaying messages in DOS programs. When the +argument of this macro is some number, label, or variable, the string from +that address is displayed, but when the argument is a quoted string, the +created code will display that string followed by the carriage return and +line feed. + It is also possible to put a declaration of macroinstruction inside another +macroinstruction, so one macro can define another, but there is a problem +with such definitions caused by the fact, that "}" character cannot occur +inside the macroinstruction, as it always means the end of definition. To +overcome this problem, the escaping of symbols inside macroinstruction can be +used. This is done by placing one or more backslashes in front of any other +symbol (even the special character). Preprocessor sees such sequence as a +single symbol, but each time it meets such symbol during the macroinstruction +processing, it cuts the backslash character from the front of it. For example +"\{" is treated as single symbol, but during processing of the macroinstruction +it becomes the "{" symbol. This allows to put one definition of +macroinstruction inside another: + + macro ext instr + { + macro instr op1,op2,op3 + \{ + if op3 eq + instr op1,op2 + else + instr op1,op2 + instr op2,op3 + end if + \} + } + + ext add + ext sub + +The macro "ext" is defined correctly, but when it is used, the "\{" and "\}" +become the "{" and "}" symbols. So when the "ext add" is processed, the +contents of macro becomes valid definition of a macroinstruction and this way +the "add" macro becomes defined. In the same way "ext sub" defines the "sub" +macro. The use of "\{" symbol wasn't really necessary here, but is done this +way to make the definition more clear. + If some directives specific to macroinstructions, like "local" or "common" +are needed inside some macro embedded this way, they can be escaped in the same +way. Escaping the symbol with more than one backslash is also allowed, which +allows multiple levels of nesting the macroinstruction definitions. + The another technique for defining one macroinstruction by another is to +use the "fix" directive, which becomes useful when some macroinstruction only +begins the definition of another one, without closing it. For example: + + macro tmacro [params] + { + common macro params { + } + + MACRO fix tmacro + ENDM fix } + +defines an alternative syntax for defining macroinstructions, which looks like: + + MACRO stoschar char + mov al,char + stosb + ENDM + +Note that symbol that has such customized definition must be defined with "fix" +directive, because only the prioritized symbolic constants are processed before +the preprocessor looks for the "}" character while defining the macro. This +might be a problem if one needed to perform some additional tasks one the end +of such definition, but there is one more feature which helps in such cases. +Namely it is possible to put any directive, instruction or macroinstruction +just after the "}" character that ends the macroinstruction and it will be +processed in the same way as if it was put in the next line. + + +2.3.4 Structures + +"struc" directive is a special variant of "macro" directive that is used to +define data structures. Macroinstruction defined using the "struc" directive +must be preceded by a label (like the data definition directive) when it's +used. This label will be also attached at the beginning of every name starting +with dot in the contents of macroinstruction. The macroinstruction defined +using the "struc" directive can have the same name as some other +macroinstruction defined using the "macro" directive, structure +macroinstruction will not prevent the standard macroinstruction from being +processed when there is no label before it and vice versa. All the rules and +features concerning standard macroinstructions apply to structure +macroinstructions. + Here is the sample of structure macroinstruction: + + struc point x,y + { + .x dw x + .y dw y + } + +For example "my point 7,11" will define structure labeled "my", consisting of +two variables: "my.x" with value 7 and "my.y" with value 11. + If somewhere inside the definition of structure the name consisting of a +single dot it found, it is replaced by the name of the label for the given +instance of structure and this label will not be defined automatically in +such case, allowing to completely customize the definition. The following +example utilizes this feature to extend the data definition directive "db" +with ability to calculate the size of defined data: + + struc db [data] + { + common + . db data + .size = $ - . + } + +With such definition "msg db 'Hello!',13,10" will define also "msg.size" +constant, equal to the size of defined data in bytes. + Defining data structures addressed by registers or absolute values should be +done using the "virtual" directive with structure macroinstruction +(see 2.2.4). + "restruc" directive removes the last definition of the structure, just like +"purge" does with macroinstructions and "restore" with symbolic constants. +It also has the same syntax - should be followed by one or more names of +structure macroinstructions, separated with commas. + + +2.3.5 Repeating macroinstructions + +The "rept" directive is a special kind of macroinstruction, which makes given +amount of duplicates of the block enclosed with braces. The basic syntax is +"rept" directive followed by number and then block of source enclosed between +the "{" and "}" characters. The simplest example: + + rept 5 { in al,dx } + +will make five duplicates of the "in al,dx" line. The block of instructions +is defined in the same way as for the standard macroinstruction and any +special operators and directives which can be used only inside +macroinstructions are also allowed here. When the given count is zero, the +block is simply skipped, as if you defined macroinstruction but never used +it. The number of repetitions can be followed by the name of counter symbol, +which will get replaced symbolically with the number of duplicate currently +generated. So this: + + rept 3 counter + { + byte#counter db counter + } + +will generate lines: + + byte1 db 1 + byte2 db 2 + byte3 db 3 + +The repetition mechanism applied to "rept" blocks is the same as the one used +to process multiple groups of arguments for macroinstructions, so directives +like "forward", "common" and "reverse" can be used in their usual meaning. +Thus such macroinstruction: + + rept 7 num { reverse display `num } + +will display digits from 7 to 1 as text. The "local" directive behaves in the +same way as inside macroinstruction with multiple groups of arguments, so: + + rept 21 + { + local label + label: loop label + } + +will generate unique label for each duplicate. + The counter symbol by default counts from 1, but you can declare different +base value by placing the number preceded by colon immediately after the name +of counter. For example: + + rept 8 n:0 { pxor xmm#n,xmm#n } + +will generate code which will clear the contents of eight SSE registers. +You can define multiple counters separated with commas, and each one can have +different base. + The number of repetitions and the base values for counters can be specified +using the numerical expressions with operator rules identical as in the case +of assembler. However each value used in such expression must either be a +directly specified number, or a symbolic constant with value also being an +expression that can be calculated by preprocessor (in such case the value +of expression associated with symbolic constant is calculated first, and then +substituted into the outer expression in place of that constant). If you need +repetitions based on values that can only be calculated at assembly time, use +one of the code repeating directives that are processed by assembler, see +section 2.2.3. + The "irp" directive iterates the single argument through the given list of +parameters. The syntax is "irp" followed by the argument name, then the comma +and then the list of parameters. The parameters are specified in the same +way like in the invocation of standard macroinstruction, so they have to be +separated with commas and each one can be enclosed with the "<" and ">" +characters. Also the name of argument may be followed by "*" to mark that it +cannot get an empty value. Such block: + + irp value, 2,3,5 + { db value } + +will generate lines: + + db 2 + db 3 + db 5 + +The "irps" directive iterates through the given list of symbols, it should +be followed by the argument name, then the comma and then the sequence of any +symbols. Each symbol in this sequence, no matter whether it is the name +symbol, symbol character or quoted string, becomes an argument value for one +iteration. If there are no symbols following the comma, no iteration is done +at all. This example: + + irps reg, al bx ecx + { xor reg,reg } + +will generate lines: + + xor al,al + xor bx,bx + xor ecx,ecx + +The blocks defined by the "irp" and "irps" directives are also processed in +the same way as any macroinstructions, so operators and directives specific +to macroinstructions may be freely used also in this case. + + +2.3.6 Conditional preprocessing + +"match" directive causes some block of source to be preprocessed and passed +to assembler only when the given sequence of symbols matches the specified +pattern. The pattern comes first, ended with comma, then the symbols that have +to be matched with the pattern, and finally the block of source, enclosed +within braces as macroinstruction. + There are the few rules for building the expression for matching, first is +that any of symbol characters and any quoted string should be matched exactly +as is. In this example: + + match +,+ { include 'first.inc' } + match +,- { include 'second.inc' } + +the first file will get included, since "+" after comma matches the "+" in +pattern, and the second file will not be included, since there is no match. + To match any other symbol literally, it has to be preceded by "=" character +in the pattern. Also to match the "=" character itself, or the comma, the +"==" and "=," constructions have to be used. For example the "=a==" pattern +will match the "a=" sequence. + If some name symbol is placed in the pattern, it matches any sequence +consisting of at least one symbol and then this name is replaced with the +matched sequence everywhere inside the following block, analogously to the +parameters of macroinstruction. For instance: + + match a-b, 0-7 + { dw a,b-a } + +will generate the "dw 0,7-0" instruction. Each name is always matched with +as few symbols as possible, leaving the rest for the following ones, so in +this case: + + match a b, 1+2+3 { db a } + +the "a" name will match the "1" symbol, leaving the "+2+3" sequence to be +matched with "b". But in this case: + + match a b, 1 { db a } + +there will be nothing left for "b" to match, so the block will not get +processed at all. + The block of source defined by match is processed in the same way as any +macroinstruction, so any operators specific to macroinstructions can be used +also in this case. + What makes "match" directive more useful is the fact, that it replaces the +symbolic constants with their values in the matched sequence of symbols (that +is everywhere after comma up to the beginning of the source block) before +performing the match. Thanks to this it can be used for example to process +some block of source under the condition that some symbolic constant has the +given value, like: + + match =TRUE, DEBUG { include 'debug.inc' } + +which will include the file only when the symbolic constant "DEBUG" was +defined with value "TRUE". + + +2.3.7 Order of processing + +When combining various features of the preprocessor, it's important to know +the order in which they are processed. As it was already noted, the highest +priority has the "fix" directive and the replacements defined with it. This +is done completely before doing any other preprocessing, therefore this +piece of source: + + V fix { + macro empty + V + V fix } + V + +becomes a valid definition of an empty macroinstruction. It can be interpreted +that the "fix" directive and prioritized symbolic constants are processed in +a separate stage, and all other preprocessing is done after on the resulting +source. + The standard preprocessing that comes after, on each line begins with +recognition of the first symbol. It starts with checking for the preprocessor +directives, and when none of them is detected, preprocessor checks whether the +first symbol is macroinstruction. If no macroinstruction is found, it moves +to the second symbol of line, and again begins with checking for directives, +which in this case is only the "equ" directive, as this is the only one that +occurs as the second symbol in line. If there is no directive, the second +symbol is checked for the case of structure macroinstruction and when none +of those checks gives the positive result, the symbolic constants are replaced +with their values and such line is passed to the assembler. + To see it on the example, assume that there is defined the macroinstruction +called "foo" and the structure macroinstruction called "bar". Those lines: + + foo equ + foo bar + +would be then both interpreted as invocations of macroinstruction "foo", since +the meaning of the first symbol overrides the meaning of second one. + When the macroinstruction generates the new lines from its definition block, +in every line it first scans for macroinstruction directives, and interpretes +them accordingly. All the other content in the definition block is used to +brew the new lines, replacing the macroinstruction parameters with their values +and then processing the symbol escaping and "#" and "`" operators. The +conversion operator has the higher priority than concatenation and if any of +them operates on the escaped symbol, the escaping is cancelled before finishing +the operation. After this is completed, the newly generated line goes through +the standard preprocessing, as described above. + Though the symbolic constants are usually only replaced in the lines, where +no preprocessor directives nor macroinstructions has been found, there are some +special cases where those replacements are performed in the parts of lines +containing directives. First one is the definition of symbolic constant, where +the replacements are done everywhere after the "equ" keyword and the resulting +value is then assigned to the new constant (see 2.3.2). The second such case +is the "match" directive, where the replacements are done in the symbols +following comma before matching them with pattern. These features can be used +for example to maintain the lists, like this set of definitions: + + list equ + + macro append item + { + match any, list \{ list equ list,item \} + match , list \{ list equ item \} + } + +The "list" constant is here initialized with empty value, and the "append" +macroinstruction can be used to add the new items into this list, separating +them with commas. The first match in this macroinstruction occurs only when +the value of list is not empty (see 2.3.6), in such case the new value for the +list is the previous one with the comma and the new item appended at the end. +The second match happens only when the list is still empty, and in such case +the list is defined to contain just the new item. So starting with the empty +list, the "append 1" would define "list equ 1" and the "append 2" following it +would define "list equ 1,2". One might then need to use this list as the +parameters to some macroinstruction. But it cannot be done directly - if "foo" +is the macroinstruction, then "foo list" would just pass the "list" symbol +as a parameter to macro, since symbolic constants are not unrolled at this +stage. For this purpose again "match" directive comes in handy: + + match params, list { foo params } + +The value of "list", if it's not empty, matches the "params" keyword, which is +then replaced with matched value when generating the new lines defined by the +block enclosed with braces. So if the "list" had value "1,2", the above line +would generate the line containing "foo 1,2", which would then go through the +standard preprocessing. + The other special case is in the parameters of "rept" directive. The amount +of repetitions and the base value for counter can be specified using +numerical expressions, and if there is a symbolic constant with non-numerical +name used in such an expression, preprocessor tries to evaluate its value as +a numerical expression and if succeeds, it replaces the symbolic constant with +the result of that calculation and continues to evaluate the primary +expression. If the expression inside that symbolic constants also contains +some symbolic constants, preprocessor will try to calculate all the needed +values recursively. + This allows to perform some calculations at the time of preprocessing, as +long as all the values used are the numbers known at the preprocessing stage. +A single repetition with "rept" can be used for the sole purpose of +calculating some value, like in this example: + + define a b+4 + define b 3 + rept 1 result:a*b+2 { define c result } + +To compute the base value for "result" counter, preprocessor replaces the "b" +with its value and recursively calculates the value of "a", obtaining 7 as +the result, then it calculates the main expression with the result being 23. +The "c" then gets defined with the first value of counter (because the block +is processed just one time), which is the result of the computation, so the +value of "c" is simple "23" symbol. Note that if "b" is later redefined with +some other numerical value, the next time and expression containing "a" is +calculated, the value of "a" will reflect the new value of "b", because the +symbolic constant contains just the text of the expression. + There is one more special case - when preprocessor goes to checking the +second symbol in the line and it happens to be the colon character (what is +then interpreted by assembler as definition of a label), it stops in this +place and finishes the preprocessing of the first symbol (so if it's the +symbolic constant it gets unrolled) and if it still appears to be the label, +it performs the standard preprocessing starting from the place after the +label. This allows to place preprocessor directives and macroinstructions +after the labels, analogously to the instructions and directives processed +by assembler, like: + + start: include 'start.inc' + +However if the label becomes broken during preprocessing (for example when +it is the symbolic constant with empty value), only replacing of the symbolic +constants is continued for the rest of line. + It should be remembered, that the jobs performed by preprocessor are the +preliminary operations on the texts symbols, that are done in a simple +single pass before the main process of assembly. The text that is the +result of preprocessing is passed to assembler, and it then does its +multiple passes on it. Thus the control directives, which are recognized and +processed only by the assembler - as they are dependent on the numerical +values that may even vary between passes - are not recognized in any way by +the preprocessor and have no effect on the preprocessing. Consider this +example source: + + if 0 + a = 1 + b equ 2 + end if + dd b + +When it is preprocessed, they only directive that is recognized by the +preprocessor is the "equ", which defines symbolic constant "b", so later +in the source the "b" symbol is replaced with the value "2". Except for this +replacement, the other lines are passes unchanged to the assembler. So +after preprocessing the above source becomes: + + if 0 + a = 1 + end if + dd 2 + +Now when assembler processes it, the condition for the "if" is false, and +the "a" constant doesn't get defined. However symbolic constant "b" was +processed normally, even though its definition was put just next to the one +of "a". So because of the possible confusion you should be very careful +every time when mixing the features of preprocessor and assembler - in such +cases it is important to realize what the source will become after the +preprocessing, and thus what the assembler will see and do its multiple passes +on. + + +2.4 Formatter directives + +These directives are actually also a kind of control directives, with the +purpose of controlling the format of generated code. + "format" directive followed by the format identifier allows to select the +output format. This directive should be put at the beginning of the source. +Default output format is a flat binary file, it can also be selected by using +"format binary" directive. This directive can be followed by the "as" keyword +and the quoted string specifying the default file extension for the output +file. Unless the output file name was specified from the command line, +assembler will use this extension when generating the output file. + "use16" and "use32" directives force the assembler to generate 16-bit or +32-bit code, omitting the default setting for selected output format. "use64" +enables generating the code for the long mode of x86-64 processors. + Below are described different output formats with the directives specific to +these formats. + + +2.4.1 MZ executable + +To select the MZ output format, use "format MZ" directive. The default code +setting for this format is 16-bit. + "segment" directive defines a new segment, it should be followed by label, +which value will be the number of defined segment, optionally "use16" or +"use32" word can follow to specify whether code in this segment should be +16-bit or 32-bit. The origin of segment is aligned to paragraph (16 bytes). +All the labels defined then will have values relative to the beginning of this +segment. + "entry" directive sets the entry point for MZ executable, it should be +followed by the far address (name of segment, colon and the offset inside +segment) of desired entry point. + "stack" directive sets up the stack for MZ executable. It can be followed by +numerical expression specifying the size of stack to be created automatically +or by the far address of initial stack frame when you want to set up the stack +manually. When no stack is defined, the stack of default size 4096 bytes will +be created. + "heap" directive should be followed by a 16-bit value defining maximum size +of additional heap in paragraphs (this is heap in addition to stack and +undefined data). Use "heap 0" to always allocate only memory program really +needs. Default size of heap is 65535. + + +2.4.2 Portable Executable + +To select the Portable Executable output format, use "format PE" directive, it +can be followed by additional format settings: first the target subsystem +setting, which can be "console" or "GUI" for Windows applications, "native" +for Windows drivers, "EFI", "EFIboot" or "EFIruntime" for the UEFI, it may be +followed by the minimum version of system that the executable is targeted to +(specified in form of floating-point value). Optional "DLL" and "WDM" keywords +mark the output file as a dynamic link library and WDM driver respectively, +and the "large" keyword marks the executable as able to handle addresses +larger than 2 GB. + After those settings can follow the "at" operator and a numerical expression +specifying the base of PE image and then optionally "on" operator followed by +the quoted string containing file name selects custom MZ stub for PE program +(when specified file is not a MZ executable, it is treated as a flat binary +executable file and converted into MZ format). The default code setting for +this format is 32-bit. The example of fully featured PE format declaration: + + format PE GUI 4.0 DLL at 7000000h on 'stub.exe' + + To create PE file for the x86-64 architecture, use "PE64" keyword instead of +"PE" in the format declaration, in such case the long mode code is generated +by default. + "section" directive defines a new section, it should be followed by quoted +string defining the name of section, then one or more section flags can +follow. Available flags are: "code", "data", "readable", "writeable", +"executable", "shareable", "discardable", "notpageable". The origin of section +is aligned to page (4096 bytes). Example declaration of PE section: + + section '.text' code readable executable + +Among with flags also one of the special PE data identifiers can be specified +to mark the whole section as a special data, possible identifiers are +"export", "import", "resource" and "fixups". If the section is marked to +contain fixups, they are generated automatically and no more data needs to be +defined in this section. Also resource data can be generated automatically +from the resource file, it can be achieved by writing the "from" operator and +quoted file name after the "resource" identifier. Below are the examples of +sections containing some special PE data: + + section '.reloc' data discardable fixups + section '.rsrc' data readable resource from 'my.res' + + "entry" directive sets the entry point for Portable Executable, the value of +entry point should follow. + "stack" directive sets up the size of stack for Portable Executable, value +of stack reserve size should follow, optionally value of stack commit +separated with comma can follow. When stack is not defined, it's set by +default to size of 4096 bytes. + "heap" directive chooses the size of heap for Portable Executable, value of +heap reserve size should follow, optionally value of heap commit separated +with comma can follow. When no heap is defined, it is set by default to size +of 65536 bytes, when size of heap commit is unspecified, it is by default set +to zero. + "data" directive begins the definition of special PE data, it should be +followed by one of the data identifiers ("export", "import", "resource" or +"fixups") or by the number of data entry in PE header. The data should be +defined in next lines, ended with "end data" directive. When fixups data +definition is chosen, they are generated automatically and no more data needs +to be defined there. The same applies to the resource data when the "resource" +identifier is followed by "from" operator and quoted file name - in such case +data is taken from the given resource file. + The "rva" operator can be used inside the numerical expressions to obtain +the RVA of the item addressed by the value it is applied to, that is the +offset relative to the base of PE image. + + +2.4.3 Common Object File Format + +To select Common Object File Format, use "format COFF" or "format MS COFF" +directive, depending whether you want to create classic (DJGPP) or Microsoft's +variant of COFF file. The default code setting for this format is 32-bit. To +create the file in Microsoft's COFF format for the x86-64 architecture, use +"format MS64 COFF" setting, in such case long mode code is generated by +default. + "section" directive defines a new section, it should be followed by quoted +string defining the name of section, then one or more section flags can +follow. Section flags available for both COFF variants are "code" and "data", +while flags "readable", "writeable", "executable", "shareable", "discardable", +"notpageable", "linkremove" and "linkinfo" are available only with Microsoft's +COFF variant. + By default section is aligned to double word (four bytes), in case of +Microsoft COFF variant other alignment can be specified by providing the +"align" operator followed by alignment value (any power of two up to 8192) +among the section flags. + "extrn" directive defines the external symbol, it should be followed by the +name of symbol and optionally the size operator specifying the size of data +labeled by this symbol. The name of symbol can be also preceded by quoted +string containing name of the external symbol and the "as" operator. +Some example declarations of external symbols: + + extrn exit + extrn '__imp__MessageBoxA@16' as MessageBox:dword + + "public" directive declares the existing symbol as public, it should be +followed by the name of symbol, optionally it can be followed by the "as" +operator and the quoted string containing name under which symbol should be +available as public. Some examples of public symbols declarations: + + public main + public start as '_start' + +Additionally, with COFF format it's possible to specify exported symbol as +static, it's done by preceding the name of symbol with the "static" keyword. + When using the Microsoft's COFF format, the "rva" operator can be used +inside the numerical expressions to obtain the RVA of the item addressed by the +value it is applied to. + +2.4.4 Executable and Linkable Format + +To select ELF output format, use "format ELF" directive. The default code +setting for this format is 32-bit. To create ELF file for the x86-64 +architecture, use "format ELF64" directive, in such case the long mode code is +generated by default. + "section" directive defines a new section, it should be followed by quoted +string defining the name of section, then can follow one or both of the +"executable" and "writeable" flags, optionally also "align" operator followed +by the number specifying the alignment of section (it has to be the power of +two), if no alignment is specified, the default value is used, which is 4 or 8, +depending on which format variant has been chosen. + "extrn" and "public" directives have the same meaning and syntax as when the +COFF output format is selected (described in previous section). + The "rva" operator can be used also in the case of this format (however not +when target architecture is x86-64), it converts the address into the offset +relative to the GOT table, so it may be useful to create position-independent +code. There's also a special "plt" operator, which allows to call the external +functions through the Procedure Linkage Table. You can even create an alias +for external function that will make it always be called through PLT, with +the code like: + + extrn 'printf' as _printf + printf = PLT _printf + + To create executable file, follow the format choice directive with the +"executable" keyword and optionally the number specifying the brand of the +target operating system (for example value 3 would mark the executable +for Linux system). With this format selected it is allowed to use "entry" +directive followed by the value to set as entry point of program. On the other +hand it makes "extrn" and "public" directives unavailable, and instead of +"section" there should be the "segment" directive used, followed by one or +more segment permission flags and optionally a marker of special ELF +executable segment, which can be "interpreter", "dynamic" or "note". The +origin of segment is aligned to page (4096 bytes), and available permission +flags are: "readable", "writeable" and "executable". + +EOF diff --git a/data/sp/docs/HOT_KEYS.TXT b/data/sp/docs/HOT_KEYS.TXT new file mode 100644 index 0000000000..993775ba96 --- /dev/null +++ b/data/sp/docs/HOT_KEYS.TXT @@ -0,0 +1,16 @@ +The following "hot" shortcut keys are used in the system: +(Indexing on time of appearance in the system) +1) Ctrl + Alt + Del start of the application CPU (the manager of processes), is a sole combination maintained on a level of a kernel, all rest "hot" key is realized at the expense of the application @PANEL. +2) Ctrl + Shift - switching of keyboard layout. +3) Win - start of the application MENU. +4) Alt + Ctrl + F12 - start of the application END. +5) Alt + F4 - terminate the active application. +6) Alt + Tab - switch to the next (in the window stack) window +7) Alt + Shift + Tab - switch to the previous (in the window stack) window +8) Alt + Shift + NumLock - start of the application MOUSEMUL, which emulates mouse with numpad, when NumLock is on. +9) Alt + 1...7 - fast switching to the selected keyboard layout (even if absent for Ctrl + Shift) +10) Win + D - minimize/restore all windows (cleaning of desktop) +11) Win + R - start of the application RUN +12) Alt + Ctrl + ArrowLeft - to scroll back a list of the taskbar +13) Alt + Ctrl + ArrowRight - to scroll forward a list of the taskbar +14) PrintScreen - start of the application SCRSHOOT. Just do a screen shot and the user is offered to specify (with OpenDialog) where to save the BMP image. diff --git a/data/sp/docs/INI.TXT b/data/sp/docs/INI.TXT new file mode 100644 index 0000000000..f906363c7e --- /dev/null +++ b/data/sp/docs/INI.TXT @@ -0,0 +1,25 @@ +Ini-files are text files of special contents: + +[name of first section] +Key1=value1 +Key2=value2 +;comment +[name of second section] +Key3=value3 + +All lines beginning with ';' are considered as comments and ignored. + +Keyboard shortcuts are described as follows: +any number of modificators Ctrl/Alt/Shift/LCtrl/LAlt/LShift/RCtrl/RAlt/RShift, +followed by latin letter, digit or key name. The following keys have a name: +F1 - F12 +Home; End; PgUp; PgDn; Ins, equivalently, Insert; Del, equivalently, Delete; +Tab; Plus; Esc; Enter; Backspace; Space; +Left (left arrow); Right (right arrow); Up (up arrow); Down (down arrow). +The string for shortcut is case-insensitive. Parts of the string +can be written without delimiters or with '+' between parts. Examples: +Ctrl+Alt+Backspace +RCtrl+RShift +ShiftA +f10 +shiftalt5 diff --git a/data/sp/docs/INSTALL.TXT b/data/sp/docs/INSTALL.TXT new file mode 100644 index 0000000000..58f40b6de3 --- /dev/null +++ b/data/sp/docs/INSTALL.TXT @@ -0,0 +1,109 @@ +Minimal system requirements for Kolibri 0.7.x.0: +* CPU: Pentium, AMD 5x86 or Cyrix 5x86 without MMX with frequency 100 MHz +* RAM: 8 Mb +* Videocard: supporting VGA (640*480*16 mode) or Vesa +* Keyboard: AT +* Mouse: COM or PS/2 + +The system can boot from any of following devices: +- Floppy 3.5 +- IDE HDD LBA +- CD/DVD +- USB Flash + +I. Install to floppy. + 1) Insert clean floppy without bad sectors to drive. + 2) Write to it kolibri.img image with any available methods: + a) (if you have already loaded Kolibri by any method) run the program + rdsave and select the variant corresponding to floppy + b) (for DOS and Windows) run subjoined install.bat + c) with program WinImage or its analogue (e.g. DiskExplorer) + d) (for Linux) set "executable" attribute to subjoined script install.sh + and run it +Now you can boot from floppy (keep it in drive, reboot, set in BIOS option +of floppy booting). + +II. Install to hard disk. +There exists several loaders from hard disk. All are oriented on DOS and +Windows users. Also standard Linux-loader GRUB can be used. All methods work +with file kolibri.img. If you already have old version of Kolibri installed, +simply replace kolibri.img to new. If you have booted from LiveCD, which +does not contain the file kolibri.img, Kolibri can create it independently, +to do this, run the program rdsave, enter the file name for saving and select +the corresponding variant. Of course, in this case Kolibri must be able to +write to file system of selected partitions, currently this means that +only FAT volumes are ok. +1) Most of all features has the loader mtldr (author - Diamond) - works with + DOS/Win95/98/NT/2k/XP/Vista, supports FAT32 and NTFS, has installator, can + be installed to any folder on disk. + To install, simply run file HD_load\mtldr_install.exe and select image file. + Apropos, by this way you can install several images. There is also + variant of install by hand - for those who want to know what installator + does: directions in HD_load\mtldr +2) There is also the loader MeOSLoad (author - Trans, expanded by Mario79) - + works with DOS/Win95/98, supports FAT32, it is placed with the instruction + to the folder HD_load\MeOSLoad. +3) Moreover, there exist a program which allow load Kolibri directly from + Windows 95/98/Me (of course, unloading it) - 9x2klbr (author - Diamond), + supports FAT32 and NTFS. +4) Usage of the loader GRUB. The way of using file 'memdisk' to load Kolibri + has been described by derPENGUIN on english forum + (http://meos32.7.forumer.com/viewtopic.php?t=110). + The suggested method (described by Alver) is based on that description + and was checked on grub-0.97-19mdv2007.0. + 1. Kolibri can write only on FAT filesystem, so if image file is placed not + to FAT volume, the system can not save settings. Therefore if you have + FAT32 partition, place 'kolibri.img' there. + 2. This method requires the file 'memdisk' from the package 'syslinux' + (http://syslinux.zytor.com). You may install the whole package or only + extract the mentioned file. Only the file 'memdisk' is needed. (After + package install it will be in '/usr/lib/syslinux'). + 3. Place the file 'memdisk' to the folder 'boot' or to the partition used + for Kolibri. + 4. Add to the configuration file 'menu.lst' ('grub.conf') lines as follow: + + title KolibriOS + kernel (hd[Hard disk number],[partition number])[path]/memdisk + initrd (hd[Hard disk number],[partition number])[path]/kolibri.img + + (Remember that numeration of partitions in GRUB starts from 0.) + Example: + title KolibriOS + kernel (hd0,0)/boot/memdisk + initrd (hd0,3)/kolibri/kolibri.img + + The initial variant was: + + label KolibriOS + root (hd[Hard disk number],[partition number]) + kernel [path]/memdisk + initrd [path]/kolibri.img + + Here 'memdisk' and 'kolibri.img' must be placed on the same partition. + + Example: + label KolibriOS + root (hd0,0) + kernel /boot/memdisk + initrd /boot/kolibri.img + This example is the variant described on english forum, with install to + Linux boot partition (of course, without FAT partition). + +5) The previous method could not work as is in GRUB2 (tested by Apocalypse_dn), + the commands "linux16" and "initrd16" should be used instead of "kernel" + and "initrd" (suggested by vkos). + +III. Install to USB-Flash-drive. +The special loader for FAT32-volumes has been written, it and its installer +to flash drive can be found in the folder HD_load\USB_Boot. +For not-FAT32 drives you may use article placed in the folder +HD_load\USB_Boot_old. + +IV. Install to CD and DVD. +There exists special LiveCD-version of Kolibri, which contains +in addition to standard things some "heavy" (in Kolibri standards) programs: +the ported emulator DosBox, games "Fixed Rate Pig" and "sokoban". +You can also create bootable CD or DVD on the base of kolibri.img, adding +anything what you want, in the mode of floppy emulation. +The appropriate actions are determined by used CD/DVD write program +(focus on words such as "boot floppy emulation"). diff --git a/data/sp/docs/KFAR_KEYS.TXT b/data/sp/docs/KFAR_KEYS.TXT new file mode 100644 index 0000000000..d21d24ce41 --- /dev/null +++ b/data/sp/docs/KFAR_KEYS.TXT @@ -0,0 +1,94 @@ +Control keys in KFar. +For panels: +arrows, Home, End - move cursor on active panel +Tab - change active panel +Enter - enter to folder or run program under cursor +F3 - view file under cursor +F5 - copy selected items or item under cursor to another panel +Shift+F5 - copy selected items or item under cursor to the same panel + (of course, you must specify another file name) +F7 - create folder +F8 - delete selected elements or element under cursor +F10 - exit +Alt+F1/Alt+F2 - change drive on left/right panel +Alt+F9 - resize window to maximum possible size and restore initial size +Ctrl+F3 - sort file/folders on active panel by name +Ctrl+F4 - sort by extension +Ctrl+F5 - sort by date/time of last modification +Ctrl+F6 - sort by size +Ctrl+F7 - don't sort (display in order as on disk) +Ctrl+F8 - sort by date/time of creation +Ctrl+F9 - sort by date/time of last access +F12 - display screens menu +Ctrl+R - refresh active panel +Menu - display context menu for file under cursor +LeftCtrl+1/2/3/4 - select panel mode (brief/medium/full/wide) +RightCtrl+0..9 - go to folder specified in the section [FolderShortcuts] + of ini-file as Shortcut0..9 accordingly +Insert - select/deselect current element +Grey[+] - select files and folders with mask +Grey[-] - deselect files and folders with mask +The mask is like "*.asm,*.inc|template.asm" (which selects all files with +extensions ASM and INC except for template.asm): one or more elementary +including masks with standard mean of '*' and '?', delimited by ',' or ';', +optionally followed by '|' and one or more elementary excluding masks. +The mask "*.*" specifies all files having '.' in name (i.e. files with +any non-empty extension); to specify all files use "*". +Grey[*] - invert selection +Alt+ - position cursor on name of file/folder, +beginning from selected letter or digit; it shows fast find window, +in which one can enter subsequent symbols of file/folder name to more precise +selection, and also Ctrl+Enter/Shift+Ctrl+Enter to move to the next/previous +panel item, whose name starts with specified letters + +For viewer: +Esc = F3 = F10 = Numpad5 - exit +Down - line down +PgDn - page down +Up - line up +PgUp - page up +Home - to begin of file +End - to end of file +Left - character left +Right - character right +Ctrl+Left - in Text-mode 20 characters left; + in Hex-mode 1 byte left +Ctrl+Right - in Text-mode 20 characters right; + in Hex-mode 1 byte right +Ctrl+Shift+Left - start of lines on the screen +Ctrl+Shift+Right - end of lines on the screen +F2 - toggle line wrap +F4 - toggle Text <-> Hex mode +F8 - toggle encoding cp866 (DOS) <-> cp1251 (Win) +Shift+F8 - encoding tables menu +F12 - display screens menu +F7 - search a string from the current position in the file + (the string and settings are set in the following dialog) +Shift+F7 - continue to search a string + (use the string and settings from last search by F7) +Alt+F9 - resize window to maximum possible size and restore initial size + +For editor: +Esc = F10 - exit; if the file was modified, the question about save necessity + will follow +Shift+F10 - save and exit +F2 - save the file +Down - move cursor down to one line +PgDn - move cursor down to one page +Up - move cursor up to one line +PgUp - move cursor up to one page +Left - move cursor left to one symbol +Right - move cursor right to one symbol +Home - move cursor to the beginning of the current line +End - move cursor to the end of the current line +Backspace - delete the symbol before the cursor +Del - delete the symbol under the cursor +Ins - toggle insert/replace mode when entering symbols +F12 - display screens menu +Alt+F9 - resize window to maximum possible size and restore initial size +F7 - search a string starting from the position next to the cursor + (the string and search settings are prompted in the following dialog) +Shift+F7 - continue to search a string (same as F7 without settings dialog) + + diamond + mailto:diamondz@land.ru diff --git a/data/sp/docs/MTDBG.TXT b/data/sp/docs/MTDBG.TXT new file mode 100644 index 0000000000..52bbcd90c6 --- /dev/null +++ b/data/sp/docs/MTDBG.TXT @@ -0,0 +1,212 @@ +Introduction. + +mtdbg is a debugger for Kolibri operating system. This documentation describes +debugger features and work with it. Feel free to ask on our board (mostly +in Russian, but has an English forum) -- board.kolibrios.org. + +General description. + +In each moment of time mtdbg can debug only one program. I will call it +loaded program. If no program is loaded, overwhelming majority of debugging +actions is disabled. + +mtdbg is controlled by command line, entering from keyboard. Command line +is drawn in the bottom part of debugger window. Debugger handles standard +input keys Backspace,Delete,Home,End,left/right arrows. +Commands are case-insensitive. Delimiter is arbitrary nonzero number of spaces. + +At any moment mtdbg can be terminated by command "quit" (without arguments). +You can also simply press to close button in the right upper corner of window. + +When debugger is started without command string parameters, no program is +loaded. Also mtdbg can be started with command string, in this case it tries +to load program with the name pointed to in first parameter in command string +and parameters pointed to following (if present). + +If no program is loaded, you can load a program with the command +load [] +Examples: +load /rd/1/example +LOAD /rd/1/aclock w200 h200 + LoaD /hd0/1/menuetos/dosbox/dosbox +All that stays after first space after executable file name, is exactly passed +to program as command string. +The command "load" reports result in the messages window (a little higher +than command line window). If program was loaded successfully, there will +be the appropriate message; otherwise the message will contain error reason. +Most probable error is "file not found" if wrong file name is given. + +The debugger can load files with information on symbols in the program +(labels, global variables) - text files, each line of which has format +0x +(lines, which do not have such format, are ignored). Such file can be created +by hand or generated automatically by fasm. Evident load can be done by command +load-symbols +Furthermore, when the debugger executes the command "load", it checks for +presence of file with name as of loading binary and extension '.dbg' +(/rd/1/example.dbg in the first of examples above), and if such file exists, +the debugger loads it automatically (with the message "Symbols loaded", if +all is OK). + +It can happen so that loaded program is packed. General principle of +program packing is following: at first input file is packed (by some +pack algorithm), then is appended small code which gets control at program +start, unpacks input code in the memory and then passes control to it. +If program is packed, it "real" code is not visible and for debugging it is +needed previously to pass through unpacker code. +mtdbg determines most of existing packers (mxp,mxp_lzo,mxp_nrv,mtappack) +and in this case suggests to automatically go to "real" code. It is recommended +to accept (press 'y' or ), but you can refuse too. At refusal and if +program is packed by something unknown the command "unpack" (without arguments) +can be used. Call it only in the case when you are sure that program is packed +and control has not already went to main code! [Starting from Kolibri 0.6.5.0, +this paragraph is no more actual, because one can pack applications as all +binary files with kpack and the unpacker code in this case is located in the +kernel and is transparent for debug.] + +Loaded program can be terminated by the command "terminate" (without +arguments). The command "detach" (without arguments) detaches from program, +after that program continues execution normally, as if there was no debugger. +After both this commands program stops to be debugged. + +It is possible to anew load program for debugging by the command "reload" +(without arguments). If there is already loaded program, it is terminated +and new instance is started (from the beginning) (with the same command +string), in this case the command is similar to the commands +terminate +load +Otherwise is loaded anew latest program, which was debugged (in the current +seance of work with mtdbg) (with the same command string), i.e. is similar to +load , +but the command "reload" in both cases is shorter and more convenient; +moreover, "load" thinks that new program is loaded and moves data window +(see below) to zero address, and "reload" keeps current address. + +The command "help", which can be shorten to "h", is always available. +All commands are divided on groups. +"help" without arguments displays the list of command groups. +"help" with group name displays the list of commands in this group with short +comments. +"help" with command name displays information about given command. +Examples: +help +help control +h LoaD + +The debugger window consists from the following items enumerated from up +to down: +- status string. If there is loaded program, shows its name and state + ("Running/Paused"), otherwise reports "No program loaded". +- registers window - shows values of general-purpose registers, register eip + and states of single flags: CF,PF,AF,ZF,SF,DF,OF: if flag is cleared, then + is displayed lower-case letter, if flag is set, then upper-case one. + Registers which are changed from previous moment are highlighted in green. +- data window (dump window) - shows memory contains of loaded program +- code window (disassembler window) - shows program code as disassembled + instructions +- messages window +- command line window + +Dump window can display data starting from any address, to this serves +the command +d +The command "d" without arguments flicks dump window down. +The same is for code window and the command +u +or simply "u". +Examples: +d esi - displays data at address esi (e.g. is useful before execution of + instruction rep movsb) +d esp - displays stack +u eip - disassembles instruction starting from the current + +Expressions in mtdbg can include +- hexadecimal constants +- names of all general-purpose registers (8 32-bits, 8 16-bits and + 8 8-bits) and register eip; values of 16- and 8-bits registers are padded + with zeroes to 32 bits +- four arithmetic operations +,-,*,/ (with standard priorities) and + brackets +- [if symbols information was loaded] names, loaded from dbg-file +All calculations are realized modulo 2^32. +Examples of expressions: +eax +eip+2 +ecx-esi-1F +al+AH*bl +ax + 2* bH*(eip+a73) +3*esi*di/EAX +The command +? +calculates value of specified expression. + +Values of registers in loaded program can be changed by the command "r", which +has two absolutely equivalent forms: +r +r = +(in both cases you can place spaces as you want). Register can be any of +above-mentioned - 24 general-purpose registers and eip. + + +Let us assume that the command "load" was successfully load program for +debugging. +Immediately after loading program is suspended and does not execute. +Press Ctrl+F7 (command-line analog is the command "s") to make one step +in loaded program, after that control returns to debugger which displays +new contains of registers and memory. The system call "int 40h" is considered +as one step. +Pressing Ctrl+F8 (command-line analog is the command "p") also makes step in +loaded program, but procedure calls, string operations with prefix +rep/repz/repnz and 'loop' cycles are executed as one step. +The one-step commands are used usually on single program sections, +when it is needed, for example, to regularly trace registers value and/or +some variables in memory. +The command +g +resumes program execution and waits until control goes to eip=given address, +and in this moment suspends program. The command "g" without arguments +simply resumes execution. + +To suspend program use the command "stop" (without arguments). + +In the typical situation it is required that program is executed normally, +but when some conditions are satisfied, program suspends and debugger receives +control. The corresponding conditions are called breakpoints or simply breaks. +Primary type of breakpoints is to concrete address, i.e. stop execution at +eip=. Such breakpoints are set by the command +bp +Note that if there is only one such breakpoint, there is more convenient to use +the command "g" with argument instead. + +Other type of breakpoints is on access to given memory area. Maximum +numbers of such breakpoints is 4 (because hardware features of x86 processors +are used and they allows only 4). +bpm - breaks at any access to byte at given address +bpm w - breaks at write to byte at given address +bpmb,bpmw,bpmd - breaks to access correspondingly to byte, word +or dword at given address. bpm ¨ bpmb are synonyms. When bpmw,bpmd are used, +address must be aligned according to correspondingly word bound (i.e. be even) +or dword bound (i.e. be divisible by 4). +bpmb,bpmw,bpmd w - similar to break on write. + +To see the list of set breakpoints use the command "bl", to obtain information +on concrete breakpoint use "bl ". Unnecessary breakpoints can be +deleted with the command "bc ", temporarily unnecessary can be +disabled by the command "bd ", when they will be needed again, +use the command "be ". + +Remarks. + +1. When debugging your own programs you can put in code instructions + int3 (pay attention to absence of space!). Such instruction causes + exception at normal run, which leads to process termination, but + at work under debugger it is simply activated (with the message + "int3 command at xxx"). This feature allows to not think about addresses + to use in the commands g and/or bp. +2. All output and all input is oriented on hexadecimal scale of notation. +3. When program is executed, registers and data window shows information + regarding to moment before resume; you can not set registers value in this + mode. Nevertheless the command "d" in this mode shows information that + was true in the moment of command delivery. + + diamond diff --git a/data/sp/docs/README.TXT b/data/sp/docs/README.TXT new file mode 100644 index 0000000000..d8d770e76c --- /dev/null +++ b/data/sp/docs/README.TXT @@ -0,0 +1,268 @@ + ************************ + * Kolibri OS 0.7.7.0+ * + * February 2010 * + ************************ + + The latest release of the OS is available on the official site: + http://kolibrios.org + + If you have questions - look for support on our forum: + http://board.kolibrios.org (rus+eng) + + *********************************** + * What is new in this release? * + *********************************** + + The following changes, revisions, fixes in the kernel have been made: + + From Evgeny Grechnikov (Diamond) - Russian Federation + 1) Improvement of drives detection using BIOS service (V86) + 2) Kernel bugfixes. + + From Sergey Semyonov (Serge) - Russian Federation + 1) Driver for ATI videocards updated. + 2) Linux-like kernel mutexes + + From Mihail Semenyako (mike.dld) - Republic of Belarus + 1) Refactoring of window subsystem. + + From + 1) Processing API functions in order to completely remove the shift-register-call + 2) Refactoring, optimization, bugfixes of some places in the kernel. + + From A.Jerdev (art_zh) - United Kingdom + 1) Memory-mapped I/O (MMIO) access from the userworld. + 2) PCIe Extended configuration space access (auto-adjust for AMD-NPT since Athlon64). + + From turbanoff + 1) Read from ext2fs/ext3fs. + + From Marat Zakiyanov (Mario79) - Russian Federation + 1) Improvements in the processing of mouse clicks. + + From hidnplayr + 1) Rewriting of the entire network subsystem. + + From Asper + 1) Drivers for the sound cards VT823(X) and EMU10K1X. + + From tsdima + 1) Driver for the sound card ForteMedia fm801. + + From Maxis + 1) changes in free memory checks. + + + + + + The following changes, revisions, fixes in applications have been made: + + * New versions of applications and new applications: + + FTPS - tsdima, some improvements + VIEW3DS - macgub, version 0.054 + FASM - Pavel Rymovski (Heavyiron), updated to version 1.69.11 + IgorA, use the library box_lib, russification, + Marat Zakiyanov (Mario79) fix bugs encountered + Evgeny Grechnikov (Diamond), fix of window wrapping + PCIDEV - art_zh, MMIO sample dumps added; vendors database + trimmed to reduce the distro size. + BOARD - Evgeny Grechnikov (Diamond), do not throw out existing + messages at the program start + UNVWATER - Asper, demo ported from OctaOS + (the author is Octavio Vega Fernandez). + HEED - staper, version 0.14: use the library box_lib; + Ctrl+C/X/V, Ctrl+B to select a block + Marat Zakiyanov (Mario79), using of OpenDialog component, + little optimization of the code + SHELL - Albom, version 0.4.2 + CPU - Evgeny Grechnikov (Diamond) at the suggestion of + Kirill Lipatov (Leency), do not show system processes + by default + HTMLV - Kirill Lipatov (Leency), version 0.62a + EOLITE - Kirill Lipatov (Leency), version 0.98.7a + RTFREAD - Sorcerer, cosmetic fix + dunkaist, menu_bar and scroll_bar from box_lib, 'end' hotkey + E80 - Albom, version 0.5.1 + KIV - Evgeny Grechnikov (Diamond), file name in the window + title, configurable keyboard shortcuts for next/prev + images in the current folder + SUDOKU - staper, port of Sudoku game - that is a puzzle with digits, where you + have to fill free cells with digits from 1 to 9 so that every row, + every column and every small square 3x3 contain each digit just one time. + There are 9 levels in the game. + REVERSI - staper, port of strategy game Reversi (Othello) + MSQUARE - staper, math puzzle "magic square": sum of the numbers in rows, columns + (less often in diagonals) should be equal + FINDN-S - Artemonische, a simple game in which you have to collect all the numbers + in the order of 10 to 90 + PANEL - Evgeny Grechnikov (Diamond), a little change in the panel clock + and reanimation of backlight on the Alt+[Shift+]Tab press. + AC97SND - Asper, support of playlists in m3u format. + @NOTIFY - SoUrcerer, program for popup text messages + DOSBOX - Evgeny Grechnikov (Diamond), version 0.74 + ASCIIVJU - Konstantin Dutkevich (Nazarus), program shows ASCII table + PIPETKA - Rock_maniak_forever, program to get color of a pixel on the screen + SNAKE - dunkaist, yet another implementation of classic game + + + + + * New versions of dynamic libraries and new dynamic libraries: + libini - Evgeny Grechnikov (Diamond), added function to read + keyboard shortcuts + box_lib - IgorA, update component tree_list, new component + text_editor, documentation on the library + Marat Zakiyanov (Mario79) refinement of ŽpenDialog component, rewriting + of some applications to use it, new component PathShow + + + +/-----------------------------------------------\ +* Dates of publication of the distribution kits * +\-----------------------------------------------/ + +RE N1 30.08.2003 +RE N2 07.10.2003 +RE N3 26.11.2003 +RE N4 23.12.2003 +RE N5 15.02.2004 +RE N6 27.03.2004 +KOLIBRI N1 16.05.2004 +RE N7 11.06.2004 +KOLIBRI N2 28.08.2004 +RE N8 01.12.2004 +KOLIBRI N3 22.02.2005 + Beta 2: 20.03.2005 +KOLIBRI N4 07.06.2005 +KOLIBRI 0.5.0.0 04.10.2005 + 0.5.1.0 12.10.2005 + 0.5.2.0 02.12.2005 + 0.5.3.0 18.03.2006 + 0.5.8.0 09.07.2006 + 0.5.8.1 25.07.2006 + + 0.6.0.0 04.09.2006 + 0.6.3.0 31.10.2006 + 0.6.5.0 14.02.2007 + + 0.7.0.0 07.06.2007 + 0.7.1.0 23.09.2007 + 0.7.5.0 31.01.2009 + 0.7.7.0 13.12.2009 + +/----------------\ +* KolibriOS TEAM * +\----------------/ + +This list contains all, who has actively helped to creation and development +of KolibriOS, whoever possible. + (people are enumerated in the order by time of participation in the project, + from bottom to top - from past to future, through present) + +* Trans \ +* VaStaNi | +* Ivan Poddubny | +* Marat Zakiyanov (Mario79) | +* Mihail Semenyako (mike.dld) | system programming +* Sergey Kuzmin (Wildwest) | +* Andrey Halyavin (halyavin) | loaders, +* Mihail Lisovin (Mihasik) | kernel improvements and so on +* Andrey Ignatiev (andrew_programmer) | +* NoName | +* Evgeny Grechnikov (Diamond) | +* Iliya Mihailov (Ghost) | +* Sergey Semyonov (Serge) | +* Johnny_B | +* kasTIgar | +* SPraid | +* Rus | +* Alver | +* Maxis | +* Galkov | +* CleverMouse | +* tsdima | +* turbanoff | +* Asper | +* art_zh / + +* Mihail Lisovin (Mihasik) \ +* Andrey Ivushkin (Willow) | +* Mihail Semenyako (mike.dld) | +* Pavlushin Evgeny (Exis) | +* Ivan Poddubny | application programming +* Marat Zakiyanov (Mario79) | +* Sergey Kuzmin (Wildwest) | +* Andrey Halyavin (halyavin) | creation of new, +* Hex | port of existing +* Andrey Ignatiev (andrew_programmer) | or revisions of old +* ealex | applications for Kolibri +* Olaf | +* Evgeny Grechnikov (Diamond) | +* Navanax | +* Johnny_B | +* Pavel Rymovski (Heavyiron) | +* Vitaly Bendik (mistifi(ator) | +* Iliya Mihailov (Ghost) | +* Maxim Evtihov (Maxxxx32) | +* Vladimir Zaitsev (Rabid Rabbit) | +* vectoroc | +* Alexey Teplov () | +* Sergey Semyonov (Serge) | +* YELLOW | +* iadn | +* Maciej Guba (macgub) | +* Mario Birkner (cYfleXX) | +* hidden player (hidnplayr) | +* trolly | +* nilgui | +* kaitz | +* DedOk | +* SPraid | +* Rus | +* Alver | +* Dron2004 | +* Gluk | +* Aleksandr Bogomaz (Albom) | +* Kirill Lipatov (Leency) | +* Vasiliy Kosenko (vkos) | +* IgorA | +* staper | +* chaykin | +* Alexander Meshcheryakov | + (Self-Perfection) | +* CleverMouse | +* tsdima | +* art_zh | +* Asper | +* Pterox | +* Artemonische | +* dunkaist / + +* Hex \ +* Diamond / documentation + +* CodeWorld \ forum http://meos.sysbin.com +* mike.dld / site http://kolibrios.org; svn-server + +* Alexey Teplov () \ (KolibriOS logo) +* goglus | design (KolibriOS background) +* Kirill Lipatov (Leency) / (KolibriOS icons) + +* Pavel Rymovski (Heavyiron) \ +* Vitaly Bendik (mistifi(ator) | +* vectoroc | +* Veliant | testing, +* AqwAS | countenance +* Mike | +* camper | +* Dmitry the Sorcerer | +* Ataualpa | +* Maxis | +* Galkov | +* ChE / + +and others... + + KolibriOS team diff --git a/data/sp/docs/STACK.TXT b/data/sp/docs/STACK.TXT new file mode 100644 index 0000000000..9b2f1c7184 --- /dev/null +++ b/data/sp/docs/STACK.TXT @@ -0,0 +1,387 @@ +What is implemented +=================== + +The following features are present in the TCP/IP stack code: + + IP layer. + ICMP. + TCP layer. + UDP layer. + local loopback. + Realtek 8029 PCI ethernet interface. + Realtek 8139 PCI ethernet interface. + Intel i8255x PCI ethernet interface. + Dynamic ARP table. + PPP dialer + +And the following internet applcations are implemented + + HTTP Server + Telnet + POP Client + DNS Name resolver + MP3 Server + TFTP Client + IRC Client + +There are also a number of experimental applications for streaming music +and performing interprocess communication via sockets. A Web broswer is in +development + + +What is not implemented +======================= + +The IP layer does not process header options. +The IP layer does not support routing. +Packet fragmentation is not supported. + + +How to configure Kolibri for PPP +=============================== + +See ppp.txt + + +How to configure Kolibri for Ethernet +==================================== + +First, you need to have a supported ethernet card fitted, or present +on your motherboard. If you are uncertain what type of hardware you +have, try to configue the stack. If you have supported hardware it +will be found, and enabled. + +Setting Up the ARP Table +------------------------ + +Kolibri's ARP table is dynamically created and maintained; You can see what +hosts Kolibri has communicated with by running the ARPSTAT application. + +Enabling Ethernet +----------------- + +Boot Kolibri, then select STACKCFG from the NET menu. +Press the 'Read' Button, then select 'Packet Driver'. +Press 'Change' next to the IP address, and enter the IP address you want +to use. Make sure it is on the same sub-net as the LAN to which you are +connected. +Press 'Apply' to action the changes. +Close the program. + + +The stack is now running, which you can test by pinging Kolibri from a +remote host. + + +The simplest way to connect two PC's together is using a 'Null Modem' +Ethernet cable. These simply cross certain wires over. They can be +purchased from PC stores, but are simple to make. Details can be found +on the web. Look on google for 'ethernet cross over cable' or similar. + + +How to use TCP/IP locally, with no Network +========================================== + +Kolibri supports a form of local loopback that means applications on the +same PC can communicate with each other via sockets as though they +were on separate hosts. To connect to an application on the same machine, +specify the local IP address as the destination address. You do not even +need to configure the stack for ethernet; local loopback will work without +any network hardware. It's great for development and testing. + + +Application Programming Interface +================================= + +The developer can access the stack through interrupt 0x40, function 53. +The file TFTPC.ASM gives a good example of how to use the programming +interface ( at least, for UDP), but as network communication is complex +I'll give an overview. + + +Sockets +======= + +Applications connect to each other and pass information between themselves +through a mechanism called a 'socket'. Sockets are end-points for +communication; You need one at each application to communicate. + +Using sockets is a little like using files on an OS; You open them, read +and write to them, then close them. The only thing that makes life slightly +more complicated is that unlike with a file, you have something intelligent +at the other end ( which for example may not want to close when you do! ) + +Lets deal with the terminology before we go any further. + +socket A unique identifier used by the application for communication. +local port A number that identifies this application on the local host. + Ports are a way to allow multiple applications to communicate + with other hosts without the data becoming mixed up. ( The + technical term is 'multiplex' ). Port numbers are 16 bit. +remote port A number that identifies the application on the remote host + to which we are communicating with. To the remote host, this is + it's 'local port'. Port numbers are 16 bit. +IP Address A 32 bit number that identifies the remote host PC that we are + communicating with. +Passive Refers to the mode by which a socket is opened; When opening in + passive mode, the local PC is awaiting an incoming connection. +Active Refers to the mode by which a socket is opened; When opening in + active mode, the local PC will attempt to connect to a remote + PC. + +When you connect to a socket on a remote PC, you need to specify more than +just the IP address, otherwise the remote stack will not know to which +application it should send your data. You must fully qualify the address, +which means you specify the IP address and the port number. This would be +written like this + +192.168.1.10:80 ; Connect to port 80 on the machine 192.168.1.10 + +Port numbers are important. Some are 'well known' and provide access to +common applications. For example port 80 is used by HTTP servers; That +way I can connect to a webserver on a host without having to find out +what port number the application is listening on. + +This brings me to the way in which you open a socket; As I said earlier, +there are two modes, Passive and Active. A webserver would open a passive +socket, as it is waiting for incoming connection requests. A web browser +would open an active socket because it is attempting to connect to a +specified remote host. + + +Access to programming interface +=============================== +The developer accesses the stack functions through interrupt 0x40, +function 53. Some functions may be accessed through function 52, but these +are mainly for stack configuration. +Here is a summary of the functions that you may use and the parameter +definitions. + + +Get Local IP Address +-------------------- +eax = 52 +ebx = 1 + +IP address returned in eax ( in internet byte order ) + + +Write to stack input queue +-------------------------- +eax = 52 +ebx = 6 +edx = number of bytes to write +esi = pointer to data ( in application space ) + +On return, eax holds 0 for OK, or 0xFFFFFFFF for error. +This interface is for slow network drivers only ( PPP, SLIP ) + + +Read data from network output queue +----------------------------------- +eax = 52 +ebx = 8 +esi = pointer to data ( in application space ) + +On return, eax holds number of bytes transferred. +This interface is for slow network drivers only ( PPP, SLIP ) + + +Open a UDP socket +----------------- +eax = 53 +ebx = 0 +ecx = local port +edx = remote port +esi = remote ip address ( in internet byte order ) + +The socket number allocated is returned in eax. +A return value of 0xFFFFFFFF means no socket could be opened. + + +Open a TCP socket +----------------- +eax = 53 +ebx = 5 +ecx = local port +edx = remote port +esi = remote ip address ( in internet byte order ) +edi = mode : SOCKET_PASSIVE or SOCKET_ACTIVE ( defined in stack.inc ) + +The socket number allocated is returned in eax. +A return value of 0xFFFFFFFF means no socket could be opened. + + +Close a socket (UDP Only ) +-------------------------- +eax = 53 +ebx = 1 +ecx = socket number + +On return, eax holds 0 for OK, or 0xFFFFFFFF for error. + + +Close a socket (TCP Only ) +-------------------------- +eax = 53 +ebx = 8 +ecx = socket number + +On return, eax holds 0 for OK, or 0xFFFFFFFF for error. + + +Poll socket +----------- +eax = 53 +ebx = 2 +ecx = socket number + +On return, eax holds the number of bytes in the receive buffer. + + +Read socket data +---------------- +eax = 53 +ebx = 3 +ecx = socket number + +On return, eax holds the number of bytes remaining, bl holds a data byte. + + +Write to socket ( UDP only ) +---------------------------- +eax = 53 +ebx = 4 +ecx = socket number +edx = number of bytes to write +esi = pointer to data ( in application space ) + +On return, eax holds 0 for OK, or 0xFFFFFFFF for error. + + +Return socket status ( TCP only ) +--------------------------------- +eax = 53 +ebx = 6 +ecx = socket number + +On return, eax holds the sockets TCP status. +This function can be used to determine when a socket has actually connected +to another socket - data cannot be written to a socket until the connection +is established (TCB_ESTABLISHED). The states a socket can be in are defined +in stack.inc as TCB_ + + +Write to socket ( TCP only ) +---------------------------- +eax = 53 +ebx = 7 +ecx = socket number +edx = number of bytes to write +esi = pointer to data ( in application space ) + +On return, eax holds 0 for OK, or 0xFFFFFFFF for error. + + +Check port number +----------------- +eax = 53 +ebx = 9 +ecx = port number + +This function is used to determine if a port number +is in use by any sockets as a local port number. Local +port numbers are normally unique. + +On return, eax is 1 for port number not in use, 0 otherwise. + + +Opening a TCP socket in Kolibri +=============================== + +There are two ways to open a socket - Passive or Active. + +In a Passive connection your application 'listens' for incoming +requests from remote applications. Typically this will be done when +you are implementing a server application that allows any other +application to connect to it. You would specify a 'known' local +port number, such as 80 for a web server. You would leave the +remote IP and remote port number as 0, which indicates any +remote application may connect. + +Once the socket has been opened you would wait for an incoming +connection before doing anything. This can be by either checking +the socket status for TCB_ESTABLISHED, or waiting for data in the +receive buffer. + +In an Active connection, you are making a connection to a specified +remote port. The remote IP and remote port parameters must be filled +in with non-zero values ( otherwise, what are you connecting to? ). +You also specify a unique local port number so the remote application +can uniquely identify you - after all, there may be several applications +on your machine connected to the same remote host. See below for finding +a unique port number. + + +How to find an unused local port number +======================================= + +Typically when you are creating an active connection to a remote +socket you will want to choose a unique local port number. Local +port numbers normally start from 1000; The following code may +be used to obtain an unused port number prior to making the +open socket call. + + mov ecx, 1000 ; local port starting at 1000 + +getlp: + inc ecx + push ecx + mov eax, 53 + mov ebx, 9 + int 0x40 + pop ecx + cmp eax, 0 ; is this local port in use? + jz getlp ; yes - so try next + + ; ecx contains a free local port number + + + +Writing data to a socket +======================== + +There are two functions available depending on whether the socket +was opened for TCP or UDP protocol; The call parameters are the +same however. When the socket is being opened for TCP, use the +status function to poll for a connection - data cannot be written +to a socket until another socket has connected to it, and the +state of the socket is TCB_ESTABLISHED. + +When you write data, the call results in a single IP packet being +created and transmitted. Thus the user application is responsible for +the size of transmitted packets. Keep the packet sizes under 768 bytes. +If you are writing a terminal program like telnet, you may want to send +a packet for each keystroke ( inefficient ) or use a timer to send data +periodically ( say, every second ). + + +Reading data from a socket +========================== + +There is one function to read data from a sockets receive buffer. This +function retrieves one byte at a time. You can use the poll function to +test the receive buffer for data. + + +Closing a socket +================ + +Simply call the appropriate function - there is one for TCP, and another +for UDP. When closing a TCP socket, don't forget that the other end +may continue to send data, so the socket may remain active for a +few seconds after your call. + + +If you have any questions or have suggestions for improving this +document please contact me at mikeh@oceanfree.net. diff --git a/data/sp/doexe2.asm b/data/sp/doexe2.asm new file mode 100644 index 0000000000..eaebd8aaf8 --- /dev/null +++ b/data/sp/doexe2.asm @@ -0,0 +1,68 @@ +filename equ '%EXENAME%' + +virtual at 0 +file filename:3Ch,4 +load pehea dword from 0 +file filename:pehea,0F8h+28h*3 +load NumberOfSections word from 4+6 +load SizeOfOptionalHeader word from 4+14h +if NumberOfSections<>3 +error Expected three sections, .text, .bss and .reloc +end if +if SizeOfOptionalHeader<>0E0h +error Nonstandard PE header +end if +load RelocsRVA dword from 4+0A0h +load RelocsSize dword from 4+0A4h +load ImageBase dword from 4+34h +load TextRVA dword from 4+0F8h+0Ch +load TextSize dword from 4+0F8h+8 +load TextOffs dword from 4+0F8h+14h +load BSSSize dword from 4+0F8h+28h+10h +load RelocRVA dword from 4+0F8h+28h*2+0Ch +load RelocOffs dword from 4+0F8h+28h*2+14h +if BSSSize +error Second section expected to be .bss +end if +if RelocRVA<>RelocsRVA +error Third section expected to be .reloc +end if +;file 'test.exe':pehea+0F8h,28h +;load physofs dword from 4+14h +;load mem dword from 4+8 +;file 'test.exe':physofs+16,4 +;load sz dword from $-4 +end virtual + +file filename:TextOffs,TextSize + +while RelocsSize>8 +virtual at 0 +file filename:RelocOffs,8 +load CurRelocPage dword from 0 +load CurRelocChunkSize dword from 4 +end virtual +RelocsSize=RelocsSize-CurRelocChunkSize +CurRelocChunkSize = CurRelocChunkSize-8 +RelocOffs=RelocOffs+8 +while CurRelocChunkSize +virtual at 0 +file filename:RelocOffs,2 +RelocOffs=RelocOffs+2 +CurRelocChunkSize=CurRelocChunkSize-2 +load s word from 0 +end virtual +CurRelocType = s shr 12 +RelocItem = CurRelocPage + (s and 0xFFF) +if CurRelocType=0 +else if CurRelocType=3 +load z dword from RelocItem-TextRVA +store dword z-(TextRVA+ImageBase) at RelocItem-TextRVA +else +error Unexpected relocation type +end if +end while +end while + +store dword TextSize at 10h +store dword RelocRVA-TextRVA at 14h diff --git a/data/sp/games/checkers b/data/sp/games/checkers new file mode 100644 index 0000000000000000000000000000000000000000..ddf9409e5e81a34ac4bf702001be887d6cb93e21 GIT binary patch literal 24758 zcmV(pK=8jyP(w@k&;S5|00001Mv*2LLXK;4&&M{gp_bUZ*w14RvVP|p#lY{~WwKc# zGNn%v7+QvHddGrhRvdQSbedRs5BUyv+{sPLsbQk;mVhiOwnXE#cc;(UJ-N!MU^&=b z_uxmzRDB6OLm}qrX?|J@H_MxUVn}zbC~30`mkUm%Mv}wNu9G@F~+xeo*Hn zX00W{|0&{y?bKcG-)z!C*oxFS8U8$NxS_cRs&MO;T*vgH+Yl_T!s}NunVbfaU)+;+KCb{RDipt zngV?)l?D{kc!!-2aXu+o9*)-3BP@i0bN4AbI<6Sr*JrgOQkrxh=g+)hSm$9?jJs{b zoKjCm_h0w_cjQ|rj3Ja2{ov8CDR0K}&{*@>mn#Hljk3Vt#U3`rXAO$(o?ehYc| zva!>b0*voJbfvLUTCdSw#1P|4+dv7>Yk?>^pW8wLgWfI4KRJ0?9k*$lsRe@Hqx4XyWQcoxEX#R&1tfw0Sh-*0peJmkl=p*f=mv4o* zjRgRu@7f^$Td4$Yv4&H}En$WWrV_j5WQiWvbPtsCXW(#oYdYtf%Nbrd&&WM)?Ny32 zB+6(M9(I8}Fc?xE#vS+{7?xX{Mo`{Tbd8-XNG=RiZA52Sp93G2DCtR%Za^%gy!vI9<*H@=K&^25#x%VvKsV~V0UyS( zHRv$@imi?DL|vIKOIlclui}r2UD5DQ4az3D&Ic9S4>1|%4p5gGLP7kBs)*7?@{@hp zMODX^NfbidnZ(#8Zs%;97SL=u=j7K~XZU%3GgEH7Wfma49FyxhPGkpWxPNL0lKe0F z5A8;0lI3W}C7Pn0P?FwI63^V0>_ zJDiM*ABK(AyIdulXQ~a2wn!|a=U_NT~e8AvAvZUMo=PMd;e z<;iJ(a2Qpuc`#)0R9C|k0bxzqwP$!_7>Q-Os(++CNl(=Pn;rc1dlqc5$OXW=GqE3Hj!ep498Xzv7O2Q z+gX}QX;hz|j@j~YzVc|;E`2CAtt01q+?R-~l*%F)0r8BUk=T-#*Cp#0SzM5mRS>{g zd6IOB6^v$SItm#!w0C{qm8T;tDvFMDDg}0m|FuDzFf=K9pu6I7F?@P2WOb1!M4)q% z-2Kp#Kgqg{PLr0Sm%ZT;EEyniKbWiv2VU(y@|o`49DOm{vXeTEUi zH9#BTpphppk#XU)X$Q`JEHsDcu9eMbn=1epH?b{xj4s~Q5S`eu$z_7r=A}=|=cc;u z#)^b7>dkNhZ+vcw<-?S%Dlp+_H#nZL|0U8FEZ8z=YR$;r9OKRE6(Vm?sEDJHXXEvY zbHkJ4vANO>HUtc%l-Ar2+Ot;&51inSD$dR@>7r=nk$<$nK8Xvjx65jo*TM>3-YrC-9-y8-=Fo#q|<;rgOFl)IrN44I+ya2WMB@l~UCY%nNlzk~!QqV-S z!NPi&$=?i`EE7~Q&x*NSf_v&TQaxMu3#eX@C6VR*JGyKL+TZ)gk~+o z5){1E4yH#F%3Fu&k^@WE`NxWRhi44ay7>&F@;P-OSryHO2@msw;EPQ8UcMQ*D%-gJ z5Uy9WLU_!r1=(noDo~XkUr0^?mwFwxAF2D%k5?!i@t^S)(!%-y0ZB>yH7Fbb*`=fe zo<9>vAfU?EOr4Kn<6rHaj5-=*&{~j&eyW$J>0fUUH_<{ouR6mhtQ3c4$r9-SV_D5~ zDMsJt*}mSM!#(czvX>M~+VZ$?P-Jn_iK+iiQ@SbIhuedS&$nR=2*7doFJJ`9+M9}4 z*?+*TpzDBWq#j?>bD&Ry?3|qrK6{z{EX04`-h4BntLarGD;a*0pYL^X#-h*pZkZQ3 zdbBd!d+Wcscar(kt<5h;^(d0L4;PHgZC}b`3U>e*PBcb(S$se&d0odp)oPB_Kb7+k z3mkb>p2W3vr~V5667p$1n>>r%MuPQ##Jk!h-y~Co&i7fyIb;>?6q>HrO_Zojh`f>?!*2#0_cg8GfmGcQW*w9U>W@m=*Tu( z7I?Tuw5IeM`qqbgj2=9H{9upgv(8zAzJ81sbd))cmi(1#$*1(WH?uNaYSFn<^JSRv1S z?j6;Vt*~l+DpCR!a4E|T7T*`cHIShWHlEQ3hsz|sBM)_OhU<;Ve2lZ2sk1Bs(MfPV zPw3QWS|f(aLRgNqJq2+n@}-K`jX3ZZT%4&l$anBfYxiCk=%RXh+SD3gCGNxa!9{tJ zpM-Y}bNQ@Gs_3-9pJRlnvG%ycB#0NT?k;e)f_Jsw(6}R@298X%78=z5*CJk+E zlMw*bzsP?I2*NGW@)p=esVZo~e@nLf&Dt$faUR;+`z18MG8}UZOyg8hAu%I1%=s6H zVc8^meleVijF#$Wk+`{&9Tf*-O3uX(f!HgYusA}kEG-H#MM@eR51&u}R_XiY6|z*S z*-51osq1mhnd*&8(0=&oTK-btJOK2q{~yk&3CEK7JsvAOB-& zZMUp)+pR^e4)P<{^qRIOIPR#|Rm-63zL18t9G#cle zBl8)@qsn2m?##jlG|>Y$RD{i!5~(Q$fnn5dFDniCD_O=885UtnG=>_oBkejf!|#Vz z2Qebj28ql@FLM791D5mp+p82cZMQG@f*~G{?3_YS_<0E7HiCR-!Dr)*Z5BE`b^7bz zTKlW3Rr@}wcE!Kng1RG_w9{U~5Q}^K+;1U=%)eSNQPkYai>R6 zeWN!Xb8evS_N5mq&%t0Yep5Hnc8VGdj9DpxFYp)|oTl|>iWXYS^-I^3c7;xHc;j+DOIm%AL+jd;Ep-__vme7iLMJq@pS6u)^*bg zdScl>u5l^getefH`IRC7A^lj|gN_0uK3%8;95}=mTG0spg|XD;{%q*+L-EqjdTmgK zj5elBJjv0tuaBwWtSRic+4@j69y51%%hIhLk;CP?xbeM;6)O$(yndLGkv>_0P^1w- z>)v}}Ki?-Q)E%bpzR!~}`vFT(PgYu-&awhh4T(idE$^lXK_5;Pk_R+k0~gJL8hAlk zqh{nOf@>cl2sV*mF3#^-dsV4vo3z!u+pg}(1Xft@(xhOc4)u_?BSKkHlHdf+5G-z% z@1`;Lx|x;r7j8RgQElMbeAU(nmpb)^bZ9#JC-rNfDLKiLp~Qd1*jaZ47+BEeF_PNy z&7@1n$VLe%jXO0BmO2T^M>Jy{>>opL6=70Rv_O6!o~2#@Fm$8VLh;*Y0GNLW^L6Rq zfb-~Y95W-?yQ9h?HL{;C@u?~_vS=*d73R3;NZ9?|{mvi`)yUCCGFCr*=+Zl|{ zV=v-c=GE8w420~kF3sLIv~1O>s7>jtxji`9^`U^S72kkRz2@7yD-uCDA`;L;-G)m( zzIv;py%J=~=rC;Djx)DOu2Y?)s98p@zMO${Hf^xI<-$l7S0OSst+%Y#Yvip#aX7Cp z5BL2rPY{=8vf+Qerd|>ao`7CcV*98EZC}=)uOlYhik)}yHHz^?!yd6U+ZSsX4 zHIm_qc&R``CPF-MyxEvM{;(sr^|MJ{igI0nF-Pd?x}vKGEkc2wEc1Hr!J6*j6FJ>e z>#8NB_S#=o2}t1wc)~hxZtBj-iMO$>1_Sy~t!dSvr&=;lI8Vc-( zH=v3m$i2VfACWIpCbT4Kqhp+0Ju-J?q^07r)jM+N5bgJ*aa^V2BjG3I#O;UIM@o9D z6liCk+E<4>P#Ck1;XG2*6VzqMQmMR-yuO4MXav(Sa>$CPDr#gc`D7~QeSF6{Yo0q? zXW2$SrQY#&fncsuc%E;G0(l#vNkk^Ex9?j`cIQbI@fOvtoIsc1eiXgK1*EPJdCJg@ zPsFHbaX7oA7zDG^W;5^w23RJpK#5w2)C(~7IL?|y@v$cnOW%)4Vg3=c<5?xF+**Xs z&@0A)qgxrqu|Q4ix#eng09+5IiV$)shlj+8>N0U!C6p7ZJ7a;PfKqf!Vr3X&RgTE;cwz*}NB)$9;` zRRq|~H1%ODpvxKuG~j4OG0tqJ_`rIeE%p#=VZiVj(Juo`Ajfd zQH6$KG}Rw`vpN-ylfoB!iMej#knN!BHP>cX8EVu#Qj2jj01u}N+bu0i`O`;07<7q{ zEADDY=kgsZy-N82lr2W7UC_R!i81zBgVWIebC(<3RjD~q{^<@bdZn$}xYEtRnkshH z1ij8H4?w2t~VdZr1$>iNuEKwQ+C(8H)Zd{voAUO+ljEqA{w?MMww@q4w& zx=Nqo02f(@6-B63EgE@xGLssCqs}%xg_Yzy5?IrjR4*%W7C%@A*CPy?{PM6p0yORj zN^R~LqgJzSGW~KT+ir|=S*xGw&;MHivcG+KFNPv|80XATA5xUKk7)to6#21QrqaYOEe-k`H1r|*_^kicOOWKqCIXy7nMdkGdv&e2lvEF+(7(UCv}u5sufQDCLsrjIlQ zi^_hVse>WGdMbapY{Mo;m(woLHtRns9`iAw75t1uSwk>SK#)yd6KqRe+d32F61v#o zMCCW^B$Zm?3sD8nL26S+NH8shvi;GF9=!pU#^fXr?*Bf=FOo{V6jU zs0*af*$_swU3q3#WsE+kmmV(FxYpE5@p}u*iRa@#x3b|0g@G3eTt%HrRtm@op``t< z!Amcs5AN)3`msQuH6+Wj)vek1m?zd68}s&P&wl9L@G?`ron-x)--0;K3K!2dB^{|NqA*O|Y}dGb z=~j^l0V@*dF{@ba3@b!t?)(wZvHrVnj3{!Sf26Ps=bID>#8zNoI;pUY8>d-g{rqIe zfXDFP71YP(p$YJcPd?05yQjVYB$r*O&vVrvnnlh2cO-B8CzMFY3P7V+Po~xL`>HpND=Hw#qKsX)3jJ`c@4ia>A3hu$r>b7p#6&+uVP?)=~Xh`P{=l}2={^-40aT}3iq~;{s zL6zQKVsjE?{5#R%munvmry5jLn|l*w^Ra_l zVtZhEs<3j-Y!Xf}l1YoW^q`?9s^mPN-qI~1I*3mlCzKILF?fVtxgzbRdDR_8!-Cqj zc3#Oin>^>2DYlVr%OYy~=M-#Ko9DQZxR~ByK{~9@!_b+7sRRq6mt>X3Tv;U=#f$u5 zc11_&ZfP?4b6V;ZgVj{LG=1aNcQ1&fj~j)ud?^Q+Y~BE+G2s25uVt^bvFH64f9WOI z?v{?;cYZI<#-vfwBI*G!>CH4)Z6e@dluFpeVd17K)T^2;xyZlZ^-!JO5I9sivf8 z78VoNq33@J*%@OgYob@ z_{G>_Hb#TDQKOAQp6ual!~enp^a!tQLjD7QWK3MJHH>k2Pj}u0^={R7A3XiEXkCO`mgq!F9}&0t}eFjK%tjg|bng zF2{^3S2!~{Eg&qeeXJwTNh&g&bCA3+48 zk?3GO87$X7%0@PXI-iOqm8RJ~Y3pVGPG2`x7^d5h!@$cxRAlKe^HnTFW@?;a#+$LB z8-^kwy+6<=9q?Zim(Kv%WYrKI&Z_bJ!^noR;0mC}UMmf+!mu1*^C{fqb3!8l%%Z%E9!nVx=+(tA?oJ5vra3oCQ2G+xogl#<>`IKMERH26gG2h@Lc4r?|qsit{u zUFl$6YRum_SV9~5Q0_fcRlFW~6>k)cMJnh?6;UY?M=Y;wJ{dD{&i1-%jjn)=Mj|Mm zH#Y3u+&g?vti#eL(JPI<{f40C;~=;}1*O=54BxVba2XO$msvjZPAQ!%MwQ{k@pAE9 z<_mq5$+yONQ5|{^aao9N$snR6ueEKaB@4-kI7JV($yIIqne)#I3UPxM-v9t9vx{Xy z1KZ1O44ae9iMEn-Q%bgSbfy{L?*)}8to%qfSRE5lzJ{~iwu$@|OHQNddrI(!5(UI8 zLL=)7iT06Qg$-3c`H+}3U@n!oL&wlw=7UsJm3fXWcF;>G+gD7`7W(D6asi7(^d=Ss zdZi}kxP0wHSGvCFx|a>+s+o|JQu*w(>IJRw3gy(9D@c3MbNwzv!RY@)_sx-Fu$O3Y z#c0+zaCTd;6}nhc$tfBFp-^4H9Tm>0-6Rh2^LQo;K9t3GwKFs5ts#D!GD`Hr{xQw$0L5I_22M}wTINz!eI z<4y@EA~J&xV!GK+rw|)Z7wks)j@0LV?CQj4- z)XjG0;>m408XLS|Sl8#s9UF&r^*M0;ORH6~9$`ex2FAE?^WWF%wouXxtXH>0`{R~2 zt2n|k^w~Ok{+_{8Zr{SQQ}3OjUL8(~^vu1V7uc**9s5DY!?#BvaDDq8jR+}<06ixo zPGHMMU^@;byW(a_)TQU=g46zCjom(;XL&z+f^otZEnS#CuTP4Wod3i8Tq}0`)`HAP zKkDE(0T5maCVL}=;MX~FKbYSPwMc6j!K22#vidZlwLWuWHZfB$bywrS#lR%d81dpP zCW%ej17f`!95nvSxP4(i-Uk4D zXHJ9$lGA!DrfqvE7Z)Yu+7|l z#I*FWl|sp4_SDx_v$Bp2Gew4u^Jf48$$O{K; zalNCqY1*ankF=e@i$ME z&j+wV;8>ZQFBkoq^Ng{v$}-YVHR9oi>%t;hrz5Q43Lf~ z0l=%^VH>M&wjW)H3-<`0Uc_uLU=eOEH*_Qdua=mr+X8MG39WeC7IG~eha zg!0IPUh|NH@VVQP#4s+KRAb{!A4*vK-9~<_Dcc>sQ)Xun{KVA@69Xl>Gs)Mg{ke}zf$A+7{)&Py^XD+T)j0^BocQ(Z-NXMat0Qx~BYG?v5 zH<+X+Dxayt>Ky?#mUaMD_B>Nobd;I$?Mh+frYmYK6_N-!{s~xKV;C63I|bW+XMg{J#MK7`!h-|JEJd=<*|2s*-ABA*-uCNF))%?id0rQK zL6RkMpra9+QWFLmd0&yfqg}+z42YQ9n^%bIAUCjFZKwSnr-{u^0DU5a0J_A8XoReg zcLQ`MT)fB68EdhCJpNS8tF` zR?v$en_Cqn$-XSFh8m^>T|BJL75%LxGt29vkwYJSl&)WhbM4|nudfC0$w|64ydLfc ze*TAl-0Zo`rCF1IA|JDZb*cs=iR>gkOkSrz>a*nRh1Iq5ymi`H-i*>{Gloz=_^`HYTh5E=37~qYvHHE7I>r?qjZ=#}Q>V z(Y2rbD2Vj;8C$y`H(0q!G`CU~Z3SR-&>n`=3X*9TQ6k&_{iBs00Uf^*(_AndX@XHq z8LU8KtoN{4HtUb*jS+eHBN{!ZS<01qKTpy9NdbheCJRauu!qw^dxl-7$1NyB7Y91*-(pQm`^t6>m=k1Y{4;wZSDMZ86>-`a8rMj2c}AEo5Ta_8@); zLwsP(Mms3=0g)Nlj*STinV!(p5^rv*DUT%#_sar2h=~5;AB%!c%?T99{vFi=i)ceJ za6Fnm!z$c3)MzvWnqnlNPkw`NwNe2}5#tdQYRT%?GPO2Vwf%2jLJ3*cL=%+h?s!Du zM1T1E=Q0wF!Sf5THnu9LUViSJ77jt%j)9g(ox<{`m7*@0L*yBhzh@RyWvQ8AqSNqa0qPsU{wh0 zAj0tvXOn=>bYKz85(K_VFAK6t?w$JjzYW~0vftDcWw&;y2~>i*%jjZ`vY$3gVzcOz zRYV9^!gE~*cEv(e#(}ENHUdjRKcB9Ym+4vx=5M^4nw3xtY>vA+tyxKNlyrrfA1Vr-13ZFFgiVtlm&5m4R-uhA=%Iu48y)dRKY% zjIa=L+Z)8bDVbS(h(dM$ZutcK_rY!>bK1(fhv$Qt9aTxuRSshA<%B(n#!H5f$fxoT(btz8aPvMX-o`w?1_ObH+;gJtakqDAz_ZA~26z zsH!9)1A}$DsjPp16f`p=po(ukg|}hzf~I~`YF!P7-TRtS!xQJlD`A%TO(BU^reZB~ zl9@p2T}fO+leoAgT(0Dlh3S7C&8w@G?98PDlLfw2ZJPP=oAn<=XPMD?eVy>xDTa7P znrS*rX89&Bo0Qu}ZqvQ`tjCu_&Dl%04k}!~ zpRpX4{n{^HeK46Idu8Q4WoE+eQq-g4_^;{&NN=YVSZLJe0$I88&VZH<4Dauz=Z|r2 z(sq)>1rBI;-VOzE(HG6}r-|Qz!m;2U+I-2CyVOe8k)SNGKOm4fzj+V2{N4D9?T_Bg z#YAge)uU-nY*YD^l9c78F|5}#d^%T(FnsZSE_ zH=C_w@aWo1$81OK*&vtTbF|7qemx1;3(tqBPRSFIG{+zP`4yo6>%_X93qquKZn>8Dw3@;i6z{1ImiD`NFS#tUh~y_U=!LhffP*DR-gV)HZqR%w$bxnrGQapTOkz=0Y} z5SFVbyi`>1LT95@GHtwvd7pR?60)DI!xU(ca>!O6hn=E;1|F5KF0^*2W+H75WV}d|mL4NpJ#-Q|y^!3Q42**8q=;J< z_BG^qr3SaY-zMH3>fH7Kw4zKB z!RA3O5hknFv@Km%<zQ!MG=j8scM*{C46j}YNB;a(+>W(;6|1EtdP&|M|z z#|}$fMAf4Ek0scJsEZr^9^)kO=kuYp1Glft)DUDHwED9pZlg}H6P+l^ z4^ke-ifP;yfA;9pWCO zLA@akmV+gQnkd_bBJB^lH~VOw{>+<<{(r_;(i?8SRY{}kVQ=nD$J2;?m4=lX?k%Gi zmkB@o{Y@Uobj5+AkW6kOVlc27&4A9aX}kDVF*@9Y7u}VGH{-xe>ig4mAiTX*wEbQU zC}Jbaz8*_m;_~b5zlZHQY4sZ)Y9w)Dkkg8%A<#?h2#PV&x=jb7OhoxDg$7>6TCN8A zEom6C!aP}ihz5Y!LTJKshys7{rqyi?W=7|s9%cQrFS~bq0SsFv3 z8?si30_4&iRJGrw{;1j-sVK|U9Y&$A72M-dhwqZnylniUE#!tQg6L2_ZE33(McZ6i zKUYvgi8vDcH`pXwSI&2};1D&ZY{)er($gkE;rtP^uoEufBhi}*%#%F_z!wuIM#2({BT8joe9}e~patI{X?VNRS9Dazqrhr$r zE@PhvKCgmb-G1)n2SH8i@JELgKi^1CK79!W_j(H31;(Cv{`!Jz+CGV}+u28d9^T#+ zI5fT9Dv15S38VJ|z@baz?w;=KyFvcpm9#zz$suaNKVxO&d@a%W!7L@xyNxE-*nY*L zKn-Q0YEa9qnj28Kj57C+0XHu77Qw5k+x<|U)%#ja$E<3WE#MrFciMhAqDsm7gWu%q zB62!nZ7CQDz0|Lp#Li$9Upo6z1K=_+BN7Clu*G<=3inw*SA{YY_8dj?vim}xc~MV< zY&IaJtm81#W(VaQ-lx!D2b3IKcv!WLkwrF28{d+;Bw4>bnV!$IPJkirYwVtKw zTP~5D)B^i2#A`!Xj`{L%JdET5S?=+X z+IY*@oh^TNTrac!ZnjE@*fkkJddgVvww5lrKq-;Rn?P65T+=lZiwpev^%uG0Nl$MqgV+?-S{AWx`c-U``@qu zhSRgBFs@L|{r;fi>@r8zSiUJ)(?|D+HEnmBAKDk@b*i8GR$g|rO=9e9J%ofeZyV(^ z)|7fsKqWYPSN6*}DtkMIEImg2kUSf*)~zSP6UyVvH5_L__;_)c!403od%lBiO$!j1Ha>&)2!)Mu z@jvzPnLEn`mFtZ$*Us0Ad1-82Jw9&fViIdkCRfj9;n9^?cfQq_iBF^fcB51ZAB+UY zk%shVN?~&Z^)IBr`Y^2j2yi7Up$9_q-Gsf}^!ZxAo`@i-jgrNbY@JBb<|ti{2=kuC z2ha|>rb{6IYe~C=@lY2k?7rhg(G*UfEz%PLQ^)6@^ozwoPL|CYy>UExsdQN;w>r)2 zn$?+F5k-iwFhppG!Z$sTFB34#tS7@o)}65|F0fzz{?rWIqqIH;owjdOExFa)N}NyU zL?jV+2=uXecGzIEE!H6UFv@_HV+*J8f7iw9(JpIXttopE?hf5~OPSqIADe*L(lVcT zKC4Dnj`eJ=i&y+K{*zN1wKGLY$F=AZaK;#e;{2 zDNb~|mDuB#gQrS^+=kJddS*bw0(-&b{wOcVIKq6fbGi3mr+gIL2 zAd$CzCns3SyvwS0-G`@z4>^dHw2tFI)Tau2|M>I4d=<))r!jKdo)XF{3Ln+B1IDKz zlOB}>V_2G#Q4{Y>YxxltH?m+8oapxy9~nHhMrOS#$ag{S8VxA;1uifs+?KG?!yPZ5 z2~d|Sr&?^z$H`MV1X4A>teIqdI+BsrD)6enX&vcecD{xPfF=c@muB`wpwsxpr%@kP z0_<=8R6mWMW)}*c&*NsTsVEee7i;itDe8;En?&rNs4rzXCa>n;L*DZibD|jIjeXlN zvf{wi3zX$2#1w1jsh*)wkgWb2aJ?_DD_=D~M8{QJ#uE7m%fFL2Aa9x(k-`bwk>?$$ zfYLLu#-|ZhLpcv5B7ai8*_hIr%6-+pk?FjLTg3(EGOKC+M$tWAzXgul@?2); zF9j?-X5d>9isxEU^N&na3bM5GgAF&`u<&*)b;+S-CWm^Z;V~Pd<-4hQ@XB7*oC7Ym^ z55?ORrr`LyU494Sm4x7s?0Q47bUirF1`WH$P$+%Ho0AHfP%5VJJ1s&@Q`J@%%~AT7 ziVGUYr(1S6OM@`Uu!55?q=T<(2gw*Oo>{YLF-}snD$S3w0Q8&}eCwv090!i$TO3_5 zOcCzG)uw#}4PBH>Y_^j68m_ z&NYaayCGdMU51iRd9z&o^HSa1w@W4TNU3?%=l(V%;w!1e(TAst z&8Y$1&>akIXFy6L7D0`@_)Qr1f$#C{%Dfwazi80saEd_>9Vv?0av*%+Gk(-+qt!Lw`}<$KCu4tuMz#(ixSWLEN?;k!Loxm5Sr|!nm6OH57o{kOr&cU zM*f=vp?_gJ2$e??XeSZKcVp4&bHM5Y9k@hBbe0KfPG(}5z)GkG z6_jrv>b9cZk8*Zf|DY|dZjD!G7Yw<@k8ocXGx{e>2yQ@l2oz5!s=9e+a9Z(%EK*Tf zP7fv}V7YO0qM=P7dSE5Fz@10s0|yZ-^YF11=LZ9J8kUw(gjruv&A%>@F?Nf9av4_? zo^6&`A|;HNXbx*`Vgl;dtLHiS3;4;D^uvtt1;qHbzEJ9etp2S4zl{#D*qqO-U? z@ux(S=oi2a&E{Uo#XQ7Q(C;P(Zyl+CcYRd7V`?m3H4|DdZkz0^?vzDD1vH6PzsZJN zx)L;6E__oENwC(^*po+W5_M&2w>E~Ga_5dQN~-!2*((he`IiUN|FJIaJ7fMqRf6c$ z+)k)_{13Q$tukdZ4IsrUzJPWiF*So0_S zY6i^3GRV{&?qpDsXKLUvgZ7Af&$Z{>MKhglA3+H%ty{o!Oeeo1b9j2o} z57sx)A6JmOtW4@4r!wh&iRhwS^{;+8n-p=lFd?GByd3H);&w(b7w^6c4MCLWy#Nd z$)ftuP#o2!r1+OF=!kCXTfC-$rt>p$MSKfiTcprm_BCd+9S6C^lsrI;+n=RYYT$1_ zJD-kGfu;0qylA(&+efdAk@Gqx$WzDSa=AuNi^{(+;%@Ne`T17|G6qe4C$2i?yVxDs z`W{9EInCC8$P9+W{%c1LMpNZnIA;A}TLthPo6|-h4i*G{M+%&@?RpIztoH8)lrF{d zSkNKBq`9ofDq@-QQ>*;iB4)S;=RI{1mcav>NoVWA1M*LLi6o?YwqEye$dzXRlwNX~ z(YrDNO)A220h!L22cZELw}F}G^g$lR%v?F4etyaVAP;9vgCN;@x?S*|KPZO~ObE{rds-rd1O^s!$+rLy z@l50*9DA!!0Pi}R#yyyMoCa?p_$3ip7y(h*)4H)o%$Scy{91*j!|xaJSW+pDku|qI*$z-ex|l65)S;_ z??2bntC5KP82ciBub*tetB}t+5GdXPo{*H7RaA)X+!)5)!6VS0`3e!)HHP&&r~Gb=4>I2Pv?H#iuOya-K!X^>kwTp1Uk zACU|*ULGbS8f9~Mf4>YCai(daU2PdS`5c|Hf7CQRfbg&*Sj_FlzO2P1J`F;Dg2Br7 z_$4Qg+`4VaSP{YbRvq%%D6;S=YGHkfcE#J+T=m#LcI_2`l|^%XYy%#3NN%X>6ak|6P;9R*hx)x44179rY#1=U9th*}QGV9{^ZrTTcA{XQ=*gnw@X-!ri~96^uyQi7Ctq7`H<`Q>NL!f zP82U>ULVh6@w)iI>7YJX7tNaYCQ4>`a!0ToZxK57B}fH^@9Ve?deDZ<2bxr;7ncj# zEyyh2ddW*B02#Gbc4Sc9)sB^VA>(~TL^ZY zMD55$X^*HSiEx3K};f-?@oGdksXS8RXS@pC#uX&JY`XBR)BDq|&3o;;g9z1DU@ zi89>14x*bWU+1o2=qDHzU;J9`<^z&A`)y*+PwgC1QpChQqbBS?r+#|__9hF<*ao=* z>hmRXlw};k!jYR#I;4t9Vtn<_VgY*(aQ2x~SHDFgw0vjn26(y-{wDDGXg}cC zBZAx(@XJ;hCZJ>C|6!G?5w}@z>~OyrDro_yAXwiw=Ve*znqFci)T02QMi)1wz^516 zC!rh6`{2eHNxKE(iqkAM2T|RNGXzQ;hiF#3CTsX_$o`|U^ILU@J+&sun1!MdxaeKz zlR3$a;D#+`+F1j=l)J0W5@&Yg3Ea`lm|gNWyV%~-{ z@oWSh|B%H-A_zIZvxfN}p&7*Q&Np84y;Mf3Rqc|LF9!kYmABx(zx@X%3Y7hD?p|2hYvq@2P$yb z%cS0DgfAK*oom#5p1uiM%3Tqvl4@4|eT;}$hD+CQtp06fEFgt+p>zetYqL0U zL46Hw{OBvfhB&!h#aX^GmRWv?e%kb*m_eOW%s5b1%X)d4e%3fzLP=_Q0SGWa9B}N| z@V8FZ34&7h(L~^3^&IYxo_xpWE09)9RErG+u%eJ`!19j&% znn6|0G&6dg-Gd|%1dr71MHKP=F)FbDDPkT z8ez!0Eme3u-YZLIPOr(4yF-PIvNde7SdF_-vf+ROJ>&}Mm4sxCwTXOX;#SyNAFwuY z%#8yuTzrrJnVmbJZ9W{I%sJ;(R;l$yH&EFqC&7&kNRL*kks+8j@&*{cRsj}0a>=_u ztC}?+H!)9aZ$S!mR=aiRPaaork<=~yXCL@S>K$&d&lg`cTPa>D6jE;)&Ti^c>`~qS zd_ahc|HSUwc78^7O}r~V0M=uA#@k*@iGpu*LPG4aq~CmeDLBo@-FRyi z??zrE6h+>2l+sAp`Faz8EZ(~r$#0`0q&$HfSpWcZU|P%Bpgo}Wk;CYaiKo<(E#cbt zmEOwf24Vm*eA6U?LAg>LWHa9+hWnJINsnZWlgRNN;)w`RLtEZ)o~KOzbKTRaNxi=Q z>IH|RGu!%6V%_thGtyW6kCwt|mR#T&YR_%=ltI$1AYx02RBTqSX39A=vAwLqugB2@ zi?)UkI=KI!U-e`>Cu23exuobOx3uuz)4o&N@hp)D<71>%7hNNdQb4rqWl8x8|7(6B z3BjNuzU6xiS#XTQXlt z>k&YRcxb5utCAd#SczESCOrCbS~*?XjtlpI#2@kY%!fwU%I`|RqZ22m)nWOf&4I4+ zkaD#xCoiaZhFu$4HLe|FDh^UyWK=f85bJ<;uZ)PCEjKmW@d+EB;>U;LkRHb|KbY#} zj-$!o2@S-Cizn63JGkPx_!ezdA7>eBCSsAOpj2aL@HcP2qF_pF+RiPDRQ0yXoA0oX zBDwIrmm3vTae-DoOgN(id8RP6r)<;88=#>D%&`63X8OiYL`WEATRBV9$i-z*GAbW; z-IuQ?o68xpC)TBQQ?i6N?&MZj#oXr1Cd7#Eh4kUz+Snj5Qqm?SCkmCWuwH38`^P}I z8C0;W2fCEbz-OQYe$4f12LKE(Bq>ZpL-wpIyK3t&==IUIT5VwU`n&kO5n162e%f}6 z11tBwXt|AzZi+M>LE$M=`v0^2_RCDR#W_lTRBHuS{Mvwf<3Dme_a;ue;0dx6!TLQ6 zm|^iGiw2Ef7pk(n_zXe7!E;J%?L*B_MKRjzN8U>oj?x<)Tgvrv(G4U_DocMtx$A?b zKq^;*4kV{2Q-K0#{E1D7Oq*rc=PwZ^>(NB}Zo zVse(hwtGQ)rfJcT$#JwwUlgSj2z#9!L(5$|s(qWPM24hILY&N$TB%Q^DEb>cAbu`b|3_(G8panU(~QlRV5&sS;>}lrI}ZTe>}z$6?~b z6iya!t?EZMhvr2~craR>HJ+MFS&atP^TOAqz=5lX0Ze{q- z6?y~zP^zUcUd}oq)hr6gR%XZjgafdbT&+C=Wa9L%2tyIHky0`-mOn;I}8X^!Ydo91+wEFwGG@tr+(F*zvk1%{*s8Ph>WTJt* zI!}3`8f)3n{TF-vRlYy^dVL21)Pat4dncrq|aH&b3lCvU&R^1yYc ztXkxzI_G8y^&Onmw$^%j zAM2&(_oq=Zy_F!>T1Pts!*s@MbCYa1BgP>C5yHt zo++bNa6a*l=r||i&Nf0;_3?pFN=Yp?XGMJf@6`S}l(qK#c8j2C$o|sdQiQ9@U5LpT zqxq7HzL3k^hEds}_qbS`@@gX_c zNS*3Vrp#hi;>!kFhskjh03v(YmL2#$CV)e8aIU&lxb#%3szm(Eo8mW^($&S5-WwxA zU(kgvS_ELjCaj-I*kxye9i^}te5kfW=u-14fKcR1z!QxGFU~C@UAj|2f=aLmipBdm zVaY=|^#f(AshjMyU-=3_t{<@2gk^>QHc2FvwgF!xkoqAmgG$zci8uCxJnYt0#LmxW zbpa(Y@U6H5%dq?tV)OPr!T~%Uyp%OCf`LRInjTX=Qbf%B$P(Q`SP&JZqQiRqa4TCw zS8$PH=^;1Pg)o_?H0qm>9gx^CB(}ZkHmq^5)9^Ui%MV|gUMWpsvpJ933X zIKL#VZ~{nj7vV#c(S_`{zd#u2){&@Tq>cvTo1zJTq1UxMar&7>KN6i@!VeEiK@)gI z_RI9wV=&Z$eHgOz=v2{OXeN`1{l`l5^CvLoyg+ScjjX-*r`gr8HXgF53Z;zNIaDwFXk6uIl2^p8N z1Z+KVofiSls{oo@jpK3-zKfmLb1NufLBLxq?(yi0R+YKz(516Fr-5Pttt8EOa+p*L`;sYG6OwjW*0i-lyh}06-IHah^1IYoF84-t zCN_rQEM;86L+ybpKzX80^i(+t>)1K?6%ga6DQNY*)5AF7&1ksv%vlkNCP`B1|E}A7 zE7Z)_$($T8xsxuW+TVfXA^a&F)7~)HVo{=I#@znyk`3i^7$9@^P_`OqMjdjaZoo}y zFPwKQ0-wycvd|ZK?(GDM2~wyLD{5&0GZk+(k8~W^HW|;Ctx@CC$mnf%Er^1eBWSE* z`+4a4Uf^*dV+y+AJ+q%>mlSVLG9?VP8uqa?Nn=`RIz!fsS<-7dnvZ^!Jwg;176LEk z#%Khr*Vx?e6J0vb1x*B^v{lk#K9k{r=;ZaBrX^mD*qR)(c&WjS4WDC^zb5}b-7SZ= zl~SP7@o)n4eR9Hk76~amUzqD&O%AaJgVO3t%Y51dFkuT>Z%k3`qu=|C$+_PJAdmeLVZ8r*g7hMyGX6Aq{Lz7yvL6 z1HN-T(uy6iV^J~p3ZgZd?bcwtckc750Vc~Co^QyLWOE5vdh?}T$s>J9wFyN7(nKo5 zUwZxS8@5yKu~_r&03t}ziEM(yZRsb-@W5KBa^iF+E+;&k021R&cQ)S@>1MyrXN}A8 zPj^t+3GS-Iw7(tq6ihO)a$eza=)#gaj=whF@em4ka3U6B5kxKPAm>SE;i2_T%$K?2 z4ha_MY0vYtWS;p604x6XBl%AkT*&BtiIF&yC1qew(%sw0nG>>pG0#(YwZ>MA26K>z4&v zOcvcU1NbFS30d#gWsG+$)4oZWoMWg~VyKlMb)Pls;ei#&&Q02u` zO1SZ~*Z)TW;*X76A#63Giu>`=$fUZAqBPe1C49601XhEvBSFE_Dumo9Sc7=}M3Zeqhwe!lb3z6ocAP5epiPQ`1>rb80y1crt+V=^hXuAxV$x2Qshz5rsZ47BXcm z%aVpXBdZ7?Xp|a;34*qDHL(^i2l=~;pEtl3#^r&(Ve82{#9@!%x2tig6S;HP?R02WK zvwwd5rQgB1k-w>zLL&k97PxZ67R{PL{ul$fDaT1OppOGdyjTlXJr55+iqCy#E5(>< zTHUQ0|0^76d)kT({9&fC0ij3e#Gam3K@2Lk^LbnPQ}ARW5`QOzBpgK*!n*!hFW^*D zEzS8WOxd;jn8REuIv5)RYSJj|Merxt9I`;+Rwjx2(7FoJXP(9AvGzE`Ffo13(ZF^J z)OKxFj#M<@DsMz%OGuyCP|+4M{&r47JS|sK%^_4Wh_ciyW=Q3ildI2uH8Sa1sW>PG z?OJ-ONs(y;Wyr7hCMaQmp3v3!`Is!wn<4QwH1{2_FE>lcQu=v>yHWI^e&_#y7V~NHEd2>;XhU zoeo=W`DmCzwWPRKB;N%#mfsk90^n*$JcABD$t6E~BSV8CJ665HINJw%#ih!VX`&N=e!F2F7khw^qn3Uj4A64aY%;GFz8KGc>wS^ph>Iq(DANk93Q+ccgz_G;#>Cwm?+amc2fCR2GkpglxfI~-tuXNUA z`OY(~a72`;QtV%aagkxm#?$mbw$Vv8!b54J!u>0Autr7>AKO5_p4#rk37qq2e-Y-V z^2F?NduvLaN#^1gIU<(W(A-TfEwS0i(!dj}7Ucm(8yo;R6>6bMzsw-Zji?9Cje6bx z3j=_zR`XqFw_uUoMZky<(P<;z5#$|qMebSIJLg|qJ63)q^WtK!ftSDpRDh%m=osh) z`Cd7U2>9eK*Ox|QCl9Q;yxpi*E~yia1GVw0Ke3nXdXWptX+_)*et-X1Itus+3@az_ z>y>F|CI?&6Y2uu+TeNh=uW!@ceJ|fVfz~6wtHWoTb z67)12=vVTITq}xc@SW4U$tIPV!#W1Nq0K8=%3cXx4qrA+)TC<=zeT(prKU~ZB2R1vt z75eMlv5S!AW3uG8AX45DN2XacrN`c$8#Ive!!>7J6?B=XPk4c6L2u=xl#uSO?-0Ev zBZQG8`)`YMnF485oyFERd>7CxMf-D2Yf7n^r)U^02fvZem!cfnEz6QhZA7XUXLWPt zr3D*SenYP~_6{8dRRqZgqH@jN+(e@ZJpxOCInuiD8|V50z`$fHRCh)S5CjxhiGj zZLJ*^vBB?U{MOL9FcmsK0=#xo|(yArl`%pNzFe z8YdrQh#=DMOVGu<^!1F0>3;YpE&&Ht_|a*D9sWP%VTl!){_94sJ{h?_Uy1wL#U!c} ztLMT@Qf#BvAzAI8s8!(AP47M*b+)y4IPCd<_{0$J02@nk>Xa^UyacvmSodU^>g?MQ z!o}8spJUo!Yvs}I%hE<1w6xbQ%4%TUk$L^WTcG)LfnLW`P_-Zt96UQf%JS4~Nn4by zleF$iR>g=xpipdJtk-Fv9RewyQJi4CD0~0sZ5+^Z`}iJPL!yM0>>ZwO3KG;PtaI*p zDmUYHx)JPGA);r1jPpL(=wMvd$EOc&KpCzYr|NXwdPX2scfFS5It7*TZ&5k*Yqz-T z^S2N+t+7ylCRY|YzJCD1k+k^8WWk*K@TT4ZxJ#r2D^WAd`Nd+N)HEkI#VzGPf?A~} ziSEb0a}px$NnLGg;KRb=G-yMVq>(V5*eg)qO1f&i)5{J+Yn9y=6>piV=qd@-ka2Se3ONxnwC%edHt`wxOF&r9Dt(HMeS7$%EGctdE9?5`)2>6kze69?iUcv<#%QPw9>+&`kb zh6?^}3_(+NN)*SS4L<6=t?qp?X*F8^Cb;xfDxrg#cw9R1=exOJz|xTygc)iuJK1IfbkJ(s>{j~^jX)`mq4 z%q*uDA8)1?ntNl~)5J@;_O%|Ez>Op0Hm#Snf#i`;($P;h0s0v(ps!gsVU zzZt4^ZwTt6Ga!fE7Q~Wde%W7qF!s8#znfL9{jgFE0A8AauAL z;JB$<2S5s~ajxnQbndId;dzb2Qt7I+P0=0$A7375)WVj*u}7a(d|gz&roUVJIP7IV8SI7N48Lbn_KSD;qtg&*%t;GOwL|rG;SH zZ+b_F8qvy}4|IHluR|7*bISH?F=sDXhRMTWokbL){iuM_x|}-;gHGe6iyLo?R&bw| zTQXcTZ}KZQLzXc7zWR6T<6Ai5ObTN~$f)1nc0017;C<%E8Zpa{^NSwQ(%fQJsvNl? z#QN_mLqS(A{-!HozphyKS_ht_uE4ir<)1OUs`CvW-i=4aM!(h0xdT4X8LId;1!2dC z*^9rTk-@^iVvvCvKY;#j2&nR$%j|-8g1i3Wx*u@+8-^*DxQ~zbvhT#rj8+;ROT^z; zCJpPSJREG68q(Kid)i&unSVCrN7f(u1|Tq((vCB8LI&UQ@2C>8kG7SFJXh_{{F{v9L( z9uLgLT=G^`XJBX4Aj~#uNBcEFuFo6>ui4&?jZ1CSDkTDLTuG};!^1QpoR{e9 z^&UuNHU*z5%=3&QnIPXKL)~d=5<(iOz>#9JYIBGi5VLq!xSd%k{;TN=(KNR7CxNTx z(xWuk`m+QQ8}nZLbF@`Dvfule$8Vj33`Mm_>aLSG-Zg>I_q&*bPtytptK;g?kS^R) zgm?{f>XQgH!YKFfz;L*9XN$v!g*{U`^Nz>ynvtbA=)4^aNXZ&1(HhrY{q;d9SiOUb z!4g$3-r25hL2a+o#Wh<2XD)Ra&0Zm#dfrqGHj7bVLn%fqu1#Wl3f+UNWF=GOvu5{02cY?K`&LqX zQzxR+H*wOSCWx%L&fpPlzb*Z2-3c2|&E#t$Wi>i6%}PemE`aO&JQQAVmG@V+HID|K zV_vrD%lhp$;PvulZ`_sQ5lDMFGV>`soE?soRJOgV^ttv)$o9Y2!2|##cs^<>Ofu9< zqQl=s9wS>A&Go$O9h7EVd4Jz}!nSN4&iZ`B6h=k$*4c**$&J$8Q%aUdm=2&wzhmpA zD^8Bi;*&DVTr0;R`zWiVu#S&PQlkNjJj@SN>3DT@m{N|b#QX_;wd4I;tuzqT?0hpA_ zVwjfD;(m;z6D@S{%2?VY5)S3L$sM$_$04yLCz@;OiM9?Z;O$E~Dbg78MEHW|Yfa!I z3fw?vTx#3|$x_ALK~8(n{W|TiOY`UEdUiq#u77xCjznJ93n%DbU8$|bN>5g!y(FvU zGoWe`{(u^z>WNc~A=gm2j1$SeL-=fiT5$aaWZ|mY*tDt^DUvXnb7B(7kz}#%T|x<| z&C{3uYlxp%+ND*Iuij@<^4O!jt%X(Kj$&U^=N?&OniMi^3|glQ*#7auz2Fe4zRw^F z_t(|Fz#xtsmvu4#hQ)*i!H+;K)}i%?inB{zGH{B5Fddv4wYdYrmYM(WrN}uE9az0d z^v;-)Wsg$y{X8qFryOY9wSLhdgBI30ro?6a+fWVx{Avrd2lB zGfpd_x-aG?Nb1)O$0T4dIN6x~lE*m@fi+9j^hE;g65KwUm85>r-jWvpwt?w8GQ{~!PO9DHo zFTZXBJ?>@s%PN_N)S)yUuI&$mqQzh;oexA5caYEGhJC^7!jH-LpV0ZrsC~ zPePSX^c}XNG08t=UZ(9&Se4e`tV*6u{ZbU8~9x9J4H=pDN#_xv+eDaoq9weQBGK|Ku0F!%@b(G)3fXr9K^e81aForgnU zK0LXk?>;^oDnJ2WX|Dj%!7>eMFd{1cs?y4me9i?cK(xvsPt1kqyy0h>Zfq8$Uw7qG zVznW)OB%@w_l;;K(C^M>|KSproRr{QCp|3#m}QD#`;aH1GTNbxeJS>xWrai1wAh9ZV~Rwt>SUp(<$k=SO^q z^hn|YBxJ+8d&0qa}*WfzueskH7gug-?fxt&=XSSj5wq6BNeZ! zcrYo_H_AL}44J&Ky^55yPG5_I4a90CQo{U^I&yT|9w7NH_1udxmDX99(FhAGE2MQ- zdDT4-dsAXj!;TFK|I$Y8k9F;HB0f1RJlK}k8QB%2gV&9@%_Pc{$#c%C)sjw~-}!!F zF}$OC^Q!F;&z-=fB3pe^`+~ATOC?HcXJ*>V6%!c#6CGk+e^bD34AU43OfncZwckBg z$_LiLV3K}xCqu^v59602rDB`sPcc~V!!NEu1eD8*je(spWvkV~MzSy#0a>@+p z{&K&U2nF?8xt?cDz>!S%&lhmx*W8gM&|AE%<0!j_s1zR?4Ztr(ht+M%T z@05K=Rd!BxDmGGHH-3){c^tn_yCYEq!V6dsGUC4jocP3&9Nh2FX}U~1dq;292oh-x zwg+r)R3?6l&OY6z3bA2Vl`RZL8yBiodHtS*xY0}uRl`gl$)wA;Nh;EgFs)&|6t&v&6>S#WY&)SlG+T9Iv8| z1Ks=IE6I>U$|s+_7AiTbUq?zuM#PA<gj6Ie|O|g&ErOkMU;BtyZico#eJrr zphepiDbRVo4CvWLv{|O?AUqrnRSP&hfvG$Y$NJ2=_&vklm3GCR812#F1nzs}VSAGdMssYl*tQ^-wx9cwOS352o zD=C&)eGN+phz4qwpEIBhT9OK02lH<1&obvBB{=HSXN})#^aoR zu@)G+a)qkZqi|5ylVX-~8#RgTH?>KjoA1_|>v#rQdMUNiv{G=%?F9xLjaie)xN_El{h61xu&*>@<*gVaF(O>zD^H|3ItJ#Bksy zROw((5&%?(e1Ty%HsT6b^YZ`fBbBLHP_W^rR=J{qLEB}EZ_y3hS3_R!?*N(z)z;dz z5QVN2f-jDTj5|5Gmq9!y;(|A(VQ!N6JAgzyPKaD0$po&gZuKL7_bVZ?<}DFppFCmT z`r6w*uN0Zp0PA2R{y$aW_r_?72_1L;U^|u~8?2iY_N)o}L&Fn9c^-&t?27AoY!ZAm z-O;MZ0L*QpA^niPjOZg)=I!C{W;fhCgvtBp1(cJ{ZV49f9SMeJa02Rp*E;xz@9lMI zz-=%kleDl}B1=+L(z5-aSYMg<47x#uWMT3II4;)y#*o;o9%)me@VX*MLG~Y-eKhG7 zTEm-W%R>(PW19z}$GA#-)FsyXR+X#Cw~TYPVjFYg2vAiof$Cz|VG6r~_*Ufn+K5zf zYz&X-Y{4XNG8>Jjsbx$_-MC!-^q`4hr?yeBof_-ipL+o>T1%BPTo$&MapG%O!lR%# ztz+CbNUq2sp&%s|MDZW@gJdx6@Z@1UWMJJdHeWF9vJ1Cnq`wBZ(oOhyEBz^k$^svwKek|nPjaukix0@=08!X!LH^2EDPp6$IcDHVk|bfkVhifj2??5~^4E6M|zg*a&X) z-ERr=BW^8OfZUl#JtHHOiez-d&$WG?(4bD7@V_H1A+c!|V@`bWAORF4@1RrwC;k_y zai6G7mH9+2u&<_J?n8mi`&SWK-n}AP%kT4sE~1>-w^^4XYc5bdAoN4ZMpZ5V3-R_z zX!*|XRaxP?uZTv$qwRSYde<9Q2>C?uZF;`|+z?4B_(J*;j4+8i2})z@?7q^FpptFB z4dooWT6+L=pc7LymR|{eSec2Zl9bCiNw71BxZS2YU`qlCj2uZ!=2VJ;V7N$EGuFfV z2;!|{AeO|#leVsaZ4XH=y@LZkTjxxJT%$9l@F7O!Idq`F-j-E7tUEoLsEwQ-AfV{0 zZc*!@gLKiMD%1a7+_{H!kb)M|l}s(7&gTengt~o1e%^O_my9<5pc@z7l4-SXI0a8u z`Zr&_Zk>08qlyd*eo5@%!G6GU%BT)~WgyxUz+)Njo(l<*KK7k(Lx(w4xBMmaH_~&6 zkmABc%IV@F0C)1Lc_~hhK+U2u3cLkMJZ&H#eZ(WK3HX4|XfQDb@a_-z!Wakn14j)l zR({%~*S0R!)Zjl*WiT9%X>;)j7^0?4t`T>BZmCB17mse&o+OldYz5VHaTvyJMx+UX z0gM%3XGZ?>Hkc@`8KAfGgM1=|X2SMMcM=QQd{m^d?EOYxr#8(TjnIecQ&B0_mm+6w zWNXJ@bNl-l)Mq^(Fm4H&Bk;UJAob6DghxLDSKPBK0(E}^P=uZvH-?7fvQXIH7ZsfZ zsp_O*zHUJFf0FP)*XP#a!DQi5wK`AfH#vxY zEOD0LM=o!O<7`{gDNvuDyT0s6+uRI!Z!voB)^wrw=KG7G@KIEV@#7az51O6rcrf{S)hn5Qf|&HZLC zsSRwo+rNH#wO%@x-q8Es?mhVSLC0=5tIiq!2=_F?CC#l}vyrJweuL&i1A?O}?N?b? z@+kEEvW|eszX-z$?Y+R!g2sXg25Qan`mF!hZ0`p-Y{!TkvWIj+j-`I60f!QFLeDWI z^HAhHAU+FrTR@$I(owPl<|VYW)ay@|If)?7|~i_6DRH9WAo|Zm4}Z0xv|ckcG>- z!i#})==ys&KxQsWF++FN1+)tznoyQhk~)?sm>%%MrvsuH#J-4$K^o zf1`(F6i*x({VS*ICzU&@zEde?jZTGaPWQY4L?4^IA>AY+FRm5#?j#}+R`Gs$Rr5Bj zh#sHfB;v2z(}=PjTwKJhn3)Nb$rTKb(<;Xaqm01IK<3;LZqpKP@e0<8_O}Lix?<4T z`|xUEER*Z$QG5E?2oPLMBn*~6n0z;V?bq*e7W0K`H1ox<5??lX2b7}+9LcgmU4T?^ zRdht~yOQ7OmgpfjGT1S)7x?{Qt$yij0ull?aEN&qLgVOUdB|b|uCyh1cS|Z5YieN8Rkk*C3bIjuLj0Gc%~YlRb@}|oh2R7lCpWzY?Rfr= zhN_`odM!ghz&?BedXBUvYZ3sBpZHI3@~)cU4;PCi|6&Ev-QF7U zQj_E*BZH3s_}?FLMr(sBB)vRG11xhPJT8j@x}@;Q4NT|am7kVlppDx}c)EBkRv=Yr z5bgRneG2&${pXKu45bQ(Vy)UU^Dw=ZrxH?zL2DU-wg73{F9jCNlMSxn0A9#9mhGxi@5)@ z4w?Vc;++|zPjZdLbsxgZWY9BsSZViTKWmCU<*D3)(D4%Tv0s!1Z|W}vlHHV0?~QQ_ zlf%qBm<(Equ-@crKr;O6n`^USSjM|JRsw*wQFJ`@DOG*F>Wmf^+ZMd+HG+&oM>_0+ zu_%*83?1{Qg;*4tOCE9w3oHrgOF`B3d~p-8hp$^!Xgi(`Pi zX12S3YIiY)sbj{Y%)K{vIS^Wz{*J1DqRRO4H2$Njwgzh?M3xIQ&Ok^#E4K_qx2^He8=DkyXz6=yfFEODTe*_@s0qqgq z@1heg+6!|?mZu%p zjQ?5F0h%0q!Ocj#&pR}bycS~)IbZFrb%L|;cVcO!G`H58CUdi8#Q!zK9Cm2skCNL( zuB!!}HeX&-ZfhVoM;C`V8F6i7hb{WA>)%z~4>)=Hu^)EYdNQu3`V7H?KdGF*2ycY? zJN&$B$>DuzJwX8|2?A5F0d_vx;rzoV(wHi2;8OO^1pBuYDd}72OY6e?i;GN4Ilw#t zX^7kV^1BKX`By%l@WR0O87`ex5-5$395+o+4qJ$*po&*vn{^IxO-zJ zQ_m^~;7ljzWpw;i_ndqkY$)t0avE>o!q)qJn0U6L=OVYFAloHtp-udBZy8lfHvuFC z-;V<;P3q16KIJ~k;XTIe(j0NP@^OK*%{04y1F9Jz&t#`N_3c+^Fy#dzr}HhU=z~BJ zqbR}eei?*+0096QK_}NaQkATK8hcp%KbTt?k{6N zhwFLrAgO#7B_-gvj@LCB7gp8M)axo4(9Y%2^7Dt_7%}mMX!paF(^VV3ASnZOioY1)AGu_QM>0RR@ z>T{D{m|ydi%ST93ptmT3XxB`R#GGlXdbS@zE1#C79TZz#)mhIS@u({}R#_zQB`}za zbJ_Sk{K>rWfw0ts@*coEssUxvM>QJ|_EBUc5Pqlk4jO&><2v6KbJ(Ds`m z`XV1zWhQ;I`rHI%=hp>gn_&W^L*1kB8|KM3KCujc@#Va1bL zl$GFb=0K&O^3+cmb)QZ z9E|%YT!&#oOlU>p@EQn5Yg$~1(-!>MJ{d))Mb5KL@>wwAUmHFKFug_F6;sozgZq~p zIFJ-cF@ufvy9%*)5>gf{I6{n>?-(;>Vbv6n&0m*9aULW^)RH|&6rzm4`p-oe=2TzB zT-_RskAj$2;QRwGd;*o2gyUnupXpw@&gI1xl2c?kI?jRV#m1CGjTT&E$>G{sAMM?o z9Kr)CroSZ;jXP4#kYNfyhHm^gz1t=>_kKSNxnaDKy!LdT`C2aKP9j%n#P!;{O9!)& z8&{UQ3bxJ7``QhlpQY^f?$>esk5gVdXd#UAna163*u9%Jr~m1}P%13DmS&-o|9?9~ zGq~p4B_3(f8WwM{Sz%Jj?BpH5Xx)9Q)IwN3i-Ja!duViQohM0uBh*kEXe3i?($gN>Gc zG8EYg_%*OA-2GkDa&|c=(1be-ga&Eff!>hOjSH1XYY_P3)=LL)+)<~Kq)8;@7-1=u zb092zS%L4mGVmwHJ>NQ^?k9!WK>l*)KzKiIC0cE%=<~TT8{?1sh1<-%7 zC6>=OXSgXhth9MFRp)>I?$L15cQzFoTUP{A>e8PuPO-QUyX%AHnl)lFOJg@Fj245( z@fH%r)snhSI577R2CPlA?Fn<@u&EZXIYcliMqt_bt9QPRz0-z9sp;`Pcap&w~!Xa0cb5Vv5gEeV%@K!l|KM zq^-f0hcyaOg_(@eyWr!S&?2a~<5GhpgO;r$WzhRW;veM+O6wv8UfV~x4Y`vCn5SPn zJ^YqRwjZ;MuG;4SYGj)ddnh32lP8afa-K7S@AKynLK=&^v%8d0O2_D*q!GuEk>s9( zWT|=0DRQBbnD>ke_8oM^<&+SRs*8$AC$ah4fPA-_0PkRZfOMibG)q8P}i z4L0w3a+Ukf4kJ8k(}2&zjcQIF<40EOU^lwjDJ#wt(qqG`yexvqLn>B?BCP&RO~nYk zM>ifSWbx(|6;27HY$zXH?6z1-63nGwsAicW3zg{+tGxs5D6v)#3mDTfzqh$<7uz6 zn3YlYVNdjF49N!l>13gxTbE+Pd}t*fhyC(L`>#72xvD4(xq>v}GE6sDPU-`D(-x`> zMfhq%I0Zrj`}C^2)l;K^%K3QPnv7DK^>lPJJW5?3*{TuXH|hopB0oYYIEnOWDI3B5 zm6xwg%Z{U7Tk7ewNFkC)lYtIkzGl%=WGj5_;d#m3rfmAi|I=}a?BP?-kn3Ta>kue6 z2%SOE+=s?*>ZvMb(uV8-MZyxiowQnEq=aN|A0*)8neJ_+E`9Q8h60mJy*=`O0;im> z>{YzhzeuD7T@%{&Zi7ijH^Wxja`kHo`jaVf4xi%p-_teRxNE|L<*HGay~LhX8dHlB zVoVxf&4Jw~!d%Yx=z%A`885?F`kezpsh`2?=P9`Fbu8y#)tsMx@uPIJy#dp#2a2fJ zczuuox>3twV4Rg`4xZWMe(<0W1ptFAq3&R^;*OL;_9u5k5~f9dL{U4kuS>k{kvCvF z(|4z7v-Z&C;>-Ls#Fi%n|Fu-5_}=3ErYhlvy&4*zN7 z!_0Ce2uV`H^bdd$N1KL4Hv7#fSZw8} zPNeHQ7o!PwAWV~s=8KtsYRzLOVLP1H>{&OOEacy?d9{+4JogB!esuytG%O~J1uRtu zB)KSvdKn&kM9|kK-)BZM$LYr9mEp?lL#fgU8`tuMIf575k>T92zlp!v& z*h?J&7v;>#V5YI@22kJkI_GqQZA5Xo92$2eDhH1yx%uo^n&IuBp_K;!rk7^9xd{m) zYMIfEGJ|iV+BMRR2SNr%f)wdtQaDtbHN3+gUuQP>0BbG!x;36}A{dxbh#FG!E3o!G z&7YM>+cKh*#{&NhNd~h8{naJqr_>Gj(#?>lIIb$A0h|6v$pcLRxO4n`A^l|Lz$Dr` z+)qo}^yn3MWwjRpR2+4o%)F@aEkhLPc|?d(Z*mw@uNm+zmmnkj+E`dL4>7=JFSGPo z;h*b>h|c?;`!c5EoHi-(@QQD1p^>3djLCK88Lg47{zFZWCe;z;REh$#V6U=CLMtWH ztI#a)K(Fw*>hqP+zY*#1drF)BPEIRL44&!Z273xZT1Tpb5>!e77DS9H-8eVHC*!SI z(PeFjc$l>+=Zp^xW$|!birJB%^ISt2r(DqV5*X3!AX_7lG{c+ptSxG9Ce8s@DDDVK zzptuOc_B|t79%csH0ww=#hIJiz7R;1Se1byOdcFgn|Y-tTMp7?%&e|KtMp;8M0 zLZtZshNW81ZEnFy+fnX_6{dwj&7X`1KD}=cA=a&a z9_VvYy&l?9bhoAw<=Pzd9d?>uOHu5K)RCSXwP(w>5XaE3#00001Mv*2LLXK;4&&M{rg~@3dDI&2(X0yxr$sgK4KcH-b zzcNjMQw+hpAv7s-ym2VL5{he%iPnxNO;T2rrHZ)QQ*(91guyOd0Y?%K{9zn1CTVbx z&?}BL-v<4RsDvKda4{uKcW8QWEoZ`DU)3-D3Gc!GH(V>X##|K?PuJTh%+ggZ9+G`S z%Gd}1Km;Ts;;f3-UK=kEM-=EM{djF?{AXJkcn&9v0vtw+kYl+xfqFB*UhP#Y5b~*4 zeNB43!$Kv*yQa>~Njj>t`Jv1e4gSe_R?dP$%9|i8!V`8;8w%lr3m6+$u<*#NfAg5hks!f@U06gFNcp#Rl3He)T- zYG2tXZGhH^LJX+OWGI5Q!q&$99O>g zAg>#CHE^J0Q*F`UKe$8CSVL&16yV`JPyu5-kdpvwc^nRmWSQvssV_1#{7W1$EK#Z! zgMvGoo;aiUdhs*Ft$EF2<}f6nA#+(O>xv}!4xjlrcu`-8p-GQu;ZR3*Rf4RJid>Px zL>2WHETUJn!hNYy&Bn={y9z4Da|{%FXU{KMh+&E&UT2-%+xVdtI#)d0)4J~MD>O=Z zitEwRAw(MsOlTngq3q z4;fU`kVvEW2Gb~=(~w7a!Uml->p3g5Z?2AqqQPY#dBWQjOT9 z8eCG?G;o_@zfwdbEiv*QTbc;L%&=3N9#SJ{(Wg#ag?07dMuuOqOfjSxAKbMe$D|j8JY9&t+tU17YQ$y!WERu&(3q5uAv-*zAW` ztb*Ewx*-?8*2d8`Z{g60aTc|}xY|&OuO@XfNMLK86id0rc_Fy9Z(Xc7YJ@$17C2Mz zx3SNe;k8QN!iT6G6|LuNV(Vz^ME^~zF9Fe*5p(g8Gow3t{bbFnxfabr`VHg4G%ols z26u&040#z`z?5Kp((y21X2?jO1r61<1i=DOVNSin5_@^-iQx|Vnz|`mkB3yYF#eh7;th{Gh^TH(O%Kef4J|jGkx~L* ze#IAjx6*#Cf;|S6#P1!Eby!zmc1-& z8LG{bbyOttN^0bjQM3WtgX)y$<{V(0_N?Z+=zO&IylA=T3w`^8R;5mxa2|p`K^xDx@cz(bjV`mhUCh&7d;|c z7&X#+KH62_{uMZezX9=Xc?uTisZKEuPh0a~1kyhQ3+1>wbipsc*3dcky= zkpM#06mY{fH;tD@)ta9(m4Xh^shR0@0QJ^bElZ&zo{%3c`ni~Puf}9z;5^v z2##79hh~dpop!C&HWG;Lsf<>-UVY*AO&s57*ntV(TS6N7vcB)ph1N!qDfLH$Mgy{B zN_X5`c_G0>!Vsm%S`+=Lo{kDIy?cYIJ z$%7uSj)Fcp+G8+uJ}2gtKCPm?W{%b98L#(vn^p_{M|fq`?Yo$Lkj_4X&rcNtL+yWg1^$3_`21D_`}q*{?m`xOD6?35QV_bzVQ5Az zacGM~tMTLn2Rtn12sT?Dge%Pg{@8l-VPig2k*5=AmW4ND~9GGI18G7K{H>GX&eNGk@hHAD>Q#tXO*!D;L_Quv|NQ6*L#LDk4Pvh_3v0t8ijURM$tY^ExxB3{Jqp2;`JilsW0UB$11H8I(=TZ(E9cFGbF&4~{q> zZ@}VvOEUh=3{}QsGEpswENX>0abPXVd08AG=@44^;3)9IUQ*53;@hJwxG6?NyNw40 zBpBLii1$pz@gsVD%y6PY_`6+#8*;u(&Ke14GP3&?U0w!I+YRhEPyT~)%RwB_c#^pP zvtl9ir;UU?PhL7|0ra@gU(xoer0)at_X|)>b4X}}26O}j;JyWQRT#(Cj&S+Z_M!%C zH0Lv(*4WSDig>-LCv~ot1B7%^ZW%x85g3gt1T8|&<~sOs?dp~(*ejSARJrN6PnGPoEKKD5(_tZ z-I@2V*C+;zex2q<9TJLKZqgc$>9N@zzY9GkQ!+erq|uQ23B1BnteQzps<=FT_2@CR zRK*j0T{%wH-_$>e#?kU=6jzT6-cfb^{eL*$E@<3aA?|BlP9DRc&`7cG%QzG=8{`9d zv=C&^k-w+Mtue2DpTSrEMVgAGJPxp6qa@=gbP3cea{GY;x{n&O*V?HPit!)2x{mfTO`_Ij3h5XGvN|wU5X^mDV;G38g4^ zRo8mZx#6Qzz?Wk$^_q{jqWOO|3p*tUP=6bq9j%Le1Gs})P|roh8hk_nmq!d0GGQUlxLQj z&$yW;?XF|azvdQ2)j}0CX2Nq6<`I_5Lm5A^;H8s(9#9rs4V-};lRT2RNPDRQtH+S* zIgjbHlz>Gq(tJ((G=sk8>!uLhfwel#d;wL!J5RfuT0H=m4`dsxSe89U6m_qpHS`@&>1n0P#wg#J=!~fm zO(%eqbaxfiYD`<5x*J(;IyN72*cPo_vrdFKArwmHZh;_@@=fBWcb;WQNp5GoE&Y|w zs5of>6jTkt9_pu z5g0|`W*a0TF4FHFH)jTND^v~2cAB|>2>?(X!KCz=tzgBC!i<@mvI_rM(*S&YF{MuM zJW?O+;aKma(7UrC<@(-g22V5;cb!;JuKDEe1^x%GF}t@qSF9D$c2(L$l-sUF6-sSm zCj2ekl^#gW7O3DjbA_JDp|oti|&LS;J+b>1A}% zrKANLx7MbR5sC;8JGtUGUBe~$r>hOPcD&O%>RiV+=zxs_HnJCa4F_j@Lp5weyWfI7v_XTm^tg_c+qe{rMPsEm^iAY@hRnH4H0~%d5mdC-a;^Clksf9^|qn`k5+d z=U1Di<28=!$oLCBYtXH%3!+rfCK0~2{BNW^0za7@G`j(;8)b z%6@YW9@{;noYQ3Pwf$W~N*$%WgN6pSF~H`J?D|l&gMcCOsCumZFZHGp+|lmMp!?k( zS(Z;aM_OTfSBzuy+VUNO4Y2&mYfnag9)`zNABGIcri%YLLn%vbgjku_t4295bKYtG zf$YjAa6Ff_S`P-0J0~-IC?4yivd#kzL?wGf;o_UH7Qcu8aKZ46We0(|UU$DW-#pMZ zil?pe|27Gu$F|?~?6o-(rdB%)7*$0kbWRFRJ>2`w_HEbHSxmz*TX!~{Xj}Uey|uzm zR{C3I)PQzj`s>ZV8e{v+<8p}3bRrkwrlX6|co7TL5Q+p~|00%13qgj{jXP#(qe$oV z&MZMoEgwQ`O*8%h*sn%~5&)_d%L;F@|1h#vVi^9u0Q2&n@#+9QQtq`pH1sY5e>jzP ztL?p>t|Vnv^O~Q$wp#TEx+OFX0NVbqg0sj_LS_|AWv}!vRjeHT^PwkqL)+mL_Hw3|HDc z3+9YH`k8uWZ|sS&A|>q{hvP0{j^X96xz1tB#)xjWIoZ2(f%(3H8<+0t$bXsu^IYO@_UXt&AyAZQgdYayofZ-Ip~SUUyXdWci@GTI7bGijT10w_ z>491j#^21#33vUtsPE}LA!&u59`{6|CF&sFTv+ueiKY4k);5aCUnr6MNoCY)Y^Xe0 z;_MZou}&ac6A~?R03Pk8a4f)qA0hm4xvg62EthveM&FK_2Yg_V(E^}*ps{J23@N2C zXes341&Wq)ne7nr5dd zD?uV6%~A)ZT{kIE?**PCp_bb2$d2%*iIWz}2_mEJQ=^jAFZSz_QiPPGYZhL7&_-NP zcS2FZ32)7$Scuw)*gIp@g%u1=AOu@*UWo!!%rYMblIN=J{PrlS`R~(hOPOl#RzHCk z%D%_=K6959vh|1ykkg?BZghN19y!7=6H?qGff$wFR2Qq2gE4L>=;QhH+}K*YDF#P+ zu3;E*Icu$Ce|7X~12g*+Jgn-iFp&UVL`aGwFwkwlMFqOH%egftI7Gyp0LtfWGg_3U zC6N-IJ+f%^Ng)bogq^f_f#DTbe;3n?9veXtl0ayez&?0^ zkmzuLk*R;fm4lNoMr#6TL)|rAxx#-;wcz-{2T)+GL5)6XV4{s($3p`d93a zne7pMzk)wY7N9;zvv`YvzZe9&IUpC553WX=4%q3EPw_dhaQEMpY*Jvtf5< zm5x%54=H%vL?g!#VVen8r@j3NzP^$DfiInX%#q#JCx;GTcpP`Ombe!d!YIQQN>#wv&Rp7=}OFN_bdnrezyr9Yu=;1-S%k6VJ-BUHZd zNnb|mZFezYG1B_Ex!y5UCCjEy2-ktC>o>_%+GmJ<n4JK302k?T zH6aoH>`6gEURel}0tB>6R3!QU$JZLM+`&EKl)aX>!}Ca&q9sHqgcaLuGCskNa^|mD z)~Uc;oIM$xraMFRvf>DyHe-CF@xGM^t**TF-}RXn6%Lat5(;b=rmH-|YICEXbO>&j*G#??yT3Il zsOk#&6coftK=LI=;qj6YsCg&m+B8AOE?!;vY~IJnZ|)eedlYgr zHiIOBDz*MmxY6_+%|IIaF!?V^7!7!{fJ=NW(y2;7#`c4y_k0T=(%k6oUwImg2Hwz9 zZO$}bz%ZIj21$A!oGeZP%EruXJ-Dfk8(k)d#ct)mJL<$LuWw&_BIqbgATRVFw=zBGCTpQ3Lk_1TGyED7UZeg`O%LlP0~C^U&ssWGb|;x5u< zL6lkM0smv@S{UF>HVlktaS^mtg0U@mgC;VxeDO2q!qkam5oPK7AHP$d**vr7bmfY} z2ZQl6Hy68DaB`cmdgfokkNbUwHW{u`e45U6rStj6`=Pk=;p>9NL~ChR(}X)fw3e(+szbw! zYY(Dd12(LD+2|c#KAGNE2@tH~r*j++vKDh+v97b03;Z9woFV4-2W}F_X34y(JJN_{ z18DohmfOPksH+|-)p&KoJ9&7;;ng7#ST*;BjA%^3N4!GLL(KYCI#nCs<~jpz=5NV$nvz)hrLmR!Y1_wueS|J$t&4<1 z`SCFXcEeMRAYt_^@~y#cFl2p+gC>S9D(4PvthZ~cUSF;`XZEtOUAU2FILPBR7La#h zoh`o!>_8-ISsFg6lOX<-_pfmf^w^7era*!~e0d!-)iD|S3?Wq-eIgV3q-dAWt`Vnd zf$W;@$+j+F)VdD*A*72usbM>!9AsBNRo-AfWPHNwy_tx0Pq1aNEM-g#1(wIQ!q{69 zT?VQeOPM@mn#87jk6d>FXkS0Z>_0=(!*SIoPw}#J&$uv|7GUA>zO=Onm^y_sJwCk) zI#5#2gX8ercl^u#q2+{qV$y{oX>GvcS{!EYH@YV;u^RjSG0j=rf# zfxau8YT>7E#^~JWZZj;?T&FS%iU9%;Z5Fiz0RYTmC6~RO^m5*_wm{;#TZYG%3TH@U zbp#*V?eK`r4i{h-84@K=1qn%0E)qXODpR}F(5b!6fic0pOk~REQ20}e3<7N64M$uW zXlN%4<73g%FKf%Xjr#0@ZnfA)vKv5=^rQeLldM8hL#MS23IL8)%EmPadE zj;bbw$)+dc{(7+O!6g}EckO}tv7U=;44nWq%FATJ5jvdrem*n2!#HJxQ0hC~J> zzI9y@YCuCvKB{uUt-)*gE*Y^2XPyIy2p?g#QqsQWdU~nv?MQbwjcOVL#cRyp-auJm)dz zDduns6#;wqZE9Mn+IlaFulsU!zj&PrJPSsc0WDcInUHbXPx4gG&!b1>r$8%BcSK|V zU}VIIYf@Gu=foV+6*!#0+Puw^dj+0F&UxsmZIEZnvZhXzJ20l;q%PQ+uw>PT3aftM zG(htVFe$_jHGkL2$%+|;x^U+2sxjA~nTyA1Iy4X9)!XjpmPA{Es)0`v*OSo_^CIxf zAl|Lw2DUFe^#1v^rI6_Lxo)NGMj7c--DsNC=&Dp6=3cl(Fe>fy-Yy>DWS8#cR;BgP zx7m!$ELhs6MtZZHTo3J6)^EuvWX~oY-i$oJbCdK8DsC^H6AgaQa}-n{{E%%Cmc z+P8WjLZm?IyjL0?%O6fPi(%o*$}ys3zher^WG0p8vu686A_b_n?`kF$pA*{V|2E<|C(1eSVLnL?y^Bv;1wK)67NYK3ezxziH=AS(BNcDQXHZ zBVid;k4P(?#v&<{h-SN=z@@11F>b;-3!mQ`xCPBO+y6P5l1@y3EMubmI zqpw6ydD-_03E6oxst``U_0U7(PPu-b4QwoO<>oaPjSFSa{qSZ?m_5!fSW8V};Cvfy zF%km;h{1=Uy`YCCE&^p87!fHJ_Q0{Lhk>*rc7OxR5VNIo=OT3%PtnahX)Z1oKjp=S z1CaZya5fCTJyzezSZVWFWS9E+9r{BfiI-LgDQnoLz2^tAsUecYx4Xr*HU5C?IDD`B zQ|#nVy#7ve4@zyS+o&vDAHw_b%7c74JoWXdeJcwm2trxt2<*f7riH%$@rGokRdc!g zb#9SzR4Rr+kx1#_8^&;V1p8a9NRnLWJPD*IrGvl!qvo*zAb7!4krG#`77*a>=+M~- z-dkYfjV!Wqhw;A+LQZ@mxXJJ>U1L$^vsRrL&L@BvMsS4I^Z$ZTI*MJ3Mz zHd))}dfT^oM)ImXKXdV`1nRReBWG2!BhmD<6Xfa?bPiM6NiX7b5jv*3=hT|PRe^>E zLxYa{7|F1)NT&YcK!de8zm>x`N-0!)jn$GTCCi_Y2(@$9Fc6h#njO{NKP(WRr=W`4 zG_~wP!wR-yg~sOccP+Y}23TQ->7>q-9*-2!S52RYnEa3h)bvQLHA-&;GG9cG3M5No zSFom79Ksm*e%)&YT*TnR9VpQjrP`l&?FKnScBF9Z;%ggtmrie|EAxu9F=OSiK~_l2 zv+w1XLl`*ypTg!j4OP1c+7{IVE2tl)`$tQ9Oa4TVv5FL|85madq#EtAwN}KAx&Cv_ zQ#p-LAg~E=tbVk^dA4N)ED(NlD_4CVeQnC0vr-4!_0ezn6zH5dnXIx|tYp+otI=2} zp`89Cd}TV)RtB`_&(G$JA_<7sjz2y|hiycQGGip z>qu|^QwhFLZ(7T?(X($4QJu0)qb&YV>iAhV;!9+K z%?Re8=7|rPLNwF@h2V$>SVaqOm&_FSxvvH0flKxXqnCD~Bx^m0( zO$$5dQq}6dIe|Yq8T+lH%6+v9I77$#hq`*AajoP=OnhE?$kij@k&ysCVRbLChXpAz~+9<-q3$&wLCoh6S7}; z7Jw4h&WO%hoFG0NfsT=L#Gxe(;VXwide4V3b5w5v-@I36giNKV*_*PwE|mU8Wa&izvrdS`GQn^gV>@y2cL?0TiZRL zvzlxttgH<(sg$0Y?7);>a>NCBePS3AmNi5Uk)ozE(ty6xzQ*a1XQvlqdUH?Kb!asK z)$Y<=I7Mm@sQ{pb+2@@Dq`cM-3!YYYqybh-3gQoP8-lGLl*D3cIGs5K$HAI#F#_@8 zL`NqJYR2DO%TKe5i1m)2Xe*k{SMLblh^uml^*j>-eq|yNe;T2TT}z-8-W_+{uUtnS z_^yjd*8lQq`=kfT+t9U7HAz6C{H~w=0DveG*FBIWRsng8Isvk3U98`xO%(RIAUz@Z zKHHIty+7zYv*l&nOg29FAz$PktD6ItNqySBnAcu#x9*ZXk|^Lw7en`tq101a*A*S| zj#npn0}YU*s!VqEMouoU448>0ekKiUDq9)^n#(`E+VVJ6bKgE9`bAg+{z{;0)-f8Hr1uN&a@!xFBGqQw4)O>2*R&@&b^d)nEzmM# zuV>S|!S6sWS5LIHqRcc2oU)hIc;e!2W?umAzGr~5tHzc!MW%VSbSKXu6a00lGllez zq%(nZMfBUVYuy{3YXs;?ifntX<%g@^Q|?~c{#g{4J>8j#qB;O^Nj(XA2r|iWdYPS5 zszSNDrXL7~9)5ZIn7!o2nSHDS$Qu=Np$C-eC1Tow9kfvE5Mcu}%j|sI1e~fDKZyW4KzByE>txq7#TrVi2siP(~nQyR_)}Byhci{u1!AQ0(28sXE)QS zDwn(f!~95PDLr;1ZI?||t&_gftz1@qXu-2WA3GseHI3lrzm_Y#&dn){gej!g_&5IU zdz1XvHUYA;{m?VwyT51J8)_d6H>wTKYQZv7v2$Fqr4br(ylaf%~hK2-v z+Ak8r=pE=edG@dT)GZDJS5$vNOW^0~bnT#K)^G5`%Rmp_{TiRpWldNDhtjG2sm-aq zH{gkkQ;7pBZVNd&pngwLvw+RviP4Qu&_Sty7T^bmY}Gh3!0CH>feo1D%16K+@B2sJ zfl7Ru(qBzd4KN1XP7L&cN(JIIP%?hQT}(>ep*Ol4@%)0@qZT@#xwi-&R3sK@>{aoRQuc}hLoAB)FZcRK(5vU8EVoMf-*I?GC< z^i{tw?gV=oPmdb^|Kc=!UdxSju5R61Ol1inWNp@J8hFrx97|C$@@X>=9mY%L;0te; zqk=x5blY+{;#vMl^j&a&$N%$GmJz%nCCoAR+uTT;HH{zV7VZ3!c(`29bp=J13AURiM*K17!+QXr3lSxvvf(2e!=W zf(F4o^godx>}SGl_wE^@v4*p8p#G#4@9#B|0|3tM~JN@0`ct#rwI+*VIEd4g)K9NcVgYu%^dnk;_)(*LE4qAi$?Y)M-)>Dd4l~4^x0l1Kx4#1@e(air@ltDLtcH0 zMrQ>>gCco3n2u}Ql@4<>c7X@>ng{aRUxwkX3;k%Hjj4(lS*PlRQ(~5}EZ_?K+lueT z=w>QQXJmgKj=3Fht)|{_ZK#Ln63Ey|u-dVNlyM%SvDR{Ok{sldFOUKbf}S+5^pdj< zqsM|cS{1-IMd9c!y#11-%T%?TeDL1rc<4zpX%!^m>;Ldd0O5epf zZe{!b5gZI|z*4&u=+i*M(2`78C=D^cgU{xUcD$mc+@R2wsM2QfJ0-F->2pE6R`=00 zelGMXZ{NhBE;(FB?~6GE(>cBL`y~eY*%$Q{$0Q%xe5j+`FLtFxQRRDhfz_mP?Pdp? zRjxR&wqe_t+5~iuf&}FT&Ck2H^el>M68MFnF=HkGP-g_YyYm&cIYTy<#!A(_aT8CdDcx?Lzfr>v(St{j7K8(fm;YU zy>I(hXRqZkVMS;?mI~|7ql6(Vlu^`VaoUNt3;@uRI$r z7uUwNI!`FSuHoa5XEx`wq3*ml%hNAg%p#qf|j}jCn`lB5A`_&Ew8s0KmVtJDIen~F;E{*+uMdO zWY_+KZl-eFAv4uVIc~dplBs|hJ>$^jzKq@7aYb*}!%7$^xF2~npR@|_{>w0czLVsT zLR|AT^w6|oA5EP)fHp4fWHs+@{iO3iAEXg99N?`EE=}99^Na8RWf<$0xGkL02;mQ#KH^IB<`C<5{MP$ZJmBqR=o*@6v zCu(y209-kTPZtmWb6yI&8b0fv11uaH=qmu0Yy~d{!gi?&KX|S&#~46$6?p*L)kGX4 zn+F!pSWFzPxV-sKT2_by-duTc3enjT({Xr9dPsH9)?EB4btuERV2l}%nt8dK-QSCFCxo7bX^I3`^)s4LOtbyRQ~u2V`xR z06xv>4Vk-&Fl%=#rpM!vAXz4c2P(255!Fy3d&Du1qECsKKc*hWPB2#@g(;>e=k+i4 z*}k{pVJ;ts^HSqZt`6mwy7FkssW&!Yt9f8q^04zWWlS%0Qtm6Ujlp?WlK64MDnse8Hud8fHL)0Z=R*xcWwxW&v~g~H=?#+tFOH6y`4 z(l_iG`3Y7??2ioJzE5<*+i0($* zq}IT6-Z{XHIP!MKtA+usGO74#2Q#S6MP-D)#1r4yXHWTtBDKbfpK^&n)Os$w=z`KIVf_;9Wl*ptp~d6DDDB73YcV6 zzF;RZShOjxwng>+nJ0z*N+f;WZV|Ekxy7u#5Cnv&@WaXrNiCQLE@1I*0B(K$EwwXG z=JW6OakHl8RH72M9^)5U#?NKB ze{^0wkguArO+-|hnsWh;I{?HMdV&f~U3UJ1fGBGbqotyHL(#n0y#m^TSOoIp_3MtZSyR_%Im?;^2Y6Zt=$Tn+D|KrCF;03~Vvv$FVAWWYDp+reZg*csq z0W}P%B@LM+g>>S1_r=lk+LRYLVS%qV9Y&8a$Ov1gBn-TbsM*RSXC=@{Cd0XAH|*86 zaf8y8vp{8%D9CsI(8NVz80zUweQcU>O&}_Y+UuDp3_UXL^IoBn%4VJ56wV) zUViJZmz@UGi%nRxal4FsBD*Tbe!*5OCZry)%C${DG{@e-yfRDs$+W}%7)2fQh2o>S!gFrR{WYKH4@7xo#Dpn(sBqhp$a8IT?_--|EMv9l4YDFj zDIIy(VxSrw<#9rl9lgStOPy0d=T49 z1jB0UMo%sHGa&?e0b{1o6DA;+h4|*-k@cSd=T30AZFHmtX&I*7;VjYAkJ+n)>SlWM zF5oe?-C{^U1Ib`c7!(;+wvxylH{ub=KOVvKVIuAe)j`0}cvJ%b4{0 z*`(y`_6gAY1B)$hXwn$Y`*c`sp_pn!yZmo{*h#h#To$Vq0BtUfOXGU#AiYI(|Mx0{ zdtZkQ^#|-;f#)h-2{)!;k?{@Yecle1`^u?-p$lzhU7mfebRyj9-_(~Y{2iV*P zu{SoKWIF5%A54_mj8tlSn&U{A!5FRhK&VL`3OX?h(`^yhXw>k-M%=}sYaQLy%x?Q+ zLm<-pFbQjIMN5_khz}Qg)f(E8%U}eu76n!_`uY?uXOQ_)ve`YbH42a;r3C@TnP!y5 z)*WK_)V3pVoBpCEF#_;jCZK6+`5KTLlm*gmJLIZl)Mw>$*W<~2Faby)G1GAZ%`8%g zw^)fa%7?~R!p@z8k#l`!qt9;xds&%j<#1cutYwGBDhOr_y^DONU5oSFUC+T;$NzcY zQU7GA??%&4$$A)c7u9iUT7rjbY%VwPwKTdb#ZXOg9Rlwy5?0B{u`@ zMOEv#tJ~d4x|uIi(Eig{#Vxh$E=L01g(>8^ZJu|p;(b_QN2N7^GKchg9BVL#HcgUp z5&m~!-`KE@ed;5IRzUSxG;ENxIRl!0s3NV<<47&wNaK8mu_D$FZSTg5uOWH!=;ckR zW``1U8tAyzxQP@u+QHglN5JVCIO{c#^QwT;VVR#i^G^ zQ|u2~&HaB#4V&{V*1~O`-=q^0o}b}&+cT1VOP{s#9A_pR!}z@ps<9*-hI$UpQ2iMd z)Ia<~tf_Dus3t5kw}r=P)694l#M%p_T8)h~Jpu6Gv&S_|{)9?Ri4z8p=|xFu*rwR}NP?8X;Z}K?}P07DjxyJt2|tP)m=7 z5VUcrvbjwqX~-2@Vqp2^gSG3O4JS|dh+l3IDY0_L4802mr>z0&tqJjzBsVzJ>Z|#x zqN9M<^M{Ta9?y7JbE#>2pW!!i6X)50S@c&d&zOC60sgh9xDOEH7xNe+T8QMVKcGcOc3)&(m#LgP@)bjA3Tk2H>QEuNznv7|k}Z-S*Rn z42|orPLH)zx`G9Ott76da7-n?*0D?7LXRG9t3w1^PIMosW7?{DVG5|9wt|66o)lZQcPs zL&2W^$MZuvVk|J43D&Q|A3FC&)UaNyFGJFz4;sDw6WFuqjP~cR{$^rIoXh_ui^^}R zIxbFz?0a<^j6>)?mHsN0D?}hZ`q%EyNpfNTU!pUKJ!j*rmY~I+CLO&3Hwd2Q3$8FJ8A!-Qgi4`2KU96i8EhjT{QEU zqT| zS47SwnIPnzXREUp*Zf+~=Y-Mn=}N57$--)4Rr|5iOrFCarE{fJyUW68giBX+MLab} zEK6mfpYs8=OC`#518}Lp`YIBZy|TJzzX_0l$9!18v9b7pRducv2q19GQ{*arYn38g zV2K*4-Qp1o7NIzrGj21tF0`TL6~r04Lg3v6( z$SYlzGhBI;-p+%)*DM5(*LjKS)0tA?v76K6`TPZF`fje}&qsd%Sz3*LG?EHuH2N*g zj8#%d%sJ<1!J(C;1sK|cKC1~>&fzZa9>T_Xn+F1j8?emekkO}vv!VAMH3Qk_e3tuA zSNkaL;%-~+J}Z_zP9MD=V~DbLe;4Jf+qjM>!%QH4*e_r z%cq^Q`jo?^>fh;qcMD-+*=$begV15upJu!tc4Jgu&hL1h*o70;*dHACbLT_H1GV4D zS*E#fHYqGRn{62-Jp3%QJzyYTW{Y@uN*sdEnr#}wm0&968LkICmmH*S7uxq>&OI%Z;yp|EU>@=;W z6(cNfv52>)ps-+hE-tDDG`(c497@p!IO-hE zij^o!!NH=2wCameXaL9$&P2*rH=uj3r-4pilh+7}K9frak_4O?q`J)CuA3MlwdRcU zzicX(du?u_0t*+~aLGoYS&^wL#!D59+SES&s5B>>8auh_$SC=uK=vJabTcL#<7jdZ z5qBMfp6GDReeCz24)wbQxvOnOR%Vvkdh+Ah@|*{C+_VO|BThB86Z*WTw_{b!`BMGZ zOeyP!KmgVmP{2iMc-=~UUS;cy8eu~L8sxio>f=Mnuczwu)?nW53K~i0YxWcfVa(8@ z<<~`sh@?vb%vSdY^T%#ZSiy-NvOj^A_V-$Ly|OYBauWxcJ)3oBuYOY)D7Y>U@}>SA z+F>;EG$|8B2L~k^S`43lOx);Yi5cM0GNTQ=R36(@YYyOuEPhf-f98Dyc}^iO3E++^ zl6QHGbMU(;nYz|>u*hTym?l-SdtjCN52Wh}S;% zW**1vK6gwxthd`*vsZ2oa5%m47< z4nhJ!>rTl&h3la$&KJVW) zayRo)t<8IX-Zl#+Bhf!qz{W6#anMrqIpJ;+z^3_@ZsosX_Oeb^^6d!?eU&;pq=nDn5CwQ$hyh34zlQcU>#9W-T4=$M`jI^_;O%!DwE)!=-FV zU$&+dRTK$#l&laFU+A^Cr(#hCo8e7_ zlYR94b_6GAJ@mT0SZy7ymv5KaBa@Oe!cRPF)AfX#G!g(U)3`6lh-tQWG5&C{#GOUj zSyB(e6(4aXr!tHIZbJz|4G67-4^Bj>3a05Kp;4Xhcqu&>>?)Ve%qhQjTrEamm-?L6 z@8l5D$ppk<5FtTm>ml%5d^j}FkTAUfL@#Q(M%|H1g|U*T;fxx^V#?uR{jfj#L@s}I z+M2AhvxVpw_~CIZ$w@J zz(rOM&09oUcyT6KtBLvt%clNs3dE&#rRrNJ;~KE8dL*~ zGn~t=k0X%@(wVAR<^w02V5KvyHv!&KN0k0R9kfR{v@fJLpUb6WT0M^NBhN z?b=vXri{LkvTmvnNA?g=)>DES%By$wB8@^#s0v||p(k9$$lw>OH^>{X zU>O8*S<$q7fwK(!mu+S};RF1KeY(JlDug}l ZXu00|d6RcFA?xl+0Flt9Ccgjx00CJ5gp&XO literal 0 HcmV?d00001 diff --git a/data/sp/games/reversi b/data/sp/games/reversi new file mode 100644 index 0000000000000000000000000000000000000000..2dcc36a151eec86ce5096d41d89866d48c5b42bd GIT binary patch literal 3294 zcmV<43?cJNP(w>B6#xK100001Mv*2LLXK;4&&M|GrkwlV(-T=VEG)iy7TWMrBrqpw zibZNHS)@`W_Ufn`baCe2&`J)#KD~6CSMjML0)0xBRB78jd5^TnlBbXko(%Wc_>Lov zhR=rOyVy4S5P(hcqWrTu>0z@X3@}&158}HrGeacr^%C^DLEAXgNNy+!$?Z7;hXX;}Xf4t2@!zF7=qx~?7+x}p#hp}b!TUwZ=+oyV$>U#!*~ zC}lY_u|VB;FfA%X0Ai74>OS63%K%CE*bt#i7VKC3h@eWlW#Wy1uwH-JVL;K;z)c>v zJ3B>U<7>QHSG+UCoVb*B9Nm&kJyRR79iM5lO>FI(HX$I9*LsAL1sGTZAm*Ft294x9 z@`}+v?bWGHc3WY)W=ffxnx}Tv_rL&R+Gq~6&-L+rZcpPmaNsl*{1c!0VfjQ1E#Rr1 z4(MtUE{|)|+Z}m3xV`i70J~9F9))Ox>{Ydgui$5A%}y}4fplbPs+bwic1j&WnpcfsJH#23`y%JCjKm*IR)N&dI0z$lz$b z{JUnqBubyp2VEf&P{L4!*sPJx3R01^0#6KEtQd$PACHhntSqVfZo0nuCV;8eA$qR_ zY>-*}O<_;jDKqQm*#6BK{r+aVT-Uu9k~97&WGS-l+o@jj?mj@P7%Qa1w=%&@FKC>In z#a0I*LO?acqmP3Eiv`;fq9C-|=V34|-g(^?SCE(7&{ORMGxc?j^??hI{h=H=ah@8x zYXJgtG4df&xL2(}GSL1?g#LWUbo^RCFnYsk_tehq*BS2NEO2r+&>e}$&|1527g%9T zFng-+#tb39I^~_PAX_n>q?a>A3Gq{lbUr>~u{|GO;|Kp{giDz3X(uqpcSd7VD(hf( zcyFxv6HkxyE+1yTD9Ce`=Mh?b8uV+SNWY<(yYZbHZyerF6RGO3*!*nO{Hjq`c+oJO z($&?lZXa!lB>f~J9MNMLZk{GBle&8^>F|oAful~veZS5(_?Xv@BU7JsnwO6ZPciI2 z7l|E(FSYHf9_Tf@T{gMUN}D#QG&_)hT-jujQM5TtjHzy}CL%Nas{%u2JK<2eJ4!y&t-PxRD2D^!>z#4aTQRKpM1k>)I`& zpZ}%><{qvuSY7r9BxsAhj3j*Lx>e<*JKt3dx;;e98Q`j9v8Us7b@(AX2F15!dTWAVp4{jTyyWyQ7A&h`b+l}4#>K) z@-Rb_LoIA@>rFX`6Z7Y}u+RCQZOO6fH4@Z@^go0URbP!M|9vvXK5|es@7_0X4QYFy zkNF3!TPjV1&L<|o(&R^r!z)t1!~BgH3aZFns@u#vX{rlTa*QXxZuz6beU?ou0L{V7!;4%%jvT_kk8;>RB@(d(R z{PcfK#%JfswDP+xf#Y^wmeANU9OlfT`_~<~BnvsH$Ok*uCLg<+OK7->#`}_tLAt}H zGXYrFHezd`J>6q%tUDKI?{t&|=gC-ahQ59+Il}_GY&N(=IwP+|!7WOCwvQ1isTV9y zTyk+Zu3ys+t}ItUPPpnwi+pQtcb2*zLpg!f+i{O-RwkCAi^PTmM8{pLSYFQW7{9`R zP#yWfvMBeUeHCxalcqB2oGh&YfQ9t#EX0;H`t!X9mbdG`ivvPxKLl0r6P)255 z>yAu`l;I#;?7#2bvNkEbH5(-u@Uk%M5)bu&W*>Cirx~HX+YQ3WV*hJ1ZzEtG%ME)$ zsG^VD{@HzyW|GDF(i%;%GrZ3zgU68^>cJPv{}BPzP*rGGaU~PdB_-vHu#U*o!nk`HT%^rLAabzh6;MSzp1EplV~M?5^27NufTZ7%BU1rNV2e44JnrVrxd{_y*thq|?9;2-}M zqvy3exa?81;nAxeQ4AGumdvswJ%As=3&_3g){4p6dL`3j&m4n@Bd9PYRCjjClOx?xo6pFgT2on>$qggIaM>fWevEuTjp8~a{Btt^E_w9 z;S#q-2bJ?Y0ZUQ9xFBbQ5WwK0fly1Qx&5ibV2h!+bm0I5slO*wWwV^%Ex~%Vq{!-y zb0U~rCA*+};a^?=xFplOM_nV{$J+2Z8e+?kyHZ$ASPEuB=Z-?uV^VINrDDR`c#8}9 zpqoXui;KznJ3Tim{t_sbz3o{pnlVw59qonJLjw1AQ+)AL`x$Uppp{ zJh3oAYhHd`1#~80G(h;S3Xq?xtj)0*nG&l-G*btzn^EAsEvmGl#;X&D(Oe{Nsl~G< zjob?hA_*=(k4z7j^a(RpOf~jv*1_dv1N)Hl13HYUn<8xPA;7UE2@+Xdu^0%CorCQ~ zX3^?xk5?vz)id?#IgW{}vSic%=~Xy%pJbMOCBTsm3QyFvRIfZ2eai2zTukJAgv@Me zjLOCRAek*Ol&x91Q5fytRicVOPcJtiSdt{YSWvdg>#gl6P+548a&gTtwG1YU)!WDu zTiR?FF0>KcOhv5&n3q1SW|4$gE%`1YyVoQo{i^)_1w?uV^1iB80hso|a&*1I#^Z() z|CZ-ZuS+V#Y)jFmhRkB?tUAse`7_p|U%Pr2}KOyG`^A{YN@lL_3JpyjY53c(-!_{u#R>=z1CvNs$eO}}@}Fzy!q3g-1pf|QD$GaQ c8s0f8OUx@y~yOL{NR-v8v- zvt$Y~bFoY#x=lYFgpw5ww}^wsLQapB_*UP*Nq64AWXiuaECOy(dL&btzyQ&)(|wku zvY{eQH1yNYI%}}4=@X~X0gfPj7gc_nozhdI6SdQ5Ty8=@b=Ct-^@St5hXU86kqHA) zMi!iJWziJ}#h8-iAlq^+cRh8(X7%&O-0*Zdl^yAG8zBVJ9Pr(^j)BfwEYwz9?TWuK zQLEU}Y`JKUUZ7rrhK`?3DGLA<&r}XP*r9FUHUv)wQ{Z}U_$?T`^?bcY0|6)Dxj&9x zv(SKn?xX8AU!QTav_+1He}2U(dZ6EvaPXsq>$}3#B`oX>KZ@XIsRmXK4#uCP^X@`o z4!fH~tOCu2yM`DWMHo!l*|mxhvPPvR%ejmfh>`V4cl!cGj{Lq}Z4CVeT2b0ei}dXP zdBU(y<^QT<)0jEfnkTGBm9-4YZ6x>79Z__64mmn`IRe*ELm0DBS^8Ydf>rg)jDX z)7KN65^`u0TosBNcuemTS@2CqJ5V9g?a}y@`Fs!OOU-jV`5(SPpNP}tBA@myZK85r zvDT(d2CRVVxRqFxf`@2JZhNcWV#qmMnba)fym{(r-P@cEItJu~q6^ESch7&Bv_hsN z(Z_nhUH$gTbx2R{wu6EDdYrQXHdSLg?{aX3+%-7R*85T9_sP`XBSbLz`aZvVlh$qmymexGYg zA}RcK=~@Qtfm!W%LfuIbL->dgN%D82t9&b0W}F}Y2{F;&mVblmDbVCnKZn#f z$|(wEsHE$;5SWuTQ#_$zAu4Azx}!28*g?(N?I4^-GTi81X_agZ&$@uT#SvEfWB2R? z=@xxiVme0SZBl|b?Rky?Phdb*R=4&esWyA^rmy;M10*1AO}TUT-|UwXuNP2$Fy?oX z$*rd2Znw{guCPEFh_k&l=k^W!_8Ls-DVlAW_p63&eKqeP7J%dfHw|EVa$;*>P?^LY zEywy$yXy5iu`v-J6e#Tjm)AFH=swjN_D=4aF^On~>mj>5UuIwqW2bASo2Sq$o)*#E z)(z!Hhs#@FzThY+TSMFDVk`ClrKG8Zc0C8PrdTqpc_dR6?<8Exm{>~~jPq)ZCI1Mw z91qSeJ)-+H%3;*pwgIVyi}-XKo^V-53Y$TSqS-hf(yP{g$qdim75cMD`H4XjrU4S2 z48|D?DE&XNFB6pDa%9!`W*1-wSt+G^ZC#cqJjHLVwb_Yh3muX6zzds7PsY0IJrF8l>FC7UpSWpvYJa|9?AtpRT2*$A4JGP?T?!TA#BC=DMB znD;aTap06{1_FX^fUlBH4oB?c z)j)obwr@_bQ0u0?fkGL=)DTqj2m4@KJ&|wkgj$f2^+T?DK|o3CMmw>JZ*Rgd;=!>| zdcp=nV$0e@jYcjw_6YSi(AUDSxUb+nb|F`BB|Z+<3pYScVFTX|?(%%QdHg#?=(3)F z8Q+;XpNG9Z!Dva5HFhn<;^9!n@TZPo>rjDj}X&JHO-3&Ltdy@pKW=96V~i z1;<1!PLtm{q7s9Gahw>f6EghjF|_s(SqY*qCMY?^$(hyZeK4YU>3L|QH*Ve`vfS65 zEXHTtGG*D0%v4O*P<~_de{JOX6MKZNb<@%0ds~VEWEDqgWw3PL?QdOXno+F)P4uJ^ z=g6y{G^c}$9;IE8pNGFhmFruhFw%U%Sbyn6)MRROgX)_p+Q=O#&V=dRK!Zo!u`BB& zp$>0;Sz=})WH=?{w-F*Gv<1OOQdd0Ew71Ep7lKBdAiL#eg836(B{Z7** zdl2EP4gC!%4f?azCYVKp8FkM)T(ZvReXl2Pv_4WIqm56-KsFyl-C+bi zXQGCc?4h{%g^N$fjNF%n>43hcpNv4AtG<=wZT9M&Tin4aKQA3-yEx@KJ0j5AOZAcB zt(Ra|+d~AuUj_^2Aq;}!l;~0N4Ek&0&f}}ndbxEk*CKhxBWxkd%In%MmR5z0n=+oEUxO>uux{2e#TW2zV8HAfLdU}rd z@sgr*#T)29p{MJK>w?Y$X&TSa2ug_%mMqLQXs=wNOQF7O5ne>;{>Py<^32I4AQbBh zXlpX2BFjk#xMen2Uj*kbFv~O@cjsA*us;9BDUU)l5va#Dx0PRyKBUug%r5){ba=l+nPUd1hBWBI)aP&VMukUAx>>TDxzm!7A?t|x>qk!b$Mn{bEa zB3|PZ_k-=9Pvy|q#xIy?2SvIwKeKQqg;bYaaFl2VHwT%CZ-U9^SB$8U&G=cqO zSyozzZyyzu%`^$3zY;6+k_&p)LB@pH$M>OvnDW0_Vm5pOmgGx{c5-tclaU)Fymkue3 zq(9s5%{<&*Vxt{uZ(Z+6!LRnc^%>jDd-CGJ89af(18tJ13eEr$Y697f5>at z+442khBB-etvI7Spj*5J)rhCsE)+G*Kn&9gbZ;04pKh4seTe4#-O?=zS zgSTvl75hkt(CK|9@C&9NVIy)c_N%XzA_tD>=iMU2RhYdm5pRMaN?4iLjbt$Ds%F0Z zdGdEPGnO=FDjmI~t?{g==2AW?Oy2ifl8sC67II%3mn|W6AUw`PS2J0?~eFHR6-7lfM_^arxtzy zo8uEFIYDcY(C&K0A;M#F!{CmpFoiTIzViD6)v76jRn_8o|NI3j!u>RVx0n9yR#!5l zUEC?UC;1$%@D}K1_!h1dE=;D{FtE~cA+yX}MxAlAo%4niEAlwOC7!#2Vy%>qGq8+X z;3$_Pb2#z?RtHWTh;1Fnbu;( z!)C_(g?2VD3gFfup9Y!5O925={khIFuvPcYEavcQsq#N?z)?zq7S}+^D$G~4gXQzt zeVMoETjlelW|}t53=YR*-Nri5Y-v#WBq5vQ`t# z5!-bOx2U3}PC%k2{pZ2X0sm+r`Q6sg)>kIzM+vLM2UNl3Sli?y1}8H=M@y)~cJYAg z-E>rV)F5REi#I>dOP7r1{kFgBGTT^-fCIj1^+ zh{`zsspvA;EQjRO1B+YY+7bemJF?e>R@(u17Z?Xe4wn6Xi8n(o*x2KsG@)Os@yvaX>ZwBpRdFu?^*~iY`8=A*ia!9XE~XZxtXtxc!HfN2j!cNLq}HV zj+4!!q*A_-D)?H>AUu)1JAr;;_cK>iC+pka`cA;$YR@HmNe6zuzpX(8Cg=VljRRyiu9Coy#dD8q~~aZgEnnRo*ZUhxRGOnqVXGJL4O ztk8X`B+tGk$6Cyk4`%b)LBbH~!Bk&qX&@lbb_#PQigmjULq*-5R68skI{C~tV~ICc zyhU;>hE$ry_6K*&gVwJ1sr*~G4dpjwSNkJT#J`ZChbon>wy9C=guRIaF`wXYA1RR3 zNiIS+05Y<+FFbgo1khK-l1KBQj~7TgEEtWNv4;7$q`@(Dhh6`JGicBl4u_s$I&(%1D{*9v7w?|OEn#7NMdlsX7y3=93HIXHXd6Bc+57Y zTDNk(=nKI+Hy3^dl)*XpLP}o2=na+P?MTO3hAI`4AQnSJgCHs5qkR(XWu6tT-&@-r z?D(4q*@jRxW_@;EswGJI3Jpt^5o zn0)7B=Ap}4LYJc|U{M9+r?;^vRKW{{VU5@+qhzEf1qv>61EibKjfC)+so_mTUW}W$ z13+*v;-`}OtN0|@9f;&}>bZYgIG{AgCMr_BZIDS26*Jx=y? z_6GMO@M7SX+e(svj*2dny2d<2?pA-Bl+Gyf&QCw>BV&xqPLD6-)3PS9veG3{mUWL9 zmiT)Y2^p+;EdwErAGcr-tfWw1Z>NvgIdPJhQeILok6by4r0%A~4O!t5i&C|MDp=ub zCUjvC;EgnAnId~oKPNK>v;sxGaz|qiOOFuiZXOaqhz8vx1BdPET{PnK&e7<*N?uCTEah$fEN43N1$S-u82CrWm3(4>9n}Z|XJdmxrsm)SdtI_@u{-G&1C!nVZ`dps zm>?F=pZ5R_LP7V!M$1fb1Om~4kOPiQxpFAlQ;3n)B zYhvFg5e*MeY+ta$1#~FDjLTxP+X49sYxAV5!yLj?`!y1GqlDNqk1`rjmN<)4^tWvz z(Icu^ryB7d+}ch$@Op0NaEF957HSVG)&u4`x5)lN$ z^&Uj))MO#sA&>(^6VQK2AClEm__3p`; z6hvC8UFtObzCFDnho_d!(#+pWHk9`9S@{^}q4{w#M~%}lWSa9|g*5nQaiHhr6)P+) zlzCHg{euWJR|kdW#ZmV)!oz}wi_9$ItL27?W+-*5T`oTP z<_i@nN6}S>nVQ1AsNJG)A|p`CbAS^lgjQB9q z7Zkk?(PE9nCG9f5sGBYq^L+kbM6qL<$7+d=RNNbuFMz47Y;N`KT#dAU zq6HIwbR$=`*R~W@ZHa(8Tk{yV6JqO<9g>D-&Q~0}laLfS|K!c~djo>??v*y16hcQF zQj;E3MG)y^KL0CHFq@{1*r^e%^rnx2tg6U%DA}HppkYyk=3$~2Gx4r|9P2!qH+jdUr~`ai0?LKRlL9V_{N8o?>E)^D=(lpiEx0n(fIqF>ZC=ALM6{QanF`pf!@c$^V3H;1re6<5 zvAn`k+f{1IfWdYk2hCo9ERXqXbwki4iwmop6h3POu72G~+0(N=qRvZ1Pml-M^u*J; z19=GzXYP^9q;bU!wYPIy9+$SA+FctN?}p@xD@F=a;2zH!e_dXbjGkN`CDOmk)3H*$r@o ztET(mUmf(>7VciQp(kfc1wr>`Fs_=IgU>K%#)w+j*4oS!jbQURsk3)Zg?O76w!Lffs1+9eNr zr(Z1Xc^o^sdL*0D%tJg+7qc`X1dh1C2dJy=F*Vp!aH$xp@a4cSixBCa4<22IKA~=Y zwe&>gz=79~x4P`t#dq1Vqo^35GcF>0&3L+#8&LZc+||gGQocX#@42d>pL?fC&FpIs zvNDgRcU8Gmtu2ZshzNQGN+Z*v_&tM8s`QFuXTVNHnFY!%1}?1+chNru)WB4uVPzw` zR)*Pvf%d)&HK$Qh-KT}$p0r&Ry&I?YP9_!s`|R;Gsfg63{t&8xTzW#b$$;78F++GZ zMuVKnaGkbm)(>0DP?n;sC2o<^hp?QNAneRQ6ozP&n051Rl00D97#kc?f literal 0 HcmV?d00001 diff --git a/data/sp/games/xonix b/data/sp/games/xonix new file mode 100644 index 0000000000000000000000000000000000000000..2706da9bbc100f519c40fcefba6d5cfb554aecf8 GIT binary patch literal 6481 zcmV-X8Ls9_P(w>LHUI#D00001Mv*2LLXK;4&&M{>g$ehizQra^ED(St@q}zAv%ul$ zB@_<@XiOq8u^8Do8jySLn7^kKixTBj;#6Wqyey?~D{A`N5tJbN>}eFrFjsTF4Kc-u z@nELdt(;pdGpp5jwR3Z1P?3uG9d8zZjAPEF(M(XAT5goL1X7)&0eihp1;Sr$AxV*W zh?H$4!P|6J)~6q(bu9rT<9ax#iiPHWt4dtx0ZyZ~-KjKw;>Q|d^6t#FLQ7J8V-0!y z2&3!On7UW$eoeQDF{0{5WL(sP@8Ta-olAhdR~mtjCYkEa-CaG7rO${CfLk0hLf=!m z*U7f1A-@~ZUU<{wR$3lQ>w3%qei$9EEmKsCRBgw%jgdLRg=21~NYVUpa(22Hy<;%vNxNl!hjd<2cz0 zDLk^EHY4?U3jI`cdY*_xc@RF7-PPsHPO3a8xRtrNu#}zq&Wr7{Q7V>)v(rl73-iCo zy*cB`v6X;oHGIEF10+;DusssZ zy+Ou^)=ztCJa64bk}po92xM7+Uf(dbpVc(_R_n(WkDc-9uqk{etsk6I2WpkFf?dd2F}gvxLL7 z)XfpGh81-02i$Lqq<1C&puauYiFbz~?$ue#b+r$2HMZH*FfHJ~gF-#RVawXLVW>c~ z36d!Tby?dK3x4$gbY&TN#eagYx6WWtf&AZG&Snonye`DqII}wsxMoW*uQt{dCqWhT zd{`>gCCVWE9i%Bu7v`U<;j7XA2kK_IQelg< zO!Q5WZ3j8PY3Y?AWQ)#CXTR+$&r2wBAFqqK4FRbL{NuYj#e>1Bz;;;2+??`7j&R^d zVqnwQOgJ5IJw_Wf9{S}I%wsKkAwUHdl>3uoe~aDD=`uppp8&_qByxO-LtT?u6tBsA zD0*s8=C99p($7vOQCFNr$#9ob^J#)8IHYzswF1|Y6Q(wcKrvJ)bwynrgH7iMMYW`z zhHxF3qJ7tQT0qAn?!eoY3}P?B%gDn;SgOoEBOF9;!&nn1QcY$sb~%KF{q& zQM5gl>5#z$8Mge*jY1!rrO# z2fVmXFnLoma&0oqP&!jHVoYbhz7Kt)7Xm0Pz4(T8@tm3p*7ixzBjV<^2ilu;+Q9p+ z?BP?(Jlh25waw!X(G8OfDJ*pF)xsxfG8__=KIJCF!||ZLQ2eZ3b}pxU<&@MtlP^L0 zNYRM;E~x>F8`d~qc82FJ)&ra)(NjkX3xbeZA29!u<%kqSa83{SKCDYZ?2fCCRVyBi z)bSlpBhlM}ey-5vpa~#s&{^TVS1RYvRiJRIZwQRjq;pM2AJ*=3u8#d5;j>(ZL_*xd zCYU!1#)$%U$@wdaF!y8Z^;Kt_i95@ffv+8ou_9!Cj;+UP@x!(Eqpm^;V?QtK9iS;; z#dcLzXPUI+i_Ku!sp&Zf3}H==t%b?>PIfC-awz2XS$3B}iZbYma0Tg5RXSo*{eSiW z?;0aLnp9v|K2Gz`_9Fc%0cZa_`iFt6ws?I+>>la_xGBKWAexEBcQ4%!7Lu$RRIYoc ziV5QF?w^KybC{Mmz;Su0p0nG%uIY%rBrNl$^l*7Nj6%~M(=e(}QQg(@vN5=onp}Fj zgO3Y;Z724SV7I)mGqw565akwrEBam%wlFR(`byV+U!AbYTR;e@PWj0Qj1r+bPrpx? z<$&LM!H@#7QOY6=V-LuCP<($!h9zQjrvTz)KN-@5h}H#eJdWpFFXqr1UQ_1-KX=5U zgP&dUnl5%0-a^d=rgFKz;#3=UfgTX^GYQJ4&WwC&+p-)(SMg7K%m}Lav~}?6$E8LR zvbK>Zeh>`7kdWJ#vzKWay?6-yiD(v<&g{=DJk06>TTJCC%P+%sY|CPRI%91jG?lWU zF2E%tFOsj6{jj0D2Fj+$_8k>rF!xB+T^JPNyKF`7-m9f$>9O|0^WYAU4W#$3-Y^pM zdKPU*GdX4I+cSv$H{$z|n^-?B0e6}@ky%Nzo zWT(OhX}nX4ly|QgVxU8_u-HW!!l##-XG_UNhB4{3V)J!CqJ4^C7@;XZNvs2}^$|?k zwz==X(vjKV+&B^t?XW9kV}wy0-r&8fn~%#$K&!%6i3ECw? zaVPVoKX~Lj4VUUCs!&)qqQTsno@imu-@5BjOWG>D6<7)nZzrx=EzCL412uE);hDX=Pn z9hI6}a&WpU&>$YRSsLBKR^?G;w3a7Teaz%A<_;tq2_2bo%OQ9w4MXt9Hztr3&-%^Q z55kr{#}Ke@lu+xarv2T|?7rv?bnyCtWZyG=wZX*35TG^cq%;{bbt;K4NEi^T! zfhT49c{S32MqeQiRe=idM|GYb6^r$LE63{@TaTuqHJK$H$U5G~6Zq+;jxV06>*F7i zHnhL5O`d*ATeY>NB|A4qX$N_Krg^0?jepqxAu2Xv|H4V9dOpm_;SmY`71H*#)vVh0 z1ngbS1p5ysoah~GlN~>Z=l`t*xS^(x?r-YrHrY7eZV|V2V^=ANs^Re{62awx7=_Ne zA^iO>v%iXx5-kX&BW$kW&L!l3@anER_u4B1K*ZReI$OxpPM4NUf#bLYmgPrQT3h2kopM9{W7RT1!l1hAG4D2%~syYi@*z)jc6y?40SIb_blv;krnrq1Wa~0e z7$FyY1;PU4C}wFxw0UHHdD~+Si>51y#^#Vo;l~-lqjD#yQXSgyTy^o z9qCg&RMmhR;veuK+(7A2>Yx5Bhl=A!Cu@aAJb#@&reIL4v%PQ87C*I{cckq5M$4p) z@6wo61hDzo&>ZD>_s7VeBoYhZ@4Zg zj2;)HgLmOL5dh<k(B<$CVel!?n^Hwg#!x68?GFH;pHS9_DW zYyN}Do@pBnm!dSQ*l-E=z#*$dVyUL#Myah6WmTar#obRgJ^vfwtyv(eMxHgw^ja`b z1I$`d8dQQM*~3qB2^U$R%B7v;+quIk>S@ z_i8?h!8XcP$NMCTg2jYW1V-gzd`2A8Zkaw-OwvWFd5@ECJ0#Z5C4LbhSFgQzViDdf z3}=cq6`w{$U+J^^nj5-G!qy%K9(yV(a2em1&jHa!4}^6lwLZ~O$RNQ@i}5mg7eWXv z$qb3mem1ylQzBz^eXOK_On|WH?TbU3c)H75!h=P_UjhYHedA}$C>~guYIQe($mN%j z^zn_s9NYc^>Eo)k5e0ktbxAZ5Vh8a|mT zPIR^FZS0B>5GJ#2FS!nOr8dkYRoVmrr93xwLAOjyqx%>cETe>U#rii45sv^L98+Ab zpHpd<<-(xh`^&=w2^APa58$P5awI2@ql_kkcC(47UIbG962?(4R?!VOfiY=7+DxhL z(W4FR6yBRLmG>-$XBCiTIQFNJO2X3%N_slLsk&GxM9~TW1wlNfu1g~X0A$)Pal&iA z=A!Rf8FCns9J)bk!4Vj`o~_nLdj`vkkC%KGflBumG0JyzMB6SU*k-bmjj2oO+={CG zwGBK3jo6Gc+}+Y;!pi@|Fd=iaSQTQJDM#ZQ6LTjDyxHAZ#EbSX^`;uF2n?5<9Pl9w ziJIPD2!`WdA~D}I?&zn+h1#P@_=a|U_VZ*NcWYVo-Q&Ove1bh`k-3&t_Spq;{aD3W z5nmgY4O>IpHU)G&Or~p5-BX!tZv7E_Q24^4daLh?rY++`dfFsvo}ENZ5AdftT)aGy zJY#9$Mhnkla9*QDKKaxM(!WrSGSHvS*=JXAn72{fLng`Xhq2tH+Y@%PJefgD-!CRA zmq{+ADC=ExQyN_#HToDB01D-XtwHX;KFcs9iIxAOQu8%vl^f6*Wdze^nPQriNMPJR zXlr5&SE^fJY?SyP4`fN1gLdZ~s_lT!?YCyPRPa zZ+b>fW1LAYfn-V^Im*G#;)do>dbf@>rFG!?ku@~`-B@n&r|Hrrk?XG^AiKPzPmf?K zY5z6ghI8J><+=Y2b|$Jco){#Wk)+8qL=#jyZ0^r6968W~Gh-6ZsP#Jip6mQ{KQ|J1BYsCVquhmoXSGZ4Yt%|edj_p1PA)fAtS zUQ%X^D!y+5ba*BZ&ZSrM1Rg}^b`$8c!PRh#B9Tm1JNze(fZL#o6waukJJ-eZZTp{I zAH6w`0J)d!x|49AcIwAIg1ayOh z&A&NJR)2Z^MMH~9Ox7OEq42|>trVR|@9S^dJlv&i`aK#GNY;zfgTc~26uukml1_WS`s^>eZ$1nTVmf*w-v9dh zPHKNYFDuED>&ptfETu8rC440RXa>ey@+NoaiwUPNVH>dIt@V>5K@N66Ni#2?IRou# zZG>pD0g>LW_A1rl#HgG6ppdj1SAcjLOe$RAE=1VFfX7MScgjWy0FfOU)K$5o`x-b| zgujB6Zj6goHNz?;HtvO$kIVUKOU%97WsVyMHcE8g%)C4b)+Vs;*d)X<2!@n+`_)jIXj z>26UAr^0#vjqIPAvu~AlsGTQ)P|hQENy77>&!M2yo#$3zTsHdZI=hfL?fSrb~Gf6cNXUFkJ9w_%aMBQ4koN!R+Xku2YU{`SW z<*+&Ipo#2G5{92UAvbb!gc6*Kt!iZOKstoFF=?dyp7O7(s#`OUFIh?+;W+YaL#+bA z?~zU$l%i=q!_nz$vT`}od+VgBlCHit{orHlsC8qD+Z!PtCh?JcT`12`xhUV&krjhF zIz1qak>f;}2eTJlbGW7uT=2<=M8j@#_59&{=B%Fsj5K0BhGSOb0sc)WYVgR2P^3Yv zW>e|@r|y(9cD>-Q0d}j5!xlyOv+fWhWtPlC(#y~ytJEp;PF!91!>y>g-KhW_v*RY{ zld^{(gWYB-8ALtvkLU6iJbCP1!O&2_!DBTf73vZpP6 zy1FdXp7$j^(nmSjt3|ayIhgGQd84=jMAOH)cXzA5Lopi1=Lsgt?{{1U@k`oHDH4n` z0SoC(pe}W?i7=#W_;sE~rjT$V|72RMmWxi%wQf literal 0 HcmV?d00001 diff --git a/data/sp/hdread b/data/sp/hdread new file mode 100644 index 0000000000000000000000000000000000000000..dc749323277172b0f76d18ffa63c380f7bb3be70 GIT binary patch literal 1287 zcmV+i1^D_)P(w@Z3IG6s00001Mv*2LLXK;4&&M{gp_a5w91nD}-HPHytKd%&SVZOe z=2J`}<4jPj!blANTP7mp0us~Ct-JGC#y?-$h_O9J`MuOlp9Ji39xlkMxOB9cR z9HX{qx96!4x>u_ls`g!V=2aE`VhBd(LQuo?_*G-NCUR>DmWjEp*5hgO*H<6rdYTv? zw;%)5n)9_tCHV+_Id0$e;_!&ngAQi_T?5P2V#!c(nEq+ZG7ic#X$90TcHCls++Blj#|pe4RfHPOZok{kRdVh=ETK}Rx7U($afpL zSjSB}1I)@-_Nc||o23ab(TjJuA+=^z!#B3MGzc0ytrrW$P0DX}d1&mNN_h8vwYgD}RIDxM-~o!5N)D`1D-C0#V@I+z6~=aH3s*}WsSN%s;^ zB>4;tyV&Womvr_VZW`Fp{h&X?BTZx;Aa3asu_Tj6cR758uGxt&i$?Lqh_f)}-l^zz zdHlID$mLoMqS$66Wq{#~;+Y?Or#Wr9xCrA4KG>4fCjE1kzQBt5AQtw;_5M_kBc}^! zx4DP?&ysi7$(o(MHvpK?nH=N_&h-y7Od{wJ8a)`fhm$uSL_Wu2#~4GeMXRT8UfD?P zBHbu(6N{cIDEpT$Fi2^IojHCYPPi&=_ZNBrLF4llEoe-H$}-Tofqp&^|yA#YXzej5z_?lp_qEL?Cu+w zCPO(lX?{<)_0-?AZ4?~hvTrwy2h@|!ZDijdV%Z`SCaPS=f+f%KZ?a5Tr)G4Z>UXZB zIx4;S0-Nd&W1!PGd8aE_r6cBCXa}s6=>JS9O`P)Yu)>R-T!v@C%Ho%=Jy8E&hX@i; zG25o$3t&d&;gY4(!4G6opggRP6NZ@ty#A8dMde{Ug-di^mSK$dxC3SehVB#7E#%|g z=;Q}%AR~y!(cTI22qwCH(Yz3?K_Q@W%91|+k?_96%gei^+e}y5{$;~&F{!COQL$r) zmss3nCdNG%JWRN)L%#85AeyImRwrX;Qum1VW#AZi9NyD#x-agqJ)d&th;?d}!S?XM z#{#3KLDnqdNVpIz-7uG=vVgi+U)+fB@8!K5ATt3epBvXgz(oRdnJ&t#$`k;VplLwk zo#r`u>HiUx3+Z`PN7Ts&xU#gi0eiS=75HEoR8*ILvNv;_Nbj0G!BA2AJ*ocU`9q$h x^|S<3_*61;)6WpgI1A~^c`rl((*l*KKYpi>n{;c+`p+W349RCscSHaH00P3kkD34g literal 0 HcmV?d00001 diff --git a/data/sp/icons.dat b/data/sp/icons.dat new file mode 100644 index 0000000000..2b7b73dab0 --- /dev/null +++ b/data/sp/icons.dat @@ -0,0 +1,28 @@ +AA-KFM -005-/SYS/FILE MANAGERS/KFM - * +AB-TINYPAD -009-/SYS/TINYPAD - * +BA-EOLITE -002-/SYS/FILE MANAGERS/EOLITE - * +CA-SHELL -020-/SYS/SHELL - * +BB-KFAR -016-/SYS/FILE MANAGERS/KFAR - * +AC-RDSAVE -017-/SYS/RDSAVE - * +BC-CALC -004-/SYS/CALC - * +CB-ANIMAGE -015-/SYS/MEDIA/ANIMAGE - * +JA-KPACK -010-/SYS/KPACK - * +IH-SNAKE -003-/SYS/GAMES/SNAKE - * +JI-MINE -014-/SYS/GAMES/MINE - * +II-LIFE2 -013-/SYS/DEMOS/LIFE2 - * +JH-MBLOCKS -011-/SYS/GAMES/MBLOCKS - * +HI-PONG -012-/SYS/GAMES/PONG3 - * +GI-15 -000-/SYS/GAMES/15 - * +HH-CLICKS -018-/SYS/GAMES/CLICKS - * +JB-DOCPACK -008-/SYS/DOCPACK - * +IA-BOARD -019-/SYS/DEVELOP/BOARD - * +JC-HEXEDIT -022-/SYS/DEVELOP/HEED - * +HA-MTDBG -006-/SYS/DEVELOP/MTDBG - * +AH-PIPES -026-/SYS/GAMES/PIPES - * +AI-SUDOKU -025-/SYS/GAMES/SUDOKU - * +BI-GOMOKU -024-/SYS/GAMES/GOMOKU - * +BH-XONIX -021-/SYS/GAMES/XONIX - * +GH-CHECKERS-001-/SYS/GAMES/CHECKERS - * +CI-KOSILKA -023-/SYS/GAMES/KOSILKA - * +CH-FLOOD-IT-027-/SYS/GAMES/FLOOD-IT - * +IB-FASM -010-/RD/1/DEVELOP/FASM - * diff --git a/data/sp/iconstrp.png b/data/sp/iconstrp.png new file mode 100644 index 0000000000000000000000000000000000000000..82c53705f039d2997a7ca819bf660f41ead7f6fc GIT binary patch literal 15303 zcmXY&bx_>D)5kw|aJb7s3&q{t<#2Zj6t^OU;{HVr*CNF!a!7G^cZ!taUc5M^cyW08 zn|c09GLuYZvdPZwdtZsxR9C>pc#Q!70Jf5%toFZ_3ILE0Xej@B#xx#v03aH#BrB!s zvvQJyZcaAT1`k@UD_o_CCfucBVpMKT36p`@6En@>jt$`9AhF*{5sV|n7%`zKmr|7c zr`5A4Z88(0!=V*l{uRA=7w;>wD`Z-_fIvDWj80jVV93ky?(_O%L)QH75BeRS_3CA= zLuu{3y`G()?_PpzzOKC^1nA81hQfe+7dy?ApCA7c!5gacOUK9@91z{zrWl&DuTzLF z?hDMFyrysDPjw(@$n2Vgl_+_I#Qj^fMKlg7>}&B4U)X-wKa4}+21GBVM3P)f7KwMxyGMi|ASnI!tvAj~JssF(om8$+2ffg5go(KL>Fi%TJr!9fuVx zu*&tkJ+?}k!W(8Vkxm2yjJqFiNdH6=)jYQv8Ud|<6eN{emTq-JEA+2hNu#x}W^J6A zc;Q(DS2hgeUzR1H5k8gvd30E#6>Z!yq$~bSWq~1AdNe88q}#4_)^sfIBHu(7dVvtE17KASx_SKUNcavW2YIZ(duqaCP%p20~U>CCT-fH7V^{F%-* zPj6vv2bHdNflX+nrRE>_q+S@8)56w=AehthS7;pSi5ZK9R;{@TY_|Wo_uaj#CcRvgcyK zmjBu}lGxT|5vtXVcbj!-ZcV4S5ISu>Mvb00@@uIQL{MKJExUgVh$ES2x%f$Znt~)M z(s?D3u!_ArUex~(I)*8WWRB@u7fsfDx&f)_X~hX_ zyKmX-XeO_8F9GSM5Ppm8<#USeoCu=`cn$m^;j3*VOW5V^1>2BLBO$ zX0-Jz8iYaC9Du>OE))V+WrTbOaQ;f0dEj7H;2zjsy?Eo1-H7*21QlW zRS0w^a&>bfBQ~vpLyF*9f>G?unphazjESCo`vSUM-2bxG-GJM>I#9*sw4!)$d>qNW zKns%3K`xHAl`hvo@9jv?8#te!MMP#)b+UoFtT^CF$x4)21TNQ~CZ%2tS`1wbSbU47 z&Ck2q=R+YprPVXZK&kg#w2At26t?l$43QS?Ka;eTv-o>8%H^aCiOcQ4QjKh*144+s zUa<#2zLHys_D z43oIMm!EJlc)KvztbTCKT#G{BPij*S%L+w7Z9il)%gEW?D6nYpZF5!KfVyw<8@_1< z^iq{PNbyv9hoPpHsl19oH!!(yBJ0_BwW+QalJ4U+!rb;iI{)@NAiI4#+ylN=V=8sP zVosI2LOP6Fl*&*rCu>fyBl){vYghnC8G=*{5*EBI&M{E(r-$@!9}R3qx?Gw_hP~C- z>mSduoykrFcedPr*%Y$D@EE!u`VR?(g$$e6iBjy(NJ(rk*5FVra-o%tzY0f#P8wX zZh+R+rOji&Ap_*VRHF#D%IKlSN?Lp?*sZ zHD5O9w6YTE3^HqU2hm6VUF#?I(w^_Q-cNoUS6A4*r7;+-SDj5RFF{@dtTi7&H-s){q+M)S+FcR`m~R;WToGY5COKRMbdkb z$NFoVPLnxumWG<4RDPF{0 z`rg2op6bZqjrb!lLge}G>TYUzUgH90tgY$sqsXi%-drLCdJsy|ENU@PDeSTq{&RDc z_$6d;I0(-FrTrSI^YXyAwkK!jM!A^nYwqD2#KP9Voa}~vqNZ`fFJ01ulVGyypQtTQ z2(sL#C##ryT~KcKuZpSVHC%-ib~>679|~Kbm`*kuj3C~2#cQ!>wd5d;!iHT+G7N}& zSA|_picmHOQA}XK9RK|KQv>5Xj8Iz8no`qgJWpoen))t$sD-a@|zx zc*nEU%>N&NK2jbr)OexH`zquiJS{zSv_g?CUv=u|JWkaK=4QP+XIK+1Tj=n{$;d01 z_CrFA0q`_=meh48#$Ly(xBacR>%NuTdMoH1v0{;8owo?rxY$$%z}PrG$Qg6p#1wa<#{( zGPH?wRVB$zklZj4Aq5fn1h8gLQZQ_T3`lY(<%w!YH}o9p$Oq)5cXDDfCCzEZAT+0a zOlD{U@&m@ySYL2=Fp_jg%TIoRG_feL@ANME-MY#9H35m=>wbz&suqBzaJ-vCUThTm zTY@`85kG+q1Wt(OIPZU~I>bXpYcvyKalg(4i0|$!j4XqdG3umM+aN8#u`^L6-hKd? z*^lNYNF%Vu*#K_N1zke9`0(E!qsnOvwJD>U+kxg57Kly)32PP^pQbTVCGQ5^<+Pq3 zY;&pa4?bEI^T9O)KC%b_rZcJdz3H7vb$Hr3MuoTl=4r&1=2!p;INU28WQ$D+pP=iZ<@4*E+B2v&z56Zuz^1R77 z`I}|u$8fGQqlG2wlkv2u=vEv7gqRM_JV#k_qCi#Kx zegP`9p3133PUMAasb{!TFg2Ef=jP`2OdZlbqa>zSR?BH-7>T(RkcKV9-Vep@gyhey zap818US}E7(|>tgPA$QO=-3ng_|d${Ft{dN>B2^78mxO~+o8~#`xJuj!U#5KyF~KN zNd}t_xn=6UgY{eC?aW*hkelJ=X*#wU3aj*mO``%K;XJQFI37hRWkTg1kp_E z3Q>$a)fHL2JTe9?#b5hCTZ$QAKHtz7z%)ql6%{mA>-`5n)ccQWh2zm&Svl~D9V7>s zQB`8$MSnYs7kLYGCaH~r`8OQ!L0LzRweN4B|J=38`5$pPpfiY{78YQ|x>TtRhr!x- zQrbKGY2YOb;0N5_f)tx&k`i(oli6YoXFyY~p36$rHYivVxij|zzO)L?ZxL9!-zYl# zWL!V{+VuSIRwbaxX7dy?M^_$*R3iY(r$>VEosM0DWK%%>_*)97g~B@<_sE(h|Dq`S zB7}^{33E&wAar4|Fd+2}&4QLzvcDW0){k%JWh;1flvID=mbIFJJn$Oe=Ayz8rf#xD z#rq_W1*tWtj6{Pa?mR*@EZPwh$zU`&J^;f4WCA$Ou_D9RQSs7{YKa9&VbtwZtndOO zU=q@4%IOmdJ>!R>Aik|BAIpoY1!^L3B}?-|4ntnIBrH^+O&wrQg>$$VuCM6o;9=?t z7Ikw*5s1G6&F#6hVNCG81)W`u?mK@a({e$@$&-)K&Y^+lXVs@rUq8Xn&0T;P-{}w* zcthV(;w&q+dINx0`HCE_d7=r5T0Xk0VMpytN&?R%UEVgRi#C*wynhhj#+% z!q>V6H+x?~QQ`alUAT`x6y89{B%WK(0Nffw$ThZ;oxM{8Yj*&CqxV(c5;t*el)?Kh zoQfS}c-26eAsvmXvC9*8&jzk~NvN0Haw+=eNBfAQqt_TZT$pH!A@fpHcp*%gj(Q#0 zR|GlcOn|yR_N`$Snk+kVXyA+->L<_v{ga8(eMeUn(l@sH>mUHZO(pzgeK# zn!I7(cm5FKXNC;!md|kQcl*F!F^^KyUC;0z{BN@Wn&5xE>c!Kro*O}#*zoMFFe~d1 zYtjL|8}|3ybmf*vvTY74(48)ojPN<0l|qZufCYz`YO^ z+^6Rv$1dxNjhy9ZJ@Ki;O#lNlt#`4Gkq=|d4ExL>)GFA*aXY-W7%Yw#F~;veX9C;E zbH_oh)UuW?HA>4Arrw7WgfYNQwFs#eRxzwJM5((R)_u|q z1|c>LuMEk;o&{yXnpfB08Uc1h>~O8=)m7=d?S96pIAF=pl%>s@c4N^%1#pD+p}W3S zFjk!1jY#alH})LV81cFa4KYA`4qKYDCsZT?<`#s?RecYrBf zTm<*1v7%xM?=7X`&P--Jg#=RxDN19Y$ZXPCL~pwYZRMi|rIEpknGin>4HYFy3#e`C z42M!G_1(TB?GQ=m8eum3;l7=aJq1$u;e(8=9Gmou)OX*xskw>Fxnz;gpl39C?5`e^ zbskHmXN8y;OPvya(t+m$iB73s=WF6+jSLPQUn_%L6u6OV3i{fLXkgTNdwm{uVBH-5 zG?y@~<5C6^`FDOZ-~gbIB#+~rs|w9BTLrU)VsDGOs2(M3$kj~ci2G2d9G$ju%+M`TU~`aU_885JR#Rs^WNR|+x*7_O}oe+M1;D-AtG6ZHnQ#m}O0Sxz4k zA+nh$^*9UwYE@&V@^EU*E}t3Hd(>^NMC0KL(QnDU?d(1@*Ga8>TXCn(8$7^Goz zsB|*%!jxX1zmg%w`QBW96^>9MX}zF*$!idin_n@ydE;Eti>Bd7kZJ@2T<)+A8$yH* z`}pw$kxdc>C~F(pvZb^PeR*2(@Rf4Whgho2$3%-RU82U&&kRT5?Rt88&WWD8QVsbK zQ__au80hHe=+2~}T=0RB#|LIU{WS(y)PDR$HWeVU|RbV0q@HvFMT zd4g%2y;q}=GDQKB5TVWw9^Wu}S}yRH+T2+KBt4Jt&wAJN-?Q~}RV9NBhAB|;PS>lk z5xYqL-FPZWXpl-WSo!WDMS!eX+ktPNUg4rX{D+Cb^}&Fi{9vgB+x(4Wzb1U7+vy2t z$>j<4YfcKmzby3pc?G)i_I_QSJz9%j*aXsK(BNx+$^89nNf|JYd^=AZi@^gme(1Pf z0a`CdkGoA1nOcAMr3W8QAu|mcm@~mRtfcgSa8gV@kUSP8`kJ^&yFXQW9RSLR?*!Eo ztHFO&x3hA8(|$_?kGCW9za7ar1Z*x94;XEKqiII{n-@V(fEVle9_6<073ROKRv*St z0)VGARQJUcsoKDlIA93xExf=^L-}=Yw!1zN@#ZWE#X{$k*)IooS#rNxG*&ZR8>{2nDhc?? zfWY}M^}YQLn9?eRw+Ns!F*v=15sv3b)c+niYU#t-y}^B)Wg%Ue?wj6YdsTx0i6~t` zw8;#{G4?(N7XeZS^tS-f<6%VeE29Z1**AADF~#;EqBw9mJsQ+O{B7Vu-Ld&j9tBF! zoJ9sbA4n`${!H+#Ob$C(D;>3&z~hm9-}WC0mbXCD-Z_@j*3 z@_&Na2xlTohYKQ%qy+&R=^9R7RJ~emXBF#@AOYwmD6^f`NW~g5bwt8Kk`9aw5C|K= z83p?Zgx|rHB+^EHg5}@QaAN-3V}LDjlpv{=7;GWBR1o-9h13$%M(?-UDqVD8)|If}E;{d)r6*n{@o<$pMt;1s?8 zOxd~!BL<$=78xJifXz7yl9@9!L0S6+XHuX;CA8{xLXrl70NjQgGqt|*TF8KSnD^xV zmriuWTuUFIjL6kdpsB(Ai5;X$!K7tEgtD*UX_h6knOYzt`Om33hI*eP@jzFNq^$FX zbyaM>I&5hJBEP*l(E6ZDgV%A(H?rIOUk!_G#?D21RNc1G`_<|z$tfZ+sknz!Wr1Qb z9ZJr3^~e&po1u-6#5Wuk>$coR2hnWGQ=I;7hvi<=A3dsOc79B$*8M#B=70_X5`HF^ zR#k-iy6+y5i z4r#Cz*q3p452!>NIN?QST?^*nPrl4A~>*tfr;V zVZNWH{e{Yi+{Kc#xHy9ItNQRLvDz^#Y3j4;F4Yp^2K+1P(^?({WjNOny^ zWB@vH>_=b9?;wwb3Nlz23|05y0|Z`a^X}aXfrtS>6IGcIi_=?~G=>NTsDhb6o6<4c z;4h&7jQXPN^t-p8DOiXOgmTG2W}!zOPh{KVW$M`9^nn>by+JN6oyAUr73Sx?S(Pzd z-C`IWwMU18m$Kqa$OV&q-XwVdDl$huU1NVZ+r@@T)K~|(2biFnqus;xh-3#i2H1-1 zf(d#PZ-N~qhsEZ%Z5vAXUpQ_rkg$X)?cyT_C$FI$`Gtkm9Je<}q;3-CS8=5W7Cv^M zS~I>FW&(JDgGTh|j*IR-vbjLTi$6*1q1h}QD_~kS01eIf%F)ER0`7D9U|L4<@73ry zdC!HcDPKgqk!*-fJ^SJzWg)afEOiC519J^6S$^qCGyV7@?USqF0A9bt@aLY4Ezg77 z95*J*2+gSqOlcCJhCHa*q6hn8rrVwv*=5BBXV!V)TG|@fysDmqGM3B*)syQu78T*5h{|HWD} zq_ggY)4y&*8cY4&5t_PB8wx%fJHZ3K$UH0r*+lE^hKwuPq7Y!X2_Ft`y z`x4Gp6sBeKDs-GTQU~9>;XWTlda%RN+?7ums7fI{S6QDgm^|VReAMI#z!aQ<3=y$2(4gd#_srmHBrw?yU4_vp z4fRib5rK&uDmr%=vgkF-ve=(5Yl5jLQB&Hb+l;geti}0v`3T2QY4`ZB=;oafqTI~P z#ZVoxxZBX(5@R$OT*X|7(t{pL<$oE{j_gAtF5ild$C+k*5fr1ohNf7|Agt((cwBpU zC&$JJ300q&Rd#1?tKDKET?&WG1cau9wT#EaB!^uVeKYY2Bo}3=5R8`OY!d0uFvnV+ z#)1ML)IVc3Pg2xi9$Gm~iAm4N!_)-;?u5Tg;c~0G8 zT6_-3cd?jl$8?2ccH76^RizD1y!nqeZMIT(i%RBuDu8i>tqF@Q>+?XU0uDMLxLB6wXC+bW^y(mdfHbYhiS1r7(KdAmTCSy zjXhjguyNTj+F~H0FN51^vp4wZtQSem<+!Saj*^-mX67oX?Ce~_f%l{13hwX)96l>Al8V&qT`V`M@GRX7AQK4iLZcuGvf>$i~4cJzjn?>pgu3w>v2 z+~7C3sJLFzOpW+|Phw{jRFm2fJwa5W@aaN@X$brM{r%y-{cJHzX5dFrztG3BXo>TR zxQwps#%9!lhns=4Gw6ZD6684aw2v{*5v4DL!IGZ$JToH@{)*RzZfe}je_9@=ny$E} zC;_A6q*+u^<(?TPCr6K#fUk-NH$C`$0H3H1oeJCpD&Ji)y0ob?o^|a!<)K?c!~=)p zb5=5^oFsX))ZGL`e*Ru|-#lsAK>i)$`s*8hNk^zE9|IwyW69p>>1jAl0qH|qEYm4{ znvfzJT>Wk^xhJ&yS)!Cw4;|^&hnt6i>frCmPu>K`FuA)&K|w(Xm^|Q$d+;iD&V}Hjl*R> zQ#80UnjAG+GSKOJIdaTr&~-1^xc%RsJAD6_2kgz8n!@u>`O)g(-n-sjUJOPHGA(N! zvz{)OKUnkI+M;)2xf@y4irwma(iynICOEBS=*q1c>S&tqE;O0U^K zf^s{EBhe`Sj4*Xsvi3xVtI(>C71F1*XhKH3@2U}I&-Kx|Gq~RCz9ey^+#xLQ+Aaim zpq`QSZaE(J1QYtrUha8<-3Y%|s{8qI z4k}VA;L2_R-0ntn;D>?-#ew#%%gGk}o?FJc5xo`m2Aek=Ik0$AEp&ae0Bj|4&fa-_ z_RypvmGLl-$FOrQ%N-^#Z-^g{{Ai|aAa+P!!d6*HE?vMAUfr1D%xR0Zf=tlCpZ-7z z;H1dGi!e(4bJor8W$fvL!21~NwU!za5!PIh`7BrirHa4#-|V)O`VW@Gac=~n!+{_C zR0r&mD4z}_d~Vjf?W4A;wuH>9474-`uv4vQq!k8?gBR=^e#+c;=Wx)&2ZRjWF88Y3 z;LPY1^UA#BdjUW38xBe%87TSvi0b;$NacyBDo6q!lIvQ&74>eZ-8E)Od-pd49a3BUivEW=!jSmQS`i z9yw4XcNa>*CCt5zhW2(3aU&9nth2?g%%eW%puz7zw1~on(1;HtqbYWQ#zIfY8WL|O z!gy^dqyYI@a;_Mmg+ZmaT*-qyyIeEawDQx8Em;S%X5pyLe?L!GCm0mwWf05Y7=5D{ zSy8hL_}N^=_k8nbO~s0GA2TDW+4;rzNwnZygAGG1*;IBigKC)C7s-5TAN!M*&xMAP zIsOR7FN$Vg#=akD#^Kj`zetd(5KOHHe5|z?81@jVF3(bR2SUtWA_t6k6CwtGqmM_G z>PBtk3@$r`r@z!gC+@#3^DQIX(-`-I(A#N(uta`}ZpC)}SL)g9ggM|k%pTz!cuC&+ zr`@4!{!C~*<>N;)Yg1&Tm$v((_jKPVOK=wE=aK%ofH$|Jy^XzreArz+#MQTxCKuzG9ptA;C36}!l2Qcv5TEBIU2zvSHKq3#CP=VMSE0e#`}H<;F^13n`S2-p zW*luH#z8$q_+LVIP9r@Hf@#iDZE|$(9DQA^k}?s3Wx3BkOtq^+9a&2}>)Lt2wSq!) z`g%BpzGMUVM$ysAK1UVNOoO2Jl8udGIO%4A=sBgEUb-Q}<{svI$G_=#zpe+mI+eW- z=F1fGwFI*cdc+c9Ilgf#;8Eo`piO4Pv@lX9CxEzvY-Gj>f3}?J&L_`DqsyZ*&>$wc zpamdtG8s&ZDUl`qr8j7`zV5ADDg#@u2(n(yGTX>*^|iaMy!dR_TMbu-yf`xA^BAco zdKleLAE}^hI$?a(GqbNH!P3>{t|9um@E%knX=n_OFtq4;mnVsg^M%+y*x(#=rd$obZNs>Ou`WsOPv-c)0)icvBx^+J6>^T)4)%OIg|>1d z`0;YR5(3Iq$jN#@t#UpaaTwj!0n`GsHN@AlCHuGJM{i3Sa2r2>` zX}(qExv)Oz6#4NgcQ)D9sk(t(OR1QAidHoZT zNg;OK21^<&AL+PFYRa=C(FhFK9MF1mo7KRuB9O5<<%z?Q>foz@(V^!L!K!@ZKo%in)|u~hejvQ6 z#uLM)$?ylBnn)qUoyg`J+N-+|_LwoPT2|L+U-W+h#bhU@dSuR^VDzjDvN2AqHMzMS zT9WDk=88RudCOKSe)wEs)mQRiQ0F4-a}<~A6b8S#1=W@jry#eDOj?X9+nHRrkxXrm zR%42eB0WG92HR4Qy5ov{hu?vu03-L%BsnCXX|Xvn@6=}Kbi0pY-gdM%>1_{gE?7ay z3@hHt(8crEFNr~XjsaQW91brx4M5J%vY$fWa# zhva_hmtkU7zz1Q?<`Q{ubiN6b8u>Ay(zo}}ipLvjKDI{T{pUDsAER%bmAM3fE>dl5 z!ht$Hv-{j{3?XZY&*c?|_4O>nSrraKz;kg~#&1|R_^aE8VID1Ey*IELCXltO<7-$- z2jz%md~v`88lFxaa*x?x--CBB^~@%SPln7oSgV1%s32Dqziw%9 z*44vcWo@2cPilbp05nq@QVJ%Y zf!6wn%>?W;tbdH`hQuXiU&50CI{Qe(Ij9=`botHVLW zxotMmZEg^IV-(=FtBQe5eF)}L;@*e_AT90;m{`RZG9*A=c;*SWX$|K~(!g*iEY1i~URj6MBupdGiROcNL`P^iWRQ<dH4ZU9hUt^oO`+n= z`t~Q#V}i}YAQwj=#%xqU6CW9vqae3p2nAhK+HwEeB?Iw(NlU1k*klT@qaCbl5-vWX z$P7vW>cOoCpTCwTU5w985({8x-pyQcD*t?5rOag(16X?gtdPw#OWszP0n*g6eSqfO z+KW3Ux$jQW=M$1eQ#7=2`;JYZ=SBk4x#y|b`e8EgIe8oDY!Rp6E|RGC?*NCkST2_C zE6*KBFS$#9|E~QoWI*c|z;lwg zt?b=*W&b4|e%X9twnN}D9kv~{@g~n}YJqhfsp;e(lmr4#2dwuJED_B)ppgedWVEkNY1ep{ zxaffYM_t3RCQ^W@^MVf;(T-pG`k0d_vn$Bn=7!#Du7r+2M*LIXk0B|@K?j2mf@UNuoGJnTI3$y1&GUZI0<^iQBqHCZeY8MA=`q&vkP%Es2z;U@j0xfZV4b4 zTT1uOTZv%3-Fk?}F-~H}dGV~m_Ggy}0QPfQQdsa(Zl?b&4lcUzaSIlc($d$L44C|j zS@U#-n;_|fxAlprQ z1#-`X%o-2vb1W6E!;h{;9tzHYv3uE2^FHAA+tA z%EkbkNKBW$D*x05jug?=SGJF79xC9#u6x!oK!Nh4;K?TJqPn`9FH-cR@onR?LY^Bl z(s<@2aeHYdKKroMF3!G(!0fe(zGM~Hya8QbYNvucoq719TclCvEp_`p>j&Mo^Yr2? z2+7_1r~G0S$zR=)-kNJ-iUIVF&-wn_tsrkH#2tB~{(R~5y7yojCoASspCct%H2bq6 zF!nv6IDn3cswU&-LljtdA$jZp9ELDHaF7yy=H9(E{o{gYwBg5{T9*(MUP7au(*W*2 zrw*ZPTUKbbA%vu)AiJ*9;C=_OA6tB&IAatzi5l=sQzRYD0_?n0_zGx?h;o3iq~Ml0 z8BFNnqVn*)VyNBdxmJH$%*H;dnUyC-?;$4#T-*Sh2twvD#x+LkD+!DxBtV(ctZ~mt z5~JJ1)ifywuCEuT%;a6P{Ee$#r31r5F6ZvvEoc7V<|BdU>3!mQ8I zbh9ku=$xc|>K{3qsfKQ}sog8wnPEp_IK1pHvAas94Ih!{3p>8G4AQT}(JU21c>4EU!WYgVlSqczXa7Hh zj!Z>`_#1v`DGTz(`^Ntxzqr;Hh7F|t{C!&*J-#8nmxD?Qu)cf2IAtw9nV>37Rml>T@R=B?ZuLKyK4x{fn6Wbjpf#TZ%l;F!w3 zTd^bgh$P)6#5T|do!{)_sR%`}9s8V9TuhQ3qxB-~^qzjkel_!z>A?~B74G&TrTsfr zlF_+afoh%FGaJ!>qc{2S7Ub3BaZnSt*k#}pTW%xx#3MG$aNeAVd5Z2%F6{WZ}Y z=J%t`aHipOB4DEX+;;oN&M8W=n@6Yo*tcZpZOWr3Bk1;|GM;21TA4=)0~lpY?wK6f z_`w2jCe>RkK$iOH;Qs#=i|B$R6!qXiEv4j-0EvzNyQY(N;7{t1lklBrvd;0N^LkTra(%=x@xa|iQ)}8J?mZF?@Kac%8jZ-cs5|0pt{ldmp!@YKkbyt ze}`=@REqhtXC@_(t>=X)+-h2Ip&RS$D3b@iuLOBP?h8HNJYgBb)#$dQq?CE);QGo2 zk6~@Ce_wA^H<6GF7~HTgtJOHUouOSgQQi&wXW&hb$uheAU5Nqt{#M%%nkqmLMW*=X z@vq5PBrB4!I!-RCw5kljjs-DlduXh8cjb)NSNV|?6_6L*VGmVMLMeb~`b)oY`F_6n z7!PD_ctJ&U6*{bo^DMwDD!eS+&E~ZKAgS}F9C|<%bSozAueW|kWzA>ml`OelKJfW{ z&5m0*S-_uLU7z=W+cY-ZvWFSO%Q2-RLH{$Ck@jFxyUdtF zBx0Kg2py5naBH%R(#M&#dNyfdxzD9a@GHfnkp*rnph~ z{{qy{0ftoaNTu^-$OS=L9^zx3e>>3nsj!eX1?+<9;=r2652{bOUaHgpPY5Xl@l_04 zR>`*+_;3m7@}#=}DT+Ouk6!)wHUhnGzrY%8D#_B*Y{;O1501X5O?aeZO!DP9=b)2N zTthbn7@Wn6-s!6Y1*4~dLoCbZeeGz!wvNuO0mc0U zjK6+#UmWTN(V~IHdU)Rc4e8K1T@+_xBP7O83z~^b;{!~&36agA2rk^v10*}pI;Hg* z*bhXY9Fq#9w8L-^g+?==9gAY*{5i;nv5o&u#qa$d&xenZ%yZ){iqS7>>z7~k2HdQn zwrm9c=LI#7Z#*Lkpz`-doT-ljLU<-RJV#;6@Uvx?XM!!yUk+_Z){y>`%YaXKVlV*{ z1YJ2*MvSix>s;nknaqX(6{_z=uHr)R1S%D_^{I$UTgy?sp+w&zgBr<Go^IL#i@ zDcG2m<9&aDXK-%ZJ1)2}Z*e|!^Svezp-XbmG?$JE;|M(p^EHAscm#)mvC`Za7|h%U zHaVhn!9vzRRsgm5kZf5^9U1D>5&`gK4Mm_rZ50}A*!Q6>RL%msUXu?kA3?I}xq@pq zjch*lMgY~Ia%MQjknNw!F>CZXf>bsHWPS;joH$!_BX-?xYzzc5`HNaAZw(2 zG(<6Z-uvnjOhUSW;zmp{Um{{g*c zpbKH2g%n?+=LVC!9b*l3RGy(^iglQzx7ek~l7Kj>!@6H-?M=p6OwYr$+pQrFxf$cu z!(}?E8+iJyrdpjb=}6c^w~XX5XqpW^HcwP2z51<(M=DXA6>4`Md8Dq}Y29zxdRn@; z`8OfG*Wten{l~BfcRvL5r z-MxDC;UXRz@b)AF^$T8b10k;woE=z1mBut<);x$PpiI3ND$qCTZ8cs>Q8Hm5{TL(8B`aVm$*?YbhSb*?L)RuvhQ;2DE`V@07pSw6b^%e(b%->|6hps8)vR zcLo*I(%IdZ)ue(uU!>AA&UdJkLvg$J+2Q?EXRSS0WJ<%Bs?w_G8L{0A@`kT_?@t+J zcU2!LbLr}kaSNfUoxQ!ZJvJIILl$*Juo@8ZV%y49t)r@%IH?-S!^MSMY!5nm*Pkz|9W&X?Sp7z-qOXu4jTK>h*i7 z(qpC3zI{xIEfE{O55@Hf{GDIJ^jo|e3PDgoNj)e@ub7xXDc?c}V56x2QUOXPP^C$S z-X**wFYq--o9x4!s + + + + KolibriOS web server - default message + + +

Welcome to KolibriOS server

+

+ If you can read this with an external html-browser then Kolibri + networking is correctly set up. +

This file: /rd/1/index.htm +

+ + + + + + + + + + + + + diff --git a/data/sp/kerpack b/data/sp/kerpack new file mode 100644 index 0000000000000000000000000000000000000000..511e23d2daab0a765ccd64373f1aee2768090f8f GIT binary patch literal 6421 zcmV+w8S3UsP(w@kBme+`00001Mv*2LLXK;4&&M{_Mtt=a6Ie2$LG)d%O`Xkp)I3*M z0+W-Tk|cOZ3VvY-eW(d3rM-PW`W++;cD~DWqZq{zyyGHKPC+6ZXE!#LdQvs*lT$Gw ze;sL4Ks~zi9BnjBTG_xT=1Z?+y2L!yn(-KcWgGpl~)%T zY#8Ynrcre_7x`E5j|br>^jkP$&rEl{xHRwvphts(?v&%XR%<&v_jpBgZGiK6p{j7E z#Y{ox;{*JTe8b0ZW@RDbIGs0tbNcykN?qq0$pc4P1fH#5fz*ME@6c2gqyMR6;^M2~ z{w-hj9$WL+%zDh-POic4X~)}6NczXxM2>HcXcl{gQTr3-S>g%;JUUua>dKzkMCPYH z9gpn0xg2lPVw7fm_yQYrNZR2(m+s9E&MbA=QI%z=zL)smsK{dsy>W?MNf<+=F4 zAIKfI?UdMl9UbEqOI~x-2@3F0CoSn6=qV%eDBMJ=Y{li9Cu->wbsM%J+=l6oxwnTr zXx6Fvg@7&UNeLcF6{dHui`50227UT$9O7=C(3RA~$(0b}FFmt{m+x^ZNudh0gDFzJ zJ2h#OH<#j!EHabKG1wf6KaA+P1Y`sb!dZ%X9IA{GWB&t?cdO%^7TMk|LZWY{svfMni>)`SCF$%Oq!Ao@&P(rqvuXozC)M)th+Vwoy+ zW1YEr9&c3k#Ai#Lx7swgrlYc^ht13`Htl>A*ZLJOYz8yO?9c2R$1F$FG-8vIK6V|6 zCJ7r=o)i!U08K3OB_FG%kok!fTaH0LJU=>V$IfF)i(ykMjk|fPs`}+OU_-6ymJ$$V z@R$7|rLXzzzOvl}`RwK?Ygpr~CQl+;n>7}$qlI%1C z;{2+3MoLqB@T-FMoi)+pjaNDXK2h!E_L|r!g)j^~A zzwE%zn|e)gNXtF1Du|_1d>nmnJJF~)M>xnUh0(gE7lNvrRXtZ{CFHkW&yiW+%o9c1Rj`<@0?IZna0l+TmLRteNeN43 z*y*h!OwgEvd%iY;@s~Oum7&F!URgi(Uyih`y*Ek9T<3tmT5kIW)!J6Gp^vZv-vhbb z@IK#0Vk|8DADY8y91@L}fS1+ubYT*+xls-lH~WRr_=xYs5Sp~q`ymZyK&V`bEJ&qm=+-`5%@kk0Vb(W( z8un?h1r%M?uUJ(N#fcR;@Yxgl>bM#r#%J6_q}lr{eSkXM;I(mvWuxQIqHJfF&^wFt5f zE0uGCH3->$pVxZnuAMw47A~w91k+-AOx*p~b}O9{Vp#`erV%|IO9qX3d8U`Gu?dcr zKID@Ltby8M52&Ql!y;a*9UkFK%!*$i{E=5WMW!lWcf$a(v6`-vPtO}G48`_oc7vzdDWV0-D!4ostd4QPOJMsn4Q@Qj`}=lsW&Qay*ZY++xN&tlH%t zls`;5mA_=ZA;^4+c^XFAiX9{iq>B)~Ml7PA>O?k6Qt5{6qqQmgpFU+I)A!`Kw`or1 zQS<1H zQ^p^h7#lep(S;PF#F{>PfF?%c7ume4p>CIO!OpUUC~BL+y91%^7c zG)=Ad(W`;5ILTAGf#(MEg9t<_6r7ESPfEh>)Kt`fY)@)Qm~5LEY4zwdnCu4*&S|)t zUN>35LsIB;h^9J3sNs+*ukN*4ejMZ3+zF%D=oD-JZ*=CTyn4-xw-b{`_q;a8slR}# zZXQl$&+gSQ#GkX7@{c}PsI`YMG0AT{yJ;2VH?Apd&w@o+vjAo$*RE@mD;KjOsa!nl zn`ohh;0hx_ot11Eb*Qpruz%L{X;NZOR=fB9nYug;@9reQf3t5z6=!nfksv6gtO`? zET--kY#brnjWyb3!=j4tLF=`q+gNi}E{!X@eGVH}%N4iX;fVj~jP=(eNzOxk=NE7R9&ia2r z5T@x5F0jr+fKMDA=p3?{KN{)hQU`C>Wx+$(&JLyGJ+tyu<@sN^YQ`p@{={@yXbPYB zOKkUa#2t+B_~#k+Jbj>#7o=5IZc2px(-fPU#yB(SH4!Q7Izk?M+QWz2CdvMqDy!v5 zmp=~WEn?nZm6}b_&eQ!Rycq*CoH?Vf_VBR?#jch2@)17oFZFhwuu^go={{;j(o_T-{nj8aQZa_5Sr;88tRp}a)M{98^PY(IY z{Fx`J<&0H>#2R2)`N~)<=`~afa1mV_<{w8CCvmH2+LY)$j-Q$ zpq$sdtY}+Oi)Gm{uTe6}C2V@liIIAt>_Q=#qaRChT|62rk$?v_LfM@Mvn2GKInP3c z^IdiC%R!q&Kut2&UiN>m&ey1k5f++-N}h)OQpaB@X%d1riuYXmPZHypvO_*lyhhx9 z{N=W>cDD(YasPPc5d|a-n?HrOKh8Z>!)aj&OmXSaDfZcFr{SdACl8CXjm(~)E)PcM z0FRZEt>80|37wBKu3nKDm_08QXCno#_0vUrL%Q;t8(o*1$v~_tIc%B=kju96ko&~)gB(?4g=$Q1#t~Jr+Qc=% ziSDx;UqqP0J^;ndMMu@wZp{7@V&zJQy*Q546{TXa+_giu$QbAWeb`dAQ49d&A!~*s zh`&JChIjuWy(G=j&w;h?URS${bjpXGVYDUzRv>!0Q`K)Bw6ltcC7!V|&gS*aT%VEe z`^fc_!{I6ssghBU;XWo3v6@GJu-Tif7kC>cDILj^w7&!N>v^94{_j4M zP>z`2J1!3?!f>1W02iJRbSQ6{gZaqyuDGG*3xxx6*>3p)R_VKN4 z%8bY>zTxGHhH2i0j8^?S9NMqJ*FVV`c!GUdQDNV``lDVAt){M@CW2*AvY+1 zc(8c;%nc3>3L@AedVQ4vxVeSr0N4Ydq24Lz=pVWa0wndQ$sKAmlHO3?QF5govV2IF zPAwWIgRH%bqlzm^=GFax;a&w<7gQVF|91{r_W(4>06WqwlzkmaZ~Z&ez+rCFV>iL7}8*Q+> zuS#WB{QTLr|r!k;KHC%!JR~MwW??$=8Do@~J891Je7rcB>tOV(@*{ zYwqaGJ%m1tliN<_XHs>M(U&ZA3AAcoAFw^)uY)aTHqpV?SdDX~*W$XBJUO$|t1l`O zNtibN{0`!MfTjPBDt+QQpQw^mRzrRkGeWLT;Qx?FF8Jl-mFt=a?aRRX{I*d9aY;1e zYms$nno>6X0QMXH60Y^H1>75Kl=>*dek92KveyXM{25fSfu?EGGeJM(26sp~I(Gzx zd(SWA?am)Ef{rwq7^niEshQE>t=#pv-$45juKuLwgX8w4ypt7U!@MM0P4nO(W_&gT zOi-1vtx|gg0}iXKx)$sgLN<%KX$%V@yRcV}6^Mf3d#}ZJA30q- z7yYkt?K{nq(qFbtD0u8|dIrbn&D$yvZdAq;5@I4l;!g{?GVb??8omb)J12bdD>X=e zps%2|X@wizSw);!pTqhfrRN)Q`cYKHzYhmKJ;YIPQFkNR`-lSfgO{b&|uG4b0T;fJh9_&;8D(xAdU(U@0vXosx*2q(7SNl3y*>Sc3SA?|0T__^8^ zc3~aV;V1!=M_Olk7nr(qKHM3P@gIb7F^;G3MH_UVJ+y3{q1lXRS2LDxfK@!-3kaGF zR(;8Hyq^m{4N@(0AP)3B_aG2v;AC+9RYAVw6uJS%NAy3Vll%#Go6a}{m9NOvc8)4X z^UrD7)x|a#4#k4dLf~Q~8LY>%QBBAs29%c@g5Ixo*7MBrG$}z|#JO zz$7_{0fPy1@Wv*MGG|0{{tW&q7(I(o!q zwC5v756KIqPlWOBfZ&3h#(hM1O{qeHw^5jR){Y>c8Gr z+Ca(#Wp1n{#^o+Hai37~e!+9fm;dnx zpUQAW6%>kN_^VzMhKAYvplLl$057@reDZ3%=w1(On*-cUUf_? z#9G;l!jvV3k(vD39K^hoW{pDM@@hLJ@=do%pgZJ>tO*?L?ym!&E{ELZg)&So+^8eo z3{DSsP6nZFQqcO6(OjIXtz8onKqEFn4p`Gbnz;2fe1NFfyng6k%6>em;O>E8&k`S zz*PcB!0^LNtqTn%>&p)u0DTCsI^#MNv6%bFuRmwr_D`0^mGYzpFq~*dR0f8hi^lt^ zl}?l0y(%m~PIL79Ln>_7Tm7x9Dn$tcG~3P#;5oEIYBMP2npB>C;e3Q%mT&s9-z9kC)zGr+&ygi0Wd6clE(^@5Y8$oMJ=Ohth zD4LwMBYi@MrHCm;nXz#ULg~P}>z#!>aSK`YYN=AF`*6iwDQ{Huu~8wQ-q!q!*(t;7 z8hnj>D*-g-zY(>sx1s)DcIfk^reqUMkxQLTy(4}um<)K@cG*pZ*r^m8A^k_{GMHE^ zcjdjPk>c(-1cdzPgIE9h2o){y1vD9Ux6fCaqSu{gG3TN3SZyjjX}WP>F-a!Gw87o8Zq;cdhELIjmWeJR}S z*cHVbOn3|1MB<&^jQgEiV@OS}Q1k>5KeoTn$bzAe2JG;^xZhHy#)vEMGASeIw9uBo z>LQ6f3mLRHtJa>KDfwN~5*`daU0&pjA^^$})zkWJMn)XPMS8i+JTB+t0yo58qxfaY z{Pp*VPX7?}@(KM+=$g1Z@U?SHq2870N+1~8tgH0>o4}GuC8tz2x~Ztd%-^m!j1v=V zYN>x`J-Pm$erjdfRZ)C75E5afV?p80Ge{N8q<1fYngbgZ3jEb%RqkY9Nhh=@t8M6^ z@W3KGH9wxZlpR@?Kzrq&QvzU~xrQk3rtDUgcs-Z1U1T22WI=#bW{{u@9d|l+^u9{* zl2ho9@iQ^6++Ua(RjyLvjWa^97C|kma`x+X1$0Ho+U3#=AcW|TCqongM0Y2SMA*Rr ztNJVBJ4H#q&D{1kDAHx5Bnft}Xc+En>vn*Dj#>wk!}oCkJSC>Xt;FtVAk$)fvgx({bwblU{yC- zMSpqNhsKh*?9~DX9&5k6%L^3ZhvrKP6zkd2?)tcS$nU>j+&&z$C63Q-i9qjcu zEvNm}+#@C~U&1Myb%X+0T(M0+hM>ns;q8BqX*0K)=u{a^WKCkWPjF0|1Ag&RglTC*Pz?UOWXk-&b-M)zyBlWs#oW4gGJ5xC&wV_Jt1Pt1su1N1Nm~ zq*udidg3LuXk&hyk4k|1|Am|u^P29lgKJw0ioN>yXl$;XbXrUKprrVx-{1}CZ^bYW#F3y jmoFYA-kq2-Ot$KtLt55q`+(ei_L@yr_!^R#000014_k$w literal 0 HcmV?d00001 diff --git a/data/sp/keymap.key b/data/sp/keymap.key new file mode 100644 index 0000000000000000000000000000000000000000..f6f2a5d8a7c5d4ee9dc1db5ee573fc521604329e GIT binary patch literal 2688 zcmXq$HZ(FeF*P%{ur$!M<=`wVPc15`EX~X>h>qp0ODs-FOV7y4&aqZcV2G)zNG?mt z%hl1-XD~5UaDeLrny_Wl4zmsBn=Q6(+`e<0qmzxxe>ZmzPcLsDUqAnVz@Xre(6I1` z$S6lAXBSr#88c}`2W1u2I5jN|&3J7N&cJZjppeK=Pyc}GTHZRxU>BfjpfOfTbqqC8 z5zb*we!ez#_Jr)WBieq30S0DB;jbNy9R3IDki!4aK|=<0c=+oQ@;^!8ucX|ss-~}@ zX=@*g9R4SO_QS*f)Ja1IEok^#Tg4Nye`tokJuLjIK|K4=d{UPt-Z}NX0}hA#mg{dc2h(Dgud>Uwz(g4W9Cnv z*wZm-PUAcsLiP`(^sjbSNnJztT>Rw=n!xZ+tb&#QaVorZg|PBJcM=1GRyjER>sVVU z63YLils}02M;2KAJ4V6E|EW`W>jGirzptt&!?bX4`nT897bRpr@!@YKEmNml9bGdc zCe9(Yc3}Oly#=}a|ML~8{QvgEkimv#<^K|B`JaGX{@=NZRQ_K(V#r`O+{=Ho@&_3H cPcmWU&*ucXmp@;4>!x_Z%AZel!?XMW0KQF=u>b%7 literal 0 HcmV?d00001 diff --git a/data/sp/kuzkina.mid b/data/sp/kuzkina.mid new file mode 100644 index 0000000000000000000000000000000000000000..01f4ecb91dd19f1d5fea7ca9a75c61af185942e2 GIT binary patch literal 456 zcmXv~-%G+^6uoMQ{g8xSiVTD-A%f~Df-yGc+FTAbr88VgbRiRu@=Nv7(0Z0G~sU$s*XwtOtN}Kzb<4_!OZ{ z7Qk}OW*8N5XaX%#hn6Aax=_2r&gy+69B49v>7Ro7DmoT*>a!EbYao5L{U$~W>@4BK zfe$N?6_D()F_392sfqbh%y?{t@(Pg8=D3Z6dA4TJ5{(VkynpkJ5#&;0ejg)GiOL(W ybXXs@Av@2;JgT5^&&nLJD2PSzN2tVh5||B(xKjn~0M0rf*+haLNrLh+KBHgJ7Lb?# literal 0 HcmV?d00001 diff --git a/data/sp/lang.inc b/data/sp/lang.inc new file mode 100644 index 0000000000..48c8fe6af1 --- /dev/null +++ b/data/sp/lang.inc @@ -0,0 +1 @@ +lang fix sp diff --git a/data/sp/lang.ini b/data/sp/lang.ini new file mode 100644 index 0000000000..e7fe62f210 --- /dev/null +++ b/data/sp/lang.ini @@ -0,0 +1,28 @@ +[start] +startlng = 1 + +[comkey] +ccomkey1 = 1 +ccomkey2 = 4 +ccomkey3 = 7 + +[altkey] +altkey1 = 1 +altkey2 = 4 +altkey3 = 7 +altkey4 = 3 +altkey5 = 5 +altkey6 = 6 +altkey7 = 2 +altkey8 = 0 +altkey9 = 0 +altkey0 = 0 + +[langs] +1 = En +2 = Fi +3 = Ge +4 = Ru +5 = Fr +6 = Et +7 = Ua diff --git a/data/sp/lib/msgbox.obj b/data/sp/lib/msgbox.obj new file mode 100644 index 0000000000000000000000000000000000000000..655d3dee72dac7a6768090ab954fdcbb25803a39 GIT binary patch literal 981 zcmV;`11kJWP(w@L3jhFt00001Yyc*tx23KZ}i}hoGk;$ydEkAq*6X zXOG`h6w4qI&^mc#98#AWFx|54#7&QxPf%Jy3V0+1t}krDAC12bO|jGVL-&4sXf}z6 zZGK-zO=HpLd=eZAQD5hVWYRV%P(2KxzLXE(jWD>g*8+NZdMH&+_1LoOKQ+v2p=?4P zD{Ockn{I(~rhGTJFG~Uw;Eq7Y9-c)EeyvV>N7di*ynr(K`^|jtbD3{Vw7Hz!1EGTJ zAQu9l_S>w#VF+|xddkD|^Imtf>#N(9LQm`1{^(m_D8UMD`nLM}QRB5*8X`b){h47+ zs({qy#E6h8T6m}8>0WwF;q4&TO9aS+trr*%&UZEyj=y$WJ5oN~DcLE08>tG6xaCax z_JC=^S=7&voO4aaM>^A05U^C%UX>TtmD0}VVk^+Q**FoLQ^)sL6GmK{-UZ5f8|Z2<2YV5U5kFrNL?M9x2rLE&!ns-7=a|%Gs^m=K zW&3BiYYRy;vs_ZkL@VUAv!J2)Ah~PUNQV1_jR^0E%-FaAoJU1#Ngpti7ndC*_-Xy` zFwdHX7uIV5`L*}w-rbU<=K93_<$EI+#(y6HeeictYUyFZ*Eii@ZHa$@A>t^&VNrYt zI?)39J1rXpqjGl7jEsvg80U6$s-d!J@j`q^R-rSvSCMd8sR$;!Aj62HQ7UAGL=;E% zhqN#sy37$g5|-swq=C#l1+!7K1o5aMfOBYLV!j@M`Y%iIR3j;nls%ap2-8Pd$Up`yc#2A{w3;J%f|9gFvVPKdINtmu-NF}GP~BjlcTo@Z1?`a*j2Ch zN#RGStnzURFS-sSg#TyHdz-(D^ZtsQ5ME zviya!3B(H115k6Ms-$6bngFP(bI;!7Iua@%v;1#(7AJG;J*kenaVlw-n;!rU00000 D`?cCd literal 0 HcmV?d00001 diff --git a/data/sp/lib/pixlib.obj b/data/sp/lib/pixlib.obj new file mode 100644 index 0000000000000000000000000000000000000000..ca2e94a7780dc586f691d3d46566dac759043422 GIT binary patch literal 4620 zcmV+n67%g#P(w?_C;$L~0001gJOC!{>Il|L*%=3-<#}NB^Jq(BpRV-8pceEVioZxL z<`CN*6`zH43@a!MW9nHcaybPcDYc8AVRBL4w{3yr?3_>8hQSzs2TAtoir3L(8x|%l z%kFdN1z_b4@!yo0k#jI51B3zKe1B*Y8E_Bd)=hDkssH{3$ z5X3uOQI1KyXhO?=3C_Hf#BC>~O7z6`Df?XUo;!+UB-3npa{3XiQaB;#zg2rKL zgn>0QKaV@*XrTCdR;^L!Qm=1c(9gEhfbo%rUg z%XREOhfSof6`#68&fi{gE4Qn!U|L32F|k9W$)h3?DC*E{c(6X+Mkr#$=mI4Xx}E=v zo$=x2#{drexQ9~nY}4Sc^2@5UT(L_O)~^xB28vu$Zct5v88y zZ)4co*@TNKGU`o}%l#|r^AdVaosuMye_i4!Pb8k?Z1T^zm_HYS62gTosZl4lI#Tec zg&cI-M6UpOrNjK8(WY~DpMtrNE*cow8yIY**`nu7B~ETyiD7O);KvlrhL=i3Iv?-g z8%YM5mVypsYb%6<%Ptt;%V0zwNX+XWx4G)03A@=f-2C>FxBq`_hjAHFqWSr?c-^ZL z?^ne3fNq#EoLVz=lP$5{r4d@=ltcQQ2+Aj1aQ1TBG`N)3?Us%@=G zw1L|#Wd6^=sWiEDC}#xIy1^+d;Z}R2>Qw8p_EYnOJFxuRKj^{cJwyL?uT}WbX(HCD zaqPe;36@%LR;gp(dwU2`XSG0WhlV;4gzaHPB*mdk$NO?H{6V=rCZ$P>(5Ij0GfSVL z5?FM+2M?3BF-2H}aS9_=sA;w+6@i~UVgNC8&SGXU{~_anWSBhN%A zj}6fTcsdwXNffH5R9@hgY<$>!?~eK23@U}G2KhB|gjNU|8T%@%2l z-r15L)zzWuZ3YAAL%+b&TC{doJ<#Ak*&jCw&WjXl&dbc@WlNy6;~+vL|AqD=bD@CF z+9;Mgvh-k19*P_{RpXR!HTL> zEx~xivVkC34i1bB;^e4%8sAD=;kbYfRrkL*2{HUIZ?i)E^a(pEEc?tNRZB#fxDVEP zZt6-=vRaY6m;*a13(QmLb{DT;!C}txTr70435olDj04W#z+k09)?opbKS(PIA#aAZmq&hCD_46qOYH6IHwc_>7msp8u*POv)WAJB!WdzO&l{3 z#l3brEM5E$z8tLsnYJ@?TKkgEtbvK$@MSbTu7H>2n(^YEG@?vmraBn51Lu9NHj@LC z&YwqYg>7EMQ!d0S%&Ighn|x8E9E46$^D$Mb@5q%v%~fv7qGG=V#Xc?qU|qk@`c?{X zO2`}3qw!Ar)CifMT^|x*8ny(O^S}wcASLx%M(NH-5_;`VnCuSac>5L=roR5#4xdSf zENK#4&LYep{3`Xs!irVL>(Ym+bn{HbNA^Z4Nhu6eE#q^>rUN3GT~nK*_c67suzr0Ll~DN{sHIGm)C4Vx@l{&{0aJWS9g`RjlR0rQ~U@c%A+_8GBiZwPF9a8 zXmV+`Xt)ccz<^+uO}j2npCf(p)mV-;wA+4ewlvpm?(^ca5$oV4WMr&lYmB*FJLf7K zRGss5M<|e4!tYQXuUN7GznfmBN5KK-P~fXfJK`U|7e@#z^vgx$#suEs1D7kB{sQ$4 z3`h7Av5v;-FfF1l0#y}q0y#(R3qFud}7$Q{Kws=vy4rtRkA;ya{x=l(!@0Rj& zFMmBTy*Nnc9r^)fh#19qFkClRP)iXtLgz!bTH4->{;dir*S$*qr(W(M{O z3tQ$Swdc7=_r=>w{OW*+;?s^WH-C&&sjV;Q4UAiAi54h+gF<-EXTj~>@!{8nQnD8K z$R=7I@IDUVeC@>^Y#s8e%*`)Wks@Y-MxIs5x*|0!skykFv;!8jwbw+IC->79(sJ67f38 zyzj5A+|4IFMDfYV4yo+EOmNAKxd74rB2`yFCLhrxq8D%@AFD`TqBVn-leRM_9Ip6U>8k-AHe+F0uqIsXYg z7+v6+CDej;lGZ?ijk^s0?F>lMd4y>YUOu0yF$H2De>5gV4McD#gZCa4nY2{qVBCn@ zuXjjl+6K03l80XFt@5jvk@*Ks-UYhQ1fH0t00`Fs>_Vg+rWdGyMF?1zX3~RP;eLqa z+Z&&2%DW`R)K>D|M9t>`GP~R(VGrPV;w>cg52V;I9|OYjFs3utTCAkBJ#C`|*w}tS zFVeVK9$f{vbW@CZ>$GNl*Y<^CXnQITp?2~UI5^_hT&Du?xC5n6^PLI9M-w1A0(|=e&>#X zLyqwwOxSqY1ghOekb`RkimTOGKF-$!`wigiuEA^+3GQl<+H?w!aDecsVzfRaZaDwl zRRq(o5nu)4fbKrJFlIyV!E;yKV$4&x3o4aZiZynRc_2Eh{n`=m&v3&z4f6~csWPtMi$f| zF)AhBp;p6+i|5Dfp*|FF=xD)qcu{fDkC^=J*z zH4B4d4%Ni3de@}oqsi_c5F3_^c{$3R0r3hY*@oeK72d{0Ok}^rhlCzwPCD3o|2n6( zL}w#=w-AbgF?N4)kK5o*SSQ+?wOT?Gds93~fj+0>w)av(R9XkdCa=wm_(G=$d)1yl zyP}(&Mmt($1iYDyPBT?}B&X3>B+!U9Ltk%zX6PR_ww?iGmH0cFIqLd4X8^!(>&8t- z`^QN&^)6+cP{DH1_lN-F5TOy)%{a?4E<@{b@=Z)8qa-vh{Ijc6f8|GY94QtiLAh!W zRVPOupj=-@y=PWy$f~MAL#paBbXML_bTn8qVe`9x(SZo*J}@%*q(X4mFQPNRfVN3P zA8I(I(!0cCIYQ^|XB))-V!#6DBVuoPtBgwH7GS*pimOCHdMoFArT^g8p3wlA16a|$ ztRiXj%ka{agpnk;^rPBbZqoyv{Mz`%4HGEs+9rFd&R+j0Wcv6w5A?Q`i7DWF&R&sp zVY#+bjdIWlMsUKBG99Tj3QM4W`u};bu!WK{jIGOz%u_024_z9d;~R|h`FNE9y_J%7 zTS!8pfl{ryJE7vC2jIfmuVw&u7wuIi)CpWnt13B>%8;5x)5a17mc{A*rB)|3fNIjf zN|WQIH2Yu7=3w6>V5erwfUW0ioB7LCn^0*|>(zsJ-7_Klrgaz^%rMsy|jv}djbqyi1mmX zXBk#iH3M))S>xp)Ze!h@Wp=eo_lG3M;d8ud(zE~dFUsQ9)Soz%-2tm2*{8eel|An8 z2fd6d3FuClrgwW>^E^$HwmNGbk}~bwRm9;4k9o0oA^^DHO`}IX#iT9gOI8BEW&5vs zKis~<`gPP%sxxYT^R(-DV65oLW%?+Cr-B>j83bXU!x3x%Xh-%s|FAtEliKs|GZcd?D96pfBx7-~W40h#xB4Lx#>$`#_2`LWDjIJFQTk6XPz*MH z!;USZ8}@y`H=|9;idz~t|B((v9_ws;}?LLn!c z{31~w_M|Ta*+uelXgp`ToJ^-Suv{tf5|RWL-7SJX4J2&)gS-MoJlDx>Jo_ESSp{OY zB0fUSgp6eWO+jgEgR<26e=+0_LfAvlXj{v!yvaYqRCHpt_l`UOlI?HdGf6@SvS^W% zbvoLcPd`6pQWeegE2*eDM;2Y(%46)URwIw@>X^l4Y{* zshWzH!Z=`{OCCHnM#Y5*gpto=MVJS&n}%_Uf6s1#b&AhYrf9;Hj^!krYslrSUFAX# zi>%N#*Q5Z&MR85OU1Q#W-&@d{W~sxk5^IV#)em)BmxV*YP6bGQM@ho@>a7igQ@kU} z&2$L2kv%U+j5#2;-RE?!H_;v;*(tWgKIzPBW|t9Inbz^ZEG=rD0LDY7B=0Na-%u+C zDyJqMcO9H+d`T_hs9YwhVqK literal 0 HcmV?d00001 diff --git a/data/sp/lib/sort.obj b/data/sp/lib/sort.obj new file mode 100644 index 0000000000000000000000000000000000000000..063da99799ee64d7114d1db4bda89769864ef138 GIT binary patch literal 851 zcmV-Z1FZZ@P(w?c1^@to0000#JOC#DVV(`3k}CVWm6ntCICt?Tk}=*NFrT_^ZEz}h zSmGB!i#s2uPNz$M7QruMM9xH}X#*fRElTrnv}+S_wepB6e6aoemB;F}6J`Q~y;TR0 zm@+!WK0h4t1)rn=ti!}rg`UCG8~9>jRt0VQ9887Hn6g^kC;7bV*b^qSXQPDnLoQ;J zVl*np5oflR;81(9cPMtjDZYr|z)@W@$I=0k!X8N`<=@L_PBR|P%C+C3X!b;=nem{~ zF=Qmx*YR>CyP>Tk2|z5ZrE0LTUcFtdW-i&cXz%S<)C^DR@Yy*n_`F|BB?q#CU5=+Y z)30eqRxPAdzlAH62*IIth~dwZ2?I5Md1@UW8YIC83Isw3=WwyBmN5)iq{3jfD1cPa zBZmBi$$rXe25}7vIK!3M&F_k+I&;G|a;u0Lli2HJ5nMX3r<7$d;wu|9DY}CSCO;B@ z=aXVT`$lW5^s5N*z*4<4W_=^T!hWvqxnhB*>BzKVTXa2c>L6{eUx@hLnY@ z1R~rIblVF{J_GjQkrvz-80sqTqEf3#hjC#_ApEh}n2-x4a|9Z&+L)VfXHnp%H`Pe1 z>=JP5;e(TzWEkte!6d(MCEG8M6>BSuzv^N;YYbYF)J)KNbmbPWhcd-t5LrkgvR2YG zd1pIq@y$l-_*X4hpP2{a&V1`O$vIf-P~qtXLdA9#oA9$j1X6K(Y7#H_sF*JnN}g#*_WP)P41%jJ10e zhLjVAQ00001Mv*2LLXK;4&&M{gp_J6V*(8TcaH4R)AN%Yx+1P7z3(44dl?Ac* z`Gjskx%mp3D?oRN6dCW275B>u_IS3s|3Kuo3U6k$!XZeD@*Qf?+~Et!?CX2QgI2>OQx1K5#t%W! zJ{PY>=$wh|FGc~!=4PEv&L0dA8^PG=Smnkc#MSj|9WyO^E2ajaygb{1mRCai8XSiDN=hT|_bYxg$?q zULy8+(-FhBFp}ax9;-aj8)ah2?p}p(UE`c({Xc~YxQ~+a=gF{C1lLL+%?9}y;?WUB z_z5?g*bhl-z6lzhQ;&s*JY~w)xLsv}$4>uH?nBGx&)jh9sK*WIpLs~BSaYcGV`X(Z;>mtPw4ur<+PWsDgGyYVhHpY9RcVrqXvwFFf5Y(GjzT&pL3k z>(5*Fsza?4?YFsik2DUf!0L0PQBS{sU%SpFbMlq)F=FS0y~GQi1!^iUtV%-w58H@o zcJ%z8R`oiyyeBb2ikju!OE})|)Q*(>@LB-z5L18!I0~p-b8;mGQgzZWK_Zow;t935 za7@)!{1&C^{ZtfjDUG*8CzoE&yXczu=jSu5C2Wsk-m@G0^mZCWvr_K3>~R7z*hXl7 zxJrO{^VA6tvP{Rr`M^p83CfQGWzLOP?oY5>mi*lXWCoe+E^Jt};Ebj>t=cf(F|k5=yK7UKmuWGHnJX11Ed3d-F=N@SpW2i*(;g<0dCu@xsG zd{A5Ow>}%Z3095aj@CkE4eM6zK*kyp(~3m#=dVic_-MxH*n;@+M}Q8@$aS#E^gqO! zxy6d~{nAs(@aP620StxgVIF1?Sti$e9rnr_th!RnQdgm4xeZ*_s%~>!RXkpyyOHiA zJ`cO8hz+brYxV37d`KF4VGqMZ;%x2m9AZB7k=XrFb6F*~pNn)6)V4@(K^%5!xd$`4 zByRDBl-I3@wzkuw82LuzqW@t?)99_wM^S|g3oydwZ&H)Mej%M)@$fk~$lWljmB8Z3 zeu6N5ySb}M3XPKx?q^D(u~4Wkjg(~zim+tExmc{K)i4PkUiN(n@*lENrQ zfll_xG>Z~z2^1k4e?1|udRIKAhl{>HV##W{;jYOA0KV3tweC(4V$6S)9h>t0+syqb z%)(2;@Wq;Dpqyy}j2_^$%_6=u)u6N!BB+XLLq00KSKR;zcadAInH_BEJ+IvgC5cE&<<#T7iRe9hWCMWW@iyr{&Qs9c;>mB>THb5r3OJydnY=n=E{w#v=n0`(V?(5?Q7?##MT5My*I65Y zz3`wlcHd;iP{hdS4O|e{0T+EbCt3(G_;aGNy>fSZb1LWN1czvVh45pQYht`$icqeU z8zUnV2qXdu0P#Z%HAtgY&cJ&C5XBQ#ti+<95k@$f=Q~rvZ5PkPJUSRPfynTP3cuTj zi4Jz%%h)hH>E;THV2hdF#_cB|Z(W&poxlFrV#Z#hZr`-yW239zkby3uLnEW}LPJ^vHZrMzk%#XS1o{8_ z0l_u@ek7_6%-J=igYi>51`gTlMDR38S63j6=r<2vTVfYl;F#&;tKLGG^-XuP7lBO& zC1pjKt1+u*xz3=9nmqh+tNR@*JhfBAytoA79U;deQC@&TK66CLq>qSrQ}OG{()cYv zePOY2!6clIZ~m=1CbdK%@bM4Sdq2z*_Op$f*>-*!GfF`=&;>LjM(AfoNI4+_ay%=_ za(vrqg9*ipe5b>GRDOk-aQxSwqM$##?E7{+pJQ#DViEX|@%md}5iXcm3p!1NNI4Yp zTOz`P<6Q|V+qhngBZ;#J41Y`xN2(*DLEqC&kzE2IaB1_1Maq0X{o4USlpW+M)9 zh`hmyJz{~+iWja!vIji=&WuZi&8}Tg(u8$kOk>j2LX?(>{va8YD+HfZZ(NKb(W5JQ z(SQ>z%>n!k;`Hme?zMgzLX&2@m!c-wN!?rVN~Tn(`?ZnkJg!KL4|H7p@?5XFnJY?5 zJ!&CO(z1O-NLDfU1p+Vl>OERX6IO958%_o-e%dasq^Uob{0EL98LF<)5rsY|c@mV& zzkf-M&|sD?JAqXkbw~v+xaV2Hq8?M{+QxR8dPrs3pmc(u)kDXCDYB`lqI`1>j?EM* zhm}yc$i694dsVr*IT#1<3~P7h@=C2KxTPt#%CS2FEqYL<#V;PkdFM?MV}aDAgD z2p0oQWHiamf2A@)tZSjU&a-r72f-3WtZ-&;jUM5-ON$cwuucaUoH|XL+nX`sx6f zRd~g)rTjac5IV%y@8hJFJT_VJt|^d?!Kly9izeIsIgQ0mjGx`R) ziPf%$g!;GO1UBpX4HE26q&uGaDt_7nSgEXYZML6WH4<$$0o#oh;?nun%W-?FTWJ|C z^UNr=0xV*^pr!nA+0}l&XtC~#Cx}s3v1kB1Liofgscz||y*=F+ip;?Wsj~I-?-qkg zxNYU;5> z!uPJcUeRtM+j8b5g0OA>d?9;m123tkq9wVzNAFfdc3ruAuK*avRCNFsl4yerT>z(i zNFhaD>i=(xSg?B-c1opPK*98XwMb3-=8+*%C=cn#46AyjX3dxT37%j%g0n`-aE8sP_nXpNqt zPOH$zNp5Fu9@iWA==+lTcUsV*CE1*=9=t3?1b5{H#UfA)LZJ;58D>@qjV>Y8WMby9vW>|lA zQgr3D`w&&jplmNVB)b$cVw5HMM?$>1aK2fNJ)`?9-!UzaF5Di7P*iLcYjVUQF&@w8 zw&|izD|Eb-8ae=Cv&a@p6rV-w06kq=&jOI*@o`44DptV#*uVjkHrt~ll!X6fL&Lj+ ztxW-EDJfxb3RB6~NXYY992_mTAF6=1ga|!VL{XZO8nIhi_nm=x6>Zn;4^Y@nlWdgz z^ZK>OuyvN$KeJ|#VHBXrb&Kk&xxGP_Hjs!oBcO{(ur6ur0&{AC&MtyWa##?<{p+jG zULE*~3(^y4m=T^)w;dmMahWCTp8o@fs@#2bAqj)KN!5H>y}W7*0PNPu$ebwUBh>pviC=zWoKE-X{Vysjk`&1| z0P34Up2H?Y8O$n*K9AeufT{K|)QsbN-somN+ll{iwtzW2gi~;tP4qB8vK&jbYYK1B zy7%VR%ob{bg+<4A3YF4N2S&Xcas!Vrp?4U};lhhcuwEH}ROP(F=bv2%d4xOG6h{AM zlejzv&LiI>z&Da1#=)gD_en}9+QiP74%)uZhtc*;o zCub2tKFWXF)R&V0Xtctl-k0wVd2`nXuAttM2x?EGz93rguE1Fx0UvO1`!R(>LorYw zH|eucx?XdvIP`HTVKmKUmu4rz;1p4&lc)F10w!l@{4Z5^y|B6+PzQ!&yIaP`h()24 zLzzxKdEFd?B-U31S~=FWMDvaJK&Fd0avgq7H7Ofhh8qau&7ehUxey(`q5oTzq1d<) z0N6SG5$z?-JdQC$3lzOYkYNsJ z?TlOpOic80PecK?bsh*Z9=`%O6fOs!Jx1=^twEF2MjI>O{+nLa!s+v(`x zV&xAA@ceOA21n<5z;5i*yK&DAK?gV&BEevx9+G)T%}zk*u_YsYO}Tm%>AzB#i}6NF z#hTizMP`GjF&ne3J+ZCStEo% zwR)0PJz9rs;A1_)4k5N^gKTyb0?>E|oMQkx6L(y~TipT$hxjw~!eK?D6+ax$hims* zf-@=#)4>DRqAO5Sur-A73C#n88AvmB2b?xFD}@I$c*;@5mA#qYBk_KC+tvg)_9trj zWU_r((HJLa@4#)%`y`2rQAKGhRV`&IXQk&Ian!_XjveuVtUj)Wp|rfmN5_b_1&s+z zv{sBx@tl&m=pK(q+~%ObP494s64WapS4gQ*T(uh#VJcJWw zj1|~b?2F’o*>r=E(`O=-zjpFwX`a3EzjlWzH)d7He^np(mAEst-dk!<%e*1FZDq#NgAu?}$Dw-VctCQ>d z-sGJB4N#ABq83`(8|U_at6`)m|G|doc!d5gBkyD)UKuI^!m4z@U$pLi4bKtgs?e`B zb+w*eON!24T2M2k|CuRG)JRWgdXX;1E00k_t2Mj+5{MB>yx47`Ia0^5bkRYZg!0fz zO0XceS=*7qyT>850N_w;FJLCkuM^H|M zzvW5{Q=^tel*79u)J2Ao>OR3L#!;pj3jnK<@0K4xlUYLJPLu0uFqG$i*4(O)0O6^| zO7A>Sm=dGrq_KmJV4Q$qwC{PQ`_U6Y_W2YqHIb2%&IU73d{Af}BH?y8$bOV20&1GM z$0;fFUNEP&hUCY#cX?U3srDu@7={AmxnX==7e$I?U~9#4Rv=G7O!V@I;(#gy8xq}l zBP#`2p4IshzAhJizIgzsJBE;ag?A75_8^r&bg<8RV)p``7UC9|*o%M3GEUmo4BmwC zqsvnnQVvtT<2bb9Cv0{em=6zF+56HI@xZsX1a*OGy9<>^P82Bt9QV{o)>=Qz>_$`2 z#d|uXDo&ap1G=wa)^&*w;6!O9q&@=4dxXs`en)SCQAjf`joB|rX3Y*-^0Hr~iLo_n zwX3{P0b2_4`h3X>!tEhlRoRuIk1AG(i|9a zFkA&f7Ugmw+=S6c67p3&$OX}IFuxhOKZ!d93Kz&8xduvoD9EP{1m@B>gzmbBC=qjT z^2s~AHh1JvD0GRUF}~F{A{ISc*LU7+(3hs(@q7bsqw3Eq9 z-u2#|00JU9le|6!rL=@{;wxrzqz$#2NkcD>gA>WUH?T<|r00000Yyc+tmlUHW+zCJ^ojFLVrzMCG7SKG(#QC>m5lk5q zTiMaN`3`1~MOw{aH&Is!J0!JO>RVZ*;w)$&yesk1=eB=eG%=UqWL+7()0RNW52;9D zm_v_So;2*^Lf$A>G>^+?^(}zWK?_IR_FydagXwAZ7ueBe>cm=DOZri=Ase8aeZ+!B z9k6^DvdBlMOUE)~vi-O^>I#yuoZ_5ax6iHhKYm zV6ZEM4O*nQI$r8a6{3|B`$@jwsm0^4RfJlQPeQUQlpH&<~>p`KAL8$;|?==uEaVq^d-UJ_v$TPKIP-rO! z!J7xcl+g}?QKW>J^4Q@*x0+x*JfbvAc%`Q#siVZzV&?ZLrI z4vslc?~Z4am0x{XWR#EeXiv)_pT+-=l6W0kL+LQ0S^ zj$=!+kPlHp7~gvG_;ruIRHk9JEbiHWFHXcIm{=iDG7?1(M=-o>i0%x>+&n}tRBjd; z1GF*kkeLoIhbHCNe%i+5P3wMjUaTzbjMeKa;Sw#d_%m^SKPyV_w(^w(I_k(rVu%%j zL{EF)#pY^p0f)m6H-16=2z2O|+0VzvS8WRt>TB8!jNd+qEOPo<>v36rXyd)`o?VZ! zce`}Wae82zT%jY%`1E{H-!PiV0r~|mI;-}kn+?u(KhGtQL)+1Dy~*-JG@rzLlK+L8 zacpfuF{fA7DiU$?4cxQ7r50O5;%A1^kC%(UsRmE^uo!GY;P@Vk{<~5fH-e;dws{n8 zVTbpjemEF!XoA)2BgO iH5$B#-XF-czUPD?^t~)LRoDgwy&ySE#!M9e0001hzQr^E literal 0 HcmV?d00001 diff --git a/data/sp/media/ImgF/dither.obj b/data/sp/media/ImgF/dither.obj new file mode 100644 index 0000000000000000000000000000000000000000..0f3273e17ff7089e549a6b0bbe80514ba41224d2 GIT binary patch literal 1006 zcmZvaPiWI{6vtnhP&*0xMHv(nb%(``#~kzwd8R5a3a& zmDm;l&H)Qam{318KxXp;eKzk9#BYE^1E#vbzx%Nka+`aw**I^qPW$VmwG13*n z!?eR;U588=@*#xr>*U$E>$;zug^27dMMBPEM6$Q+A9m}?LGiSy;&i1;`)};c>MwEs z_1^iqIohp1CSAr)9UTkREwTC;9UVBRu6|A(5qU!WPwWW>dFM2Ou^+_<@P%PV1B0Vu5BV}^Stz+1=jpB1q4&?Bj| z`B2XT%=;v#7uQ%#f+MO1kmkuGK!qpNfag4!0(i+2YG|)`G7a#KC)AjH&yyK|uRNi~ z)OViD0_^aF8q>ddGKX{H;Jw+|q$)LLPV(e3z*(M9V>aRwT+s9LB1cA%YCefZQ?!UX hf2WV=r8K%#^vN0Q@ctmDmrTg&S(-1a59nGM{sFCE?VSJs literal 0 HcmV?d00001 diff --git a/data/sp/media/ImgF/invSol.obj b/data/sp/media/ImgF/invSol.obj new file mode 100644 index 0000000000000000000000000000000000000000..187668b504cac07770e1714e7fb49fa50a6c9f9c GIT binary patch literal 217 zcmV;~04D!SP(w>x0RR9200000Yyc(*Zu-t}WZ;q(taHLnZe8L|8s@_UXtBCeN_d+l z?x=a6w*c&Y@kS6YR2||jV}+o-ahbe8^)B(h2U*V>FboOVEd|MvgV2mQwnxoLJcX zjllwPZqLWACrUueH7na&{%5>0ncfiY*G7=@B6W8iM>pP_ygCgEPcUus;N*{%E^Avw TS)A-PTDQOk|CB*hw;$vHlFwvf literal 0 HcmV?d00001 diff --git a/data/sp/menu.dat b/data/sp/menu.dat new file mode 100644 index 0000000000..7abe377dda --- /dev/null +++ b/data/sp/menu.dat @@ -0,0 +1,166 @@ +#0 **** MAIN **** +Juegos > /@1 +Demos > /@4 +Gr ficos > /@6 +M£sica y sonido > /@7 +Desarrollo > /@8 +Sistema > /@10 +Proceso de datos > /@14 +Red > /@15 +Otros > /@18 +Ayuda /rd/1/docpack +Ejecutar aplicaci¢n /rd/1/run +Apagar /rd/1/end +#1 **** JUEGOS **** +Logical games > /@2 +Arcades > /@3 +Memory Blocks /rd/1/games/mblocks +FreeCell /rd/1/games/freecell +Pipes /rd/1/games/pipes +Kosilka /rd/1/games/kosilka +RockeT ForceS /rd/1/games/rforces +Find Numbers /rd/1/games/FindNumbers +#2 **** LOGICAL GAMES **** +C4 /rd/1/games/c4 +15 /rd/1/games/15 +Mine /rd/1/games/mine +Just Clicks /rd/1/games/clicks +Checkers /rd/1/games/checkers +SQ_GAME /rd/1/games/sq_game +Color Lines /rd/1/games/lines +Flood-it! /rd/1/games/flood-it +MegaMaze /rd/1/games/megamaze +Sea Fight /rd/1/games/sw +Sudoku /rd/1/games/sudoku +Go-moku /rd/1/games/gomoku +Reversi /rd/1/games/reversi +#3 **** ARCADES **** +Tetris /rd/1/games/tetris +Pong /rd/1/games/pong +New Pong /rd/1/games/pong3 +Red Square /rd/1/games/rsquare +Xonix /rd/1/games/xonix +ArcanII /rd/1/games/arcanii +Phenix /rd/1/games/phenix +Snake /rd/1/games/snake +#4 **** DEMOS **** +3D > /@5 +Circle /rd/1/demos/circle +Fractal /rd/1/demos/tinyfrac +Color demo /rd/1/demos/colorref +Eyes /rd/1/demos/eyes +Tube /rd/1/demos/tube +Plasma /rd/1/demos/plasma +Moveback /rd/1/demos/movback +Life /rd/1/demos/life2 +TranTest /rd/1/demos/trantest +WEB /rd/1/demos/web +FireWork /rd/1/demos/firework +UnvWater /rd/1/demos/unvwater +#5 **** 3D demos **** +ScreenSaver /rd/1/3d/crownscr +3D-labyrinth /rd/1/3d/free3d04 +Heart /rd/1/3d/3dsheart +View3DS /rd/1/3d/view3ds +CubeLine /rd/1/3d/cubeline +Gears /rd/1/3d/gears +3D-waved area /rd/1/3d/3dwav +#6 **** GRµFICOS **** +Image viewer /rd/1/media/kiv +Animage /rd/1/media/animage +Image Filtering /rd/1/media/imgf/imgf +Palitra /rd/1/media/palitra +#7 **** AUDIO **** +MidAMP /rd/1/media/midamp +CD player /rd/1/media/cdp +#8 **** PROGRAMMING **** +Ejemplos > /@9 +Archiver KPack /rd/1/kpack +Flat Assembler /rd/1/develop/fasm +Debug Board /rd/1/develop/board +Debugger /rd/1/develop/mtdbg +Hex2Dec2Bin /rd/1/develop/h2d2b +ASCII-codes /rd/1/develop/keyascii +SCAN-codes /rd/1/develop/scancode +#9 **** EXAMPLES **** +Threads /rd/1/develop/thread +IPC /rd/1/develop/ipc +Color slider /rd/1/demos/cslide +Console example 1 /rd/1/develop/testcon2 +Console example 2 /rd/1/develop/test_gets +Message Boxes example /rd/1/demos/use_mb +#10 **** SISTEMA **** +Configuraci¢n > /@11 +Sensores > /@12 +Archivos > /@13 +Testing > /@19 +Accessibility opt. > /@20 +Debug board /rd/1/develop/board +#11 **** CONFIGURACIàN **** +Dispositivos /rd/1/setup +Background generator /rd/1/pic4 +Colores y Apariencia /rd/1/desktop +Icons manager /rd/1/icon +MyKey /rd/1/mykey +Modo de video para ATI /rd/1/vmode +#12 **** SENSORES **** +Process manager /rd/1/cpu +PCI devices /rd/1/pcidev +Test graphics speed /rd/1/mgb +CPUID /rd/1/cpuid +Ghost Monitor /rd/1/gmon +K. Bus disconnected /rd/1/kbd +HDD informer /rd/1/hdd_info +Read HDD /rd/1/hdread +#13 **** ARCHIVOS **** +KFAR /rd/1/File Managers/kfar +KFM /rd/1/File Managers/kfm +Eolite /rd/1/File Managers/Eolite +SHELL console /rd/1/shell +Save RD image /rd/1/rdsave +#14 **** DATA PROCESSING **** +Calculator /rd/1/calc +Tinypad /rd/1/tinypad +TextEdit /rd/1/develop/t_edit +Table Processor /rd/1/table +Graph builder /rd/1/graph +Hex-Editor /rd/1/develop/heed +#15 **** RED **** +Servidores > /@16 +Clientes > /@17 +Configuraci¢n /rd/1/network/stackcfg +Zero-Config /rd/1/network/zeroconf +Network status /rd/1/network/ethstat +ARP status /rd/1/network/arpstat +#16 **** SERVERS **** +SMTPS /rd/1/network/smtps +HTTPS /rd/1/network/https +FTPS /rd/1/network/ftps +#17 **** CLIENTS **** +Cliente TFTP /rd/1/network/tftpc +Internet-chess /rd/1/network/chess +Internet downloader /rd/1/network/downloader +Text-based browser /rd/1/htmlv +NNTP-NewsGroups /rd/1/network/nntpc +TELNET /rd/1/network/telnet +POP - MAIL /rd/1/network/popc +Cliente IRC /rd/1/network/airc +YAHOO messenger (demo) /rd/1/network/ym +JMail /rd/1/network/jmail +Cliente VNC /rd/1/network/vncclient +DNS resolver /rd/1/network/nslookup +#18 **** OTROS **** +Analogue clock /rd/1/demos/aclock +Binary clock /rd/1/demos/bcdclk +Timer /rd/1/demos/timer +ScrShoot /rd/1/scrshoot +Calendario /rd/1/calendar +Lector de RTF /rd/1/rtfread +#19 **** SYSTEM TESTS **** +Protection test /rd/1/test +Monitor test /rd/1/disptest +#20 **** SYSTEM SPECIAL **** +Screen magnifier /rd/1/magnify +Screen keyboard /rd/1/zkey +Character table /rd/1/ASCIIVju +## diff --git a/data/sp/network/jmail b/data/sp/network/jmail new file mode 100644 index 0000000000000000000000000000000000000000..c6091335c207a041a600dbb0cfcafc3cd4776506 GIT binary patch literal 1976 zcmV;p2S@lzP(w?16aWB$00001Mv*2LLXK;4&&M{gp_R3rW|Cw@0?q9aY);Gm2C|;_ zPHAGBd!PRSk6e$7>f{hp0fBQ&bfyFFVZbyu6p|Zo#3SqdIH?3h0uC(IkxYfxW)4l z5f_nv3d4MzJBi=Q=e_0=!MjLIYw)syS~#3@`uSo38-1jzCEFaypUAbkJB-TtNT5-% zWD#x6$H>AApr^K^Bf@uVhEaTYvhefH0XgwJs^=6;tdL56^D1<{ss;b-%$=LtLU{I{ zA0yHthYy68&4ZD}=$71E12~a48F+pFTcFD2MSh2xN*@kW4;I6~iwA(D4OQhVMfuXg z6j{0FnkI}NZWT~r6Ew$(4iW=8_zkLS3yv6>0BV^0kdBHkI?~bFe)PxdE@*u%f(iz) z=JghmAcSGc3xwQxKCAw0PCP=Pk=kJwlF+N5kz_uiay7XjEdUm$;0#mB3Qd!f7vf|z zW6kK{N8j~gQHal{>mUkkY9{_V4hfS^-TQq#n%DAB;RGGI6lre0<(h~p!nNETWHnKy zKD5u$m(dYa9&ijIQ$xi^B>F+dF@{>fX&nGPAv8|s2>@?WsgF>24bhjQ*Y5Ywb{O{L zt?&SVBWS@jPYPO+{pSj2XwNek0wfv~r<#1w2;Bt>FIbmIJ=R(0Hrlrb~7sA{K*w5@(Af%jE63M|GPz<#V1duvDK{zp=deH<&#t%)C017^4(ZTS zr@HGvA@1dPJ$RF^C!#ieVw!jqJp~e7iqTY=wq*Cvm9H!(@|)Gn1$0VIA>X|d>!TbK zC3BLTh-0_B+){bXY}tk_D6YDL|Luw`%kh^%|EGI9rw?b`(7n|Jh7fn zM9|72f7Aj-GB%j**BShSGhsg0`tm$3P_*JP`MM<2#)OGc9dnXd3wJecHBmqMm7%|| z&+*4pG2HN5=zZOS5fMNEB#lB?oTSF0xcU1v5HFI|1Kezs({-7OUGdp@XB_Gm5Gdy* zzK+Xq!DP?os}tqp-LN2w8w6Lxg(fS7J0uWxj~p@e7AaV6{y@c&6tCYmyNXUy=Eb0% zc^@PNq?$57i=0fRlyh`5Ygh0BOb}J%4Ovdklv6f%cP&9*(M_Q?5mXBKS2w!WB#S>rQuA;QN9ppzj#UvBgMrD zW?de+$(@>!32m$lyjuyN zFj32V@;TgzG>dG5iN0P6hZZ6$H#;?Jr<-j|CsoNa*4y~_3b{O!{R$D=((gq45-nf& zBO^}{*{-b8L>32Zd6J_#J?=m9$+X$l*?Vep1%L?zW_hNKU=Ju4TOtbwRuURSQ`T&y zzNs^?K+L+1q{FpAz3re1P{c!xnCLR`fE(Q*i3qCY%^ygR@*7SxwDt; zLW|rLDlZ|6V_47qfY}EgfGY)^VGjS|6g)8 +;port = +; If proxy requires authentification, uncomment following lines too +; (otherwise, leave them commented): +;user = +;password= + diff --git a/data/sp/panel.ini b/data/sp/panel.ini new file mode 100644 index 0000000000..bbd906d433 --- /dev/null +++ b/data/sp/panel.ini @@ -0,0 +1,40 @@ +[Variables] +PanelHeight=24 +PanelWidth=0 +SoftenHeight=4 +ButtonTopOffset=2 +ButtonBottOffset=2 + +[Flags] +SoftenUp=1 +SoftenDown=1 +MinLeftButton=1 +MinRightButton=0 +MenuButton=1 +RunApplButtons=1 +ClnDesktButton=1 +Clock=1 +CpuUsage=1 +ChangeLang=1 +Attachment=1 +ButtonsStyle=0 + +[Colors] +MenuButton=0,100,0 +ClnDesktButton=0,128,255 +Clock=0,128,255 +CpuUsage=0,100,0 +CpuUsageBckgr=255,0,0 +ChangeLang=0,128,255 +PageList=255,255,255 +Text=255,255,255 +AltTab=255,128,0 + +[ApplicationsPaths] +End=/sys/END +Menu=/sys/@MENU +Run=/sys/RUN +PrnScr=/sys/SCRSHOOT +Clock=/sys/CALENDAR +CpuUsage=/sys/GMON +MouseEmul=/sys/MOUSEMUL diff --git a/data/sp/setup.dat b/data/sp/setup.dat new file mode 100644 index 0000000000000000000000000000000000000000..1172ac39817c20f22108078fb5fd66ec838f8947 GIT binary patch literal 28 XcmZQzU|?VbVh{k)OhC*9;s5~v0IUEH literal 0 HcmV?d00001 diff --git a/data/sp/vmode b/data/sp/vmode new file mode 100644 index 0000000000000000000000000000000000000000..0c964ece6a940ffc395fcad0f296c9b6ef8eb006 GIT binary patch literal 8628 zcmV;lAxqv%P(w>P%>V#_00001Mv*2LLXK;4&&M{@U$_eW+1y8Pk3cjoaVQK`Ow#R` z%}RkMpa-l-o3y%)S>2Z0lM^@>E_J=8+^Gp~$xv$=LIxKBDJ*ls56$i*7SF?T);~8g zwR>Y`Jy}2yAlBF}W+5jcAAIMJ8}8H=QDOG~OxMgWbz5??sBIBi)+zyP zch=XPIm5$+>-yD1c{&*fz;6m#%2W1z2|e%PQS;P`GC>c|wuURP)%ai-;gRb<;WOI} z%ov_r2!G_E-1RS^<%6S+3mFSv?}2l}&n?sIO#6z8>D)2}ow#Ley^GTmIuW7}C>cIh zM1?S!U3AV@A_SFC&xd*i+nlGJS2YQ#>5KIdagv!r;uQX^%RnEwUvDJO(isXz2K_qa zQ)c*__@IpB@~B?q-ekvwa1U{$Wl}{gOM>^Ix1~FE*Kc@gyB=%DgM$b117_83=@u%N z#5n4T85YtJkcEb2)d7NlLE;R)C3p81W$gO0o8txpJ9a#v*JYTmNj%?hol7P314Qey z8n7^PNxuxw|FJNB`3yi1URUXG2q;_;;!?rD#FprKpHOfVuUfdSjE~K)c?1@$%H42E zPRIqBqQh3{@L9$h_hQt~e^G@eBEK53<6DK)$>SICnTNQ=g=08tu&TD;P+Lz725d(E8gZ?vezazkwYPm*M0h2e|My)qEfu?0`o;x{!22Bwp3pfyfRV; zgnsHXrG21@@1gM( zRxkhFI7z$CO0nau`PF;{gX*Rq{p83DXqRjklStV-cMV*8K$8JWtb)kP{M_`c16-X2 z9#xg3`ceTxP&Xu79eJRwO&rrc{Y$jM!m9wgg>ZL(`?1RQ?UrdZ&KByU-{+w5-#~k= zm%!!lI{wz_MpD~ZC-T36v7UF$m1^Pc&)$D=i?t%tjwD&a0o1E`bwIzaz-tLp^Mt{W zJig(%Gg-Ifip*PG(e!JynX~j1(xA38w4!f@JZVX7RBvr)^OkK6}H~Hwv3Ge;rHOFHO(4w4-LhlO1kJ!H8zB{e#u*V z_h6-z9k;(qNcLl|~3KGnu zv+tqkip(0C$vmOGA)Xv%i9LJizZ6C1sy6L19Ocrq6l;G-;b^V%WIs}VK+C=-9yk%! zsayvmKJ3XwjLOhEGZ#7|b>xy+sTVL;??{xj z-A?z2K!b8ZC%t$MXGELCb)d0cFt!6~P}I?JHRl$|8uZ!)W(wUJ%WEF9+!&x?{Qc)F zK_9Q~C6P7ySc{I@Rz*{L9b7Y|%QsS^TC~$?X`y3*!X^%;8-T+yFbvMPX7@#gDKRXE zT41?KzwnI!iFBi*WjREAi?;Q#tB^$s)S6Edr_5rz6v1~Y?MGO}*8YBn98XTle;cVyS9*o=CCJdS0@bRnW+xl6pawFj!mV@4_twE zHRg2K;|POv^e)(ii{)bwTDN$Ag7;x#vxX)fTJqgwAmj2Nz^65jo&b8H*E_Sbtv+?3 z4k3l9YnKSSW1!!S2%ge9a+JM7hhpNvfV_k{y)@+tXKHOzhigWyM_iS$d7Ts;{} zb<5slZpQIbuBdW8uN`Jcoa@FTbgDa_s$X?XoGArmNUt5@F0FuxJ8PEJ1iQAe#h1s_ z+K|N9hUv;R@g;S6=kE!9(P(&9_M0;nIBQ*DI7qs|F07mctETvp%>pJ*p?l7v8VGvw zj%|~J+e8zX&y#(ZK9@{EQUG(r5K}9C27XzRSx48>3!m^fWhohE3sU*PlNMax(JPOL z&q`#3_#tK8bLRMsd_xyD6aX3bGq$-#*zcSx_uY7qlQ4z^s-Bt`plfmPN^=|AKk2=; zo9zJT8>B)N@C>ATI#|3t;a2zllunF^5^v0%!Qpu}xhyQdb49yA{oX&Ay;RnY*RBR$ z!jAq$THbLWV+XcyynSw}`Qpiostzr7U0D;_p*!r={}a&05Y2%J%i-r{LfJaGePR!`&0_&l-!k#@i2-B&=@R$rx2WxJcy`v z)YfxXyyBv8oi2Us4`(e2=1atB*|Ylre!wP(nrlF9gVwfd7;P-t97R_}`(4ivdr9*+ zzHxpp_T94yjh7M&!V~nY_PwP`4>sJ>TG`z0$HZ_DN3@K3rIoI@!-nP&#i)mMjMQSc z103ll2?<6k@lEKi($MenT_!73z)q}6|GEc#c7$_ZxdNHuO1{Fp!BWf5X@;1t3MC3W z9q&VAhUAym&y~O1TjUVz0wHX%4=W{9artW)_5oM)EQmi%Nm`|RAN%llU7tbN}S(R&cRo(6mV~06-~TSlaeWpUx`mHr?;ul!>BYJIx7LzE7zAr zU?wvTuS_XoNuZB3skHIBz3H?nmGzt_dudn~QjzPhe{y z<4H)FlgG)S6BTep15hXwMsKHvW+Dc7Jh<PXYYvm^os20lw7f&&emWH3X z=^}w8rkrV-)Y7+I{MEyfZr~Ejm~!0WEW1*~SjBvf+gc6sU#NXEU41TcmR80~>wheW zDjhC=)rxA9X@e_yjsD^6Zj9zPL3@k>^-yD~f^QQgglr$zhDaq~7~VyQZ`)uMAfH-h z*B6TPH8F6ge)yQ*3Re3CqD!r;0a+7rI^vvP!6J?NDrA|m*rGok1tjenc}5aZ@1hTI zawrK1a+sVhY|2&kkqvBZU$urC+aU(CW!Dt+A+YEpX=0~@8d6Jz< zL3ns9=&-J6{&@{-hZ+x0&`WSzVzUeoMEK1>zrS$lF$=}yyxPvV&I*e0qz@tWc)8H5 z9g_A+gk)O_egikKrV%~0c2VNls=y= zvsFyI$SmwCQf@hH-vkWbm)Up{^!`3s+C@`#A`mRiB?sAsMe0RcMA_SCvmsBZy!-lol? zkf>S5P&Dat1A_d~4suZuZZLY>IgX7iKeXeA8qjr~xhK&5@iyxs)m4|#hvpr=!`6|2 zg~5n1`jcKhZyi^B@@Jnb38^kNT@=wBbXT=GYgzZFRpneJZZ_5o{^&=>MJCMKK1fW?DBg>b>;65K?27l*)CHE*%D14+(-lrNCJ{hKfgjJqJ zOWl}yh1Ctv3&jwfM(FHurcmz&Cmv->Vo(Vf%IdbH`s9f&`#qaIuPi*aGDXU{rSCxi zL_3&jd8ZQ@c*OpySFigsg47F$Z}gqN)7qBh*ZFoa?-Q~wKtz#acO@Vo7R0E!$62#iObr`_zpuWMVT135<0RVoPh68CE?{S(wA@QSjI8I zkLDRsry_;Umh7u0Fw8@BUEn<)o?YOF8!aWP&f95U!If zpcYg`FLkM%G1~XY5kvX*y5|}^#FEla_HTlr>rXkp#*ox!@3j1XW7)%kmHj$X$NY@UUC#n)*WWQ4kcNM%K*HTjCpL@6qtt}7*+nG^ zKbgyY`B_cAx>PpR-l2}Pm5+_gcJza%E-bh3Va%H?p)e0;>c%k#I;dT%a3#p9!9~zl zFJP-vV&6G~y;qDgo`Pm)(Tcpx-`apj__J9jGBQAGNEYAUg}Z{ooGq8~@@<<%`)y~? zzAwKpgAg?u3^rp4>ET-_Ve6h}U`o92`~pn&zW;Ez5;QLh`!*YMtWK^de2J8wv7-pn z>3u^t=OwjAml{ukXJCrQdCeIxk$xubGR%#8M-M|DSB?spDml&K0ZURPw_+edmBdZ3!6+a?CT0|>$F|a?Pi3jW#J1Zb!++L}Z8`?MC21)=N{U^PDdcmtivtUa0 z0Z<09e(H~gs1;4%)k>qBI>o%-U2vi=EGB$7QL*Mf^4Duk)+~!1xAEwp)1M;eX5eTJ zU1%fHZK<%Z`P-)pnoiu`j!ToBLrV=a(cM2M_Q(reaOp?^+`Zn13!uEqVvI5bD5X(A zes#O$@w5cf%B6MRu( zncQ6iLeEfk0&~|Wvt83o6n|sbAdMyCAwzOB2E^|SZtm=YUzYV9-yKc|LLE)L>J6Kh zz8q@$`7QX^2v?IUrn$aPO!1F(s`P$BRPoV<6mh#WRQ?0kggwhQ_jz|L)VVp+e4Q>e z{D+_z^tR5l><)vuxIdypzW8yw@_@*r^p4tHI*kq1StJimLU#meGVh&1&4H6u2k4bhDdf5hZ# z+?s)jqnSRg^v3uT%L*>s*t4@+#FK=m+P<~;Ol}k3D#5)z+^ItpNICX!M9y5En{^n3 z=V;j3h2SY&8$E>XOg*L?`LPF}XOl%Qr~5%Rp$BZ&?wmdQ-!siLNBB8T$v$aRF;R{2X2(A*HqkhjSan)0mji~A%O8;|#{ zf))?-a%m=@0!Ga3G3gPa(+ZV@Eh?Q!o1IHSRplN~L=(q4thdA>0WDMiUE<~;YA#?= zi+i8E`;|fp8u+-n2G^Yrf?3Qq8>y*lPfX7h(zRP?!Xsr0?pJTQ! zo5{R-8Lrv#hXU?^K09K^HQdJ=nXl>pZIfax%yI+_nRYtz`|5i2@b0MY_J>!1#+KqL zAH+{yBOYvCc0UpofG|GemAuEbiU#ugl^YZdU4~!+F^1G4d^R4ea-v+Q#PvRX9vEqy_RgnEB)c%#a z%o$!+^Q!EDja=_}u7@s(x5Hf9!pSRs{5fNA?|(8aGA-gdvAanTEmy5rwL&?skfQ4M zIJ7ktrHGBb^EyoYGNz54+*Asn+Mgn76 z_-MP=U!{x_-F$hhWiF!v%iyboGnA1zr(J}=I_ccb+C?Co7%lE=!mg_4wqbyngvMMz zt?R(_<(mbG1;O3*i=sl`-ynt^Kv&#zT1c{;xr7Zd-de5p$baQD(Rx{S{X-e*`TkRo z6D|b00;`@(SKjr;$j)2?W%9p)IS&ZgVk`VDU1FK_24_Gp#18LlFU=dTk+}Yx9U&onz!1NJb zPStBcj>K~z>)E-_(XZsjea9V&S(n-Di4$Y(DjPlB3({^!CW**M(w|1cdBOBG2cEWA z8=*m#V2l8T-4y1>sTBB1WB1azcJ?}Z&?~42LcMQHJ?_QQj*x4m@IC@`RQ@^%K0f%l z?yG^=q-H#26XWh|M$H%E5KnPKoB+b3b?Ls@1~uGu7mqaL7=hC?%?#6}EGUoA0l94#{^hDtzO(-5wWVCB`$~+0a=M z-G$GScmE>w)wae-KDD(C%1mn7ENQhe*% z+JrB!PZrs2=yZ!e#|HZ)Rd177KdfSvE1XNJlVTP}dS87A+yIUapao^X6hm-`$o-OS z4&(L5YD(y!MEQS!r0&;g_>9*}Zlpc(q=S7obL9-vo83ka44PC2w)q!100sk>v-wBJ~B8cek^^Rs^$lc@c`b{$^xpu-cGBNT~rl zW2fh5Fz(5_eXkZ0e>>AfIK~pCI`tb3;mQcK%eFIn7ZQO_u!b|>ItX*=;tyyw5%|>p zNv2Ov$_4p1-%{pM%sgt16ocRuuXN0ztWMA)T znq=My<+)k6eR_Xy5E?F(fFpKAlvqh5`-gd<5*7leZnJXCSRJx#x?PAd5ZgIms*39} z(eqEBJ`5JYfJmeuqrS!LsDrf(Mf)tfmQUFsI9CUI~a_QndBk)4K!LT zLnNQ@aA0yn=_jJAomb&Fd2*hQp(zkNugg& zc!rNvjxBxp@91$F(oBByx`ks5ocpg`hD1C5Fotsn;OMeqOB(-p4zyx3fWYLepNmV4 zGBP1xI&7*abglXAKR+m?KaC<)Re`hX3SOq-JCxUj!niC${3r&jD>xl4MCe!*he-cr z-)?cKlM)}`!R^)5T-iWu{nFP*=4P9vx)grZH;{+%SUwmcBDgYmp4(**AzhVuU@R)o zJ>}<;BT~N;U20si*&2bX(ao`nQ?vEQ%p2;ZpAJuw*kYb05V^7NB-3A?=*+3AaL5F) zdysKF|2&))A6se*=BZmftxY%QRnC$2rY?#J#^2JQPlajGnLyJxVa57X=xrgoGP8$J z69eq@AM0$w;hPx(&+y1KZCf8>>J|&59NWpry%;YC!%iUa(!JOm4Kf0fs=*s-W-i4S z!NcNLjvXE`bJ5?Cp|h`Qc4G=u7Uv5(>mH1KZMKdC-4l5CjKd+unA#>Ac558lw8FC{ zczh3;S5MF)0PlJ+mQ;O!BpI)@9(i+>RDnoj&IUy_CFNkN@n&@e~8OLHq zSZ74@(4>3pqbf1F;cAGF*`=kMe`tYe=xGm)GwnmuwYj0WiyIZo@)@IsL$+k;gAlw+ zv|%o>SJyW>-N917_jsLSJ2ei|#(uE!g)cPSQLtgokC1U_{C3O@iKAC=yHKu`hf0W4 zh^A3B@oIswYZsOku?%C|pX)H}p2CH}D6Sl=&l)H6a!U7J6 z3bt_gq|UCxb_!udDRLG=2tEGSHUG0b_N#4u`>JVlPL{BUYFVEVf$GB4H@-_#xZ|0P zT>-O46SHEKci`p3f zRwjq9vSebHRj<_|#fqgvn3Jyggr*n^BDq^;GPa^h7@1l<;Br$Yt5GXF<_>j4_$B{P zi)_-Q)7pzlv0g8rNjafQ%C6ea&V>M?{mFZ_d83!X>5g8-l>_64JLt9GtW0mrBecW* z&NJqi_duAet26nMv*35autTGoK?_;mY<%`yH_IVFSFfFm?U4t7y(V z3-_x7+GI93G!n}gdK4pQ>P5DL*tY^_&8SY>V0>Dt{#k_J5n@u#eq;DLf*++Tr-MUS zip8R(?{hb;Fs%;f)ghmlP9x#Glh+Sxg=_&hD_~FyNq|wn^5wMUYAV0WNlto07fwJ+ z7I27?F;p_aPK0G5KTHO^DjQ;KikddJgqU@9vC)~>*gL8PiXUNct{r#VVktnxxx`^5 zv&dwBhog#=a@ets&@Xa`wnA_@=dx|E&_)7JH!@EvVvfb&zWRJ+hC>!ZR*2) zwD}OA{SZ(>A5A-AE+n3DvJQe8lV}!b!s)0Lz8=nL7Tlg?7xRYj`>w+j6!Euka;33A zpVk+WOhD&b#B&kJas3-UoB*Bj&VIwt$dmcvt^`({2ZOz{I6w#A9y$cm5Np*Ehn@Aa zLh|SBN+9$X#dQoA(cu;d5Ss46$t*_zZ_zjjjV~&Nr?K*oS4rng^6Ud=YK=% zCjZD}LuEDT``HK^<#j&enVM{kX)gR?1ZzRPpbW7>!g8pPfwYw(N%m9;8OX8lryTxX zA*G=!n{FGGj>jxg;)gT}xw$cGT7IYnx@^xSd}8{$4MmS4p1P|B?J$k`460`W!y&~4 zELk4>CBKsOk6FNLy9Wa%Xm6U=YidH?c%`zuELoHH3|$+*R(>%EI|f+sGS)<&&t0q; z#1DioQ)w)qD?5poIa3H$zlxje~Rs_!ri&RcBIT`WH zDg`aIS+o*080~E8H9M-%2xPNnGNr4@ zTlIZ(pvpqVVn@-zn&)0i6_P;ErW=-U6jwXVXoFyrS)xGehxZM}X`Xfi5;~0q1ngJ= G0000SwA^6; literal 0 HcmV?d00001 diff --git a/kernel/trunk/gui/char2_sp.mt b/kernel/trunk/gui/char2_sp.mt new file mode 100644 index 0000000000000000000000000000000000000000..d27525166328cdf80aa5cb1dbbc44ea46f4afc50 GIT binary patch literal 2560 zcmd5-O>f&c5G7Srrh_!L3LkPXWJ!xX)TaasqzT|sqH1TOLmK#y!yZx~=pSfrJ_OQV z-}i>3`+>bK&}mY?%y2&VW`;H@iitq|R!C1~&1|BTGVRyHaQNB+8QYuQqD(V|DEufh z^!;#m_lZbbXWIryZZwWS-XkJo=u7cY)Vv(aIZhjuCS#HcQYsUFbC#b8fYn$=$S5)jM7CLi!A|+DSTCK?j&~+=;`T64QI0p%4 z)VlGyO{W|0JGKl6VpuamG9Eq#e@-bdM3PVe5i4N+)G(e>4gS$eg})Kt4jyx{-{(K24H|XGp05#SX2V&=;bx3F;M$6P)ANL8e)zb^hknn;bgY#ESgy zdx%mv8hoK6TUN4xEmBAw0^9N$=RS0B77we75?y`mOTmP}$^yJ^Fi`#o0JdF?H!VP!OQZVCsx)#ivV8T;vQ^)amC%=H5>o`|A-VjDm9;EHYNv z`Tg*dgO)DWyg8!8J#x?ce)p06eLAA=Q|F_A-5;m!SOGZ;`zDA{SV*X#!>9D}r&$}? zmRwo1K%RylCX75*)z~5%o7=WH$5!<{Cnq3SC+TLp-EvBtd)V*y4?tSa@;sjb;cj8i zZ+5%Cce@+tFfGHjV}0mqn7U2Et%*HvWPg<^%0hb`Z-)t!*^v1I5(0e`cO87I%XfeN z0o|#J2tDW8%DI=W3wgP>!C&zBeRQ^t{MAP$flxeIbGRE= z1G-d=p6Q0w+gp2kON3#h2nsuG5HGOd5XAFB^lLmk0W&|v89MCyadAZED(YYj{WVvT z4%y5_tP0)NTE2;`%bG0XT!D2jhQ(uep^K{j0~LJh{QKf`n4!P!G2N0EB@AuD%CV~J zrO+i$uvp`M@XfJhDZ02Hm`(_{N8u$b>LSE@ko{1K8^ZnITXzU~Z?GWT52X&0|LFdgm6ATb$cV**`yj!wfOUw4NQ*Zd{v}_jqw@?#_oA5Fi@sXpD2C`CjL1kKtp* zSyZcX{*dB$hlm;)ElcIco8RB!=Zflb4}RRfoQuOSmYE7wfl)C3Kt^Mfm$Hhfy|1U8 zyLzjsS0Udk#ic;xaUgOQMZB*TNRmW4>|t(6s&J#U!0hTUtR}gQ!)jhNDGnKkqsy2* z1@*5y`Zq>pd|iht-9VL}=yFT93(uHoNYjY<&!3M$^(;BpoSh?)E~$oLP>N}$EIN$GO+vLTo87nnLr{v4( zF?Z^THVvjNvZT$6`?7RNDNh0-P)Ch1V;h~#nE{R?6%OO*LrCNbqBaB@({TfkEP1Dx zc6G`ONN1qksT4^WRl|IZt8&QER9azqQI7{9-eVKo&C*W8U;|>^)Rk1uy%#1V z=HqT&Z62nw?3z%EO!?o}BNqdrFk%qL79Qsf7(4fD^I;xDwjE#tl1g>$iP&tfk<|ei zfSkUq98FcP2xUB$pMmK8gw3Kj$`yPc!mbf$2*4St`3FDL5c#XC6l_iNww3#xmcc_~ zPT0JDiL{g_Y)-JLc0p9wgBp4}et4LwwPAhkmP@IbkR%->vr$dzVF$OAVZ<~#liX#D zltHeXAKSJ)n8hKXixzn<^M*8=`e2lAxV7_$Z20f;>AHSe=L#prsO^!Lw`tv?KyD zodqv1LzEERpar7Av(C0j=e%I^YBn=~2G2tDE{rX8;J_lzf{mSZ9LuY1G + Distributed under the terms of the GNU General Public License v3. + See http://www.gnu.org/licenses/gpl.txt for the full license text. +*/ + + +#include + +#define FONT_HEIGHT 9 +#define FONT_WIDTH_MONO 5 +#define FONT_WIDTH_VAR 7 /* max symbol width */ + + short int char_num, row, col; + char ch, data; + + +int do_symbol(short int font_width) +{ + for(row=FONT_HEIGHT; row; row--) + { + data = 0; + for(col=0; col