forked from KolibriOS/kolibrios
VHDL code generator for PCI BIOS extension ROMs
git-svn-id: svn://kolibrios.org@6442 a494cfbc-eb01-0410-851d-a64ba20cac60
This commit is contained in:
Artem Jerdev (art_zh)
parent
227eb8887f
commit
b718363009
108
kernel/branches/Kolibri-A/trunk/bootloader/bios-bev/PCIROM.ASM
Normal file
108
kernel/branches/Kolibri-A/trunk/bootloader/bios-bev/PCIROM.ASM
Normal file
@ -0,0 +1,108 @@
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include 'cfg_bios.inc'
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use16
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org 0
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rom_header:
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; PnP Option ROM header
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rom_signature dw 0xAA55 ; +0 : magic
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rom_length db 1 ; +2 : number of 512byte blocks
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rom_entry:
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jmp init_entry ; +3 : initialization entry point
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; retf ; +5
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@@:
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times (24-$) db 0 ; : left blank
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rom_pci_struc dw pci_header ; +18h : offset to PCI data structure
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times (32-$) db 0
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; +32
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pci_header:
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; PCI Data Structure
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pci_magic db 'PCIR' ; +0 : magic
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pci_vendor dw BIOS_PCI_VENDOR ; +4 : 10EE
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pci_device dw BIOS_PCI_DEVICE ; +6 : 0007
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pci_vdata dw 0 ; +8 : 0 = no vital product data
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pci_length dw 0x18 ; +A : PCI data structure length
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pci_classrev dd BIOS_PCI_CLASS ; +C : rev.00 + class 05.00.00
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pci_size dw 1 ; +10 : image length (512byte blocks)
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pci_rev dw 0 ; +12
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pci_codetype db 0 ; +14 : x86
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pci_indicator db 0x80 ; +15 : last image
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pci_maxlen dw 1 ; +16 : max length (512b blocks)
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pci_hdrptr dw 0; manstr ; +18 : ExROM's config utility code header
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pci_dmtf_entry dw 0 ; +1A : DMTP CLP entry point
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times (64-$) db 0
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manstr:
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db 1,'Kolibri-A Operating System',13,10,0
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; utility code header size = 42 bytes
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times (64+41-$) db 0 ;
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db 1 ; ver.1
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utility_entry:
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jmp boot_failure
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times (128-$) db 0
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;align 128
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boot_failure:
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int 18h ; return to BIOS Boot sequence
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align 4
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init_entry:
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; note x86 "unreal" mode!
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; ax = b:d.f
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; bx = run-time segment
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; cx = PMM segment
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; dx = PMM entry offset
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mov dx, 0x0cf8 ; PCI config address
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; mov eax, 0x80010010 ; BAR0
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and eax, 0x0FFFF
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shl eax, 8
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or eax, 0x80000010 ;BAR0
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out dx, eax
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out dx, eax
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add dl, 4
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in eax, dx
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and eax, 0xFFFFFF00
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add eax, 0x0400 ; LPC control reg
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mov dword[eax], 0x90050000 ; LED port
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mov dword[eax+4], 0x055
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xor eax, eax
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sub dl, 4
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out dx, eax
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mov bx, ax
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retf
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; mov edx,[esp] ; get the origin
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; and dl, 0xF0
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; shl ebx, 4 ; correct run-time address
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; mov cx, 0 ; words counter
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;@@:
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; mov ax, word[edx+ecx]
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; mov [ebx+ecx],ax
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; inc cx
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; inc cx
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; test cx,0x200
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; jz @b
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; xor ax, ax
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; mov bx, ax
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; mov al, 0x20 ; IPL device's attached
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; retd ; double !
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times (0xDF-$) db 0 ; checksum position
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sum = 0
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repeat $-$$
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load a byte from $$+% -1
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sum = a + sum
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end repeat
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check = sum mod 256
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check_byte db (0x100 - check ) mod 256
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times (512-$) db 0
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@ -0,0 +1,30 @@
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; file 'pcirom.bin':0,0x49
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file 'pcirom.bin'
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db 13,10
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line = '0'
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block = 0
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repeat 7
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db 'INIT_0',line,' => X"'
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repeat 32
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pos = 32-%
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load a byte from pos+block
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b = a mod 16
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if b<10
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c = b + '0'
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else
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c = b-10+'A'
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end if
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b = a / 16
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if b<10
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d = b + '0'
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else
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d = b-10+'A'
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end if
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db d, c
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end repeat
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db '",',13,10
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block = block + 32
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line = line + 1
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end repeat
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@ -0,0 +1 @@
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file 'step1.bin':512
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@ -1,82 +0,0 @@
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include 'cfg_bios.inc'
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use16
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;org 0
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rom_header:
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; PnP Option ROM header
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rom_signature dw 0xAA55 ; +0 : magic
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rom_length db BIOS_BOOT_BLOCK_SIZE ; +2 : number of 512byte blocks
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rom_entry:
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jmp init_entry ; +3 : initialization entry point
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db 'AZ'
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rom_reserved rb 0x11 ; +7 : reserved (17 bytes)
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rom_pci_struc dw pci_header ; +18h : offset to PCI data structure
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rom_expansion dw pnp_header ; +1Ah : offset to expansion header structure
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align 16
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pnp_header:
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; PnP Expansion Header
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pnp_signature db '$PnP' ; +0 : magic
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pnp_revision db 1 ; +4 : revision
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pnp_length db 2 ; +5 : length (in 16byte paragraphs)
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pnp_next dw 0 ; +6 : offset of the next header (0 if none)
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pnp_reserv1 db 0 ; +8
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pnp_checksum db 0 ; +9 : checksum
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pnp_devid dd 0x0 ; +A : device identifier
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pnp_manstr dw manstr ; +E : pointer to manufacturer string
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pnp_prodstr dw prodstr ; +10 : pointer to product name string
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pnp_devtype1 db 2 ; +12 : device type code
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pnp_devtype2 dw 0x000
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pnp_devind db 0x14 ; +15 : device indicators
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pnp_bcv dw 0 ; +16 : boot connection vector (must be 0)
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pnp_discv dw 0 ; +18 : disconnect vector
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pnp_bev dw boot_entry ; +1A : boot entry vector
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pnp_reserv2 dw 0 ; +1C
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pnp_info dw 0 ; +1E : static resource information vector
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align 16
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pci_header:
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; PCI Data Structure
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pci_magic db 'PCIR' ; +0 : magic
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pci_vendor dw BIOS_PCI_VENDOR ; +4 :
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pci_device dw BIOS_PCI_DEVICE ; +6 : sb700 PCI bridge
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pci_vdata dw 0 ; +8 : vital product data offset
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pci_length dw 0x18 ; +A : PCI data structure length
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pci_classrev dd BIOS_PCI_CLASS ; +C : rev.00 + class 04.00.00
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pci_size dw BIOS_BOOT_BLOCK_SIZE ; +10 : image length (512byte blocks)
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pci_rev dw 0 ; +12
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pci_codetype db 0 ; +14 : x86
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pci_indicator db 0x80 ; +15 : last image
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pci_reserved dw 0
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align 4
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manstr:
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db 'Kolibri-A Operation System',0
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prodstr:
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db 'ver.ROM-0.1',0
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align 4
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boot_entry:
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@@:
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boot_failure:
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int 18h ; return to BIOS Boot sequence
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align 4
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init_entry:
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xor ax, ax
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mov [cs:rom_length], al
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mov al, 0x20
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retf
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check = 0
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repeat $-$$
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load a byte from $$+%-1
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check = a + check
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end repeat
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check_byte db 0x100 - (check mod 256)
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times (512-$) db 0
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@ -1 +1,11 @@
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fasm bev.asm
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fasm pcirom.asm
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fasm step1.asm
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fasm step2.asm
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ren step2.bin pcirom.vhd
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del step1.bin
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del pcirom.bin
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echo off
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echo ********************************
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echo (C) Artem Jerdev, 2014
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echo PCI ROM VHDL Template generated
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pause
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@ -2,4 +2,4 @@ BIOS_BOOT_BLOCK_SIZE equ 1 ; in 512-blocks
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BIOS_PCI_VENDOR equ 0x10EE
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BIOS_PCI_DEVICE equ 0x0007
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BIOS_PCI_CLASS equ 0x04000000
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BIOS_PCI_CLASS equ 0x05000000
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