forked from KolibriOS/kolibrios
Removed old netdrv.inc and pci.inc, replaced with newer, better versions.
git-svn-id: svn://kolibrios.org@5074 a494cfbc-eb01-0410-851d-a64ba20cac60
This commit is contained in:
parent
48b7151d43
commit
bb295aca38
@ -105,7 +105,7 @@ include '../proc32.inc'
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include '../struct.inc'
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include '../struct.inc'
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include '../macros.inc'
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include '../macros.inc'
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include '../fdo.inc'
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include '../fdo.inc'
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include '../netdrv_pe.inc'
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include '../netdrv.inc'
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; Registers
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; Registers
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REG_POWER_MGMT_CTRL = 0x7c
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REG_POWER_MGMT_CTRL = 0x7c
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@ -52,7 +52,7 @@ include '../proc32.inc'
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include '../struct.inc'
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include '../struct.inc'
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include '../macros.inc'
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include '../macros.inc'
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include '../fdo.inc'
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include '../fdo.inc'
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include '../netdrv_pe.inc'
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include '../netdrv.inc'
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; Operational parameters that usually are not changed.
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; Operational parameters that usually are not changed.
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@ -35,7 +35,7 @@ include '../struct.inc'
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include '../macros.inc'
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include '../macros.inc'
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include '../proc32.inc'
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include '../proc32.inc'
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include '../fdo.inc'
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include '../fdo.inc'
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include '../netdrv_pe.inc'
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include '../netdrv.inc'
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struct device ETH_DEVICE
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struct device ETH_DEVICE
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@ -41,7 +41,7 @@ include '../proc32.inc'
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include '../struct.inc'
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include '../struct.inc'
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include '../macros.inc'
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include '../macros.inc'
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include '../fdo.inc'
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include '../fdo.inc'
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include '../netdrv_pe.inc'
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include '../netdrv.inc'
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REG_IDR0 = 0x00
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REG_IDR0 = 0x00
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REG_MAR0 = 0x08 ; multicast filter register 0
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REG_MAR0 = 0x08 ; multicast filter register 0
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@ -39,7 +39,7 @@ include '../proc32.inc'
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include '../struct.inc'
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include '../struct.inc'
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include '../macros.inc'
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include '../macros.inc'
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include '../fdo.inc'
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include '../fdo.inc'
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include '../netdrv_pe.inc'
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include '../netdrv.inc'
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REG_MAC0 = 0x0 ; Ethernet hardware address
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REG_MAC0 = 0x0 ; Ethernet hardware address
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REG_MAR0 = 0x8 ; Multicast filter
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REG_MAR0 = 0x8 ; Multicast filter
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@ -40,7 +40,7 @@ include '../proc32.inc'
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include '../struct.inc'
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include '../struct.inc'
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include '../macros.inc'
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include '../macros.inc'
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include '../fdo.inc'
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include '../fdo.inc'
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include '../netdrv_pe.inc'
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include '../netdrv.inc'
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;-------------------------------------------
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;-------------------------------------------
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; configuration registers
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; configuration registers
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@ -50,7 +50,7 @@ include '../proc32.inc'
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include '../struct.inc'
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include '../struct.inc'
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include '../macros.inc'
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include '../macros.inc'
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include '../fdo.inc'
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include '../fdo.inc'
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include '../netdrv_pe.inc'
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include '../netdrv.inc'
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;**************************************************************************
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;**************************************************************************
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; forcedeth Register Definitions
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; forcedeth Register Definitions
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@ -37,7 +37,7 @@ include '../proc32.inc'
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include '../struct.inc'
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include '../struct.inc'
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include '../macros.inc'
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include '../macros.inc'
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include '../fdo.inc'
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include '../fdo.inc'
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include '../netdrv_pe.inc'
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include '../netdrv.inc'
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; Register list
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; Register list
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REG_CTRL = 0x0000 ; Control Register
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REG_CTRL = 0x0000 ; Control Register
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@ -40,7 +40,7 @@ include '../proc32.inc'
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include '../struct.inc'
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include '../struct.inc'
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include '../macros.inc'
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include '../macros.inc'
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include '../fdo.inc'
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include '../fdo.inc'
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include '../netdrv_pe.inc'
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include '../netdrv.inc'
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; Serial EEPROM
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; Serial EEPROM
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@ -35,7 +35,7 @@ include '../proc32.inc'
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include '../struct.inc'
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include '../struct.inc'
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include '../macros.inc'
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include '../macros.inc'
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include '../fdo.inc'
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include '../fdo.inc'
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include '../netdrv_pe.inc'
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include '../netdrv.inc'
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; for different PHY
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; for different PHY
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@ -35,7 +35,7 @@ include '../struct.inc'
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include '../macros.inc'
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include '../macros.inc'
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include '../proc32.inc'
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include '../proc32.inc'
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include '../fdo.inc'
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include '../fdo.inc'
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include '../netdrv_pe.inc'
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include '../netdrv.inc'
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PORT_AUI = 0x00
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PORT_AUI = 0x00
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@ -58,7 +58,7 @@ include '../proc32.inc'
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include '../struct.inc'
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include '../struct.inc'
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include '../macros.inc'
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include '../macros.inc'
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include '../fdo.inc'
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include '../fdo.inc'
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include '../netdrv_pe.inc'
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include '../netdrv.inc'
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;**************************************************************************
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;**************************************************************************
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@ -202,7 +202,7 @@ include '../proc32.inc'
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include '../struct.inc'
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include '../struct.inc'
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include '../macros.inc'
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include '../macros.inc'
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include '../fdo.inc'
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include '../fdo.inc'
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include '../netdrv_pe.inc'
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include '../netdrv.inc'
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struct device ETH_DEVICE
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struct device ETH_DEVICE
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@ -1,150 +1,130 @@
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; ;;
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;; ;;
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;; Copyright (C) KolibriOS team 2004-2014. All rights reserved. ;;
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;; Copyright (C) KolibriOS team 2004-2014. All rights reserved. ;;
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;; Distributed under terms of the GNU General Public License ;;
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;; Distributed under terms of the GNU General Public License ;;
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;; ;;
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;; ;;
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;; GNU GENERAL PUBLIC LICENSE ;;
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;; GNU GENERAL PUBLIC LICENSE ;;
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;; Version 2, June 1991 ;;
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;; Version 2, June 1991 ;;
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;; ;;
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;; ;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; This macro will prepend driver name to all debug output through DEBUGF macro
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; This macro will prepend driver name to all debug output through DEBUGF macro
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; The driver name is taken from my_service label
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; The driver name is taken from my_service label
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if defined my_service
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if defined my_service
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macro DEBUGF _level,_format, [args] {
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macro DEBUGF _level,_format, [args] {
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common DEBUGF _level, "%s: " # _format, my_service, args
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common DEBUGF _level, "%s: " # _format, my_service, args
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}
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}
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end if
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end if
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include 'pci.inc'
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include 'pci.inc'
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include 'mii.inc'
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include 'mii.inc'
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; Kernel variables
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; Kernel variables
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PAGESIZE = 4096
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PAGESIZE = 4096
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; network driver types
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; Network driver types
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NET_TYPE_ETH = 1
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NET_TYPE_ETH = 1
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NET_TYPE_SLIP = 2
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NET_TYPE_SLIP = 2
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; link state
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; Link state
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ETH_LINK_DOWN = 0 ; Link is down
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ETH_LINK_DOWN = 0 ; Link is down
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ETH_LINK_UNKOWN = 1b ; There could be an active link
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ETH_LINK_UNKNOWN= 1b ; There could be an active link
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ETH_LINK_FD = 10b ; full duplex flag
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ETH_LINK_FD = 10b ; full duplex flag
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ETH_LINK_10M = 100b ; 10 mbit
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ETH_LINK_10M = 100b ; 10 mbit
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ETH_LINK_100M = 1000b ; 100 mbit
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ETH_LINK_100M = 1000b ; 100 mbit
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ETH_LINK_1G = 10000b ; gigabit
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ETH_LINK_1G = 1100b ; gigabit
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; Macro to easily set i/o addresses to access device.
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LAST_IO = 0
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; In the beginning of a procedure (or ofter edx may have been destroyed),
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macro set_io addr {
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; always use set_io with offset 0 to reset the variables.
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if addr = 0
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LAST_IO = 0
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mov edx, [device.io_addr]
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else if addr = LAST_IO
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macro set_io baseaddr, offset {
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else
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add edx, addr - LAST_IO
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if offset = 0
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end if
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mov edx, baseaddr
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else if offset = LAST_IO
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LAST_IO = addr
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else
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}
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add edx, offset - LAST_IO
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end if
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macro allocate_and_clear dest, size, err {
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LAST_IO = offset
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; We need to allocate at least 8 pages, if we want a continuous memory in ram
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}
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push edx
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if (size < 8*4096) & (size > 4096)
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; Macro to allocate a contiguous buffer in memory
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stdcall KernelAlloc, 8*4096
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; And initialise it to all zeros
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else
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stdcall KernelAlloc, size
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; This macro will destroy eax, ecx and edi !
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end if
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pop edx
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macro allocate_and_clear dest, size, err {
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test eax, eax
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; We need to allocate at least 8 pages, if we want a contiguous area in ram
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jz err
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push edx
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mov dest, eax ; Save the address to it into the device struct
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if (size < 8*4096) & (size > 4096)
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mov edi, eax ; look at last part of code!
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invoke KernelAlloc, 8*4096
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else
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; Release the unused pages (if any)
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invoke KernelAlloc, size
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if (size < 8*4096) & (size > 4096)
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end if
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add eax, (size/4096+1)*4096
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pop edx
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mov ecx, 8-(size/4096+1)
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push edx
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test eax, eax
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call ReleasePages
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jz err
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pop edx
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mov dest, eax
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end if
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mov edi, eax ; look at last part of code!
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; Clear the allocated buffer
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; Release the unused pages (if any)
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mov ecx, size/4 ; divide by 4 because of DWORD
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if (size < 8*4096) & (size > 4096)
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xor eax, eax
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add eax, (size/4096+1)*4096
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rep stosd
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mov ecx, 8-(size/4096+1)
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push edx
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if (size - size/4*4)
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invoke ReleasePages
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mov ecx, size - size/4*4
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pop edx
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rep stosb
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end if
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end if
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; Clear the allocated buffer
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}
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mov ecx, size/4 ; divide by 4 because of DWORD
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xor eax, eax
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rep stosd
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if used null_op
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align 4
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if (size - size/4*4)
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null_op:
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mov ecx, size - size/4*4
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or eax, -1
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rep stosb
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ret
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end if
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end if
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}
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macro GetRealAddr { ; input and output is eax
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struct NET_DEVICE
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push ax
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type dd ? ; Type field
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call GetPgAddr
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mtu dd ? ; Maximal Transmission Unit
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and word[esp], PAGESIZE - 1
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name dd ? ; Ptr to 0 terminated string
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or ax, word[esp]
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inc esp
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unload dd ? ; Ptrs to driver functions
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inc esp
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reset dd ? ;
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transmit dd ? ;
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}
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bytes_tx dq ? ; Statistics, updated by the driver
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macro NET_DEVICE {
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bytes_rx dq ? ;
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packets_tx dd ? ;
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.type dd ? ; Type field
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packets_rx dd ? ;
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.mtu dd ? ; Maximal Transmission Unit
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.name dd ? ; Ptr to 0 terminated string
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state dd ? ; link state (0 = no link)
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hwacc dd ? ; bitmask stating enabled HW accelerations
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.unload dd ? ; Ptrs to driver functions
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.reset dd ? ;
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ends
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.transmit dd ? ;
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.bytes_tx dq ? ; Statistics, updated by the driver
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struct ETH_DEVICE NET_DEVICE
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.bytes_rx dq ? ;
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.packets_tx dd ? ;
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mac dp ?
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.packets_rx dd ? ;
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dw ? ; qword alignment
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.state dd ? ; link state (0 = no link)
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ends
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.hwacc dd ? ; bitmask stating enabled HW accelerations
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.end:
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}
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macro ETH_DEVICE {
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NET_DEVICE
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.mac dp ?
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dw ? ; qword alignment
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}
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macro SLIP_DEVICE {
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NET_DEVICE
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}
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@ -1,130 +0,0 @@
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; ;;
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;; Copyright (C) KolibriOS team 2004-2014. All rights reserved. ;;
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|
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;; Distributed under terms of the GNU General Public License ;;
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|
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;; ;;
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|
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;; GNU GENERAL PUBLIC LICENSE ;;
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;; Version 2, June 1991 ;;
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;; ;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; This macro will prepend driver name to all debug output through DEBUGF macro
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; The driver name is taken from my_service label
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if defined my_service
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macro DEBUGF _level,_format, [args] {
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common DEBUGF _level, "%s: " # _format, my_service, args
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}
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end if
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include 'pci_pe.inc'
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include 'mii.inc'
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; Kernel variables
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PAGESIZE = 4096
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|
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; Network driver types
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|
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NET_TYPE_ETH = 1
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NET_TYPE_SLIP = 2
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; Link state
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ETH_LINK_DOWN = 0 ; Link is down
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ETH_LINK_UNKNOWN= 1b ; There could be an active link
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ETH_LINK_FD = 10b ; full duplex flag
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|
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ETH_LINK_10M = 100b ; 10 mbit
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ETH_LINK_100M = 1000b ; 100 mbit
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|
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ETH_LINK_1G = 1100b ; gigabit
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|
||||||
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|
||||||
; Macro to easily set i/o addresses to access device.
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|
||||||
; In the beginning of a procedure (or ofter edx may have been destroyed),
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|
||||||
; always use set_io with offset 0 to reset the variables.
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|
||||||
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|
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LAST_IO = 0
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|
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macro set_io baseaddr, offset {
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|
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|
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if offset = 0
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mov edx, baseaddr
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else if offset = LAST_IO
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else
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add edx, offset - LAST_IO
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end if
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LAST_IO = offset
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}
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|
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; Macro to allocate a contiguous buffer in memory
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|
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; And initialise it to all zeros
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|
||||||
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|
||||||
; This macro will destroy eax, ecx and edi !
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|
||||||
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|
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macro allocate_and_clear dest, size, err {
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|
||||||
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|
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; We need to allocate at least 8 pages, if we want a contiguous area in ram
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|
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push edx
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|
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if (size < 8*4096) & (size > 4096)
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invoke KernelAlloc, 8*4096
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else
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invoke KernelAlloc, size
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end if
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pop edx
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test eax, eax
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jz err
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mov dest, eax
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|
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mov edi, eax ; look at last part of code!
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; Release the unused pages (if any)
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|
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if (size < 8*4096) & (size > 4096)
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|
||||||
add eax, (size/4096+1)*4096
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mov ecx, 8-(size/4096+1)
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push edx
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|
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invoke ReleasePages
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|
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pop edx
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||||||
end if
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|
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; Clear the allocated buffer
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|
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mov ecx, size/4 ; divide by 4 because of DWORD
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xor eax, eax
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rep stosd
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|
||||||
if (size - size/4*4)
|
|
||||||
mov ecx, size - size/4*4
|
|
||||||
rep stosb
|
|
||||||
end if
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
struct NET_DEVICE
|
|
||||||
|
|
||||||
type dd ? ; Type field
|
|
||||||
mtu dd ? ; Maximal Transmission Unit
|
|
||||||
name dd ? ; Ptr to 0 terminated string
|
|
||||||
|
|
||||||
unload dd ? ; Ptrs to driver functions
|
|
||||||
reset dd ? ;
|
|
||||||
transmit dd ? ;
|
|
||||||
|
|
||||||
bytes_tx dq ? ; Statistics, updated by the driver
|
|
||||||
bytes_rx dq ? ;
|
|
||||||
packets_tx dd ? ;
|
|
||||||
packets_rx dd ? ;
|
|
||||||
|
|
||||||
state dd ? ; link state (0 = no link)
|
|
||||||
hwacc dd ? ; bitmask stating enabled HW accelerations
|
|
||||||
|
|
||||||
ends
|
|
||||||
|
|
||||||
|
|
||||||
struct ETH_DEVICE NET_DEVICE
|
|
||||||
|
|
||||||
mac dp ?
|
|
||||||
dw ? ; qword alignment
|
|
||||||
|
|
||||||
ends
|
|
302
drivers/pci.inc
302
drivers/pci.inc
@ -1,132 +1,170 @@
|
|||||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||||
;; ;;
|
;; ;;
|
||||||
;; Copyright (C) KolibriOS team 2004-2012. All rights reserved. ;;
|
;; Copyright (C) KolibriOS team 2004-2014. All rights reserved. ;;
|
||||||
;; Distributed under terms of the GNU General Public License ;;
|
;; Distributed under terms of the GNU General Public License ;;
|
||||||
;; ;;
|
;; ;;
|
||||||
;; GNU GENERAL PUBLIC LICENSE ;;
|
;; GNU GENERAL PUBLIC LICENSE ;;
|
||||||
;; Version 2, June 1991 ;;
|
;; Version 2, June 1991 ;;
|
||||||
;; ;;
|
;; ;;
|
||||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||||
|
|
||||||
|
struct PCI_header
|
||||||
; PCI Bus defines
|
|
||||||
|
vendor_id dw ? ; 0x00
|
||||||
PCI_HEADER_TYPE = 0x0e ; 8 bit
|
device_id dw ? ; 0x02
|
||||||
PCI_BASE_ADDRESS_0 = 0x10 ; 32 bit
|
command dw ? ; 0x04
|
||||||
PCI_BASE_ADDRESS_1 = 0x14 ; 32 bits
|
status dw ? ; 0x06
|
||||||
PCI_BASE_ADDRESS_2 = 0x18 ; 32 bits
|
revision_id db ? ; 0x08
|
||||||
PCI_BASE_ADDRESS_3 = 0x1c ; 32 bits
|
prog_if db ? ; 0x09
|
||||||
PCI_BASE_ADDRESS_4 = 0x20 ; 32 bits
|
subclass db ? ; 0x0A
|
||||||
PCI_BASE_ADDRESS_5 = 0x24 ; 32 bits
|
class_code db ? ; 0x0B
|
||||||
PCI_BASE_ADDRESS_SPACE_IO = 0x01
|
cache_line_size db ? ; 0x0C
|
||||||
PCI_BASE_ADDRESS_IO_MASK = 0xFFFFFFFC
|
latency_timer db ? ; 0x0D
|
||||||
PCI_BASE_ADDRESS_MEM_MASK = 0xFFFFFFF0
|
header_type db ? ; 0x0E
|
||||||
|
bist db ? ; 0x0F
|
||||||
; PCI programming
|
|
||||||
|
ends
|
||||||
PCI_VENDOR_ID = 0x00 ; 16 bit
|
|
||||||
PCI_DEVICE_ID = 0x02 ; 16 bits
|
struct PCI_header00 PCI_header
|
||||||
PCI_REG_COMMAND = 0x4 ; command register
|
|
||||||
PCI_REG_STATUS = 0x6 ; status register
|
base_addr_0 dd ? ; 0x10
|
||||||
PCI_REVISION_ID = 0x08 ; 8 bits
|
base_addr_1 dd ? ; 0x14
|
||||||
PCI_REG_LATENCY = 0xd ; latency timer register
|
base_addr_2 dd ? ; 0x18
|
||||||
PCI_REG_CAP_PTR = 0x34 ; capabilities pointer
|
base_addr_3 dd ? ; 0x1C
|
||||||
PCI_REG_IRQ = 0x3c
|
base_addr_4 dd ? ; 0x20
|
||||||
PCI_REG_CAPABILITY_ID = 0x0 ; capapility ID in pm register block
|
base_addr_5 dd ? ; 0x24
|
||||||
PCI_REG_PM_STATUS = 0x4 ; power management status register
|
cardbus_cis_ptr dd ? ; 0x28
|
||||||
PCI_REG_PM_CTRL = 0x4 ; power management control register
|
subsys_vendor dw ? ; 0x2C
|
||||||
PCI_BIT_PIO = 1 ; bit0: io space control
|
subsys_id dw ? ; 0x2E
|
||||||
PCI_BIT_MMIO = 2 ; bit1: memory space control
|
exp_rom_addr dd ? ; 0x30
|
||||||
PCI_BIT_MASTER = 4 ; bit2: device acts as a PCI master
|
cap_ptr db ? ; 0x34
|
||||||
|
rb 7 ; reserved
|
||||||
|
interrupt_line db ? ; 0x3C
|
||||||
macro PCI_find_io {
|
interrupt_pin db ? ; 0x3D
|
||||||
|
min_grant db ? ; 0x3E
|
||||||
local .check, .inc, .got
|
max_latency db ? ; 0x3F
|
||||||
|
|
||||||
xor eax, eax
|
ends
|
||||||
mov esi, PCI_BASE_ADDRESS_0
|
|
||||||
.check:
|
struct PCI_header01 PCI_header
|
||||||
stdcall PciRead32, [device.pci_bus], [device.pci_dev], esi
|
|
||||||
|
base_addr_0 dd ? ; 0x10
|
||||||
test eax, PCI_BASE_ADDRESS_IO_MASK
|
base_addr_1 dd ? ; 0x14
|
||||||
jz .inc
|
prim_bus_nr db ? ; 0x18
|
||||||
|
sec_bus_nr db ? ; 0x19
|
||||||
test eax, PCI_BASE_ADDRESS_SPACE_IO
|
sub_bus_nr db ? ; 0x1A
|
||||||
jz .inc
|
sec_lat_tmr db ? ; 0x1B
|
||||||
|
io_base db ? ; 0x1C
|
||||||
and eax, PCI_BASE_ADDRESS_IO_MASK
|
io_limit db ? ; 0x1D
|
||||||
jmp .got
|
sec_status dw ? ; 0x1E
|
||||||
|
mem_base dw ? ; 0x20
|
||||||
.inc:
|
mem_limit dw ? ; 0x22
|
||||||
add esi, 4
|
pref_mem_base dw ? ; 0x24
|
||||||
cmp esi, PCI_BASE_ADDRESS_5
|
pref_mem_limit dw ? ; 0x26
|
||||||
jbe .check
|
pref_base_up dd ? ; 0x28
|
||||||
xor eax, eax
|
pref_limit_up dd ? ; 0x2C
|
||||||
|
io_base_up dw ? ; 0x30
|
||||||
.got:
|
io_limit_up dw ? ; 0x32
|
||||||
mov [device.io_addr], eax
|
cap_ptr db ? ; 0x34
|
||||||
|
rb 3 ; reserved
|
||||||
}
|
exp_rom_addr dd ? ; 0x38
|
||||||
|
interrupt_line db ? ; 0x3C
|
||||||
|
interrupt_pin db ? ; 0x3E
|
||||||
macro PCI_find_mmio32 {
|
bridge_ctrl dw ? ; 0x3F
|
||||||
|
|
||||||
local .check, .inc, .got
|
ends
|
||||||
|
|
||||||
mov esi, PCI_BASE_ADDRESS_0
|
struct PCI_header02 PCI_header
|
||||||
.check:
|
|
||||||
stdcall PciRead32, [device.pci_bus], [device.pci_dev], esi
|
base_addr dd ? ; 0x10
|
||||||
|
cap_list_offs db ? ; 0x14
|
||||||
test eax, PCI_BASE_ADDRESS_SPACE_IO ; mmio address?
|
rb 1 ; reserved
|
||||||
jnz .inc
|
sec_stat dw ? ; 0x16
|
||||||
|
pci_bus_nr db ? ; 0x18
|
||||||
test eax, 100b ; 64 bit?
|
cardbus_bus_nr db ? ; 0x19
|
||||||
jnz .inc
|
sub_bus_nr db ? ; 0x1A
|
||||||
and eax, not 1111b
|
cardbus_lat_tmr db ? ; 0x1B
|
||||||
jmp .got
|
mbar_0 dd ? ; 0x1C
|
||||||
|
mlimit_0 dd ? ; 0x20
|
||||||
.inc:
|
mbar_1 dd ? ; 0x24
|
||||||
add esi, 4
|
mlimit_1 dd ? ; 0x28
|
||||||
cmp esi, PCI_BASE_ADDRESS_5
|
iobar_0 dd ? ; 0x2C
|
||||||
jbe .check
|
iolimit_0 dd ? ; 0x30
|
||||||
xor eax, eax
|
iobar_1 dd ? ; 0x34
|
||||||
|
iolimit_1 dd ? ; 0x38
|
||||||
.got:
|
interrupt_line db ? ; 0x3C
|
||||||
mov [device.mmio_addr], eax
|
interrupt_pin db ? ; 0x3D
|
||||||
}
|
bridge_ctrl dw ? ; 0x3E
|
||||||
|
subs_did dw ? ; 0x40
|
||||||
macro PCI_find_irq {
|
subs_vid dw ? ; 0x42
|
||||||
|
legacy_bar dd ? ; 0x44
|
||||||
stdcall PciRead8, [device.pci_bus], [device.pci_dev], PCI_REG_IRQ
|
|
||||||
mov [device.irq_line], al
|
ends
|
||||||
|
|
||||||
}
|
; Base address bits
|
||||||
|
PCI_BASE_ADDRESS_SPACE_IO = 0x01
|
||||||
macro PCI_find_rev {
|
PCI_BASE_ADDRESS_IO_MASK = 0xFFFFFFFC
|
||||||
|
PCI_BASE_ADDRESS_MEM_MASK = 0xFFFFFFF0
|
||||||
stdcall PciRead8, [device.pci_bus], [device.pci_dev], PCI_REVISION_ID
|
|
||||||
mov [device.revision], al
|
; command bits
|
||||||
|
PCI_CMD_PIO = 0x01 ; bit0: io space control
|
||||||
}
|
PCI_CMD_MMIO = 0x02 ; bit1: memory space control
|
||||||
|
PCI_CMD_MASTER = 0x04 ; bit2: device acts as a PCI master
|
||||||
macro PCI_make_bus_master bus, dev {
|
|
||||||
|
; status bits
|
||||||
stdcall PciRead32, [device.pci_bus], [device.pci_dev], PCI_REG_COMMAND
|
PCI_STATUS_CAPA = 0x10 ; bit4: new capabilities available
|
||||||
or al, PCI_BIT_MASTER
|
|
||||||
stdcall PciWrite32, [device.pci_bus], [device.pci_dev], PCI_REG_COMMAND, eax
|
|
||||||
|
if used PCI_find_io
|
||||||
}
|
proc PCI_find_io stdcall bus, dev
|
||||||
|
|
||||||
macro PCI_adjust_latency min {
|
push esi
|
||||||
|
xor eax, eax
|
||||||
local .not
|
mov esi, PCI_header00.base_addr_0
|
||||||
|
.check:
|
||||||
stdcall PciRead8, [device.pci_bus], [device.pci_dev], PCI_REG_LATENCY
|
invoke PciRead32, [bus], [dev], esi
|
||||||
cmp al, min
|
test eax, PCI_BASE_ADDRESS_IO_MASK
|
||||||
ja .not
|
jz .inc
|
||||||
mov al, min
|
test eax, PCI_BASE_ADDRESS_SPACE_IO
|
||||||
stdcall PciWrite8, [device.pci_bus], [device.pci_dev], PCI_REG_LATENCY, eax
|
jz .inc
|
||||||
.not:
|
and eax, PCI_BASE_ADDRESS_IO_MASK
|
||||||
|
pop esi
|
||||||
}
|
ret
|
||||||
|
|
||||||
|
.inc:
|
||||||
|
add esi, 4
|
||||||
|
cmp esi, PCI_header00.base_addr_5
|
||||||
|
jbe .check
|
||||||
|
pop esi
|
||||||
|
xor eax, eax
|
||||||
|
ret
|
||||||
|
|
||||||
|
endp
|
||||||
|
end if
|
||||||
|
|
||||||
|
|
||||||
|
if used PCI_find_mmio32
|
||||||
|
proc PCI_find_mmio32 stdcall bus, dev
|
||||||
|
|
||||||
|
push esi
|
||||||
|
mov esi, PCI_header00.base_addr_0
|
||||||
|
.check:
|
||||||
|
invoke PciRead32, [bus], [dev], esi
|
||||||
|
test eax, PCI_BASE_ADDRESS_SPACE_IO ; mmio address?
|
||||||
|
jnz .inc
|
||||||
|
test eax, 100b ; 64 bit?
|
||||||
|
jnz .inc
|
||||||
|
and eax, not 1111b
|
||||||
|
pop esi
|
||||||
|
ret
|
||||||
|
|
||||||
|
.inc:
|
||||||
|
add esi, 4
|
||||||
|
cmp esi, PCI_header00.base_addr_5
|
||||||
|
jbe .check
|
||||||
|
xor eax, eax
|
||||||
|
pop esi
|
||||||
|
ret
|
||||||
|
|
||||||
|
endp
|
||||||
|
end if
|
@ -1,170 +0,0 @@
|
|||||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
||||||
;; ;;
|
|
||||||
;; Copyright (C) KolibriOS team 2004-2014. All rights reserved. ;;
|
|
||||||
;; Distributed under terms of the GNU General Public License ;;
|
|
||||||
;; ;;
|
|
||||||
;; GNU GENERAL PUBLIC LICENSE ;;
|
|
||||||
;; Version 2, June 1991 ;;
|
|
||||||
;; ;;
|
|
||||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
||||||
|
|
||||||
struct PCI_header
|
|
||||||
|
|
||||||
vendor_id dw ? ; 0x00
|
|
||||||
device_id dw ? ; 0x02
|
|
||||||
command dw ? ; 0x04
|
|
||||||
status dw ? ; 0x06
|
|
||||||
revision_id db ? ; 0x08
|
|
||||||
prog_if db ? ; 0x09
|
|
||||||
subclass db ? ; 0x0A
|
|
||||||
class_code db ? ; 0x0B
|
|
||||||
cache_line_size db ? ; 0x0C
|
|
||||||
latency_timer db ? ; 0x0D
|
|
||||||
header_type db ? ; 0x0E
|
|
||||||
bist db ? ; 0x0F
|
|
||||||
|
|
||||||
ends
|
|
||||||
|
|
||||||
struct PCI_header00 PCI_header
|
|
||||||
|
|
||||||
base_addr_0 dd ? ; 0x10
|
|
||||||
base_addr_1 dd ? ; 0x14
|
|
||||||
base_addr_2 dd ? ; 0x18
|
|
||||||
base_addr_3 dd ? ; 0x1C
|
|
||||||
base_addr_4 dd ? ; 0x20
|
|
||||||
base_addr_5 dd ? ; 0x24
|
|
||||||
cardbus_cis_ptr dd ? ; 0x28
|
|
||||||
subsys_vendor dw ? ; 0x2C
|
|
||||||
subsys_id dw ? ; 0x2E
|
|
||||||
exp_rom_addr dd ? ; 0x30
|
|
||||||
cap_ptr db ? ; 0x34
|
|
||||||
rb 7 ; reserved
|
|
||||||
interrupt_line db ? ; 0x3C
|
|
||||||
interrupt_pin db ? ; 0x3D
|
|
||||||
min_grant db ? ; 0x3E
|
|
||||||
max_latency db ? ; 0x3F
|
|
||||||
|
|
||||||
ends
|
|
||||||
|
|
||||||
struct PCI_header01 PCI_header
|
|
||||||
|
|
||||||
base_addr_0 dd ? ; 0x10
|
|
||||||
base_addr_1 dd ? ; 0x14
|
|
||||||
prim_bus_nr db ? ; 0x18
|
|
||||||
sec_bus_nr db ? ; 0x19
|
|
||||||
sub_bus_nr db ? ; 0x1A
|
|
||||||
sec_lat_tmr db ? ; 0x1B
|
|
||||||
io_base db ? ; 0x1C
|
|
||||||
io_limit db ? ; 0x1D
|
|
||||||
sec_status dw ? ; 0x1E
|
|
||||||
mem_base dw ? ; 0x20
|
|
||||||
mem_limit dw ? ; 0x22
|
|
||||||
pref_mem_base dw ? ; 0x24
|
|
||||||
pref_mem_limit dw ? ; 0x26
|
|
||||||
pref_base_up dd ? ; 0x28
|
|
||||||
pref_limit_up dd ? ; 0x2C
|
|
||||||
io_base_up dw ? ; 0x30
|
|
||||||
io_limit_up dw ? ; 0x32
|
|
||||||
cap_ptr db ? ; 0x34
|
|
||||||
rb 3 ; reserved
|
|
||||||
exp_rom_addr dd ? ; 0x38
|
|
||||||
interrupt_line db ? ; 0x3C
|
|
||||||
interrupt_pin db ? ; 0x3E
|
|
||||||
bridge_ctrl dw ? ; 0x3F
|
|
||||||
|
|
||||||
ends
|
|
||||||
|
|
||||||
struct PCI_header02 PCI_header
|
|
||||||
|
|
||||||
base_addr dd ? ; 0x10
|
|
||||||
cap_list_offs db ? ; 0x14
|
|
||||||
rb 1 ; reserved
|
|
||||||
sec_stat dw ? ; 0x16
|
|
||||||
pci_bus_nr db ? ; 0x18
|
|
||||||
cardbus_bus_nr db ? ; 0x19
|
|
||||||
sub_bus_nr db ? ; 0x1A
|
|
||||||
cardbus_lat_tmr db ? ; 0x1B
|
|
||||||
mbar_0 dd ? ; 0x1C
|
|
||||||
mlimit_0 dd ? ; 0x20
|
|
||||||
mbar_1 dd ? ; 0x24
|
|
||||||
mlimit_1 dd ? ; 0x28
|
|
||||||
iobar_0 dd ? ; 0x2C
|
|
||||||
iolimit_0 dd ? ; 0x30
|
|
||||||
iobar_1 dd ? ; 0x34
|
|
||||||
iolimit_1 dd ? ; 0x38
|
|
||||||
interrupt_line db ? ; 0x3C
|
|
||||||
interrupt_pin db ? ; 0x3D
|
|
||||||
bridge_ctrl dw ? ; 0x3E
|
|
||||||
subs_did dw ? ; 0x40
|
|
||||||
subs_vid dw ? ; 0x42
|
|
||||||
legacy_bar dd ? ; 0x44
|
|
||||||
|
|
||||||
ends
|
|
||||||
|
|
||||||
; Base address bits
|
|
||||||
PCI_BASE_ADDRESS_SPACE_IO = 0x01
|
|
||||||
PCI_BASE_ADDRESS_IO_MASK = 0xFFFFFFFC
|
|
||||||
PCI_BASE_ADDRESS_MEM_MASK = 0xFFFFFFF0
|
|
||||||
|
|
||||||
; command bits
|
|
||||||
PCI_CMD_PIO = 0x01 ; bit0: io space control
|
|
||||||
PCI_CMD_MMIO = 0x02 ; bit1: memory space control
|
|
||||||
PCI_CMD_MASTER = 0x04 ; bit2: device acts as a PCI master
|
|
||||||
|
|
||||||
; status bits
|
|
||||||
PCI_STATUS_CAPA = 0x10 ; bit4: new capabilities available
|
|
||||||
|
|
||||||
|
|
||||||
if used PCI_find_io
|
|
||||||
proc PCI_find_io stdcall bus, dev
|
|
||||||
|
|
||||||
push esi
|
|
||||||
xor eax, eax
|
|
||||||
mov esi, PCI_header00.base_addr_0
|
|
||||||
.check:
|
|
||||||
invoke PciRead32, [bus], [dev], esi
|
|
||||||
test eax, PCI_BASE_ADDRESS_IO_MASK
|
|
||||||
jz .inc
|
|
||||||
test eax, PCI_BASE_ADDRESS_SPACE_IO
|
|
||||||
jz .inc
|
|
||||||
and eax, PCI_BASE_ADDRESS_IO_MASK
|
|
||||||
pop esi
|
|
||||||
ret
|
|
||||||
|
|
||||||
.inc:
|
|
||||||
add esi, 4
|
|
||||||
cmp esi, PCI_header00.base_addr_5
|
|
||||||
jbe .check
|
|
||||||
pop esi
|
|
||||||
xor eax, eax
|
|
||||||
ret
|
|
||||||
|
|
||||||
endp
|
|
||||||
end if
|
|
||||||
|
|
||||||
|
|
||||||
if used PCI_find_mmio32
|
|
||||||
proc PCI_find_mmio32 stdcall bus, dev
|
|
||||||
|
|
||||||
push esi
|
|
||||||
mov esi, PCI_header00.base_addr_0
|
|
||||||
.check:
|
|
||||||
invoke PciRead32, [bus], [dev], esi
|
|
||||||
test eax, PCI_BASE_ADDRESS_SPACE_IO ; mmio address?
|
|
||||||
jnz .inc
|
|
||||||
test eax, 100b ; 64 bit?
|
|
||||||
jnz .inc
|
|
||||||
and eax, not 1111b
|
|
||||||
pop esi
|
|
||||||
ret
|
|
||||||
|
|
||||||
.inc:
|
|
||||||
add esi, 4
|
|
||||||
cmp esi, PCI_header00.base_addr_5
|
|
||||||
jbe .check
|
|
||||||
xor eax, eax
|
|
||||||
pop esi
|
|
||||||
ret
|
|
||||||
|
|
||||||
endp
|
|
||||||
end if
|
|
@ -27,7 +27,7 @@ section '.flat' readable writable executable
|
|||||||
include '../proc32.inc'
|
include '../proc32.inc'
|
||||||
include '../struct.inc'
|
include '../struct.inc'
|
||||||
include '../macros.inc'
|
include '../macros.inc'
|
||||||
include '../pci_pe.inc'
|
include '../pci.inc'
|
||||||
|
|
||||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||||
;; ;;
|
;; ;;
|
||||||
|
@ -32,7 +32,7 @@ include '../proc32.inc'
|
|||||||
include '../struct.inc'
|
include '../struct.inc'
|
||||||
include '../macros.inc'
|
include '../macros.inc'
|
||||||
include '../fdo.inc'
|
include '../fdo.inc'
|
||||||
include '../netdrv_pe.inc'
|
include '../netdrv.inc'
|
||||||
|
|
||||||
struct device ETH_DEVICE
|
struct device ETH_DEVICE
|
||||||
|
|
||||||
|
@ -34,7 +34,7 @@ section '.flat' readable writable executable
|
|||||||
include '../proc32.inc'
|
include '../proc32.inc'
|
||||||
include '../struct.inc'
|
include '../struct.inc'
|
||||||
include '../macros.inc'
|
include '../macros.inc'
|
||||||
include '../pci_pe.inc'
|
include '../pci.inc'
|
||||||
include '../fdo.inc'
|
include '../fdo.inc'
|
||||||
|
|
||||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||||
|
Loading…
Reference in New Issue
Block a user