forked from KolibriOS/kolibrios
Introduced new application event for network subsystem changes (link changed, ip changed, ...)
Removed get_mac and set_mac procedures from device structure, kernel does not need them. Added link state detection capabilities for kernel and some drivers. git-svn-id: svn://kolibrios.org@3346 a494cfbc-eb01-0410-851d-a64ba20cac60
This commit is contained in:
parent
b2da70be62
commit
f685c27c07
@ -76,6 +76,9 @@ redraw:
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add ebx, 18
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mov edx, str_MAC
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mcall
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add ebx, 18
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mov edx, str_link
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mcall
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mov ebx, API_ETH + 4
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mov bh, [device]
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@ -201,14 +204,21 @@ draw_stats:
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inc bl
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cmp bl, 3
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jbe @r
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inc bl
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mcall 76
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push eax
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mov ebx, 0x000a0000
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pop ecx
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mov edx, 135 shl 16 + 75 + 3*18
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mov edx, 135 shl 16 + 75 + 5*18
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mov esi, 0x40000000
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mov edi, 0x00bcbcbc
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mcall 47
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sub edx, 18*2
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pop ecx
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mcall
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sub edx, 18
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pop ecx
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mcall
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@ -591,6 +601,7 @@ str_conflicts db 'ARP conflicts:', 0
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str_unknown db 'unknown', 0
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str_missed db 'Packets missed:',0
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str_dumped db 'Packets dumped:',0
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str_link db 'Link state:',0
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namebuf rb 64
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@ -480,8 +480,6 @@ proc service_proc stdcall, ioctl:dword
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mov [device.reset], reset
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mov [device.transmit], null_op
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mov [device.get_MAC], read_mac
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mov [device.set_MAC], write_mac
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mov [device.unload], null_op
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mov [device.name], my_service
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@ -829,7 +827,7 @@ start_device:
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; print link type
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xor eax, eax
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bsr ax, word [device.mode]
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bsr ax, word [device.state]
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jz @f
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sub ax, 4
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@@:
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@ -1108,7 +1106,7 @@ try_link_detect:
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.finish:
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test al, al
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jz @f
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or byte [device.mode+1], 100b
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or byte [device.state+1], 100b
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@@:
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ret
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@ -1219,7 +1217,7 @@ try_phy:
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and eax, 1111100000b
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push eax
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mov word[device.mode+2], ax
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mov word[device.state+2], ax
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; switch to register window 3
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set_io 0
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@ -1508,7 +1506,7 @@ try_loopback:
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mov cl, al
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inc cl
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shl cl, 3
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or byte [device.mode+1], cl
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or byte [device.state+1], cl
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test al, al ; aui or coax?
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jz .complete_loopback
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@ -1540,7 +1538,7 @@ try_loopback:
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test al, al
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jnz @f
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and byte [device.mode+1], not 11000b
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and byte [device.state+1], not 11000b
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@@:
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ret
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@ -1713,7 +1711,7 @@ set_available_media:
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DEBUGF 1,"base TX is available\n"
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or eax, (100b shl 20)
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if defined FORCE_FD
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mov word [device.mode], (1 shl 8)
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mov word [device.state], (1 shl 8)
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else
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mov word [device.mode], (1 shl 7)
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end if
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@ -1725,7 +1723,7 @@ end if
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DEBUGF 1,"base FX is available\n"
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or eax, (101b shl 20)
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mov word [device.mode], (1 shl 10)
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mov word [device.state], (1 shl 10)
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jmp .set_media
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@@:
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@ -1734,7 +1732,7 @@ end if
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DEBUGF 1,"mii-device is available\n"
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or eax, (0110b shl 20)
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mov word [device.mode], (1 shl 13)
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mov word [device.state], (1 shl 13)
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jmp .set_media
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@@:
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@ -1744,9 +1742,9 @@ end if
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DEBUGF 1,"10base-T is available\n"
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.set_default:
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if FORCE_FD
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mov word [device.mode], (1 shl 6)
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mov word [device.state], (1 shl 6)
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else
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mov word [device.mode], (1 shl 5)
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mov word [device.state], (1 shl 5)
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end if
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jmp .set_media
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@@:
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@ -1762,7 +1760,7 @@ end if
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pop eax
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or eax, (11b shl 20)
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mov word [device.mode], (1 shl 12)
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mov word [device.state], (1 shl 12)
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jmp .set_media
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@@:
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@ -1771,7 +1769,7 @@ end if
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DEBUGF 1,"AUI is available\n"
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or eax, (1 shl 20)
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mov word [device.mode], (1 shl 11)
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mov word [device.state], (1 shl 11)
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.set_media:
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set_io 0
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@ -305,8 +305,6 @@ proc service_proc stdcall, ioctl:dword
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mov [device.reset], reset
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mov [device.transmit], transmit
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mov [device.get_MAC], read_mac
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mov [device.set_MAC], .fail
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mov [device.unload], unload
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mov [device.name], my_service
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@ -620,9 +618,11 @@ reset:
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; Set the mtu, kernel will be able to send now
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mov [device.mtu], 1514
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; Set link state to unknown
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mov [device.state], ETH_LINK_UNKOWN
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DEBUGF 1,"Reset ok\n"
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xor eax, eax
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ret
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@ -350,8 +350,6 @@ create_new_struct:
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mov [device.reset], reset
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mov [device.transmit], transmit
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mov [device.get_MAC], read_mac
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mov [device.set_MAC], write_mac
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mov [device.unload], unload
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mov [device.name], my_service
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@ -653,6 +651,9 @@ reset:
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; Set the mtu, kernel will be able to send now
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mov [device.mtu], ETH_FRAME_LEN
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; Set link state to unknown
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mov [device.state], ETH_LINK_UNKOWN
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; Indicate that we have successfully reset the card
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xor eax, eax
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DEBUGF 2,"Done!\n"
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@ -32,7 +32,6 @@ format MS COFF
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include 'proc32.inc'
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include 'imports.inc'
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include 'fdo.inc'
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include '../struct.inc'
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include 'netdrv.inc'
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public START
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@ -59,7 +58,7 @@ public version
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REG_HLTCLK = 0x5b ; undocumented halt clock register
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REG_BMCR = 0x62 ; basic mode control register
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REG_ANAR = 0x66 ; auto negotiation advertisement register
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REG_9346CR_WE = 11b SHL 6
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REG_9346CR_WE = 11b shl 6
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BIT_RUNT = 4 ; total packet length < 64 bytes
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BIT_LONG = 3 ; total packet length > 4k
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@ -166,16 +165,16 @@ public version
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IDX_RTL8139D = 6
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IDX_RTL8101 = 7
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ISR_SERR = 1 SHL 15
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ISR_TIMEOUT = 1 SHL 14
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ISR_LENCHG = 1 SHL 13
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ISR_FIFOOVW = 1 SHL 6
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ISR_PUN = 1 SHL 5
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ISR_RXOVW = 1 SHL 4
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ISR_TER = 1 SHL 3
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ISR_TOK = 1 SHL 2
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ISR_RER = 1 SHL 1
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ISR_ROK = 1 SHL 0
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ISR_SERR = 1 shl 15
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ISR_TIMEOUT = 1 shl 14
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ISR_LENCHG = 1 shl 13
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ISR_FIFOOVW = 1 shl 6
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ISR_PUN = 1 shl 5
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ISR_RXOVW = 1 shl 4
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ISR_TER = 1 shl 3
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ISR_TOK = 1 shl 2
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ISR_RER = 1 shl 1
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ISR_ROK = 1 shl 0
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INTERRUPT_MASK = ISR_ROK or \
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ISR_RXOVW or \
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@ -185,14 +184,14 @@ public version
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ISR_TOK or \
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ISR_TER
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TSR_OWN = 1 SHL 13
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TSR_TUN = 1 SHL 14
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TSR_TOK = 1 SHL 15
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TSR_OWN = 1 shl 13
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TSR_TUN = 1 shl 14
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TSR_TOK = 1 shl 15
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TSR_CDH = 1 SHL 28
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TSR_OWC = 1 SHL 29
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TSR_TABT = 1 SHL 30
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TSR_CRS = 1 SHL 31
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TSR_CDH = 1 shl 28
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TSR_OWC = 1 shl 29
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TSR_TABT = 1 shl 30
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TSR_CRS = 1 shl 31
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virtual at ebx
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@ -202,7 +201,6 @@ virtual at ebx
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ETH_DEVICE
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.rx_buffer dd ?
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.tx_buffer dd ?
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.rx_data_offset dd ?
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.io_addr dd ?
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@ -295,7 +293,7 @@ proc service_proc stdcall, ioctl:dword
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test ecx, ecx
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jz .firstdevice
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mov ax , [eax+1] ; get the pci bus and device numbers
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mov ax, [eax+1] ; get the pci bus and device numbers
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.nextdevice:
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mov ebx, [esi]
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cmp al, byte[device.pci_bus]
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@ -318,8 +316,6 @@ proc service_proc stdcall, ioctl:dword
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mov [device.reset], reset
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mov [device.transmit], transmit
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mov [device.get_MAC], read_mac
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mov [device.set_MAC], write_mac
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mov [device.unload], unload
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mov [device.name], my_service
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@ -339,7 +335,7 @@ proc service_proc stdcall, ioctl:dword
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PCI_find_irq
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DEBUGF 2, "Hooking into device, dev:%x, bus:%x, irq:%x, addr:%x\n",\
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DEBUGF 2, "Hooking into device, dev:%x, bus:%x, irq:%x, I/O addr:%x\n",\
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[device.pci_dev]:1,[device.pci_bus]:1,[device.irq_line]:1,[device.io_addr]:4
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; Allocate the receive buffer
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@ -428,7 +424,6 @@ probe:
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PCI_make_bus_master
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; get chip version
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set_io 0
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set_io REG_TXCONFIG + 2
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in ax, dx
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@ -436,6 +431,7 @@ probe:
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shr ax, 6
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and al, 01111111b
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; now find it in our array
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mov ecx, HW_VER_ARRAY_SIZE-1
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.chip_ver_loop:
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cmp al, [hw_ver_array + ecx]
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@ -456,30 +452,31 @@ probe:
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DEBUGF 2, "Chip version: %s\n", ecx
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; wake up the chip
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set_io 0
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set_io REG_HLTCLK
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mov al, 'R' ; run the clock
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out dx, al
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; unlock config and BMCR registers
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set_io REG_9346CR
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mov al, (1 shl BIT_93C46_EEM1) or (1 shl BIT_93C46_EEM0)
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out dx, al
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; enable power management
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set_io REG_CONFIG1
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in al, dx
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cmp [device.hw_ver_id], IDX_RTL8139B
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jb .old_chip
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jae .new_chip
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; wake up older chips
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and al, not ((1 shl BIT_SLEEP) or (1 shl BIT_PWRDWN))
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out dx, al
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jmp .finish_wake_up
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; set LWAKE pin to active high (default value).
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; it is for Wake-On-LAN functionality of some motherboards.
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; this signal is used to inform the motherboard to execute a wake-up process.
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; only at newer chips.
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.new_chip:
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or al, (1 shl BIT_PMEn)
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and al, not (1 shl BIT_LWACT)
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out dx, al
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@ -489,17 +486,8 @@ probe:
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and al, not (1 shl BIT_LWPTN)
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out dx, al
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jmp .finish_wake_up
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.old_chip:
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; wake up older chips
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and al, not ((1 shl BIT_SLEEP) or (1 shl BIT_PWRDWN))
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out dx, al
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.finish_wake_up:
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; lock config and BMCR registers
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.finish_wake_up:
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xor al, al
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set_io 0
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set_io REG_9346CR
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@ -514,12 +502,11 @@ probe:
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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reset:
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DEBUGF 2, "Resetting\n"
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DEBUGF 2, "Reset\n"
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; attach int handler
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movzx eax, [device.irq_line]
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DEBUGF 1, "Attaching int handler to irq %x, ", eax:1
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DEBUGF 1, "Attaching int handler to irq %x\n", eax:1
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stdcall AttachIntHandler, eax, int_handler, dword 0
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test eax, eax
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jnz @f
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@ -529,123 +516,106 @@ reset:
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@@:
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; reset chip
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DEBUGF 1, "Resetting chip\n"
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set_io 0
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set_io REG_COMMAND
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mov al , 1 shl BIT_RST
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out dx , al
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mov cx , 1000 ; wait no longer for the reset
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mov al, 1 shl BIT_RST
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out dx, al
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mov cx, 1000 ; wait no longer for the reset
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.wait_for_reset:
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in al , dx
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test al , 1 shl BIT_RST
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in al, dx
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test al, 1 shl BIT_RST
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jz .reset_completed ; RST remains 1 during reset
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dec cx
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jns .wait_for_reset
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DEBUGF 1, "Reset timeout!\n"
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.reset_completed:
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; unlock config and BMCR registers
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set_io REG_9346CR
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mov al, (1 shl BIT_93C46_EEM1) or (1 shl BIT_93C46_EEM0)
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out dx, al
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; initialize multicast registers (no filtering)
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mov eax, 0xffffffff
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set_io REG_MAR0
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out dx, eax
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set_io REG_MAR4
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out dx, eax
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; enable Rx/Tx
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mov al, (1 shl BIT_RE) or (1 shl BIT_TE)
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set_io REG_COMMAND
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out dx, al
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; Rxbuffer size, unlimited dma burst, no wrapping, no rx threshold
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; accept broadcast packets, accept physical match packets
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mov ax, RX_CONFIG
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set_io REG_RXCONFIG
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out dx, ax
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; 1024 bytes DMA burst, total retries = 16 + 8 * 16 = 144
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mov eax, (TX_MXDMA shl BIT_TX_MXDMA) or (TXRR shl BIT_TXRR) or BIT_IFG1 or BIT_IFG0
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set_io REG_TXCONFIG
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out dx, eax
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; enable auto negotiation
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set_io REG_BMCR
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in ax, dx
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or ax, (1 shl BIT_ANE)
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out dx, ax
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; set auto negotiation advertisement
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set_io REG_ANAR
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in ax, dx
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or ax, (1 shl BIT_SELECTOR) or (1 shl BIT_10) or (1 shl BIT_10FD) or (1 shl BIT_TX) or (1 shl BIT_TXFD)
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out dx, ax
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; lock config and BMCR registers
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xor eax, eax
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set_io REG_9346CR
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out dx, al
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; init RX/TX pointers
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mov [device.rx_data_offset], eax
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mov [device.curr_tx_desc], al
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; set_io REG_CAPR
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; out dx, ax
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; clear packet/byte counters
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lea edi, [device.bytes_tx]
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mov ecx, 6
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rep stosd
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; clear missing packet counter
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set_io REG_MPC
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out dx, eax
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; set RxBuffer address, init RX buffer offset
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mov eax, [device.rx_buffer]
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mov dword[eax], 0
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DEBUGF 2, "RX buffer: %x\n", eax
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mov dword[eax], 0 ; clear receive flags for first packet (really needed??)
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DEBUGF 2, "RX buffer virtual addr=0x%x\n", eax
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GetRealAddr
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DEBUGF 2, "RX buffer: %x\n", eax
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DEBUGF 2, "RX buffer real addr=0x%x\n", eax
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set_io REG_RBSTART
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out dx, eax
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; Read MAC address
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call read_mac
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; enable interrupts
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; enable Rx/Tx
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set_io 0
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mov al, (1 shl BIT_RE) or (1 shl BIT_TE)
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||||
set_io REG_COMMAND
|
||||
out dx, al
|
||||
|
||||
; enable interrupts
|
||||
set_io REG_IMR
|
||||
mov eax, INTERRUPT_MASK
|
||||
out dx , ax
|
||||
mov ax, INTERRUPT_MASK
|
||||
out dx, ax
|
||||
|
||||
; Set the mtu, kernel will be able to send now
|
||||
mov [device.mtu], 1514
|
||||
|
||||
call cable
|
||||
|
||||
; Indicate that we have successfully reset the card
|
||||
|
||||
DEBUGF 2, "Done!\n"
|
||||
xor eax, eax
|
||||
|
||||
ret
|
||||
|
||||
|
||||
@ -750,7 +720,6 @@ int_handler:
|
||||
DEBUGF 1, "\n%s int\n", my_service
|
||||
|
||||
; find pointer of device wich made IRQ occur
|
||||
|
||||
mov ecx, [devices]
|
||||
test ecx, ecx
|
||||
jz .nothing
|
||||
@ -760,8 +729,8 @@ int_handler:
|
||||
|
||||
set_io 0
|
||||
set_io REG_ISR
|
||||
in ax, dx
|
||||
out dx, ax ; send it back to ACK
|
||||
in ax, dx ; Get interrupt status
|
||||
out dx, ax ; send it back to ACK
|
||||
test ax, ax
|
||||
jnz .got_it
|
||||
.continue:
|
||||
@ -769,7 +738,7 @@ int_handler:
|
||||
dec ecx
|
||||
jnz .nextdevice
|
||||
.nothing:
|
||||
ret ; If no device was found, abort (The irq was probably for a device, not registered to this driver)
|
||||
ret ; If no device was found, abort (The irq was probably for a device, not registered to this driver)
|
||||
|
||||
.got_it:
|
||||
|
||||
@ -785,42 +754,41 @@ int_handler:
|
||||
.receive:
|
||||
set_io 0
|
||||
set_io REG_COMMAND
|
||||
in al , dx
|
||||
test al , BUFE ; test if RX buffer is empty
|
||||
jnz .finish ;
|
||||
in al, dx
|
||||
test al, BUFE ; test if RX buffer is empty
|
||||
jnz .finish
|
||||
|
||||
DEBUGF 1, "RX: "
|
||||
|
||||
mov eax, [device.rx_buffer]
|
||||
add eax, [device.rx_data_offset]
|
||||
test byte [eax], (1 shl BIT_ROK) ; check if packet is ok
|
||||
test byte [eax], (1 shl BIT_ROK) ; check if packet is ok
|
||||
jz .reset_rx
|
||||
|
||||
; packet is ok, copy it
|
||||
movzx ecx, word [eax+2] ; packet length
|
||||
|
||||
sub ecx, 4 ; don't copy CRC
|
||||
movzx ecx, word [eax+2] ; packet length
|
||||
sub cx, 4 ; don't copy CRC
|
||||
|
||||
; Update stats
|
||||
add dword [device.bytes_rx], ecx
|
||||
adc dword [device.bytes_rx + 4], 0
|
||||
inc dword [device.packets_rx]
|
||||
inc [device.packets_rx]
|
||||
|
||||
DEBUGF 1, "Received %u bytes\n", ecx
|
||||
|
||||
push ebx eax ecx
|
||||
stdcall KernelAlloc, ecx ; Allocate a buffer to put packet into
|
||||
stdcall KernelAlloc, ecx ; Allocate a buffer to put packet into
|
||||
pop ecx
|
||||
test eax, eax ; Test if we allocated succesfully
|
||||
test eax, eax ; Test if we allocated succesfully
|
||||
jz .abort
|
||||
|
||||
mov edi, eax ; Where we will copy too
|
||||
mov edi, eax ; Where we will copy too
|
||||
|
||||
mov esi, [esp] ; The buffer we will copy from
|
||||
add esi, 4 ; Dont copy CRC
|
||||
mov esi, [esp] ; The buffer we will copy from
|
||||
add esi, 4 ; Dont copy CRC
|
||||
|
||||
push dword .abort ; Kernel will return to this address after EthReceiver
|
||||
push ecx edi ; Save buffer pointer and size, to pass to kernel
|
||||
push dword .abort ; Kernel will return to this address after EthReceiver
|
||||
push ecx edi ; Save buffer pointer and size, to pass to kernel
|
||||
|
||||
.copy:
|
||||
shr ecx, 1
|
||||
@ -835,15 +803,15 @@ int_handler:
|
||||
rep movsd
|
||||
.nd:
|
||||
|
||||
jmp Eth_input ; Send it to kernel
|
||||
jmp Eth_input ; Send it to kernel
|
||||
|
||||
.abort:
|
||||
pop eax ebx
|
||||
; update eth_data_start_offset
|
||||
movzx eax, word [eax+2] ; packet length
|
||||
; update eth_data_start_offset
|
||||
movzx eax, word [eax+2] ; packet length
|
||||
add eax, [device.rx_data_offset]
|
||||
add eax, 4+3 ; packet header is 4 bytes long + dword alignment
|
||||
and eax, not 3 ; dword alignment
|
||||
add eax, 4+3 ; packet header is 4 bytes long + dword alignment
|
||||
and eax, not 3 ; dword alignment
|
||||
|
||||
cmp eax, RX_BUFFER_SIZE
|
||||
jb .no_wrap
|
||||
@ -854,11 +822,11 @@ int_handler:
|
||||
DEBUGF 1, "New RX ptr: %d\n", eax
|
||||
|
||||
set_io 0
|
||||
set_io REG_CAPR ; update 'Current Address of Packet Read register'
|
||||
sub eax, 0x10 ; value 0x10 is a constant for CAPR
|
||||
set_io REG_CAPR ; update 'Current Address of Packet Read register'
|
||||
sub eax, 0x10 ; value 0x10 is a constant for CAPR
|
||||
out dx , ax
|
||||
|
||||
jmp .receive ; check for multiple packets
|
||||
jmp .receive ; check for multiple packets
|
||||
|
||||
.reset_rx:
|
||||
test byte [eax], (1 shl BIT_CRC)
|
||||
@ -872,16 +840,14 @@ int_handler:
|
||||
|
||||
.no_fae_error:
|
||||
DEBUGF 1, "Reset RX\n"
|
||||
in al, dx ; read command register
|
||||
in al, dx ; read command register
|
||||
push ax
|
||||
|
||||
and al, not (1 shl BIT_RE) ; Clear the RE bit
|
||||
and al, not (1 shl BIT_RE) ; Clear the RE bit
|
||||
out dx, al
|
||||
|
||||
pop ax
|
||||
out dx, al ; write original command back
|
||||
out dx, al ; write original command back
|
||||
|
||||
add edx, REG_RXCONFIG - REG_COMMAND ; Restore RX configuration
|
||||
add edx, REG_RXCONFIG - REG_COMMAND ; Restore RX configuration
|
||||
mov ax, RX_CONFIG
|
||||
out dx, ax
|
||||
|
||||
@ -985,7 +951,6 @@ int_handler:
|
||||
test ax, ISR_LENCHG
|
||||
jz .fail
|
||||
|
||||
DEBUGF 2, "Cable changed!\n"
|
||||
call cable
|
||||
|
||||
.fail:
|
||||
@ -1003,24 +968,35 @@ int_handler:
|
||||
|
||||
align 4
|
||||
cable:
|
||||
DEBUGF 1, "Checking Cable status: "
|
||||
DEBUGF 1, "Updating Cable status\n"
|
||||
|
||||
mov edx, dword [device.io_addr]
|
||||
add edx, REG_MSR
|
||||
in al , dx
|
||||
set_io 0
|
||||
set_io REG_MSR
|
||||
in al, dx
|
||||
|
||||
; test al , 1 SHL 2 ; 0 = link ok 1 = link fail
|
||||
; jnz .notconnected
|
||||
test al, 1 shl 2 ; 0 = link ok 1 = link fail
|
||||
jnz .notconnected
|
||||
|
||||
; test al , 1 SHL 3 ; 0 = 100 Mbps 1 = 10 Mbps
|
||||
; jnz .10mbps
|
||||
test al, 1 shl 3 ; 0 = 100 Mbps 1 = 10 Mbps
|
||||
jnz .10mbps
|
||||
|
||||
shr al, 2
|
||||
and al, 3
|
||||
.100mbps:
|
||||
mov [device.state], ETH_LINK_100M
|
||||
call NetLinkChanged
|
||||
|
||||
mov byte [device.mode+3], al
|
||||
DEBUGF 1, "Done!\n"
|
||||
ret
|
||||
ret
|
||||
|
||||
.10mbps:
|
||||
mov [device.state], ETH_LINK_10M
|
||||
call NetLinkChanged
|
||||
|
||||
ret
|
||||
|
||||
.notconnected:
|
||||
mov [device.state], ETH_LINK_DOWN
|
||||
call NetLinkChanged
|
||||
|
||||
ret
|
||||
|
||||
|
||||
|
||||
@ -1036,7 +1012,6 @@ write_mac: ; in: mac pushed onto stack (as 3 words)
|
||||
DEBUGF 2, "Writing MAC: "
|
||||
|
||||
; disable all in command registers
|
||||
|
||||
set_io 0
|
||||
set_io REG_9346CR
|
||||
xor eax, eax
|
||||
@ -1051,13 +1026,11 @@ write_mac: ; in: mac pushed onto stack (as 3 words)
|
||||
out dx, ax
|
||||
|
||||
; enable writing
|
||||
|
||||
set_io REG_9346CR
|
||||
mov eax, REG_9346CR_WE
|
||||
out dx, al
|
||||
|
||||
; write the mac ...
|
||||
|
||||
set_io REG_IDR0
|
||||
pop eax
|
||||
out dx, eax
|
||||
@ -1068,7 +1041,6 @@ write_mac: ; in: mac pushed onto stack (as 3 words)
|
||||
out dx, eax
|
||||
|
||||
; disable writing
|
||||
|
||||
set_io REG_9346CR
|
||||
xor eax, eax
|
||||
out dx, al
|
||||
|
@ -462,8 +462,6 @@ proc service_proc stdcall, ioctl:dword
|
||||
|
||||
mov [device.reset], reset
|
||||
mov [device.transmit], transmit
|
||||
mov [device.get_MAC], read_mac
|
||||
mov [device.set_MAC], write_mac
|
||||
mov [device.unload], unload
|
||||
mov [device.name], my_service
|
||||
|
||||
@ -725,6 +723,9 @@ reset:
|
||||
|
||||
mov [device.mtu], 1500
|
||||
|
||||
; Set link state to unknown
|
||||
mov [device.state], ETH_LINK_UNKOWN
|
||||
|
||||
xor eax, eax
|
||||
ret
|
||||
|
||||
|
@ -161,8 +161,6 @@ proc service_proc stdcall, ioctl:dword
|
||||
|
||||
mov [device.reset], reset
|
||||
mov [device.transmit], transmit
|
||||
mov [device.get_MAC], read_mac
|
||||
mov [device.set_MAC], .fail
|
||||
mov [device.unload], unload
|
||||
mov [device.name], my_service
|
||||
|
||||
@ -294,6 +292,11 @@ reset:
|
||||
|
||||
call read_mac
|
||||
|
||||
; Set the mtu, kernel will be able to send now
|
||||
mov [device.mtu], 1514
|
||||
|
||||
; Set link state to unknown
|
||||
mov [device.state], ETH_LINK_UNKOWN
|
||||
|
||||
ret
|
||||
|
||||
|
@ -409,8 +409,6 @@ proc service_proc stdcall, ioctl:dword
|
||||
|
||||
mov [device.reset], reset
|
||||
mov [device.transmit], transmit
|
||||
mov [device.get_MAC], read_mac
|
||||
mov [device.set_MAC], write_mac
|
||||
mov [device.unload], unload
|
||||
mov [device.name], my_service
|
||||
|
||||
@ -695,6 +693,9 @@ reset:
|
||||
; Set the mtu, kernel will be able to send now
|
||||
mov [device.mtu], 1514
|
||||
|
||||
; Set link state to unknown
|
||||
mov [device.state], ETH_LINK_UNKOWN
|
||||
|
||||
DEBUGF 1,"Reset done\n"
|
||||
|
||||
ret
|
||||
|
@ -535,8 +535,6 @@ proc service_proc stdcall, ioctl:dword
|
||||
|
||||
mov [device.reset], reset
|
||||
mov [device.transmit], transmit
|
||||
mov [device.get_MAC], read_mac
|
||||
mov [device.set_MAC], .fail
|
||||
mov [device.unload], .fail
|
||||
mov [device.name], my_service
|
||||
|
||||
@ -986,6 +984,9 @@ reset:
|
||||
xor eax, eax ; Indicate that we have successfully reset the card
|
||||
mov [device.mtu], 1514 ;;; FIXME
|
||||
|
||||
; Set link state to unknown
|
||||
mov [device.state], ETH_LINK_UNKOWN
|
||||
|
||||
ret
|
||||
|
||||
|
||||
|
@ -374,8 +374,6 @@ proc service_proc stdcall, ioctl:dword
|
||||
|
||||
mov [device.reset], reset
|
||||
mov [device.transmit], transmit
|
||||
mov [device.get_MAC], read_mac
|
||||
mov [device.set_MAC], .fail
|
||||
mov [device.unload], unload
|
||||
mov [device.name], my_service
|
||||
|
||||
@ -585,6 +583,9 @@ start_i8254x:
|
||||
|
||||
mov [device.mtu], 1514
|
||||
|
||||
; Set link state to unknown
|
||||
mov [device.state], ETH_LINK_UNKOWN
|
||||
|
||||
xor eax, eax
|
||||
ret
|
||||
|
||||
|
@ -273,8 +273,6 @@ proc service_proc stdcall, ioctl:dword
|
||||
|
||||
mov [device.reset], reset
|
||||
mov [device.transmit], transmit
|
||||
mov [device.get_MAC], read_mac
|
||||
mov [device.set_MAC], MAC_write
|
||||
mov [device.unload], unload
|
||||
mov [device.name], my_service
|
||||
|
||||
@ -561,8 +559,11 @@ reset:
|
||||
DEBUGF 1,"Resetting %s complete\n", my_service
|
||||
|
||||
mov [device.mtu], 1514
|
||||
xor eax, eax ; indicate that we have successfully reset the card
|
||||
|
||||
; Set link state to unknown
|
||||
mov [device.state], ETH_LINK_UNKOWN
|
||||
|
||||
xor eax, eax ; indicate that we have successfully reset the card
|
||||
ret
|
||||
|
||||
|
||||
@ -669,6 +670,8 @@ transmit:
|
||||
add dword [device.bytes_tx], eax
|
||||
adc dword [device.bytes_tx + 4], 0
|
||||
|
||||
DEBUGF 1,"Transmit OK\n"
|
||||
|
||||
xor eax, eax
|
||||
ret 8
|
||||
|
||||
@ -781,13 +784,49 @@ int_handler:
|
||||
.no_rx:
|
||||
|
||||
; Cleanup after TX
|
||||
|
||||
cmp [txfd.status], 0
|
||||
je .done
|
||||
cmp [last_tx_buffer], 0
|
||||
je .done
|
||||
push ax
|
||||
DEBUGF 1, "Removing packet 0x%x from RAM!\n", [last_tx_buffer]
|
||||
stdcall KernelFree, [last_tx_buffer]
|
||||
mov [last_tx_buffer], 0
|
||||
pop ax
|
||||
|
||||
.done:
|
||||
and ax, 00111100b
|
||||
cmp ax, 00001000b
|
||||
jne .fail
|
||||
|
||||
DEBUGF 1, "out of resources!\n"
|
||||
; Restart the RX
|
||||
|
||||
; allocate new descriptor
|
||||
|
||||
stdcall KernelAlloc, 2000
|
||||
mov [device.rx_desc], eax
|
||||
mov esi, eax
|
||||
GetRealAddr
|
||||
mov [esi + rxfd.status], 0x0000
|
||||
mov [esi + rxfd.command], 0xc000 ; End of list + Suspend
|
||||
mov [esi + rxfd.link], eax
|
||||
mov [esi + rxfd.count], 0
|
||||
mov [esi + rxfd.size], 1528
|
||||
|
||||
; restart RX
|
||||
|
||||
set_io 0
|
||||
set_io reg_scb_ptr
|
||||
; lea eax, [device.rx_desc]
|
||||
; GetRealAddr
|
||||
out dx, eax
|
||||
|
||||
set_io reg_scb_cmd
|
||||
mov ax, RX_START
|
||||
out dx, ax
|
||||
call cmd_wait
|
||||
|
||||
.fail:
|
||||
|
||||
ret
|
||||
|
@ -97,5 +97,6 @@ kernel_export \
|
||||
NetRegDev,\
|
||||
NetUnRegDev,\
|
||||
NetPtrToNum,\
|
||||
NetLinkChanged,\
|
||||
Eth_input,\
|
||||
IPv4_input
|
||||
|
@ -16,17 +16,17 @@
|
||||
|
||||
format MS COFF
|
||||
|
||||
API_VERSION = 0x01000100
|
||||
DRIVER_VERSION = 5
|
||||
API_VERSION = 0x01000100
|
||||
DRIVER_VERSION = 5
|
||||
|
||||
MAX_DEVICES = 16
|
||||
MAX_DEVICES = 16
|
||||
|
||||
DEBUG = 1
|
||||
__DEBUG__ = 1
|
||||
__DEBUG_LEVEL__ = 1
|
||||
DEBUG = 1
|
||||
__DEBUG__ = 1
|
||||
__DEBUG_LEVEL__ = 1
|
||||
|
||||
NUM_TX_DESC = 4
|
||||
NUM_RX_DESC = 4
|
||||
NUM_TX_DESC = 4
|
||||
NUM_RX_DESC = 4
|
||||
|
||||
include 'proc32.inc'
|
||||
include 'imports.inc'
|
||||
@ -40,210 +40,210 @@ public version
|
||||
|
||||
; for different PHY
|
||||
|
||||
MysonPHY = 1
|
||||
AhdocPHY = 2
|
||||
SeeqPHY = 3
|
||||
MarvellPHY = 4
|
||||
Myson981 = 5
|
||||
LevelOnePHY = 6
|
||||
OtherPHY = 10
|
||||
MysonPHY = 1
|
||||
AhdocPHY = 2
|
||||
SeeqPHY = 3
|
||||
MarvellPHY = 4
|
||||
Myson981 = 5
|
||||
LevelOnePHY = 6
|
||||
OtherPHY = 10
|
||||
|
||||
; Offsets to the Command and Status Registers.
|
||||
|
||||
PAR0 = 0x0 ; physical address 0-3
|
||||
PAR1 = 0x04 ; physical address 4-5
|
||||
MAR0 = 0x08 ; multicast address 0-3
|
||||
MAR1 = 0x0C ; multicast address 4-7
|
||||
FAR0 = 0x10 ; flow-control address 0-3
|
||||
FAR1 = 0x14 ; flow-control address 4-5
|
||||
TCRRCR = 0x18 ; receive & transmit configuration
|
||||
BCR = 0x1C ; bus command
|
||||
TXPDR = 0x20 ; transmit polling demand
|
||||
RXPDR = 0x24 ; receive polling demand
|
||||
RXCWP = 0x28 ; receive current word pointer
|
||||
TXLBA = 0x2C ; transmit list base address
|
||||
RXLBA = 0x30 ; receive list base address
|
||||
ISR = 0x34 ; interrupt status
|
||||
IMR = 0x38 ; interrupt mask
|
||||
FTH = 0x3C ; flow control high/low threshold
|
||||
MANAGEMENT = 0x40 ; bootrom/eeprom and mii management
|
||||
TALLY = 0x44 ; tally counters for crc and mpa
|
||||
TSR = 0x48 ; tally counter for transmit status
|
||||
BMCRSR = 0x4c ; basic mode control and status
|
||||
PHYIDENTIFIER = 0x50 ; phy identifier
|
||||
ANARANLPAR = 0x54 ; auto-negotiation advertisement and link partner ability
|
||||
ANEROCR = 0x58 ; auto-negotiation expansion and pci conf.
|
||||
BPREMRPSR = 0x5c ; bypass & receive error mask and phy status
|
||||
PAR0 = 0x0 ; physical address 0-3
|
||||
PAR1 = 0x04 ; physical address 4-5
|
||||
MAR0 = 0x08 ; multicast address 0-3
|
||||
MAR1 = 0x0C ; multicast address 4-7
|
||||
FAR0 = 0x10 ; flow-control address 0-3
|
||||
FAR1 = 0x14 ; flow-control address 4-5
|
||||
TCRRCR = 0x18 ; receive & transmit configuration
|
||||
BCR = 0x1C ; bus command
|
||||
TXPDR = 0x20 ; transmit polling demand
|
||||
RXPDR = 0x24 ; receive polling demand
|
||||
RXCWP = 0x28 ; receive current word pointer
|
||||
TXLBA = 0x2C ; transmit list base address
|
||||
RXLBA = 0x30 ; receive list base address
|
||||
ISR = 0x34 ; interrupt status
|
||||
IMR = 0x38 ; interrupt mask
|
||||
FTH = 0x3C ; flow control high/low threshold
|
||||
MANAGEMENT = 0x40 ; bootrom/eeprom and mii management
|
||||
TALLY = 0x44 ; tally counters for crc and mpa
|
||||
TSR = 0x48 ; tally counter for transmit status
|
||||
BMCRSR = 0x4c ; basic mode control and status
|
||||
PHYIDENTIFIER = 0x50 ; phy identifier
|
||||
ANARANLPAR = 0x54 ; auto-negotiation advertisement and link partner ability
|
||||
ANEROCR = 0x58 ; auto-negotiation expansion and pci conf.
|
||||
BPREMRPSR = 0x5c ; bypass & receive error mask and phy status
|
||||
|
||||
; Bits in the interrupt status/enable registers.
|
||||
|
||||
RFCON = 0x00020000 ; receive flow control xon packet
|
||||
RFCOFF = 0x00010000 ; receive flow control xoff packet
|
||||
LSCStatus = 0x00008000 ; link status change
|
||||
ANCStatus = 0x00004000 ; autonegotiation completed
|
||||
FBE = 0x00002000 ; fatal bus error
|
||||
FBEMask = 0x00001800 ; mask bit12-11
|
||||
ParityErr = 0x00000000 ; parity error
|
||||
TargetErr = 0x00001000 ; target abort
|
||||
MasterErr = 0x00000800 ; master error
|
||||
TUNF = 0x00000400 ; transmit underflow
|
||||
ROVF = 0x00000200 ; receive overflow
|
||||
ETI = 0x00000100 ; transmit early int
|
||||
ERI = 0x00000080 ; receive early int
|
||||
CNTOVF = 0x00000040 ; counter overflow
|
||||
RBU = 0x00000020 ; receive buffer unavailable
|
||||
TBU = 0x00000010 ; transmit buffer unavilable
|
||||
TI = 0x00000008 ; transmit interrupt
|
||||
RI = 0x00000004 ; receive interrupt
|
||||
RxErr = 0x00000002 ; receive error
|
||||
RFCON = 0x00020000 ; receive flow control xon packet
|
||||
RFCOFF = 0x00010000 ; receive flow control xoff packet
|
||||
LSCStatus = 0x00008000 ; link status change
|
||||
ANCStatus = 0x00004000 ; autonegotiation completed
|
||||
FBE = 0x00002000 ; fatal bus error
|
||||
FBEMask = 0x00001800 ; mask bit12-11
|
||||
ParityErr = 0x00000000 ; parity error
|
||||
TargetErr = 0x00001000 ; target abort
|
||||
MasterErr = 0x00000800 ; master error
|
||||
TUNF = 0x00000400 ; transmit underflow
|
||||
ROVF = 0x00000200 ; receive overflow
|
||||
ETI = 0x00000100 ; transmit early int
|
||||
ERI = 0x00000080 ; receive early int
|
||||
CNTOVF = 0x00000040 ; counter overflow
|
||||
RBU = 0x00000020 ; receive buffer unavailable
|
||||
TBU = 0x00000010 ; transmit buffer unavilable
|
||||
TI = 0x00000008 ; transmit interrupt
|
||||
RI = 0x00000004 ; receive interrupt
|
||||
RxErr = 0x00000002 ; receive error
|
||||
|
||||
; Bits in the NetworkConfig register.
|
||||
|
||||
RxModeMask = 0xe0
|
||||
AcceptAllPhys = 0x80 ; promiscuous mode
|
||||
AcceptBroadcast = 0x40 ; accept broadcast
|
||||
AcceptMulticast = 0x20 ; accept mutlicast
|
||||
AcceptRunt = 0x08 ; receive runt pkt
|
||||
ALP = 0x04 ; receive long pkt
|
||||
AcceptErr = 0x02 ; receive error pkt
|
||||
RxModeMask = 0xe0
|
||||
AcceptAllPhys = 0x80 ; promiscuous mode
|
||||
AcceptBroadcast = 0x40 ; accept broadcast
|
||||
AcceptMulticast = 0x20 ; accept mutlicast
|
||||
AcceptRunt = 0x08 ; receive runt pkt
|
||||
ALP = 0x04 ; receive long pkt
|
||||
AcceptErr = 0x02 ; receive error pkt
|
||||
|
||||
AcceptMyPhys = 0x00000000
|
||||
RxEnable = 0x00000001
|
||||
RxFlowCtrl = 0x00002000
|
||||
TxEnable = 0x00040000
|
||||
TxModeFDX = 0x00100000
|
||||
TxThreshold = 0x00e00000
|
||||
AcceptMyPhys = 0x00000000
|
||||
RxEnable = 0x00000001
|
||||
RxFlowCtrl = 0x00002000
|
||||
TxEnable = 0x00040000
|
||||
TxModeFDX = 0x00100000
|
||||
TxThreshold = 0x00e00000
|
||||
|
||||
PS1000 = 0x00010000
|
||||
PS10 = 0x00080000
|
||||
FD = 0x00100000
|
||||
PS1000 = 0x00010000
|
||||
PS10 = 0x00080000
|
||||
FD = 0x00100000
|
||||
|
||||
|
||||
; Bits in network_desc.status
|
||||
|
||||
RXOWN = 0x80000000 ; own bit
|
||||
FLNGMASK = 0x0fff0000 ; frame length
|
||||
FLNGShift = 16
|
||||
MARSTATUS = 0x00004000 ; multicast address received
|
||||
BARSTATUS = 0x00002000 ; broadcast address received
|
||||
PHYSTATUS = 0x00001000 ; physical address received
|
||||
RXFSD = 0x00000800 ; first descriptor
|
||||
RXLSD = 0x00000400 ; last descriptor
|
||||
ErrorSummary = 0x80 ; error summary
|
||||
RUNT = 0x40 ; runt packet received
|
||||
LONG = 0x20 ; long packet received
|
||||
FAE = 0x10 ; frame align error
|
||||
CRC = 0x08 ; crc error
|
||||
RXER = 0x04 ; receive error
|
||||
RXOWN = 0x80000000 ; own bit
|
||||
FLNGMASK = 0x0fff0000 ; frame length
|
||||
FLNGShift = 16
|
||||
MARSTATUS = 0x00004000 ; multicast address received
|
||||
BARSTATUS = 0x00002000 ; broadcast address received
|
||||
PHYSTATUS = 0x00001000 ; physical address received
|
||||
RXFSD = 0x00000800 ; first descriptor
|
||||
RXLSD = 0x00000400 ; last descriptor
|
||||
ErrorSummary = 0x80 ; error summary
|
||||
RUNT = 0x40 ; runt packet received
|
||||
LONG = 0x20 ; long packet received
|
||||
FAE = 0x10 ; frame align error
|
||||
CRC = 0x08 ; crc error
|
||||
RXER = 0x04 ; receive error
|
||||
|
||||
; rx_desc_control_bits
|
||||
|
||||
RXIC = 0x00800000 ; interrupt control
|
||||
RBSShift = 0
|
||||
RXIC = 0x00800000 ; interrupt control
|
||||
RBSShift = 0
|
||||
|
||||
; tx_desc_status_bits
|
||||
|
||||
TXOWN = 0x80000000 ; own bit
|
||||
JABTO = 0x00004000 ; jabber timeout
|
||||
CSL = 0x00002000 ; carrier sense lost
|
||||
LC = 0x00001000 ; late collision
|
||||
EC = 0x00000800 ; excessive collision
|
||||
UDF = 0x00000400 ; fifo underflow
|
||||
DFR = 0x00000200 ; deferred
|
||||
HF = 0x00000100 ; heartbeat fail
|
||||
NCRMask = 0x000000ff ; collision retry count
|
||||
NCRShift = 0
|
||||
TXOWN = 0x80000000 ; own bit
|
||||
JABTO = 0x00004000 ; jabber timeout
|
||||
CSL = 0x00002000 ; carrier sense lost
|
||||
LC = 0x00001000 ; late collision
|
||||
EC = 0x00000800 ; excessive collision
|
||||
UDF = 0x00000400 ; fifo underflow
|
||||
DFR = 0x00000200 ; deferred
|
||||
HF = 0x00000100 ; heartbeat fail
|
||||
NCRMask = 0x000000ff ; collision retry count
|
||||
NCRShift = 0
|
||||
|
||||
; tx_desc_control_bits
|
||||
|
||||
TXIC = 0x80000000 ; interrupt control
|
||||
ETIControl = 0x40000000 ; early transmit interrupt
|
||||
TXLD = 0x20000000 ; last descriptor
|
||||
TXFD = 0x10000000 ; first descriptor
|
||||
CRCEnable = 0x08000000 ; crc control
|
||||
PADEnable = 0x04000000 ; padding control
|
||||
RetryTxLC = 0x02000000 ; retry late collision
|
||||
PKTSMask = 0x3ff800 ; packet size bit21-11
|
||||
PKTSShift = 11
|
||||
TBSMask = 0x000007ff ; transmit buffer bit 10-0
|
||||
TBSShift = 0
|
||||
TXIC = 0x80000000 ; interrupt control
|
||||
ETIControl = 0x40000000 ; early transmit interrupt
|
||||
TXLD = 0x20000000 ; last descriptor
|
||||
TXFD = 0x10000000 ; first descriptor
|
||||
CRCEnable = 0x08000000 ; crc control
|
||||
PADEnable = 0x04000000 ; padding control
|
||||
RetryTxLC = 0x02000000 ; retry late collision
|
||||
PKTSMask = 0x3ff800 ; packet size bit21-11
|
||||
PKTSShift = 11
|
||||
TBSMask = 0x000007ff ; transmit buffer bit 10-0
|
||||
TBSShift = 0
|
||||
|
||||
; BootROM/EEPROM/MII Management Register
|
||||
|
||||
MASK_MIIR_MII_READ = 0x00000000
|
||||
MASK_MIIR_MII_WRITE = 0x00000008
|
||||
MASK_MIIR_MII_MDO = 0x00000004
|
||||
MASK_MIIR_MII_MDI = 0x00000002
|
||||
MASK_MIIR_MII_MDC = 0x00000001
|
||||
MASK_MIIR_MII_READ = 0x00000000
|
||||
MASK_MIIR_MII_WRITE = 0x00000008
|
||||
MASK_MIIR_MII_MDO = 0x00000004
|
||||
MASK_MIIR_MII_MDI = 0x00000002
|
||||
MASK_MIIR_MII_MDC = 0x00000001
|
||||
|
||||
; ST+OP+PHYAD+REGAD+TA
|
||||
|
||||
OP_READ = 0x6000 ; ST:01+OP:10+PHYAD+REGAD+TA:Z0
|
||||
OP_WRITE = 0x5002 ; ST:01+OP:01+PHYAD+REGAD+TA:10
|
||||
OP_READ = 0x6000 ; ST:01+OP:10+PHYAD+REGAD+TA:Z0
|
||||
OP_WRITE = 0x5002 ; ST:01+OP:01+PHYAD+REGAD+TA:10
|
||||
|
||||
; -------------------------------------------------------------------------
|
||||
; Constants for Myson PHY
|
||||
; -------------------------------------------------------------------------
|
||||
|
||||
MysonPHYID = 0xd0000302
|
||||
MysonPHYID0 = 0x0302
|
||||
StatusRegister = 18
|
||||
SPEED100 = 0x0400 ; bit10
|
||||
FULLMODE = 0x0800 ; bit11
|
||||
MysonPHYID = 0xd0000302
|
||||
MysonPHYID0 = 0x0302
|
||||
StatusRegister = 18
|
||||
SPEED100 = 0x0400 ; bit10
|
||||
FULLMODE = 0x0800 ; bit11
|
||||
|
||||
; -------------------------------------------------------------------------
|
||||
; Constants for Seeq 80225 PHY
|
||||
; -------------------------------------------------------------------------
|
||||
|
||||
SeeqPHYID0 = 0x0016
|
||||
MIIRegister18 = 18
|
||||
SPD_DET_100 = 0x80
|
||||
DPLX_DET_FULL = 0x40
|
||||
SeeqPHYID0 = 0x0016
|
||||
MIIRegister18 = 18
|
||||
SPD_DET_100 = 0x80
|
||||
DPLX_DET_FULL = 0x40
|
||||
|
||||
; -------------------------------------------------------------------------
|
||||
; Constants for Ahdoc 101 PHY
|
||||
; -------------------------------------------------------------------------
|
||||
|
||||
AhdocPHYID0 = 0x0022
|
||||
DiagnosticReg = 18
|
||||
DPLX_FULL = 0x0800
|
||||
Speed_100 = 0x0400
|
||||
AhdocPHYID0 = 0x0022
|
||||
DiagnosticReg = 18
|
||||
DPLX_FULL = 0x0800
|
||||
Speed_100 = 0x0400
|
||||
|
||||
; --------------------------------------------------------------------------
|
||||
; Constants
|
||||
; --------------------------------------------------------------------------
|
||||
|
||||
MarvellPHYID0 = 0x0141
|
||||
LevelOnePHYID0 = 0x0013
|
||||
MarvellPHYID0 = 0x0141
|
||||
LevelOnePHYID0 = 0x0013
|
||||
|
||||
MII1000BaseTControlReg = 9
|
||||
MII1000BaseTStatusReg = 10
|
||||
SpecificReg = 17
|
||||
MII1000BaseTControlReg = 9
|
||||
MII1000BaseTStatusReg = 10
|
||||
SpecificReg = 17
|
||||
|
||||
; for 1000BaseT Control Register
|
||||
|
||||
PHYAbletoPerform1000FullDuplex = 0x0200
|
||||
PHYAbletoPerform1000HalfDuplex = 0x0100
|
||||
PHY1000AbilityMask = 0x300
|
||||
PHYAbletoPerform1000FullDuplex = 0x0200
|
||||
PHYAbletoPerform1000HalfDuplex = 0x0100
|
||||
PHY1000AbilityMask = 0x300
|
||||
|
||||
; for phy specific status register, marvell phy.
|
||||
|
||||
SpeedMask = 0x0c000
|
||||
Speed_1000M = 0x08000
|
||||
Speed_100M = 0x4000
|
||||
Speed_10M = 0
|
||||
Full_Duplex = 0x2000
|
||||
SpeedMask = 0x0c000
|
||||
Speed_1000M = 0x08000
|
||||
Speed_100M = 0x4000
|
||||
Speed_10M = 0
|
||||
Full_Duplex = 0x2000
|
||||
|
||||
; for phy specific status register, levelone phy
|
||||
|
||||
LXT1000_100M = 0x08000
|
||||
LXT1000_1000M = 0x0c000
|
||||
LXT1000_Full = 0x200
|
||||
LXT1000_100M = 0x08000
|
||||
LXT1000_1000M = 0x0c000
|
||||
LXT1000_Full = 0x200
|
||||
|
||||
; for PHY
|
||||
|
||||
LinkIsUp = 0x0004
|
||||
LinkIsUp2 = 0x00040000
|
||||
LinkIsUp = 0x0004
|
||||
LinkIsUp2 = 0x00040000
|
||||
|
||||
|
||||
|
||||
@ -406,8 +406,6 @@ proc service_proc stdcall, ioctl:dword
|
||||
|
||||
mov [device.reset], reset
|
||||
mov [device.transmit], transmit
|
||||
mov [device.get_MAC], read_mac
|
||||
mov [device.set_MAC], write_mac
|
||||
mov [device.unload], unload
|
||||
mov [device.name], my_service
|
||||
|
||||
@ -714,8 +712,11 @@ reset:
|
||||
rep stosd
|
||||
|
||||
mov [device.mtu], 1514
|
||||
xor eax, eax
|
||||
|
||||
; Set link state to unknown
|
||||
mov [device.state], ETH_LINK_UNKOWN
|
||||
|
||||
xor eax, eax
|
||||
ret
|
||||
|
||||
|
||||
|
@ -22,6 +22,15 @@ include 'bus/pci.inc'
|
||||
NET_TYPE_ETH = 1
|
||||
NET_TYPE_SLIP = 2
|
||||
|
||||
; link state
|
||||
|
||||
ETH_LINK_DOWN = 0 ; Link is down
|
||||
ETH_LINK_UNKOWN = 1b ; There could be an active link
|
||||
ETH_LINK_FD = 10b ; full duplex flag
|
||||
ETH_LINK_10M = 100b ; 10 mbit
|
||||
ETH_LINK_100M = 1000b ; 100 mbit
|
||||
ETH_LINK_1G = 10000b ; gigabit
|
||||
|
||||
|
||||
LAST_IO = 0
|
||||
macro set_io addr {
|
||||
@ -117,6 +126,9 @@ macro NET_DEVICE {
|
||||
.packets_tx dd ? ;
|
||||
.packets_rx dd ? ;
|
||||
|
||||
.state dd ? ; link state (0 = no link)
|
||||
.hwacc dd ? ; bitmask stating enabled HW accelerations
|
||||
|
||||
.end:
|
||||
}
|
||||
|
||||
@ -124,15 +136,8 @@ macro NET_DEVICE {
|
||||
macro ETH_DEVICE {
|
||||
NET_DEVICE
|
||||
|
||||
.set_mode dd ?
|
||||
.get_mode dd ?
|
||||
|
||||
.set_MAC dd ?
|
||||
.get_MAC dd ?
|
||||
|
||||
.mode dd ?
|
||||
.mac dp ?
|
||||
dp ? ; qword alignment
|
||||
dw ? ; qword alignment
|
||||
|
||||
}
|
||||
|
||||
@ -141,9 +146,4 @@ macro ETH_DEVICE {
|
||||
macro SLIP_DEVICE {
|
||||
NET_DEVICE
|
||||
|
||||
.set_mode dd ?
|
||||
.get_mode dd ?
|
||||
|
||||
.mode dd ?
|
||||
|
||||
}
|
@ -446,8 +446,6 @@ proc service_proc stdcall, ioctl:dword
|
||||
|
||||
mov [device.reset], reset
|
||||
mov [device.transmit], transmit
|
||||
mov [device.get_MAC], read_mac
|
||||
mov [device.set_MAC], write_mac
|
||||
mov [device.unload], unload
|
||||
mov [device.name], my_service
|
||||
|
||||
@ -874,6 +872,9 @@ reset:
|
||||
; Set the mtu, kernel will be able to send now
|
||||
mov [device.mtu], 1514
|
||||
|
||||
; get link status
|
||||
call cable
|
||||
|
||||
DEBUGF 1,"reset complete\n"
|
||||
xor eax, eax
|
||||
ret
|
||||
|
@ -634,8 +634,6 @@ proc service_proc stdcall, ioctl:dword
|
||||
|
||||
mov [device.reset], reset
|
||||
mov [device.transmit], transmit
|
||||
mov [device.get_MAC], read_mac
|
||||
mov [device.set_MAC], .fail
|
||||
mov [device.unload], unload
|
||||
mov [device.name], my_service
|
||||
|
||||
@ -1006,9 +1004,11 @@ reset:
|
||||
; Set the mtu, kernel will be able to send now
|
||||
mov [device.mtu], 1514
|
||||
|
||||
; Set link state to unknown
|
||||
mov [device.state], ETH_LINK_UNKOWN
|
||||
|
||||
; say reset was successfull
|
||||
xor eax, eax
|
||||
|
||||
ret
|
||||
|
||||
|
||||
|
@ -328,10 +328,8 @@ service_proc:
|
||||
movzx ecx, byte[eax+2]
|
||||
mov [device.pci_dev], ecx
|
||||
; 4j. Fill in the direct call addresses into the struct.
|
||||
; Note that get_MAC pointer is filled in initialization by probe.
|
||||
mov [device.reset], reset
|
||||
mov [device.transmit], transmit
|
||||
mov [device.set_MAC], write_mac
|
||||
mov [device.unload], unload
|
||||
mov [device.name], my_service
|
||||
|
||||
@ -439,10 +437,8 @@ probe:
|
||||
jmp .tableloop
|
||||
|
||||
.ok:
|
||||
mov eax, [esi + 4] ; Get pointer to "get MAC" function
|
||||
mov [device.get_MAC], eax
|
||||
|
||||
call [device.get_MAC]
|
||||
call dword[esi + 4] ; "get MAC" function
|
||||
|
||||
; Set table entries
|
||||
mov [device.table_entries], 16
|
||||
@ -662,8 +658,11 @@ reset:
|
||||
out dx, eax
|
||||
|
||||
mov [device.mtu], 1514
|
||||
xor eax, eax
|
||||
|
||||
; Set link state to unknown
|
||||
mov [device.state], ETH_LINK_UNKOWN
|
||||
|
||||
xor eax, eax
|
||||
ret
|
||||
|
||||
.fail:
|
||||
|
@ -28,13 +28,6 @@ ends
|
||||
|
||||
struct ETH_DEVICE NET_DEVICE
|
||||
|
||||
set_mode dd ?
|
||||
get_mode dd ?
|
||||
|
||||
set_MAC dd ?
|
||||
get_MAC dd ?
|
||||
|
||||
mode dd ?
|
||||
mac dp ?
|
||||
|
||||
ends
|
||||
@ -199,7 +192,7 @@ ETH_api:
|
||||
dd .bytes_tx ; 2
|
||||
dd .bytes_rx ; 3
|
||||
dd .read_mac ; 4
|
||||
dd .write_mac ; 5
|
||||
dd .state ; 5
|
||||
.number = ($ - .table) / 4 - 1
|
||||
|
||||
.error:
|
||||
@ -234,9 +227,7 @@ ETH_api:
|
||||
mov [esp+20+4], ebx ; TODO: fix this ugly code
|
||||
ret
|
||||
|
||||
.write_mac:
|
||||
push ecx
|
||||
push dx
|
||||
call [eax + ETH_DEVICE.set_MAC]
|
||||
.state:
|
||||
mov eax, [eax + NET_DEVICE.state]
|
||||
ret
|
||||
|
||||
|
@ -148,7 +148,8 @@ struct NET_DEVICE
|
||||
packets_tx dd ? ;
|
||||
packets_rx dd ? ;
|
||||
|
||||
; hwacc dd ? ; bitmask stating available hardware accelerations (offload engines)
|
||||
state dd ? ; link state (0 = no link)
|
||||
hwacc dd ? ; bitmask stating enabled HW accelerations (offload engines)
|
||||
|
||||
ends
|
||||
|
||||
@ -290,9 +291,13 @@ stack_handler:
|
||||
align 4
|
||||
NET_link_changed:
|
||||
|
||||
DEBUGF 1,"NET_link_changed: %x\n", ebx
|
||||
|
||||
align 4
|
||||
NET_send_event:
|
||||
|
||||
DEBUGF 1,"NET_send_event\n"
|
||||
|
||||
; Send event to all applications
|
||||
push edi ecx
|
||||
mov edi, SLOT_BASE
|
||||
|
Loading…
Reference in New Issue
Block a user