forked from KolibriOS/kolibrios
136 lines
5.7 KiB
NASM
136 lines
5.7 KiB
NASM
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;throttle_divide.asm
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;
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;********************************************************************************
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;* div16u *
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;* Second Level Subroutine *
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;* *
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;* Program from Atmel file avr200.asm *
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;* *
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;* Since the 25kHz pwm cycle is 64 clock cycles long, this subroutine *
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;* requires 3.67 to 3.92 25kHz clock cycles. *
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;* *
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;* A single line was added which adds 3 to Cycle_count *
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;* *
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;* Inputs: HILOCAL2:HILOCAL1 and B_TEMPLOCAL1:B_TEMPLOCAL *
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;* Returns: HILOCAL2:HILOCAL1 = HILOCAL2:HILOCAL1 / B_TEMPLOCAL1:B_TEMPLOCAL *
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;* LOLOCAL2:LOLOCAL1 = remainder *
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;* Changed: B_TEMPLOCAL2 *
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;* *
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;* Calls: Not allowed *
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;********************************************************************************
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B_TEMPLOCAL2 dcnt16u ; Local counter
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HILOCAL1 dd16uL ; 16 bit Innput
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HILOCAL2 dd16uH
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B_TEMPLOCAL dv16uL ; 16 bit Input
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B_TEMPLOCAL1 dv16uH
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HILOCAL1 dres16uL ; 16 bit Output
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HILOCAL2 dres16uH
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LOWLOCAL1 drem16uL ; 16 bit Remainder
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LOWLOCAL2 drem16uH ;
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;<ATMEL ROUTINE>
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;***************************************************************************
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;*
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;* "div16u" - 16/16 Bit Unsigned Division
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;*
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;* This subroutine divides the two 16-bit numbers
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;* "dd16uH:dd16uL" (dividend) and "dv16uH:dv16uL" (divisor).
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;* The result is placed in "dres16uH:dres16uL" and the remainder in
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;* "drem16uH:drem16uL".
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;*
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;* Number of words :19
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;* Number of cycles :235/251 (Min/Max)
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;* Low registers used :2 (drem16uL,drem16uH)
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;* High registers used :5 (dres16uL/dd16uL,dres16uH/dd16uH,dv16uL,dv16uH,
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;* dcnt16u)
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;*
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;***************************************************************************
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;***** Subroutine Register Variables
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;.def drem16uL= r14 ; Reassigned
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;.def drem16uH= r15
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;.def dres16uL= r16
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;.def dres16uH= r17
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;.def dd16uL= r16
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;.def dd16uH= r17
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;.def dv16uL= r18
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;.def dv16uH= r19
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;.def dcnt16u= r20
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;***** Code
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div16u:
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clr drem16uL ; clear remainder Low byte
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sub drem16uH,drem16uH ; clear remainder High byte and carry
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ldi dcnt16u,17 ; init loop counter
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d16u_1:
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rol dd16uL ; shift left dividend
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rol dd16uH
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dec dcnt16u ; decrement counter
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brne d16u_2 ; if done
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subi Cycle_count,256-3 ; Add 3 to Cycle_count
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ret ; return
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d16u_2:
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rol drem16uL ; shift dividend into remainder
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rol drem16uH
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sub drem16uL,dv16uL ; remainder = remainder - divisor
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sbc drem16uH,dv16uH ;
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brcc d16u_3 ;
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add drem16uL,dv16uL ; if result negative
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adc drem16uH,dv16uH ; restore remainder
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clc ; clear carry to be shifted into result
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rjmp d16u_1 ;
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d16u_3: ; if result NOT negative
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sec ; set carry to be shifted into result
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rjmp d16u_1
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;<END ATMEL ROUTINE>
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;********************************************************************************
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;* DIVIDE_16_SIMPLE *
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;* Second Level Subroutine *
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;* *
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;* Inputs: dd16uH:dd16ul and dv16uL *
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;* Returns: dres16uH:dres16uL = dd8uH:dd8uL / 2^dv16uL *
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;* *
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;* Changed: nothing else *
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;* N.B that dd16uH, dd16uL, dv16uH and dv16uL are aliases for: *
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;* dd16uH=error_hi *
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;* dd16uL=error_lo *
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;* dv16uH=B_TempX *
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;* dv16uL=B_TempX *
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;* dcnt16u=B_TempX *
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;* Calls: Not allowed *
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;********************************************************************************
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DIVIDE_16_SIMPLE:
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inc dv16uL
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DIVIDE_16_SIMPLE_LOOP:
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dec dv16uL ; decrement counter
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brne DIVIDE_BY_2
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ret
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DIVIDE_BY_2:
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asr dd16uH ; divide by two
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ror dd16uL
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rjmp DIVIDE_16_SIMPLE_LOOP
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