forked from KolibriOS/kolibrios
359 lines
9.4 KiB
PHP
359 lines
9.4 KiB
PHP
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; ;;
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;; PCI32.INC ;;
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;; ;;
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;; 32 bit PCI driver code ;;
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;; ;;
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;; Version 0.2 December 21st, 2002 ;;
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;; ;;
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;; Author: Victor Prodan, victorprodan@yahoo.com ;;
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;; Credits: ;;
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;; Ralf Brown ;;
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;; Mike Hibbett, mikeh@oceanfree.net ;;
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;; ;;
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;; See file COPYING for details ;;
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;; ;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;***************************************************************************
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; Function
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; pci_api:
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;
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; Description
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; entry point for system PCI calls
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;***************************************************************************
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align 4
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pci_api:
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cmp [pci_access_enabled],1
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jne no_pci_access_for_applications
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or al,al
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jnz pci_fn_1
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; PCI function 0: get pci version (AH.AL)
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movzx eax,word [0x2F0000+0x9022]
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ret
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pci_fn_1:
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cmp al,1
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jnz pci_fn_2
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; PCI function 1: get last bus in AL
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mov al,[0x2F0000+0x9021]
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ret
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pci_fn_2:
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cmp al,2
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jne pci_fn_3
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; PCI function 2: get pci access mechanism
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mov al,[0x2F0000+0x9020]
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ret
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pci_fn_3:
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cmp al,4
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jz pci_read_reg ;byte
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cmp al,5
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jz pci_read_reg ;word
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cmp al,6
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jz pci_read_reg ;dword
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cmp al,8
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jz pci_write_reg ;byte
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cmp al,9
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jz pci_write_reg ;word
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cmp al,10
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jz pci_write_reg ;dword
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no_pci_access_for_applications:
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mov eax,-1
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ret
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;***************************************************************************
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; Function
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; pci_make_config_cmd
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;
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; Description
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; creates a command dword for use with the PCI bus
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; bus # in ah
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; device+func in bh (dddddfff)
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; register in bl
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;
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; command dword returned in eax ( 10000000 bbbbbbbb dddddfff rrrrrr00 )
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;***************************************************************************
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align 4
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pci_make_config_cmd:
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shl eax,8 ; move bus to bits 16-23
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mov ax,bx ; combine all
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and eax,0xffffff
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or eax,0x80000000
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ret
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;***************************************************************************
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; Function
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; pci_read_reg:
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;
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; Description
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; read a register from the PCI config space into EAX/AX/AL
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; IN: ah=bus,device+func=bh,register address=bl
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; number of bytes to read (1,2,4) coded into AL, bits 0-1
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;***************************************************************************
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align 4
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pci_read_reg:
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cmp byte [0x2F0000+0x9020],2 ;what mechanism will we use?
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je pci_read_reg_2
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; mechanism 1
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push esi ; save register size into ESI
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mov esi,eax
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and esi,3
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call pci_make_config_cmd
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mov ebx,eax
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; get current state
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mov dx,0xcf8
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in eax, dx
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push eax
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; set up addressing to config data
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mov eax,ebx
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and al,0xfc ; make address dword-aligned
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out dx,eax
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; get requested DWORD of config data
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mov dl,0xfc
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and bl,3
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or dl,bl ; add to port address first 2 bits of register address
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or esi,esi
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jz pci_read_byte1
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cmp esi,1
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jz pci_read_word1
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cmp esi,2
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jz pci_read_dword1
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jmp pci_fin_read1
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pci_read_byte1:
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in al,dx
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jmp pci_fin_read1
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pci_read_word1:
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in ax,dx
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jmp pci_fin_read1
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pci_read_dword1:
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in eax,dx
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jmp pci_fin_read1
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pci_fin_read1:
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; restore configuration control
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xchg eax,[esp]
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mov dx,0xcf8
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out dx,eax
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pop eax
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pop esi
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ret
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pci_read_reg_2:
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test bh,128 ;mech#2 only supports 16 devices per bus
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jnz pci_read_reg_err
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push esi ; save register size into ESI
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mov esi,eax
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and esi,3
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push eax
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;store current state of config space
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mov dx,0xcf8
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in al,dx
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mov ah,al
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mov dl,0xfa
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in al,dx
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xchg eax,[esp]
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; out 0xcfa,bus
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mov al,ah
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out dx,al
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; out 0xcf8,0x80
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mov dl,0xf8
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mov al,0x80
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out dx,al
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; compute addr
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shr bh,3 ; func is ignored in mechanism 2
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or bh,0xc0
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mov dx,bx
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or esi,esi
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jz pci_read_byte2
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cmp esi,1
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jz pci_read_word2
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cmp esi,2
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jz pci_read_dword2
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jmp pci_fin_read2
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pci_read_byte2:
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in al,dx
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jmp pci_fin_read2
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pci_read_word2:
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in ax,dx
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jmp pci_fin_read2
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pci_read_dword2:
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in eax,dx
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; jmp pci_fin_read2
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pci_fin_read2:
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; restore configuration space
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xchg eax,[esp]
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mov dx,0xcfa
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out dx,al
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mov dl,0xf8
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mov al,ah
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out dx,al
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pop eax
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pop esi
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ret
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pci_read_reg_err:
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xor eax,eax
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dec eax
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ret
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;***************************************************************************
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; Function
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; pci_write_reg:
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;
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; Description
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; write a register from ECX/CX/CL into the PCI config space
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; IN: ah=bus,device+func=bh,register address (dword aligned)=bl,
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; value to write in ecx
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; number of bytes to write (1,2,4) coded into AL, bits 0-1
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;***************************************************************************
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align 4
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pci_write_reg:
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cmp byte [0x2F0000+0x9020],2 ;what mechanism will we use?
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je pci_write_reg_2
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; mechanism 1
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push esi ; save register size into ESI
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mov esi,eax
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and esi,3
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call pci_make_config_cmd
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mov ebx,eax
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; get current state into ecx
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mov dx,0xcf8
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in eax, dx
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push eax
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; set up addressing to config data
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mov eax,ebx
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and al,0xfc ; make address dword-aligned
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out dx,eax
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; write DWORD of config data
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mov dl,0xfc
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and bl,3
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or dl,bl
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mov eax,ecx
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or esi,esi
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jz pci_write_byte1
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cmp esi,1
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jz pci_write_word1
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cmp esi,2
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jz pci_write_dword1
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jmp pci_fin_write1
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pci_write_byte1:
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out dx,al
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jmp pci_fin_write1
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pci_write_word1:
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out dx,ax
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jmp pci_fin_write1
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pci_write_dword1:
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out dx,eax
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jmp pci_fin_write1
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pci_fin_write1:
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; restore configuration control
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pop eax
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mov dl,0xf8
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out dx,eax
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xor eax,eax
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pop esi
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ret
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pci_write_reg_2:
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test bh,128 ;mech#2 only supports 16 devices per bus
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jnz pci_write_reg_err
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push esi ; save register size into ESI
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mov esi,eax
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and esi,3
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push eax
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;store current state of config space
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mov dx,0xcf8
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in al,dx
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mov ah,al
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mov dl,0xfa
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in al,dx
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xchg eax,[esp]
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; out 0xcfa,bus
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mov al,ah
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out dx,al
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; out 0xcf8,0x80
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mov dl,0xf8
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mov al,0x80
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out dx,al
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; compute addr
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shr bh,3 ; func is ignored in mechanism 2
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or bh,0xc0
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mov dx,bx
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; write register
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mov eax,ecx
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or esi,esi
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jz pci_write_byte2
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cmp esi,1
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jz pci_write_word2
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cmp esi,2
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jz pci_write_dword2
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jmp pci_fin_write2
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pci_write_byte2:
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out dx,al
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jmp pci_fin_write2
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pci_write_word2:
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out dx,ax
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jmp pci_fin_write2
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pci_write_dword2:
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out dx,eax
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jmp pci_fin_write2
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pci_fin_write2:
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; restore configuration space
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pop eax
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mov dx,0xcfa
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out dx,al
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mov dl,0xf8
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mov al,ah
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out dx,al
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xor eax,eax
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pop esi
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ret
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pci_write_reg_err:
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xor eax,eax
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dec eax
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ret
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